11da177e4SLinus Torvalds /*
21da177e4SLinus Torvalds * SiS AGPGART routines.
31da177e4SLinus Torvalds */
41da177e4SLinus Torvalds
51da177e4SLinus Torvalds #include <linux/module.h>
61da177e4SLinus Torvalds #include <linux/pci.h>
71da177e4SLinus Torvalds #include <linux/init.h>
81da177e4SLinus Torvalds #include <linux/agp_backend.h>
91da177e4SLinus Torvalds #include <linux/delay.h>
101da177e4SLinus Torvalds #include "agp.h"
111da177e4SLinus Torvalds
121da177e4SLinus Torvalds #define SIS_ATTBASE 0x90
131da177e4SLinus Torvalds #define SIS_APSIZE 0x94
141da177e4SLinus Torvalds #define SIS_TLBCNTRL 0x97
151da177e4SLinus Torvalds #define SIS_TLBFLUSH 0x98
161da177e4SLinus Torvalds
172e374748SChaoyu Chen #define PCI_DEVICE_ID_SI_662 0x0662
182e374748SChaoyu Chen #define PCI_DEVICE_ID_SI_671 0x0671
192e374748SChaoyu Chen
200bbed20eSBill Pemberton static bool agp_sis_force_delay = 0;
210bbed20eSBill Pemberton static int agp_sis_agp_spec = -1;
221da177e4SLinus Torvalds
sis_fetch_size(void)231da177e4SLinus Torvalds static int sis_fetch_size(void)
241da177e4SLinus Torvalds {
251da177e4SLinus Torvalds u8 temp_size;
261da177e4SLinus Torvalds int i;
271da177e4SLinus Torvalds struct aper_size_info_8 *values;
281da177e4SLinus Torvalds
291da177e4SLinus Torvalds pci_read_config_byte(agp_bridge->dev, SIS_APSIZE, &temp_size);
301da177e4SLinus Torvalds values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
311da177e4SLinus Torvalds for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
321da177e4SLinus Torvalds if ((temp_size == values[i].size_value) ||
33b7d0640fSStuart Bennett ((temp_size & ~(0x07)) ==
34b7d0640fSStuart Bennett (values[i].size_value & ~(0x07)))) {
351da177e4SLinus Torvalds agp_bridge->previous_size =
361da177e4SLinus Torvalds agp_bridge->current_size = (void *) (values + i);
371da177e4SLinus Torvalds
381da177e4SLinus Torvalds agp_bridge->aperture_size_idx = i;
391da177e4SLinus Torvalds return values[i].size;
401da177e4SLinus Torvalds }
411da177e4SLinus Torvalds }
421da177e4SLinus Torvalds
431da177e4SLinus Torvalds return 0;
441da177e4SLinus Torvalds }
451da177e4SLinus Torvalds
sis_tlbflush(struct agp_memory * mem)461da177e4SLinus Torvalds static void sis_tlbflush(struct agp_memory *mem)
471da177e4SLinus Torvalds {
481da177e4SLinus Torvalds pci_write_config_byte(agp_bridge->dev, SIS_TLBFLUSH, 0x02);
491da177e4SLinus Torvalds }
501da177e4SLinus Torvalds
sis_configure(void)511da177e4SLinus Torvalds static int sis_configure(void)
521da177e4SLinus Torvalds {
531da177e4SLinus Torvalds struct aper_size_info_8 *current_size;
541da177e4SLinus Torvalds
551da177e4SLinus Torvalds current_size = A_SIZE_8(agp_bridge->current_size);
561da177e4SLinus Torvalds pci_write_config_byte(agp_bridge->dev, SIS_TLBCNTRL, 0x05);
57e501b3d8SBjorn Helgaas agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
58e501b3d8SBjorn Helgaas AGP_APERTURE_BAR);
591da177e4SLinus Torvalds pci_write_config_dword(agp_bridge->dev, SIS_ATTBASE,
601da177e4SLinus Torvalds agp_bridge->gatt_bus_addr);
611da177e4SLinus Torvalds pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
621da177e4SLinus Torvalds current_size->size_value);
631da177e4SLinus Torvalds return 0;
641da177e4SLinus Torvalds }
651da177e4SLinus Torvalds
sis_cleanup(void)661da177e4SLinus Torvalds static void sis_cleanup(void)
671da177e4SLinus Torvalds {
681da177e4SLinus Torvalds struct aper_size_info_8 *previous_size;
691da177e4SLinus Torvalds
701da177e4SLinus Torvalds previous_size = A_SIZE_8(agp_bridge->previous_size);
711da177e4SLinus Torvalds pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,
721da177e4SLinus Torvalds (previous_size->size_value & ~(0x03)));
731da177e4SLinus Torvalds }
741da177e4SLinus Torvalds
sis_delayed_enable(struct agp_bridge_data * bridge,u32 mode)751da177e4SLinus Torvalds static void sis_delayed_enable(struct agp_bridge_data *bridge, u32 mode)
761da177e4SLinus Torvalds {
771da177e4SLinus Torvalds struct pci_dev *device = NULL;
781da177e4SLinus Torvalds u32 command;
791da177e4SLinus Torvalds int rate;
801da177e4SLinus Torvalds
81e3cf6951SBjorn Helgaas dev_info(&agp_bridge->dev->dev, "AGP %d.%d bridge\n",
82e3cf6951SBjorn Helgaas agp_bridge->major_version, agp_bridge->minor_version);
831da177e4SLinus Torvalds
841da177e4SLinus Torvalds pci_read_config_dword(agp_bridge->dev, agp_bridge->capndx + PCI_AGP_STATUS, &command);
851da177e4SLinus Torvalds command = agp_collect_device_status(bridge, mode, command);
861da177e4SLinus Torvalds command |= AGPSTAT_AGP_ENABLE;
871da177e4SLinus Torvalds rate = (command & 0x7) << 2;
881da177e4SLinus Torvalds
891da177e4SLinus Torvalds for_each_pci_dev(device) {
901da177e4SLinus Torvalds u8 agp = pci_find_capability(device, PCI_CAP_ID_AGP);
911da177e4SLinus Torvalds if (!agp)
921da177e4SLinus Torvalds continue;
931da177e4SLinus Torvalds
94e3cf6951SBjorn Helgaas dev_info(&agp_bridge->dev->dev, "putting AGP V3 device at %s into %dx mode\n",
951da177e4SLinus Torvalds pci_name(device), rate);
961da177e4SLinus Torvalds
971da177e4SLinus Torvalds pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
981da177e4SLinus Torvalds
991da177e4SLinus Torvalds /*
1001da177e4SLinus Torvalds * Weird: on some sis chipsets any rate change in the target
1011da177e4SLinus Torvalds * command register triggers a 5ms screwup during which the master
1021da177e4SLinus Torvalds * cannot be configured
1031da177e4SLinus Torvalds */
1041da177e4SLinus Torvalds if (device->device == bridge->dev->device) {
105e3cf6951SBjorn Helgaas dev_info(&agp_bridge->dev->dev, "SiS delay workaround: giving bridge time to recover\n");
1061da177e4SLinus Torvalds msleep(10);
1071da177e4SLinus Torvalds }
1081da177e4SLinus Torvalds }
1091da177e4SLinus Torvalds }
1101da177e4SLinus Torvalds
111e5524f35SDave Jones static const struct aper_size_info_8 sis_generic_sizes[7] =
1121da177e4SLinus Torvalds {
1131da177e4SLinus Torvalds {256, 65536, 6, 99},
1141da177e4SLinus Torvalds {128, 32768, 5, 83},
1151da177e4SLinus Torvalds {64, 16384, 4, 67},
1161da177e4SLinus Torvalds {32, 8192, 3, 51},
1171da177e4SLinus Torvalds {16, 4096, 2, 35},
1181da177e4SLinus Torvalds {8, 2048, 1, 19},
1191da177e4SLinus Torvalds {4, 1024, 0, 3}
1201da177e4SLinus Torvalds };
1211da177e4SLinus Torvalds
122408b664aSAdrian Bunk static struct agp_bridge_driver sis_driver = {
1231da177e4SLinus Torvalds .owner = THIS_MODULE,
1241da177e4SLinus Torvalds .aperture_sizes = sis_generic_sizes,
1251da177e4SLinus Torvalds .size_type = U8_APER_SIZE,
1261da177e4SLinus Torvalds .num_aperture_sizes = 7,
12761cf0593SJerome Glisse .needs_scratch_page = true,
1281da177e4SLinus Torvalds .configure = sis_configure,
1291da177e4SLinus Torvalds .fetch_size = sis_fetch_size,
1301da177e4SLinus Torvalds .cleanup = sis_cleanup,
1311da177e4SLinus Torvalds .tlb_flush = sis_tlbflush,
1321da177e4SLinus Torvalds .mask_memory = agp_generic_mask_memory,
1331da177e4SLinus Torvalds .masks = NULL,
1341da177e4SLinus Torvalds .agp_enable = agp_generic_enable,
1351da177e4SLinus Torvalds .cache_flush = global_cache_flush,
1361da177e4SLinus Torvalds .create_gatt_table = agp_generic_create_gatt_table,
1371da177e4SLinus Torvalds .free_gatt_table = agp_generic_free_gatt_table,
1381da177e4SLinus Torvalds .insert_memory = agp_generic_insert_memory,
1391da177e4SLinus Torvalds .remove_memory = agp_generic_remove_memory,
1401da177e4SLinus Torvalds .alloc_by_type = agp_generic_alloc_by_type,
1411da177e4SLinus Torvalds .free_by_type = agp_generic_free_by_type,
1421da177e4SLinus Torvalds .agp_alloc_page = agp_generic_alloc_page,
1435f310b63SRene Herman .agp_alloc_pages = agp_generic_alloc_pages,
1441da177e4SLinus Torvalds .agp_destroy_page = agp_generic_destroy_page,
1455f310b63SRene Herman .agp_destroy_pages = agp_generic_destroy_pages,
146bf1e5989SThomas Hellstrom .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1471da177e4SLinus Torvalds };
1481da177e4SLinus Torvalds
1491da177e4SLinus Torvalds // chipsets that require the 'delay hack'
1500bbed20eSBill Pemberton static int sis_broken_chipsets[] = {
1511da177e4SLinus Torvalds PCI_DEVICE_ID_SI_648,
1521da177e4SLinus Torvalds PCI_DEVICE_ID_SI_746,
1531da177e4SLinus Torvalds 0 // terminator
1541da177e4SLinus Torvalds };
1551da177e4SLinus Torvalds
sis_get_driver(struct agp_bridge_data * bridge)156bcd2982aSGreg Kroah-Hartman static void sis_get_driver(struct agp_bridge_data *bridge)
1571da177e4SLinus Torvalds {
1581da177e4SLinus Torvalds int i;
1591da177e4SLinus Torvalds
1601da177e4SLinus Torvalds for (i=0; sis_broken_chipsets[i]!=0; ++i)
1611da177e4SLinus Torvalds if (bridge->dev->device==sis_broken_chipsets[i])
1621da177e4SLinus Torvalds break;
1631da177e4SLinus Torvalds
1641da177e4SLinus Torvalds if (sis_broken_chipsets[i] || agp_sis_force_delay)
1651da177e4SLinus Torvalds sis_driver.agp_enable=sis_delayed_enable;
1661da177e4SLinus Torvalds
1671da177e4SLinus Torvalds // sis chipsets that indicate less than agp3.5
1681da177e4SLinus Torvalds // are not actually fully agp3 compliant
1691da177e4SLinus Torvalds if ((agp_bridge->major_version == 3 && agp_bridge->minor_version >= 5
1701da177e4SLinus Torvalds && agp_sis_agp_spec!=0) || agp_sis_agp_spec==1) {
1711da177e4SLinus Torvalds sis_driver.aperture_sizes = agp3_generic_sizes;
1721da177e4SLinus Torvalds sis_driver.size_type = U16_APER_SIZE;
1731da177e4SLinus Torvalds sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
1741da177e4SLinus Torvalds sis_driver.configure = agp3_generic_configure;
1751da177e4SLinus Torvalds sis_driver.fetch_size = agp3_generic_fetch_size;
1761da177e4SLinus Torvalds sis_driver.cleanup = agp3_generic_cleanup;
1771da177e4SLinus Torvalds sis_driver.tlb_flush = agp3_generic_tlbflush;
1781da177e4SLinus Torvalds }
1791da177e4SLinus Torvalds }
1801da177e4SLinus Torvalds
1811da177e4SLinus Torvalds
agp_sis_probe(struct pci_dev * pdev,const struct pci_device_id * ent)182bcd2982aSGreg Kroah-Hartman static int agp_sis_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1831da177e4SLinus Torvalds {
1841da177e4SLinus Torvalds struct agp_bridge_data *bridge;
1851da177e4SLinus Torvalds u8 cap_ptr;
1861da177e4SLinus Torvalds
1871da177e4SLinus Torvalds cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
1881da177e4SLinus Torvalds if (!cap_ptr)
1891da177e4SLinus Torvalds return -ENODEV;
1901da177e4SLinus Torvalds
1911da177e4SLinus Torvalds
192e3cf6951SBjorn Helgaas dev_info(&pdev->dev, "SiS chipset [%04x/%04x]\n",
193e3cf6951SBjorn Helgaas pdev->vendor, pdev->device);
1941da177e4SLinus Torvalds bridge = agp_alloc_bridge();
1951da177e4SLinus Torvalds if (!bridge)
1961da177e4SLinus Torvalds return -ENOMEM;
1971da177e4SLinus Torvalds
1981da177e4SLinus Torvalds bridge->driver = &sis_driver;
1991da177e4SLinus Torvalds bridge->dev = pdev;
2001da177e4SLinus Torvalds bridge->capndx = cap_ptr;
2011da177e4SLinus Torvalds
2021da177e4SLinus Torvalds get_agp_version(bridge);
2031da177e4SLinus Torvalds
2041da177e4SLinus Torvalds /* Fill in the mode register */
2051da177e4SLinus Torvalds pci_read_config_dword(pdev, bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
2061da177e4SLinus Torvalds sis_get_driver(bridge);
2071da177e4SLinus Torvalds
2081da177e4SLinus Torvalds pci_set_drvdata(pdev, bridge);
2091da177e4SLinus Torvalds return agp_add_bridge(bridge);
2101da177e4SLinus Torvalds }
2111da177e4SLinus Torvalds
agp_sis_remove(struct pci_dev * pdev)21239af33fcSBill Pemberton static void agp_sis_remove(struct pci_dev *pdev)
2131da177e4SLinus Torvalds {
2141da177e4SLinus Torvalds struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
2151da177e4SLinus Torvalds
2161da177e4SLinus Torvalds agp_remove_bridge(bridge);
2171da177e4SLinus Torvalds agp_put_bridge(bridge);
2181da177e4SLinus Torvalds }
2191da177e4SLinus Torvalds
agp_sis_resume(struct device * dev)220746e926bSBjorn Helgaas static int agp_sis_resume(__attribute__((unused)) struct device *dev)
22116469a0eSStuart Bennett {
22216469a0eSStuart Bennett return sis_driver.configure();
22316469a0eSStuart Bennett }
22416469a0eSStuart Bennett
225f2149f0aSArvind Yadav static const struct pci_device_id agp_sis_pci_table[] = {
2261da177e4SLinus Torvalds {
2271da177e4SLinus Torvalds .class = (PCI_CLASS_BRIDGE_HOST << 8),
2281da177e4SLinus Torvalds .class_mask = ~0,
2291da177e4SLinus Torvalds .vendor = PCI_VENDOR_ID_SI,
23091397585SKrzysztof Helt .device = PCI_DEVICE_ID_SI_5591,
23182eab130SOliver Neukum .subvendor = PCI_ANY_ID,
23282eab130SOliver Neukum .subdevice = PCI_ANY_ID,
23382eab130SOliver Neukum },
23482eab130SOliver Neukum {
23582eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
23682eab130SOliver Neukum .class_mask = ~0,
23782eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
23882eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_530,
23982eab130SOliver Neukum .subvendor = PCI_ANY_ID,
24082eab130SOliver Neukum .subdevice = PCI_ANY_ID,
24182eab130SOliver Neukum },
24282eab130SOliver Neukum {
24382eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
24482eab130SOliver Neukum .class_mask = ~0,
24582eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
24682eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_540,
24782eab130SOliver Neukum .subvendor = PCI_ANY_ID,
24882eab130SOliver Neukum .subdevice = PCI_ANY_ID,
24982eab130SOliver Neukum },
25082eab130SOliver Neukum {
25182eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
25282eab130SOliver Neukum .class_mask = ~0,
25382eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
25482eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_550,
25582eab130SOliver Neukum .subvendor = PCI_ANY_ID,
25682eab130SOliver Neukum .subdevice = PCI_ANY_ID,
25782eab130SOliver Neukum },
25882eab130SOliver Neukum {
25982eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
26082eab130SOliver Neukum .class_mask = ~0,
26182eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
26282eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_620,
26382eab130SOliver Neukum .subvendor = PCI_ANY_ID,
26482eab130SOliver Neukum .subdevice = PCI_ANY_ID,
26582eab130SOliver Neukum },
26682eab130SOliver Neukum {
26782eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
26882eab130SOliver Neukum .class_mask = ~0,
26982eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
27082eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_630,
27182eab130SOliver Neukum .subvendor = PCI_ANY_ID,
27282eab130SOliver Neukum .subdevice = PCI_ANY_ID,
27382eab130SOliver Neukum },
27482eab130SOliver Neukum {
27582eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
27682eab130SOliver Neukum .class_mask = ~0,
27782eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
27882eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_635,
27982eab130SOliver Neukum .subvendor = PCI_ANY_ID,
28082eab130SOliver Neukum .subdevice = PCI_ANY_ID,
28182eab130SOliver Neukum },
28282eab130SOliver Neukum {
28382eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
28482eab130SOliver Neukum .class_mask = ~0,
28582eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
28682eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_645,
28782eab130SOliver Neukum .subvendor = PCI_ANY_ID,
28882eab130SOliver Neukum .subdevice = PCI_ANY_ID,
28982eab130SOliver Neukum },
29082eab130SOliver Neukum {
29182eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
29282eab130SOliver Neukum .class_mask = ~0,
29382eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
29482eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_646,
29582eab130SOliver Neukum .subvendor = PCI_ANY_ID,
29682eab130SOliver Neukum .subdevice = PCI_ANY_ID,
29782eab130SOliver Neukum },
29882eab130SOliver Neukum {
29982eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
30082eab130SOliver Neukum .class_mask = ~0,
30182eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
30282eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_648,
30382eab130SOliver Neukum .subvendor = PCI_ANY_ID,
30482eab130SOliver Neukum .subdevice = PCI_ANY_ID,
30582eab130SOliver Neukum },
30682eab130SOliver Neukum {
30782eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
30882eab130SOliver Neukum .class_mask = ~0,
30982eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
31082eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_650,
31182eab130SOliver Neukum .subvendor = PCI_ANY_ID,
31282eab130SOliver Neukum .subdevice = PCI_ANY_ID,
31382eab130SOliver Neukum },
31482eab130SOliver Neukum {
31582eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
31682eab130SOliver Neukum .class_mask = ~0,
31782eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
31882eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_651,
31982eab130SOliver Neukum .subvendor = PCI_ANY_ID,
32082eab130SOliver Neukum .subdevice = PCI_ANY_ID,
32182eab130SOliver Neukum },
32282eab130SOliver Neukum {
32382eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
32482eab130SOliver Neukum .class_mask = ~0,
32582eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
32682eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_655,
32782eab130SOliver Neukum .subvendor = PCI_ANY_ID,
32882eab130SOliver Neukum .subdevice = PCI_ANY_ID,
32982eab130SOliver Neukum },
33082eab130SOliver Neukum {
33182eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
33282eab130SOliver Neukum .class_mask = ~0,
33382eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
33482eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_661,
33582eab130SOliver Neukum .subvendor = PCI_ANY_ID,
33682eab130SOliver Neukum .subdevice = PCI_ANY_ID,
33782eab130SOliver Neukum },
33882eab130SOliver Neukum {
33982eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
34082eab130SOliver Neukum .class_mask = ~0,
34182eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
3422e374748SChaoyu Chen .device = PCI_DEVICE_ID_SI_662,
3432e374748SChaoyu Chen .subvendor = PCI_ANY_ID,
3442e374748SChaoyu Chen .subdevice = PCI_ANY_ID,
3452e374748SChaoyu Chen },
3462e374748SChaoyu Chen {
3472e374748SChaoyu Chen .class = (PCI_CLASS_BRIDGE_HOST << 8),
3482e374748SChaoyu Chen .class_mask = ~0,
3492e374748SChaoyu Chen .vendor = PCI_VENDOR_ID_SI,
3502e374748SChaoyu Chen .device = PCI_DEVICE_ID_SI_671,
3512e374748SChaoyu Chen .subvendor = PCI_ANY_ID,
3522e374748SChaoyu Chen .subdevice = PCI_ANY_ID,
3532e374748SChaoyu Chen },
3542e374748SChaoyu Chen {
3552e374748SChaoyu Chen .class = (PCI_CLASS_BRIDGE_HOST << 8),
3562e374748SChaoyu Chen .class_mask = ~0,
3572e374748SChaoyu Chen .vendor = PCI_VENDOR_ID_SI,
35882eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_730,
35982eab130SOliver Neukum .subvendor = PCI_ANY_ID,
36082eab130SOliver Neukum .subdevice = PCI_ANY_ID,
36182eab130SOliver Neukum },
36282eab130SOliver Neukum {
36382eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
36482eab130SOliver Neukum .class_mask = ~0,
36582eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
36682eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_735,
36782eab130SOliver Neukum .subvendor = PCI_ANY_ID,
36882eab130SOliver Neukum .subdevice = PCI_ANY_ID,
36982eab130SOliver Neukum },
37082eab130SOliver Neukum {
37182eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
37282eab130SOliver Neukum .class_mask = ~0,
37382eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
37482eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_740,
37582eab130SOliver Neukum .subvendor = PCI_ANY_ID,
37682eab130SOliver Neukum .subdevice = PCI_ANY_ID,
37782eab130SOliver Neukum },
37882eab130SOliver Neukum {
37982eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
38082eab130SOliver Neukum .class_mask = ~0,
38182eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
38282eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_741,
38382eab130SOliver Neukum .subvendor = PCI_ANY_ID,
38482eab130SOliver Neukum .subdevice = PCI_ANY_ID,
38582eab130SOliver Neukum },
38682eab130SOliver Neukum {
38782eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
38882eab130SOliver Neukum .class_mask = ~0,
38982eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
39082eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_745,
39182eab130SOliver Neukum .subvendor = PCI_ANY_ID,
39282eab130SOliver Neukum .subdevice = PCI_ANY_ID,
39382eab130SOliver Neukum },
39482eab130SOliver Neukum {
39582eab130SOliver Neukum .class = (PCI_CLASS_BRIDGE_HOST << 8),
39682eab130SOliver Neukum .class_mask = ~0,
39782eab130SOliver Neukum .vendor = PCI_VENDOR_ID_SI,
39882eab130SOliver Neukum .device = PCI_DEVICE_ID_SI_746,
39982eab130SOliver Neukum .subvendor = PCI_ANY_ID,
40082eab130SOliver Neukum .subdevice = PCI_ANY_ID,
40182eab130SOliver Neukum },
4021da177e4SLinus Torvalds { }
4031da177e4SLinus Torvalds };
4041da177e4SLinus Torvalds
4051da177e4SLinus Torvalds MODULE_DEVICE_TABLE(pci, agp_sis_pci_table);
4061da177e4SLinus Torvalds
407746e926bSBjorn Helgaas static DEFINE_SIMPLE_DEV_PM_OPS(agp_sis_pm_ops, NULL, agp_sis_resume);
4086d1adc3dSVaibhav Gupta
4091da177e4SLinus Torvalds static struct pci_driver agp_sis_pci_driver = {
4101da177e4SLinus Torvalds .name = "agpgart-sis",
4111da177e4SLinus Torvalds .id_table = agp_sis_pci_table,
4121da177e4SLinus Torvalds .probe = agp_sis_probe,
4131da177e4SLinus Torvalds .remove = agp_sis_remove,
4146d1adc3dSVaibhav Gupta .driver.pm = &agp_sis_pm_ops,
4151da177e4SLinus Torvalds };
4161da177e4SLinus Torvalds
agp_sis_init(void)4171da177e4SLinus Torvalds static int __init agp_sis_init(void)
4181da177e4SLinus Torvalds {
4191da177e4SLinus Torvalds if (agp_off)
4201da177e4SLinus Torvalds return -EINVAL;
4211da177e4SLinus Torvalds return pci_register_driver(&agp_sis_pci_driver);
4221da177e4SLinus Torvalds }
4231da177e4SLinus Torvalds
agp_sis_cleanup(void)4241da177e4SLinus Torvalds static void __exit agp_sis_cleanup(void)
4251da177e4SLinus Torvalds {
4261da177e4SLinus Torvalds pci_unregister_driver(&agp_sis_pci_driver);
4271da177e4SLinus Torvalds }
4281da177e4SLinus Torvalds
4291da177e4SLinus Torvalds module_init(agp_sis_init);
4301da177e4SLinus Torvalds module_exit(agp_sis_cleanup);
4311da177e4SLinus Torvalds
4321da177e4SLinus Torvalds module_param(agp_sis_force_delay, bool, 0);
4331da177e4SLinus Torvalds MODULE_PARM_DESC(agp_sis_force_delay,"forces sis delay hack");
4341da177e4SLinus Torvalds module_param(agp_sis_agp_spec, int, 0);
4351da177e4SLinus Torvalds MODULE_PARM_DESC(agp_sis_agp_spec,"0=force sis init, 1=force generic agp3 init, default: autodetect");
436*541b1b0aSJeff Johnson MODULE_DESCRIPTION("SiS AGPGART routines");
4371da177e4SLinus Torvalds MODULE_LICENSE("GPL and additional rights");
438