137613fa5SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 237613fa5SGreg Kroah-Hartman // 337613fa5SGreg Kroah-Hartman // Register cache access API 437613fa5SGreg Kroah-Hartman // 537613fa5SGreg Kroah-Hartman // Copyright 2011 Wolfson Microelectronics plc 637613fa5SGreg Kroah-Hartman // 737613fa5SGreg Kroah-Hartman // Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> 89fabe24eSDimitris Papastamos 9f094fea6SMark Brown #include <linux/bsearch.h> 10e39be3a3SXiubo Li #include <linux/device.h> 11e39be3a3SXiubo Li #include <linux/export.h> 12e39be3a3SXiubo Li #include <linux/slab.h> 13c08604b8SDimitris Papastamos #include <linux/sort.h> 149fabe24eSDimitris Papastamos 15f58078daSSteven Rostedt #include "trace.h" 169fabe24eSDimitris Papastamos #include "internal.h" 179fabe24eSDimitris Papastamos 189fabe24eSDimitris Papastamos static const struct regcache_ops *cache_types[] = { 1928644c80SDimitris Papastamos ®cache_rbtree_ops, 20f033c26dSMark Brown ®cache_maple_ops, 212ac902ceSMark Brown ®cache_flat_ops, 229fabe24eSDimitris Papastamos }; 239fabe24eSDimitris Papastamos 249fabe24eSDimitris Papastamos static int regcache_hw_init(struct regmap *map) 259fabe24eSDimitris Papastamos { 269fabe24eSDimitris Papastamos int i, j; 279fabe24eSDimitris Papastamos int ret; 289fabe24eSDimitris Papastamos int count; 293245d460SMark Brown unsigned int reg, val; 309fabe24eSDimitris Papastamos void *tmp_buf; 319fabe24eSDimitris Papastamos 329fabe24eSDimitris Papastamos if (!map->num_reg_defaults_raw) 339fabe24eSDimitris Papastamos return -EINVAL; 349fabe24eSDimitris Papastamos 35fb70067eSXiubo Li /* calculate the size of reg_defaults */ 36fb70067eSXiubo Li for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) 37b2c7f5d9SMaarten ter Huurne if (regmap_readable(map, i * map->reg_stride) && 38b2c7f5d9SMaarten ter Huurne !regmap_volatile(map, i * map->reg_stride)) 39fb70067eSXiubo Li count++; 40fb70067eSXiubo Li 41b2c7f5d9SMaarten ter Huurne /* all registers are unreadable or volatile, so just bypass */ 42fb70067eSXiubo Li if (!count) { 43fb70067eSXiubo Li map->cache_bypass = true; 44fb70067eSXiubo Li return 0; 45fb70067eSXiubo Li } 46fb70067eSXiubo Li 47fb70067eSXiubo Li map->num_reg_defaults = count; 48fb70067eSXiubo Li map->reg_defaults = kmalloc_array(count, sizeof(struct reg_default), 49fb70067eSXiubo Li GFP_KERNEL); 50fb70067eSXiubo Li if (!map->reg_defaults) 51fb70067eSXiubo Li return -ENOMEM; 52fb70067eSXiubo Li 539fabe24eSDimitris Papastamos if (!map->reg_defaults_raw) { 54621a5f7aSViresh Kumar bool cache_bypass = map->cache_bypass; 559fabe24eSDimitris Papastamos dev_warn(map->dev, "No cache defaults, reading back from HW\n"); 56df00c79fSLaxman Dewangan 57df00c79fSLaxman Dewangan /* Bypass the cache access till data read from HW */ 58621a5f7aSViresh Kumar map->cache_bypass = true; 599fabe24eSDimitris Papastamos tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL); 60fb70067eSXiubo Li if (!tmp_buf) { 61fb70067eSXiubo Li ret = -ENOMEM; 62fb70067eSXiubo Li goto err_free; 63fb70067eSXiubo Li } 64eb4cb76fSMark Brown ret = regmap_raw_read(map, 0, tmp_buf, 65d51fe1f3SMaciej S. Szmigiero map->cache_size_raw); 66df00c79fSLaxman Dewangan map->cache_bypass = cache_bypass; 673245d460SMark Brown if (ret == 0) { 689fabe24eSDimitris Papastamos map->reg_defaults_raw = tmp_buf; 69b67498d6SJiapeng Zhong map->cache_free = true; 703245d460SMark Brown } else { 713245d460SMark Brown kfree(tmp_buf); 723245d460SMark Brown } 739fabe24eSDimitris Papastamos } 749fabe24eSDimitris Papastamos 759fabe24eSDimitris Papastamos /* fill the reg_defaults */ 769fabe24eSDimitris Papastamos for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) { 773245d460SMark Brown reg = i * map->reg_stride; 783245d460SMark Brown 793245d460SMark Brown if (!regmap_readable(map, reg)) 809fabe24eSDimitris Papastamos continue; 813245d460SMark Brown 823245d460SMark Brown if (regmap_volatile(map, reg)) 833245d460SMark Brown continue; 843245d460SMark Brown 853245d460SMark Brown if (map->reg_defaults_raw) { 86fbba43c5SXiubo Li val = regcache_get_val(map, map->reg_defaults_raw, i); 873245d460SMark Brown } else { 883245d460SMark Brown bool cache_bypass = map->cache_bypass; 893245d460SMark Brown 903245d460SMark Brown map->cache_bypass = true; 913245d460SMark Brown ret = regmap_read(map, reg, &val); 923245d460SMark Brown map->cache_bypass = cache_bypass; 933245d460SMark Brown if (ret != 0) { 943245d460SMark Brown dev_err(map->dev, "Failed to read %d: %d\n", 953245d460SMark Brown reg, ret); 963245d460SMark Brown goto err_free; 973245d460SMark Brown } 983245d460SMark Brown } 993245d460SMark Brown 1003245d460SMark Brown map->reg_defaults[j].reg = reg; 1019fabe24eSDimitris Papastamos map->reg_defaults[j].def = val; 1029fabe24eSDimitris Papastamos j++; 1039fabe24eSDimitris Papastamos } 1049fabe24eSDimitris Papastamos 1059fabe24eSDimitris Papastamos return 0; 106021cd616SLars-Peter Clausen 107021cd616SLars-Peter Clausen err_free: 108fb70067eSXiubo Li kfree(map->reg_defaults); 109021cd616SLars-Peter Clausen 110021cd616SLars-Peter Clausen return ret; 1119fabe24eSDimitris Papastamos } 1129fabe24eSDimitris Papastamos 113e5e3b8abSLars-Peter Clausen int regcache_init(struct regmap *map, const struct regmap_config *config) 1149fabe24eSDimitris Papastamos { 1159fabe24eSDimitris Papastamos int ret; 1169fabe24eSDimitris Papastamos int i; 1179fabe24eSDimitris Papastamos void *tmp_buf; 1189fabe24eSDimitris Papastamos 119e7a6db30SMark Brown if (map->cache_type == REGCACHE_NONE) { 1208cfe2fd3SXiubo Li if (config->reg_defaults || config->num_reg_defaults_raw) 1218cfe2fd3SXiubo Li dev_warn(map->dev, 1228cfe2fd3SXiubo Li "No cache used with register defaults set!\n"); 1238cfe2fd3SXiubo Li 124e7a6db30SMark Brown map->cache_bypass = true; 1259fabe24eSDimitris Papastamos return 0; 126e7a6db30SMark Brown } 1279fabe24eSDimitris Papastamos 128167f7066SXiubo Li if (config->reg_defaults && !config->num_reg_defaults) { 129167f7066SXiubo Li dev_err(map->dev, 130167f7066SXiubo Li "Register defaults are set without the number!\n"); 131167f7066SXiubo Li return -EINVAL; 132167f7066SXiubo Li } 133167f7066SXiubo Li 134a5201d42SSchspa Shi if (config->num_reg_defaults && !config->reg_defaults) { 135a5201d42SSchspa Shi dev_err(map->dev, 136a5201d42SSchspa Shi "Register defaults number are set without the reg!\n"); 137a5201d42SSchspa Shi return -EINVAL; 138a5201d42SSchspa Shi } 139a5201d42SSchspa Shi 1408cfe2fd3SXiubo Li for (i = 0; i < config->num_reg_defaults; i++) 1418cfe2fd3SXiubo Li if (config->reg_defaults[i].reg % map->reg_stride) 1428cfe2fd3SXiubo Li return -EINVAL; 1438cfe2fd3SXiubo Li 1449fabe24eSDimitris Papastamos for (i = 0; i < ARRAY_SIZE(cache_types); i++) 1459fabe24eSDimitris Papastamos if (cache_types[i]->type == map->cache_type) 1469fabe24eSDimitris Papastamos break; 1479fabe24eSDimitris Papastamos 1489fabe24eSDimitris Papastamos if (i == ARRAY_SIZE(cache_types)) { 1492d38e861SMark Brown dev_err(map->dev, "Could not match cache type: %d\n", 1509fabe24eSDimitris Papastamos map->cache_type); 1519fabe24eSDimitris Papastamos return -EINVAL; 1529fabe24eSDimitris Papastamos } 1539fabe24eSDimitris Papastamos 154e5e3b8abSLars-Peter Clausen map->num_reg_defaults = config->num_reg_defaults; 155e5e3b8abSLars-Peter Clausen map->num_reg_defaults_raw = config->num_reg_defaults_raw; 156e5e3b8abSLars-Peter Clausen map->reg_defaults_raw = config->reg_defaults_raw; 157064d4db1SLars-Peter Clausen map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8); 158064d4db1SLars-Peter Clausen map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw; 159e5e3b8abSLars-Peter Clausen 1609fabe24eSDimitris Papastamos map->cache = NULL; 1619fabe24eSDimitris Papastamos map->cache_ops = cache_types[i]; 1629fabe24eSDimitris Papastamos 1639fabe24eSDimitris Papastamos if (!map->cache_ops->read || 1649fabe24eSDimitris Papastamos !map->cache_ops->write || 1659fabe24eSDimitris Papastamos !map->cache_ops->name) 1669fabe24eSDimitris Papastamos return -EINVAL; 1679fabe24eSDimitris Papastamos 1689fabe24eSDimitris Papastamos /* We still need to ensure that the reg_defaults 1699fabe24eSDimitris Papastamos * won't vanish from under us. We'll need to make 1709fabe24eSDimitris Papastamos * a copy of it. 1719fabe24eSDimitris Papastamos */ 172720e4616SLars-Peter Clausen if (config->reg_defaults) { 173*f755d695SAndy Shevchenko tmp_buf = kmemdup_array(config->reg_defaults, map->num_reg_defaults, 174*f755d695SAndy Shevchenko sizeof(*map->reg_defaults), GFP_KERNEL); 1759fabe24eSDimitris Papastamos if (!tmp_buf) 1769fabe24eSDimitris Papastamos return -ENOMEM; 1779fabe24eSDimitris Papastamos map->reg_defaults = tmp_buf; 1788528bdd4SMark Brown } else if (map->num_reg_defaults_raw) { 1795fcd2560SMark Brown /* Some devices such as PMICs don't have cache defaults, 1809fabe24eSDimitris Papastamos * we cope with this by reading back the HW registers and 1819fabe24eSDimitris Papastamos * crafting the cache defaults by hand. 1829fabe24eSDimitris Papastamos */ 1839fabe24eSDimitris Papastamos ret = regcache_hw_init(map); 1849fabe24eSDimitris Papastamos if (ret < 0) 1859fabe24eSDimitris Papastamos return ret; 186fb70067eSXiubo Li if (map->cache_bypass) 187fb70067eSXiubo Li return 0; 1889fabe24eSDimitris Papastamos } 1899fabe24eSDimitris Papastamos 1900ec74ad3SJan Dakinevich if (!map->max_register_is_set && map->num_reg_defaults_raw) { 191d6409475SJeongtae Park map->max_register = (map->num_reg_defaults_raw - 1) * map->reg_stride; 1920ec74ad3SJan Dakinevich map->max_register_is_set = true; 1930ec74ad3SJan Dakinevich } 1949fabe24eSDimitris Papastamos 1959fabe24eSDimitris Papastamos if (map->cache_ops->init) { 1969fabe24eSDimitris Papastamos dev_dbg(map->dev, "Initializing %s cache\n", 1979fabe24eSDimitris Papastamos map->cache_ops->name); 198bd061c78SLars-Peter Clausen ret = map->cache_ops->init(map); 199bd061c78SLars-Peter Clausen if (ret) 200bd061c78SLars-Peter Clausen goto err_free; 2019fabe24eSDimitris Papastamos } 2029fabe24eSDimitris Papastamos return 0; 203bd061c78SLars-Peter Clausen 204bd061c78SLars-Peter Clausen err_free: 205bd061c78SLars-Peter Clausen kfree(map->reg_defaults); 206bd061c78SLars-Peter Clausen if (map->cache_free) 207bd061c78SLars-Peter Clausen kfree(map->reg_defaults_raw); 208bd061c78SLars-Peter Clausen 209bd061c78SLars-Peter Clausen return ret; 2109fabe24eSDimitris Papastamos } 2119fabe24eSDimitris Papastamos 2129fabe24eSDimitris Papastamos void regcache_exit(struct regmap *map) 2139fabe24eSDimitris Papastamos { 2149fabe24eSDimitris Papastamos if (map->cache_type == REGCACHE_NONE) 2159fabe24eSDimitris Papastamos return; 2169fabe24eSDimitris Papastamos 2179fabe24eSDimitris Papastamos BUG_ON(!map->cache_ops); 2189fabe24eSDimitris Papastamos 2199fabe24eSDimitris Papastamos kfree(map->reg_defaults); 2209fabe24eSDimitris Papastamos if (map->cache_free) 2219fabe24eSDimitris Papastamos kfree(map->reg_defaults_raw); 2229fabe24eSDimitris Papastamos 2239fabe24eSDimitris Papastamos if (map->cache_ops->exit) { 2249fabe24eSDimitris Papastamos dev_dbg(map->dev, "Destroying %s cache\n", 2259fabe24eSDimitris Papastamos map->cache_ops->name); 2269fabe24eSDimitris Papastamos map->cache_ops->exit(map); 2279fabe24eSDimitris Papastamos } 2289fabe24eSDimitris Papastamos } 2299fabe24eSDimitris Papastamos 2309fabe24eSDimitris Papastamos /** 2312cf8e2dfSCharles Keepax * regcache_read - Fetch the value of a given register from the cache. 2329fabe24eSDimitris Papastamos * 2339fabe24eSDimitris Papastamos * @map: map to configure. 2349fabe24eSDimitris Papastamos * @reg: The register index. 2359fabe24eSDimitris Papastamos * @value: The value to be returned. 2369fabe24eSDimitris Papastamos * 2379fabe24eSDimitris Papastamos * Return a negative value on failure, 0 on success. 2389fabe24eSDimitris Papastamos */ 2399fabe24eSDimitris Papastamos int regcache_read(struct regmap *map, 2409fabe24eSDimitris Papastamos unsigned int reg, unsigned int *value) 2419fabe24eSDimitris Papastamos { 242bc7ee556SMark Brown int ret; 243bc7ee556SMark Brown 2449fabe24eSDimitris Papastamos if (map->cache_type == REGCACHE_NONE) 24524d80fdeSAlexander Stein return -EINVAL; 2469fabe24eSDimitris Papastamos 2479fabe24eSDimitris Papastamos BUG_ON(!map->cache_ops); 2489fabe24eSDimitris Papastamos 249bc7ee556SMark Brown if (!regmap_volatile(map, reg)) { 250bc7ee556SMark Brown ret = map->cache_ops->read(map, reg, value); 251bc7ee556SMark Brown 252bc7ee556SMark Brown if (ret == 0) 253c6b570d9SPhilipp Zabel trace_regmap_reg_read_cache(map, reg, *value); 254bc7ee556SMark Brown 255bc7ee556SMark Brown return ret; 256bc7ee556SMark Brown } 2579fabe24eSDimitris Papastamos 2589fabe24eSDimitris Papastamos return -EINVAL; 2599fabe24eSDimitris Papastamos } 2609fabe24eSDimitris Papastamos 2619fabe24eSDimitris Papastamos /** 2622cf8e2dfSCharles Keepax * regcache_write - Set the value of a given register in the cache. 2639fabe24eSDimitris Papastamos * 2649fabe24eSDimitris Papastamos * @map: map to configure. 2659fabe24eSDimitris Papastamos * @reg: The register index. 2669fabe24eSDimitris Papastamos * @value: The new register value. 2679fabe24eSDimitris Papastamos * 2689fabe24eSDimitris Papastamos * Return a negative value on failure, 0 on success. 2699fabe24eSDimitris Papastamos */ 2709fabe24eSDimitris Papastamos int regcache_write(struct regmap *map, 2719fabe24eSDimitris Papastamos unsigned int reg, unsigned int value) 2729fabe24eSDimitris Papastamos { 2739fabe24eSDimitris Papastamos if (map->cache_type == REGCACHE_NONE) 2749fabe24eSDimitris Papastamos return 0; 2759fabe24eSDimitris Papastamos 2769fabe24eSDimitris Papastamos BUG_ON(!map->cache_ops); 2779fabe24eSDimitris Papastamos 2789fabe24eSDimitris Papastamos if (!regmap_volatile(map, reg)) 2799fabe24eSDimitris Papastamos return map->cache_ops->write(map, reg, value); 2809fabe24eSDimitris Papastamos 2819fabe24eSDimitris Papastamos return 0; 2829fabe24eSDimitris Papastamos } 2839fabe24eSDimitris Papastamos 284bfa0b38cSMark Brown bool regcache_reg_needs_sync(struct regmap *map, unsigned int reg, 2853969fa08SKevin Cernekee unsigned int val) 2863969fa08SKevin Cernekee { 2873969fa08SKevin Cernekee int ret; 2883969fa08SKevin Cernekee 28944e46572STakashi Iwai if (!regmap_writeable(map, reg)) 29044e46572STakashi Iwai return false; 29144e46572STakashi Iwai 2921c79771aSKevin Cernekee /* If we don't know the chip just got reset, then sync everything. */ 2931c79771aSKevin Cernekee if (!map->no_sync_defaults) 2941c79771aSKevin Cernekee return true; 2951c79771aSKevin Cernekee 2963969fa08SKevin Cernekee /* Is this the hardware default? If so skip. */ 2973969fa08SKevin Cernekee ret = regcache_lookup_reg(map, reg); 2983969fa08SKevin Cernekee if (ret >= 0 && val == map->reg_defaults[ret].def) 2993969fa08SKevin Cernekee return false; 3003969fa08SKevin Cernekee return true; 3013969fa08SKevin Cernekee } 3023969fa08SKevin Cernekee 303d856fce4SMaarten ter Huurne static int regcache_default_sync(struct regmap *map, unsigned int min, 304d856fce4SMaarten ter Huurne unsigned int max) 305d856fce4SMaarten ter Huurne { 306d856fce4SMaarten ter Huurne unsigned int reg; 307d856fce4SMaarten ter Huurne 30875617328SDylan Reid for (reg = min; reg <= max; reg += map->reg_stride) { 309d856fce4SMaarten ter Huurne unsigned int val; 310d856fce4SMaarten ter Huurne int ret; 311d856fce4SMaarten ter Huurne 31283f8475cSDylan Reid if (regmap_volatile(map, reg) || 31383f8475cSDylan Reid !regmap_writeable(map, reg)) 314d856fce4SMaarten ter Huurne continue; 315d856fce4SMaarten ter Huurne 316d856fce4SMaarten ter Huurne ret = regcache_read(map, reg, &val); 3172c89db8fSMark Brown if (ret == -ENOENT) 3182c89db8fSMark Brown continue; 319d856fce4SMaarten ter Huurne if (ret) 320d856fce4SMaarten ter Huurne return ret; 321d856fce4SMaarten ter Huurne 3223969fa08SKevin Cernekee if (!regcache_reg_needs_sync(map, reg, val)) 323d856fce4SMaarten ter Huurne continue; 324d856fce4SMaarten ter Huurne 325621a5f7aSViresh Kumar map->cache_bypass = true; 326d856fce4SMaarten ter Huurne ret = _regmap_write(map, reg, val); 327621a5f7aSViresh Kumar map->cache_bypass = false; 328f29a4320SJarkko Nikula if (ret) { 329f29a4320SJarkko Nikula dev_err(map->dev, "Unable to sync register %#x. %d\n", 330f29a4320SJarkko Nikula reg, ret); 331d856fce4SMaarten ter Huurne return ret; 332f29a4320SJarkko Nikula } 333d856fce4SMaarten ter Huurne dev_dbg(map->dev, "Synced register %#x, value %#x\n", reg, val); 334d856fce4SMaarten ter Huurne } 335d856fce4SMaarten ter Huurne 336d856fce4SMaarten ter Huurne return 0; 337d856fce4SMaarten ter Huurne } 338d856fce4SMaarten ter Huurne 3390ec77316SMark Brown static int rbtree_all(const void *key, const struct rb_node *node) 3400ec77316SMark Brown { 3410ec77316SMark Brown return 0; 3420ec77316SMark Brown } 3430ec77316SMark Brown 3449fabe24eSDimitris Papastamos /** 3452cf8e2dfSCharles Keepax * regcache_sync - Sync the register cache with the hardware. 3469fabe24eSDimitris Papastamos * 3479fabe24eSDimitris Papastamos * @map: map to configure. 3489fabe24eSDimitris Papastamos * 3499fabe24eSDimitris Papastamos * Any registers that should not be synced should be marked as 3509fabe24eSDimitris Papastamos * volatile. In general drivers can choose not to use the provided 3519fabe24eSDimitris Papastamos * syncing functionality if they so require. 3529fabe24eSDimitris Papastamos * 3539fabe24eSDimitris Papastamos * Return a negative value on failure, 0 on success. 3549fabe24eSDimitris Papastamos */ 3559fabe24eSDimitris Papastamos int regcache_sync(struct regmap *map) 3569fabe24eSDimitris Papastamos { 357954757d7SDimitris Papastamos int ret = 0; 358954757d7SDimitris Papastamos unsigned int i; 35959360089SDimitris Papastamos const char *name; 360621a5f7aSViresh Kumar bool bypass; 3610ec77316SMark Brown struct rb_node *node; 36259360089SDimitris Papastamos 363fd883d79SAlexander Stein if (WARN_ON(map->cache_type == REGCACHE_NONE)) 364fd883d79SAlexander Stein return -EINVAL; 365fd883d79SAlexander Stein 366d856fce4SMaarten ter Huurne BUG_ON(!map->cache_ops); 3679fabe24eSDimitris Papastamos 36881485f52SLars-Peter Clausen map->lock(map->lock_arg); 369beb1a10fSDimitris Papastamos /* Remember the initial bypass state */ 370beb1a10fSDimitris Papastamos bypass = map->cache_bypass; 3719fabe24eSDimitris Papastamos dev_dbg(map->dev, "Syncing %s cache\n", 3729fabe24eSDimitris Papastamos map->cache_ops->name); 37359360089SDimitris Papastamos name = map->cache_ops->name; 374c6b570d9SPhilipp Zabel trace_regcache_sync(map, name, "start"); 37522f0d90aSMark Brown 3768ae0d7e8SMark Brown if (!map->cache_dirty) 3778ae0d7e8SMark Brown goto out; 378d9db7627SMark Brown 37922f0d90aSMark Brown /* Apply any patch first */ 380621a5f7aSViresh Kumar map->cache_bypass = true; 38122f0d90aSMark Brown for (i = 0; i < map->patch_regs; i++) { 38222f0d90aSMark Brown ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def); 38322f0d90aSMark Brown if (ret != 0) { 38422f0d90aSMark Brown dev_err(map->dev, "Failed to write %x = %x: %d\n", 38522f0d90aSMark Brown map->patch[i].reg, map->patch[i].def, ret); 38622f0d90aSMark Brown goto out; 38722f0d90aSMark Brown } 38822f0d90aSMark Brown } 389621a5f7aSViresh Kumar map->cache_bypass = false; 39022f0d90aSMark Brown 391d856fce4SMaarten ter Huurne if (map->cache_ops->sync) 392ac8d91c8SMark Brown ret = map->cache_ops->sync(map, 0, map->max_register); 393d856fce4SMaarten ter Huurne else 394d856fce4SMaarten ter Huurne ret = regcache_default_sync(map, 0, map->max_register); 395954757d7SDimitris Papastamos 3966ff73738SMark Brown if (ret == 0) 3976ff73738SMark Brown map->cache_dirty = false; 3986ff73738SMark Brown 399954757d7SDimitris Papastamos out: 400beb1a10fSDimitris Papastamos /* Restore the bypass state */ 401beb1a10fSDimitris Papastamos map->cache_bypass = bypass; 4021c79771aSKevin Cernekee map->no_sync_defaults = false; 4030ec77316SMark Brown 4040ec77316SMark Brown /* 4050ec77316SMark Brown * If we did any paging with cache bypassed and a cached 4060ec77316SMark Brown * paging register then the register and cache state might 4070ec77316SMark Brown * have gone out of sync, force writes of all the paging 4080ec77316SMark Brown * registers. 4090ec77316SMark Brown */ 410354662dcSAndy Shevchenko rb_for_each(node, NULL, &map->range_tree, rbtree_all) { 4110ec77316SMark Brown struct regmap_range_node *this = 4120ec77316SMark Brown rb_entry(node, struct regmap_range_node, node); 4130ec77316SMark Brown 4140ec77316SMark Brown /* If there's nothing in the cache there's nothing to sync */ 415fea88064SMatthias Reichl if (regcache_read(map, this->selector_reg, &i) != 0) 4160ec77316SMark Brown continue; 4170ec77316SMark Brown 4180ec77316SMark Brown ret = _regmap_write(map, this->selector_reg, i); 4190ec77316SMark Brown if (ret != 0) { 4200ec77316SMark Brown dev_err(map->dev, "Failed to write %x = %x: %d\n", 4210ec77316SMark Brown this->selector_reg, i, ret); 4220ec77316SMark Brown break; 4230ec77316SMark Brown } 4240ec77316SMark Brown } 4250ec77316SMark Brown 42681485f52SLars-Peter Clausen map->unlock(map->lock_arg); 427954757d7SDimitris Papastamos 428affbe886SMark Brown regmap_async_complete(map); 429affbe886SMark Brown 430c6b570d9SPhilipp Zabel trace_regcache_sync(map, name, "stop"); 431affbe886SMark Brown 432954757d7SDimitris Papastamos return ret; 4339fabe24eSDimitris Papastamos } 4349fabe24eSDimitris Papastamos EXPORT_SYMBOL_GPL(regcache_sync); 4359fabe24eSDimitris Papastamos 43692afb286SMark Brown /** 4372cf8e2dfSCharles Keepax * regcache_sync_region - Sync part of the register cache with the hardware. 4384d4cfd16SMark Brown * 4394d4cfd16SMark Brown * @map: map to sync. 4404d4cfd16SMark Brown * @min: first register to sync 4414d4cfd16SMark Brown * @max: last register to sync 4424d4cfd16SMark Brown * 4434d4cfd16SMark Brown * Write all non-default register values in the specified region to 4444d4cfd16SMark Brown * the hardware. 4454d4cfd16SMark Brown * 4464d4cfd16SMark Brown * Return a negative value on failure, 0 on success. 4474d4cfd16SMark Brown */ 4484d4cfd16SMark Brown int regcache_sync_region(struct regmap *map, unsigned int min, 4494d4cfd16SMark Brown unsigned int max) 4504d4cfd16SMark Brown { 4514d4cfd16SMark Brown int ret = 0; 4524d4cfd16SMark Brown const char *name; 453621a5f7aSViresh Kumar bool bypass; 4544d4cfd16SMark Brown 455fd883d79SAlexander Stein if (WARN_ON(map->cache_type == REGCACHE_NONE)) 456fd883d79SAlexander Stein return -EINVAL; 457fd883d79SAlexander Stein 458d856fce4SMaarten ter Huurne BUG_ON(!map->cache_ops); 4594d4cfd16SMark Brown 46081485f52SLars-Peter Clausen map->lock(map->lock_arg); 4614d4cfd16SMark Brown 4624d4cfd16SMark Brown /* Remember the initial bypass state */ 4634d4cfd16SMark Brown bypass = map->cache_bypass; 4644d4cfd16SMark Brown 4654d4cfd16SMark Brown name = map->cache_ops->name; 4664d4cfd16SMark Brown dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max); 4674d4cfd16SMark Brown 468c6b570d9SPhilipp Zabel trace_regcache_sync(map, name, "start region"); 4694d4cfd16SMark Brown 4704d4cfd16SMark Brown if (!map->cache_dirty) 4714d4cfd16SMark Brown goto out; 4724d4cfd16SMark Brown 473affbe886SMark Brown map->async = true; 474affbe886SMark Brown 475d856fce4SMaarten ter Huurne if (map->cache_ops->sync) 4764d4cfd16SMark Brown ret = map->cache_ops->sync(map, min, max); 477d856fce4SMaarten ter Huurne else 478d856fce4SMaarten ter Huurne ret = regcache_default_sync(map, min, max); 4794d4cfd16SMark Brown 4804d4cfd16SMark Brown out: 4814d4cfd16SMark Brown /* Restore the bypass state */ 4824d4cfd16SMark Brown map->cache_bypass = bypass; 483affbe886SMark Brown map->async = false; 4841c79771aSKevin Cernekee map->no_sync_defaults = false; 48581485f52SLars-Peter Clausen map->unlock(map->lock_arg); 4864d4cfd16SMark Brown 487affbe886SMark Brown regmap_async_complete(map); 488affbe886SMark Brown 489c6b570d9SPhilipp Zabel trace_regcache_sync(map, name, "stop region"); 490affbe886SMark Brown 4914d4cfd16SMark Brown return ret; 4924d4cfd16SMark Brown } 493e466de05SMark Brown EXPORT_SYMBOL_GPL(regcache_sync_region); 4944d4cfd16SMark Brown 4954d4cfd16SMark Brown /** 4962cf8e2dfSCharles Keepax * regcache_drop_region - Discard part of the register cache 497697e85bcSMark Brown * 498697e85bcSMark Brown * @map: map to operate on 499697e85bcSMark Brown * @min: first register to discard 500697e85bcSMark Brown * @max: last register to discard 501697e85bcSMark Brown * 502697e85bcSMark Brown * Discard part of the register cache. 503697e85bcSMark Brown * 504697e85bcSMark Brown * Return a negative value on failure, 0 on success. 505697e85bcSMark Brown */ 506697e85bcSMark Brown int regcache_drop_region(struct regmap *map, unsigned int min, 507697e85bcSMark Brown unsigned int max) 508697e85bcSMark Brown { 509697e85bcSMark Brown int ret = 0; 510697e85bcSMark Brown 5113f4ff561SLars-Peter Clausen if (!map->cache_ops || !map->cache_ops->drop) 512697e85bcSMark Brown return -EINVAL; 513697e85bcSMark Brown 51481485f52SLars-Peter Clausen map->lock(map->lock_arg); 515697e85bcSMark Brown 516c6b570d9SPhilipp Zabel trace_regcache_drop_region(map, min, max); 517697e85bcSMark Brown 518697e85bcSMark Brown ret = map->cache_ops->drop(map, min, max); 519697e85bcSMark Brown 52081485f52SLars-Peter Clausen map->unlock(map->lock_arg); 521697e85bcSMark Brown 522697e85bcSMark Brown return ret; 523697e85bcSMark Brown } 524697e85bcSMark Brown EXPORT_SYMBOL_GPL(regcache_drop_region); 525697e85bcSMark Brown 526697e85bcSMark Brown /** 5272cf8e2dfSCharles Keepax * regcache_cache_only - Put a register map into cache only mode 52892afb286SMark Brown * 52992afb286SMark Brown * @map: map to configure 5302cf8e2dfSCharles Keepax * @enable: flag if changes should be written to the hardware 53192afb286SMark Brown * 53292afb286SMark Brown * When a register map is marked as cache only writes to the register 53392afb286SMark Brown * map API will only update the register cache, they will not cause 53492afb286SMark Brown * any hardware changes. This is useful for allowing portions of 53592afb286SMark Brown * drivers to act as though the device were functioning as normal when 53692afb286SMark Brown * it is disabled for power saving reasons. 53792afb286SMark Brown */ 53892afb286SMark Brown void regcache_cache_only(struct regmap *map, bool enable) 53992afb286SMark Brown { 54081485f52SLars-Peter Clausen map->lock(map->lock_arg); 5413d0afe9cSMark Brown WARN_ON(map->cache_type != REGCACHE_NONE && 5423d0afe9cSMark Brown map->cache_bypass && enable); 54392afb286SMark Brown map->cache_only = enable; 544c6b570d9SPhilipp Zabel trace_regmap_cache_only(map, enable); 54581485f52SLars-Peter Clausen map->unlock(map->lock_arg); 54692afb286SMark Brown } 54792afb286SMark Brown EXPORT_SYMBOL_GPL(regcache_cache_only); 54892afb286SMark Brown 5496eb0f5e0SDimitris Papastamos /** 5502cf8e2dfSCharles Keepax * regcache_mark_dirty - Indicate that HW registers were reset to default values 5518ae0d7e8SMark Brown * 5528ae0d7e8SMark Brown * @map: map to mark 5538ae0d7e8SMark Brown * 5541c79771aSKevin Cernekee * Inform regcache that the device has been powered down or reset, so that 5551c79771aSKevin Cernekee * on resume, regcache_sync() knows to write out all non-default values 5561c79771aSKevin Cernekee * stored in the cache. 5571c79771aSKevin Cernekee * 5581c79771aSKevin Cernekee * If this function is not called, regcache_sync() will assume that 5591c79771aSKevin Cernekee * the hardware state still matches the cache state, modulo any writes that 5601c79771aSKevin Cernekee * happened when cache_only was true. 5618ae0d7e8SMark Brown */ 5628ae0d7e8SMark Brown void regcache_mark_dirty(struct regmap *map) 5638ae0d7e8SMark Brown { 56481485f52SLars-Peter Clausen map->lock(map->lock_arg); 5658ae0d7e8SMark Brown map->cache_dirty = true; 5661c79771aSKevin Cernekee map->no_sync_defaults = true; 56781485f52SLars-Peter Clausen map->unlock(map->lock_arg); 5688ae0d7e8SMark Brown } 5698ae0d7e8SMark Brown EXPORT_SYMBOL_GPL(regcache_mark_dirty); 5708ae0d7e8SMark Brown 5718ae0d7e8SMark Brown /** 5722cf8e2dfSCharles Keepax * regcache_cache_bypass - Put a register map into cache bypass mode 5736eb0f5e0SDimitris Papastamos * 5746eb0f5e0SDimitris Papastamos * @map: map to configure 5752cf8e2dfSCharles Keepax * @enable: flag if changes should not be written to the cache 5766eb0f5e0SDimitris Papastamos * 5776eb0f5e0SDimitris Papastamos * When a register map is marked with the cache bypass option, writes 57872607f37SXiang wangx * to the register map API will only update the hardware and not 5796eb0f5e0SDimitris Papastamos * the cache directly. This is useful when syncing the cache back to 5806eb0f5e0SDimitris Papastamos * the hardware. 5816eb0f5e0SDimitris Papastamos */ 5826eb0f5e0SDimitris Papastamos void regcache_cache_bypass(struct regmap *map, bool enable) 5836eb0f5e0SDimitris Papastamos { 58481485f52SLars-Peter Clausen map->lock(map->lock_arg); 585ac77a765SDimitris Papastamos WARN_ON(map->cache_only && enable); 5866eb0f5e0SDimitris Papastamos map->cache_bypass = enable; 587c6b570d9SPhilipp Zabel trace_regmap_cache_bypass(map, enable); 58881485f52SLars-Peter Clausen map->unlock(map->lock_arg); 5896eb0f5e0SDimitris Papastamos } 5906eb0f5e0SDimitris Papastamos EXPORT_SYMBOL_GPL(regcache_cache_bypass); 5916eb0f5e0SDimitris Papastamos 59278908f45SMark Brown /** 59378908f45SMark Brown * regcache_reg_cached - Check if a register is cached 59478908f45SMark Brown * 59578908f45SMark Brown * @map: map to check 59678908f45SMark Brown * @reg: register to check 59778908f45SMark Brown * 59878908f45SMark Brown * Reports if a register is cached. 59978908f45SMark Brown */ 60078908f45SMark Brown bool regcache_reg_cached(struct regmap *map, unsigned int reg) 60178908f45SMark Brown { 60278908f45SMark Brown unsigned int val; 60378908f45SMark Brown int ret; 60478908f45SMark Brown 60578908f45SMark Brown map->lock(map->lock_arg); 60678908f45SMark Brown 60778908f45SMark Brown ret = regcache_read(map, reg, &val); 60878908f45SMark Brown 60978908f45SMark Brown map->unlock(map->lock_arg); 61078908f45SMark Brown 61178908f45SMark Brown return ret == 0; 61278908f45SMark Brown } 61378908f45SMark Brown EXPORT_SYMBOL_GPL(regcache_reg_cached); 61478908f45SMark Brown 615d32758acSMark Brown void regcache_set_val(struct regmap *map, void *base, unsigned int idx, 616879082c9SMark Brown unsigned int val) 6179fabe24eSDimitris Papastamos { 618eb4cb76fSMark Brown /* Use device native format if possible */ 619eb4cb76fSMark Brown if (map->format.format_val) { 620eb4cb76fSMark Brown map->format.format_val(base + (map->cache_word_size * idx), 621eb4cb76fSMark Brown val, 0); 622d32758acSMark Brown return; 623eb4cb76fSMark Brown } 624eb4cb76fSMark Brown 625879082c9SMark Brown switch (map->cache_word_size) { 6269fabe24eSDimitris Papastamos case 1: { 6279fabe24eSDimitris Papastamos u8 *cache = base; 6282fd6902eSXiubo Li 6299fabe24eSDimitris Papastamos cache[idx] = val; 6309fabe24eSDimitris Papastamos break; 6319fabe24eSDimitris Papastamos } 6329fabe24eSDimitris Papastamos case 2: { 6339fabe24eSDimitris Papastamos u16 *cache = base; 6342fd6902eSXiubo Li 6359fabe24eSDimitris Papastamos cache[idx] = val; 6369fabe24eSDimitris Papastamos break; 6379fabe24eSDimitris Papastamos } 6387d5e525bSMark Brown case 4: { 6397d5e525bSMark Brown u32 *cache = base; 6402fd6902eSXiubo Li 6417d5e525bSMark Brown cache[idx] = val; 6427d5e525bSMark Brown break; 6437d5e525bSMark Brown } 6449fabe24eSDimitris Papastamos default: 6459fabe24eSDimitris Papastamos BUG(); 6469fabe24eSDimitris Papastamos } 6479fabe24eSDimitris Papastamos } 6489fabe24eSDimitris Papastamos 649879082c9SMark Brown unsigned int regcache_get_val(struct regmap *map, const void *base, 650879082c9SMark Brown unsigned int idx) 6519fabe24eSDimitris Papastamos { 6529fabe24eSDimitris Papastamos if (!base) 6539fabe24eSDimitris Papastamos return -EINVAL; 6549fabe24eSDimitris Papastamos 655eb4cb76fSMark Brown /* Use device native format if possible */ 656eb4cb76fSMark Brown if (map->format.parse_val) 6578817796bSMark Brown return map->format.parse_val(regcache_get_val_addr(map, base, 6588817796bSMark Brown idx)); 659eb4cb76fSMark Brown 660879082c9SMark Brown switch (map->cache_word_size) { 6619fabe24eSDimitris Papastamos case 1: { 6629fabe24eSDimitris Papastamos const u8 *cache = base; 6632fd6902eSXiubo Li 6649fabe24eSDimitris Papastamos return cache[idx]; 6659fabe24eSDimitris Papastamos } 6669fabe24eSDimitris Papastamos case 2: { 6679fabe24eSDimitris Papastamos const u16 *cache = base; 6682fd6902eSXiubo Li 6699fabe24eSDimitris Papastamos return cache[idx]; 6709fabe24eSDimitris Papastamos } 6717d5e525bSMark Brown case 4: { 6727d5e525bSMark Brown const u32 *cache = base; 6732fd6902eSXiubo Li 6747d5e525bSMark Brown return cache[idx]; 6757d5e525bSMark Brown } 6769fabe24eSDimitris Papastamos default: 6779fabe24eSDimitris Papastamos BUG(); 6789fabe24eSDimitris Papastamos } 6799fabe24eSDimitris Papastamos /* unreachable */ 6809fabe24eSDimitris Papastamos return -1; 6819fabe24eSDimitris Papastamos } 6829fabe24eSDimitris Papastamos 683f094fea6SMark Brown static int regcache_default_cmp(const void *a, const void *b) 684c08604b8SDimitris Papastamos { 685c08604b8SDimitris Papastamos const struct reg_default *_a = a; 686c08604b8SDimitris Papastamos const struct reg_default *_b = b; 687c08604b8SDimitris Papastamos 688c08604b8SDimitris Papastamos return _a->reg - _b->reg; 689c08604b8SDimitris Papastamos } 690c08604b8SDimitris Papastamos 691f094fea6SMark Brown int regcache_lookup_reg(struct regmap *map, unsigned int reg) 692f094fea6SMark Brown { 693f094fea6SMark Brown struct reg_default key; 694f094fea6SMark Brown struct reg_default *r; 695f094fea6SMark Brown 696f094fea6SMark Brown key.reg = reg; 697f094fea6SMark Brown key.def = 0; 698f094fea6SMark Brown 699f094fea6SMark Brown r = bsearch(&key, map->reg_defaults, map->num_reg_defaults, 700f094fea6SMark Brown sizeof(struct reg_default), regcache_default_cmp); 701f094fea6SMark Brown 702f094fea6SMark Brown if (r) 703f094fea6SMark Brown return r - map->reg_defaults; 704f094fea6SMark Brown else 7056e6ace00SMark Brown return -ENOENT; 706f094fea6SMark Brown } 707f8bd822cSMark Brown 7083f4ff561SLars-Peter Clausen static bool regcache_reg_present(unsigned long *cache_present, unsigned int idx) 7093f4ff561SLars-Peter Clausen { 7103f4ff561SLars-Peter Clausen if (!cache_present) 7113f4ff561SLars-Peter Clausen return true; 7123f4ff561SLars-Peter Clausen 7133f4ff561SLars-Peter Clausen return test_bit(idx, cache_present); 7143f4ff561SLars-Peter Clausen } 7153f4ff561SLars-Peter Clausen 71605933e2dSMark Brown int regcache_sync_val(struct regmap *map, unsigned int reg, unsigned int val) 71705933e2dSMark Brown { 71805933e2dSMark Brown int ret; 71905933e2dSMark Brown 72005933e2dSMark Brown if (!regcache_reg_needs_sync(map, reg, val)) 72105933e2dSMark Brown return 0; 72205933e2dSMark Brown 72305933e2dSMark Brown map->cache_bypass = true; 72405933e2dSMark Brown 72505933e2dSMark Brown ret = _regmap_write(map, reg, val); 72605933e2dSMark Brown 72705933e2dSMark Brown map->cache_bypass = false; 72805933e2dSMark Brown 72905933e2dSMark Brown if (ret != 0) { 73005933e2dSMark Brown dev_err(map->dev, "Unable to sync register %#x. %d\n", 73105933e2dSMark Brown reg, ret); 73205933e2dSMark Brown return ret; 73305933e2dSMark Brown } 73405933e2dSMark Brown dev_dbg(map->dev, "Synced register %#x, value %#x\n", 73505933e2dSMark Brown reg, val); 73605933e2dSMark Brown 73705933e2dSMark Brown return 0; 73805933e2dSMark Brown } 73905933e2dSMark Brown 740cfdeb8c3SMark Brown static int regcache_sync_block_single(struct regmap *map, void *block, 7413f4ff561SLars-Peter Clausen unsigned long *cache_present, 742cfdeb8c3SMark Brown unsigned int block_base, 743cfdeb8c3SMark Brown unsigned int start, unsigned int end) 744cfdeb8c3SMark Brown { 745cfdeb8c3SMark Brown unsigned int i, regtmp, val; 746cfdeb8c3SMark Brown int ret; 747cfdeb8c3SMark Brown 748cfdeb8c3SMark Brown for (i = start; i < end; i++) { 749cfdeb8c3SMark Brown regtmp = block_base + (i * map->reg_stride); 750cfdeb8c3SMark Brown 7514ceba98dSTakashi Iwai if (!regcache_reg_present(cache_present, i) || 7524ceba98dSTakashi Iwai !regmap_writeable(map, regtmp)) 753cfdeb8c3SMark Brown continue; 754cfdeb8c3SMark Brown 755cfdeb8c3SMark Brown val = regcache_get_val(map, block, i); 75605933e2dSMark Brown ret = regcache_sync_val(map, regtmp, val); 75705933e2dSMark Brown if (ret != 0) 758cfdeb8c3SMark Brown return ret; 759f29a4320SJarkko Nikula } 760cfdeb8c3SMark Brown 761cfdeb8c3SMark Brown return 0; 762cfdeb8c3SMark Brown } 763cfdeb8c3SMark Brown 76475a5f89fSMark Brown static int regcache_sync_block_raw_flush(struct regmap *map, const void **data, 76575a5f89fSMark Brown unsigned int base, unsigned int cur) 76675a5f89fSMark Brown { 76775a5f89fSMark Brown size_t val_bytes = map->format.val_bytes; 76875a5f89fSMark Brown int ret, count; 76975a5f89fSMark Brown 77075a5f89fSMark Brown if (*data == NULL) 77175a5f89fSMark Brown return 0; 77275a5f89fSMark Brown 77378ba73eeSDylan Reid count = (cur - base) / map->reg_stride; 77475a5f89fSMark Brown 7759659293cSStratos Karafotis dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n", 77678ba73eeSDylan Reid count * val_bytes, count, base, cur - map->reg_stride); 77775a5f89fSMark Brown 778621a5f7aSViresh Kumar map->cache_bypass = true; 77975a5f89fSMark Brown 78005669b63SDmitry Baryshkov ret = _regmap_raw_write(map, base, *data, count * val_bytes, false); 781f29a4320SJarkko Nikula if (ret) 782f29a4320SJarkko Nikula dev_err(map->dev, "Unable to sync registers %#x-%#x. %d\n", 783f29a4320SJarkko Nikula base, cur - map->reg_stride, ret); 78475a5f89fSMark Brown 785621a5f7aSViresh Kumar map->cache_bypass = false; 78675a5f89fSMark Brown 78775a5f89fSMark Brown *data = NULL; 78875a5f89fSMark Brown 78975a5f89fSMark Brown return ret; 79075a5f89fSMark Brown } 79175a5f89fSMark Brown 792f52687afSSachin Kamat static int regcache_sync_block_raw(struct regmap *map, void *block, 7933f4ff561SLars-Peter Clausen unsigned long *cache_present, 794f8bd822cSMark Brown unsigned int block_base, unsigned int start, 795f8bd822cSMark Brown unsigned int end) 796f8bd822cSMark Brown { 79775a5f89fSMark Brown unsigned int i, val; 79875a5f89fSMark Brown unsigned int regtmp = 0; 79975a5f89fSMark Brown unsigned int base = 0; 80075a5f89fSMark Brown const void *data = NULL; 801f8bd822cSMark Brown int ret; 802f8bd822cSMark Brown 803f8bd822cSMark Brown for (i = start; i < end; i++) { 804f8bd822cSMark Brown regtmp = block_base + (i * map->reg_stride); 805f8bd822cSMark Brown 8064ceba98dSTakashi Iwai if (!regcache_reg_present(cache_present, i) || 8074ceba98dSTakashi Iwai !regmap_writeable(map, regtmp)) { 80875a5f89fSMark Brown ret = regcache_sync_block_raw_flush(map, &data, 80975a5f89fSMark Brown base, regtmp); 81075a5f89fSMark Brown if (ret != 0) 81175a5f89fSMark Brown return ret; 812f8bd822cSMark Brown continue; 81375a5f89fSMark Brown } 814f8bd822cSMark Brown 815f8bd822cSMark Brown val = regcache_get_val(map, block, i); 8163969fa08SKevin Cernekee if (!regcache_reg_needs_sync(map, regtmp, val)) { 81775a5f89fSMark Brown ret = regcache_sync_block_raw_flush(map, &data, 81875a5f89fSMark Brown base, regtmp); 819f8bd822cSMark Brown if (ret != 0) 820f8bd822cSMark Brown return ret; 82175a5f89fSMark Brown continue; 822f8bd822cSMark Brown } 823f8bd822cSMark Brown 82475a5f89fSMark Brown if (!data) { 82575a5f89fSMark Brown data = regcache_get_val_addr(map, block, i); 82675a5f89fSMark Brown base = regtmp; 82775a5f89fSMark Brown } 82875a5f89fSMark Brown } 82975a5f89fSMark Brown 8302d49b598SLars-Peter Clausen return regcache_sync_block_raw_flush(map, &data, base, regtmp + 8312d49b598SLars-Peter Clausen map->reg_stride); 832f8bd822cSMark Brown } 833cfdeb8c3SMark Brown 834cfdeb8c3SMark Brown int regcache_sync_block(struct regmap *map, void *block, 8353f4ff561SLars-Peter Clausen unsigned long *cache_present, 836cfdeb8c3SMark Brown unsigned int block_base, unsigned int start, 837cfdeb8c3SMark Brown unsigned int end) 838cfdeb8c3SMark Brown { 83967921a1aSMarkus Pargmann if (regmap_can_raw_write(map) && !map->use_single_write) 8403f4ff561SLars-Peter Clausen return regcache_sync_block_raw(map, block, cache_present, 8413f4ff561SLars-Peter Clausen block_base, start, end); 842cfdeb8c3SMark Brown else 8433f4ff561SLars-Peter Clausen return regcache_sync_block_single(map, block, cache_present, 8443f4ff561SLars-Peter Clausen block_base, start, end); 845cfdeb8c3SMark Brown } 846