1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright (c) 2020-2025, Intel Corporation. 4 */ 5 6 /** 7 * @addtogroup Jsm 8 * @{ 9 */ 10 11 /** 12 * @file 13 * @brief JSM shared definitions 14 */ 15 #ifndef VPU_JSM_API_H 16 #define VPU_JSM_API_H 17 18 /* 19 * Major version changes that break backward compatibility 20 */ 21 #define VPU_JSM_API_VER_MAJOR 3 22 23 /* 24 * Minor version changes when API backward compatibility is preserved. 25 */ 26 #define VPU_JSM_API_VER_MINOR 32 27 28 /* 29 * API header changed (field names, documentation, formatting) but API itself has not been changed 30 */ 31 #define VPU_JSM_API_VER_PATCH 5 32 33 /* 34 * Index in the API version table 35 */ 36 #define VPU_JSM_API_VER_INDEX 4 37 38 /* 39 * Number of Priority Bands for Hardware Scheduling 40 * Bands: Idle(0), Normal(1), Focus(2), RealTime(3) 41 */ 42 #define VPU_HWS_NUM_PRIORITY_BANDS 4 43 44 /* Max number of impacted contexts that can be dealt with the engine reset command */ 45 #define VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS 3 46 47 /* 48 * Pack the API structures to enforce binary compatibility 49 * Align to 8 bytes for optimal performance 50 */ 51 #pragma pack(push, 8) 52 53 /* 54 * Engine indexes. 55 */ 56 #define VPU_ENGINE_COMPUTE 0 57 #define VPU_ENGINE_NB 1 58 59 /* 60 * VPU status values. 61 */ 62 #define VPU_JSM_STATUS_SUCCESS 0x0U 63 #define VPU_JSM_STATUS_PARSING_ERR 0x1U 64 #define VPU_JSM_STATUS_PROCESSING_ERR 0x2U 65 #define VPU_JSM_STATUS_PREEMPTED 0x3U 66 #define VPU_JSM_STATUS_ABORTED 0x4U 67 #define VPU_JSM_STATUS_USER_CTX_VIOL_ERR 0x5U 68 #define VPU_JSM_STATUS_GLOBAL_CTX_VIOL_ERR 0x6U 69 #define VPU_JSM_STATUS_MVNCI_WRONG_INPUT_FORMAT 0x7U 70 #define VPU_JSM_STATUS_MVNCI_UNSUPPORTED_NETWORK_ELEMENT 0x8U 71 #define VPU_JSM_STATUS_MVNCI_INVALID_HANDLE 0x9U 72 #define VPU_JSM_STATUS_MVNCI_OUT_OF_RESOURCES 0xAU 73 #define VPU_JSM_STATUS_MVNCI_NOT_IMPLEMENTED 0xBU 74 #define VPU_JSM_STATUS_MVNCI_INTERNAL_ERROR 0xCU 75 /* @deprecated (use VPU_JSM_STATUS_PREEMPTED_MID_COMMAND instead) */ 76 #define VPU_JSM_STATUS_PREEMPTED_MID_INFERENCE 0xDU 77 /* Job status returned when the job was preempted mid-command */ 78 #define VPU_JSM_STATUS_PREEMPTED_MID_COMMAND 0xDU 79 #define VPU_JSM_STATUS_MVNCI_CONTEXT_VIOLATION_HW 0xEU 80 #define VPU_JSM_STATUS_MVNCI_PREEMPTION_TIMED_OUT 0xFU 81 82 /* 83 * Host <-> VPU IPC channels. 84 * ASYNC commands use a high priority channel, other messages use low-priority ones. 85 */ 86 #define VPU_IPC_CHAN_ASYNC_CMD 0 87 #define VPU_IPC_CHAN_GEN_CMD 10 88 #define VPU_IPC_CHAN_JOB_RET 11 89 90 /* 91 * Job flags bit masks. 92 */ 93 enum { 94 /* 95 * Null submission mask. 96 * When set, batch buffer's commands are not processed but returned as 97 * successful immediately, except fences and timestamps. 98 * When cleared, batch buffer's commands are processed normally. 99 * Used for testing and profiling purposes. 100 */ 101 VPU_JOB_FLAGS_NULL_SUBMISSION_MASK = (1 << 0U), 102 /* 103 * Inline command mask. 104 * When set, the object in job queue is an inline command (see struct vpu_inline_cmd below). 105 * When cleared, the object in job queue is a job (see struct vpu_job_queue_entry below). 106 */ 107 VPU_JOB_FLAGS_INLINE_CMD_MASK = (1 << 1U), 108 /* 109 * VPU private data mask. 110 * Reserved for the VPU to store private data about the job (or inline command) 111 * while being processed. 112 */ 113 VPU_JOB_FLAGS_PRIVATE_DATA_MASK = 0xFFFF0000U 114 }; 115 116 /* 117 * Job queue flags bit masks. 118 */ 119 enum { 120 /* 121 * No job done notification mask. 122 * When set, indicates that no job done notification should be sent for any 123 * job from this queue. When cleared, indicates that job done notification 124 * should be sent for every job completed from this queue. 125 */ 126 VPU_JOB_QUEUE_FLAGS_NO_JOB_DONE_MASK = (1 << 0U), 127 /* 128 * Native fence usage mask. 129 * When set, indicates that job queue uses native fences (as inline commands 130 * in job queue). Such queues may also use legacy fences (as commands in batch buffers). 131 * When cleared, indicates the job queue only uses legacy fences. 132 * NOTES: 133 * 1. For queues using native fences, VPU expects that all jobs in the queue 134 * are immediately followed by an inline command object. This object is expected 135 * to be a fence signal command in most cases, but can also be a NOP in case the host 136 * does not need per-job fence signalling. Other inline commands objects can be 137 * inserted between "job and inline command" pairs. 138 * 2. Native fence queues are only supported on VPU 40xx onwards. 139 */ 140 VPU_JOB_QUEUE_FLAGS_USE_NATIVE_FENCE_MASK = (1 << 1U), 141 /* 142 * Enable turbo mode for testing NPU performance; not recommended for regular usage. 143 */ 144 VPU_JOB_QUEUE_FLAGS_TURBO_MODE = (1 << 2U), 145 /* 146 * Queue error detection mode flag 147 * For 'interactive' queues (this bit not set), the FW will identify queues that have not 148 * completed a job inside the TDR timeout as in error as part of engine reset sequence. 149 * For 'non-interactive' queues (this bit set), the FW will identify queues that have not 150 * progressed the heartbeat inside the non-interactive no-progress timeout as in error as 151 * part of engine reset sequence. Additionally, there is an upper limit applied to these 152 * queues: even if they progress the heartbeat, if they run longer than non-interactive 153 * timeout, then the FW will also identify them as in error. 154 */ 155 VPU_JOB_QUEUE_FLAGS_NON_INTERACTIVE = (1 << 3U) 156 }; 157 158 /* 159 * Max length (including trailing NULL char) of trace entity name (e.g., the 160 * name of a logging destination or a loggable HW component). 161 */ 162 #define VPU_TRACE_ENTITY_NAME_MAX_LEN 32 163 164 /* 165 * Max length (including trailing NULL char) of a dyndbg command. 166 * 167 * NOTE: 96 is used so that the size of 'struct vpu_ipc_msg' in the JSM API is 168 * 128 bytes (multiple of 64 bytes, the cache line size). 169 */ 170 #define VPU_DYNDBG_CMD_MAX_LEN 96 171 172 /* 173 * For HWS command queue scheduling, we can prioritise command queues inside the 174 * same process with a relative in-process priority. Valid values for relative 175 * priority are given below - max and min. 176 */ 177 #define VPU_HWS_COMMAND_QUEUE_MAX_IN_PROCESS_PRIORITY 7 178 #define VPU_HWS_COMMAND_QUEUE_MIN_IN_PROCESS_PRIORITY -7 179 180 /* 181 * For HWS priority scheduling, we can have multiple realtime priority bands. 182 * They are numbered 0 to a MAX. 183 */ 184 #define VPU_HWS_MAX_REALTIME_PRIORITY_LEVEL 31U 185 186 /* 187 * vpu_jsm_engine_reset_context flag definitions 188 */ 189 #define VPU_ENGINE_RESET_CONTEXT_FLAG_COLLATERAL_DAMAGE_MASK BIT(0) 190 #define VPU_ENGINE_RESET_CONTEXT_HANG_PRIMARY_CAUSE 0 191 #define VPU_ENGINE_RESET_CONTEXT_COLLATERAL_DAMAGE 1 192 193 /* 194 * Invalid command queue handle identifier. Applies to cmdq_id and cmdq_group 195 * in this API. 196 */ 197 #define VPU_HWS_INVALID_CMDQ_HANDLE 0ULL 198 199 /* 200 * Inline commands types. 201 */ 202 /* 203 * NOP. 204 * VPU does nothing other than consuming the inline command object. 205 */ 206 #define VPU_INLINE_CMD_TYPE_NOP 0x0 207 /* 208 * Fence wait. 209 * VPU waits for the fence current value to reach monitored value. 210 * Fence wait operations are executed upon job dispatching. While waiting for 211 * the fence to be satisfied, VPU blocks fetching of the next objects in the queue. 212 * Jobs present in the queue prior to the fence wait object may be processed 213 * concurrently. 214 */ 215 #define VPU_INLINE_CMD_TYPE_FENCE_WAIT 0x1 216 /* 217 * Fence signal. 218 * VPU sets the fence current value to the provided value. If new current value 219 * is equal to or higher than monitored value, VPU sends fence signalled notification 220 * to the host. Fence signal operations are executed upon completion of all the jobs 221 * present in the queue prior to them, and in-order relative to each other in the queue. 222 * But jobs in-between them may be processed concurrently and may complete out-of-order. 223 */ 224 #define VPU_INLINE_CMD_TYPE_FENCE_SIGNAL 0x2 225 226 /** 227 * Job scheduling priority bands for both hardware scheduling and OS scheduling. 228 */ 229 enum vpu_job_scheduling_priority_band { 230 VPU_JOB_SCHEDULING_PRIORITY_BAND_IDLE = 0, 231 VPU_JOB_SCHEDULING_PRIORITY_BAND_NORMAL = 1, 232 VPU_JOB_SCHEDULING_PRIORITY_BAND_FOCUS = 2, 233 VPU_JOB_SCHEDULING_PRIORITY_BAND_REALTIME = 3, 234 VPU_JOB_SCHEDULING_PRIORITY_BAND_COUNT = 4, 235 }; 236 237 /** 238 * Job format. 239 * Jobs defines the actual workloads to be executed by a given engine. 240 */ 241 struct vpu_job_queue_entry { 242 /** Address of VPU commands batch buffer */ 243 u64 batch_buf_addr; 244 /** Job ID */ 245 u32 job_id; 246 /** Flags bit field, see VPU_JOB_FLAGS_* above */ 247 u32 flags; 248 /** 249 * Doorbell ring timestamp taken by KMD from SoC's global system clock, in 250 * microseconds. NPU can convert this value to its own fixed clock's timebase, 251 * to match other profiling timestamps. 252 */ 253 u64 doorbell_timestamp; 254 /** Extra id for job tracking, used only in the firmware perf traces */ 255 u64 host_tracking_id; 256 /** Address of the primary preemption buffer to use for this job */ 257 u64 primary_preempt_buf_addr; 258 /** Size of the primary preemption buffer to use for this job */ 259 u32 primary_preempt_buf_size; 260 /** Size of secondary preemption buffer to use for this job */ 261 u32 secondary_preempt_buf_size; 262 /** Address of secondary preemption buffer to use for this job */ 263 u64 secondary_preempt_buf_addr; 264 u64 reserved_0; 265 }; 266 267 /** 268 * Inline command format. 269 * Inline commands are the commands executed at scheduler level (typically, 270 * synchronization directives). Inline command and job objects must be of 271 * the same size and have flags field at same offset. 272 */ 273 struct vpu_inline_cmd { 274 u64 reserved_0; 275 /** Inline command type, see VPU_INLINE_CMD_TYPE_* defines. */ 276 u32 type; 277 /** Flags bit field, see VPU_JOB_FLAGS_* above. */ 278 u32 flags; 279 /** Inline command payload. Depends on inline command type. */ 280 union payload { 281 /** Fence (wait and signal) commands' payload. */ 282 struct fence { 283 /** Fence object handle. */ 284 u64 fence_handle; 285 /** User VA of the current fence value. */ 286 u64 current_value_va; 287 /** User VA of the monitored fence value (read-only). */ 288 u64 monitored_value_va; 289 /** Value to wait for or write in fence location. */ 290 u64 value; 291 /** User VA of the log buffer in which to add log entry on completion. */ 292 u64 log_buffer_va; 293 /** NPU private data. */ 294 u64 npu_private_data; 295 } fence; 296 /** 297 * Other commands do not have a payload: 298 * Payload definition for future inline commands can be inserted here. 299 */ 300 u64 reserved_1[6]; 301 } payload; 302 }; 303 304 /** 305 * Job queue slots can be populated either with job objects or inline command objects. 306 */ 307 union vpu_jobq_slot { 308 struct vpu_job_queue_entry job; 309 struct vpu_inline_cmd inline_cmd; 310 }; 311 312 /** 313 * Job queue control registers. 314 */ 315 struct vpu_job_queue_header { 316 u32 engine_idx; 317 u32 head; 318 u32 tail; 319 u32 flags; 320 /** Set to 1 to indicate priority_band field is valid */ 321 u32 priority_band_valid; 322 /** 323 * Priority for the work of this job queue, valid only if the HWS is NOT used 324 * and the @ref priority_band_valid is set to 1. It is applied only during 325 * the @ref VPU_JSM_MSG_REGISTER_DB message processing. 326 * The device firmware might use the priority_band to optimize the power 327 * management logic, but it will not affect the order of jobs. 328 * Available priority bands: @see enum vpu_job_scheduling_priority_band 329 */ 330 u32 priority_band; 331 /** Inside realtime band assigns a further priority, limited to 0..31 range */ 332 u32 realtime_priority_level; 333 u32 reserved_0[9]; 334 }; 335 336 /* 337 * Job queue format. 338 */ 339 struct vpu_job_queue { 340 struct vpu_job_queue_header header; 341 union vpu_jobq_slot slot[]; 342 }; 343 344 /** 345 * Logging entity types. 346 * 347 * This enum defines the different types of entities involved in logging. 348 */ 349 enum vpu_trace_entity_type { 350 /** Logging destination (entity where logs can be stored / printed). */ 351 VPU_TRACE_ENTITY_TYPE_DESTINATION = 1, 352 /** Loggable HW component (HW entity that can be logged). */ 353 VPU_TRACE_ENTITY_TYPE_HW_COMPONENT = 2, 354 }; 355 356 /** 357 * HWS specific log buffer header details. 358 * Total size is 32 bytes. 359 */ 360 struct vpu_hws_log_buffer_header { 361 /** Written by VPU after adding a log entry. Initialised by host to 0. */ 362 u32 first_free_entry_index; 363 /** Incremented by VPU every time the VPU writes the 0th entry; initialised by host to 0. */ 364 u32 wraparound_count; 365 /** 366 * This is the number of buffers that can be stored in the log buffer provided by the host. 367 * It is written by host before passing buffer to VPU. VPU should consider it read-only. 368 */ 369 u64 num_of_entries; 370 u64 reserved[2]; 371 }; 372 373 /** 374 * HWS specific log buffer entry details. 375 * Total size is 32 bytes. 376 */ 377 struct vpu_hws_log_buffer_entry { 378 /** VPU timestamp must be an invariant timer tick (not impacted by DVFS) */ 379 u64 vpu_timestamp; 380 /** 381 * Operation type: 382 * 0 - context state change 383 * 1 - queue new work 384 * 2 - queue unwait sync object 385 * 3 - queue no more work 386 * 4 - queue wait sync object 387 */ 388 u32 operation_type; 389 u32 reserved; 390 /** Operation data depends on operation type */ 391 u64 operation_data[2]; 392 }; 393 394 /* Native fence log buffer types. */ 395 enum vpu_hws_native_fence_log_type { 396 VPU_HWS_NATIVE_FENCE_LOG_TYPE_WAITS = 1, 397 VPU_HWS_NATIVE_FENCE_LOG_TYPE_SIGNALS = 2 398 }; 399 400 /** HWS native fence log buffer header. */ 401 struct vpu_hws_native_fence_log_header { 402 union { 403 struct { 404 /** Index of the first free entry in buffer. */ 405 u32 first_free_entry_idx; 406 /** 407 * Incremented each time NPU wraps around 408 * the buffer to write next entry. 409 */ 410 u32 wraparound_count; 411 }; 412 /** Field allowing atomic update of both fields above. */ 413 u64 atomic_wraparound_and_entry_idx; 414 }; 415 /** Log buffer type, see enum vpu_hws_native_fence_log_type. */ 416 u64 type; 417 /** Allocated number of entries in the log buffer. */ 418 u64 entry_nb; 419 u64 reserved[2]; 420 }; 421 422 /** Native fence log operation types. */ 423 enum vpu_hws_native_fence_log_op { 424 VPU_HWS_NATIVE_FENCE_LOG_OP_SIGNAL_EXECUTED = 0, 425 VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED = 1 426 }; 427 428 /** HWS native fence log entry. */ 429 struct vpu_hws_native_fence_log_entry { 430 /** Newly signaled/unblocked fence value. */ 431 u64 fence_value; 432 /** Native fence object handle to which this operation belongs. */ 433 u64 fence_handle; 434 /** Operation type, see enum vpu_hws_native_fence_log_op. */ 435 u64 op_type; 436 u64 reserved_0; 437 /** 438 * VPU_HWS_NATIVE_FENCE_LOG_OP_WAIT_UNBLOCKED only: Timestamp at which fence 439 * wait was started (in NPU SysTime). 440 */ 441 u64 fence_wait_start_ts; 442 u64 reserved_1; 443 /** Timestamp at which fence operation was completed (in NPU SysTime). */ 444 u64 fence_end_ts; 445 }; 446 447 /** Native fence log buffer. */ 448 struct vpu_hws_native_fence_log_buffer { 449 struct vpu_hws_native_fence_log_header header; 450 struct vpu_hws_native_fence_log_entry entry[]; 451 }; 452 453 /* 454 * Host <-> VPU IPC messages types. 455 */ 456 enum vpu_ipc_msg_type { 457 VPU_JSM_MSG_UNKNOWN = 0xFFFFFFFF, 458 459 /* IPC Host -> Device, Async commands */ 460 VPU_JSM_MSG_ASYNC_CMD = 0x1100, 461 VPU_JSM_MSG_ENGINE_RESET = VPU_JSM_MSG_ASYNC_CMD, 462 /** 463 * Preempt engine. The NPU stops (preempts) all the jobs currently 464 * executing on the target engine making the engine become idle and ready to 465 * execute new jobs. 466 * NOTE: The NPU does not remove unstarted jobs (if any) from job queues of 467 * the target engine, but it stops processing them (until the queue doorbell 468 * is rung again); the host is responsible to reset the job queue, either 469 * after preemption or when resubmitting jobs to the queue. 470 */ 471 VPU_JSM_MSG_ENGINE_PREEMPT = 0x1101, 472 /** 473 * OS scheduling doorbell register command 474 * @see vpu_ipc_msg_payload_register_db 475 */ 476 VPU_JSM_MSG_REGISTER_DB = 0x1102, 477 /** 478 * OS scheduling doorbell unregister command 479 * @see vpu_ipc_msg_payload_unregister_db 480 */ 481 VPU_JSM_MSG_UNREGISTER_DB = 0x1103, 482 /** 483 * Query engine heartbeat. Heartbeat is expected to increase monotonically 484 * and increase while work is being progressed by NPU. 485 * @see vpu_ipc_msg_payload_query_engine_hb 486 */ 487 VPU_JSM_MSG_QUERY_ENGINE_HB = 0x1104, 488 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT = 0x1105, 489 VPU_JSM_MSG_GET_POWER_LEVEL = 0x1106, 490 VPU_JSM_MSG_SET_POWER_LEVEL = 0x1107, 491 /* @deprecated */ 492 VPU_JSM_MSG_METRIC_STREAMER_OPEN = 0x1108, 493 /* @deprecated */ 494 VPU_JSM_MSG_METRIC_STREAMER_CLOSE = 0x1109, 495 /** Configure logging (used to modify configuration passed in boot params). */ 496 VPU_JSM_MSG_TRACE_SET_CONFIG = 0x110a, 497 /** Return current logging configuration. */ 498 VPU_JSM_MSG_TRACE_GET_CONFIG = 0x110b, 499 /** 500 * Get masks of destinations and HW components supported by the firmware 501 * (may vary between HW generations and FW compile 502 * time configurations) 503 */ 504 VPU_JSM_MSG_TRACE_GET_CAPABILITY = 0x110c, 505 /** Get the name of a destination or HW component. */ 506 VPU_JSM_MSG_TRACE_GET_NAME = 0x110d, 507 /** 508 * Release resource associated with host ssid . All jobs that belong to the host_ssid 509 * aborted and removed from internal scheduling queues. All doorbells assigned 510 * to the host_ssid are unregistered and any internal FW resources belonging to 511 * the host_ssid are released. 512 * @see vpu_ipc_msg_payload_ssid_release 513 */ 514 VPU_JSM_MSG_SSID_RELEASE = 0x110e, 515 /** 516 * Start collecting metric data. 517 * @see vpu_jsm_metric_streamer_start 518 */ 519 VPU_JSM_MSG_METRIC_STREAMER_START = 0x110f, 520 /** 521 * Stop collecting metric data. This command will return success if it is called 522 * for a metric stream that has already been stopped or was never started. 523 * @see vpu_jsm_metric_streamer_stop 524 */ 525 VPU_JSM_MSG_METRIC_STREAMER_STOP = 0x1110, 526 /** 527 * Update current and next buffer for metric data collection. This command can 528 * also be used to request information about the number of collected samples 529 * and the amount of data written to the buffer. 530 * @see vpu_jsm_metric_streamer_update 531 */ 532 VPU_JSM_MSG_METRIC_STREAMER_UPDATE = 0x1111, 533 /** 534 * Request description of selected metric groups and metric counters within 535 * each group. The VPU will write the description of groups and counters to 536 * the buffer specified in the command structure. 537 * @see vpu_jsm_metric_streamer_start 538 */ 539 VPU_JSM_MSG_METRIC_STREAMER_INFO = 0x1112, 540 /** 541 * Control command: Priority band setup 542 * @see vpu_ipc_msg_payload_hws_priority_band_setup 543 */ 544 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP = 0x1113, 545 /** 546 * Control command: Create command queue 547 * @see vpu_ipc_msg_payload_hws_create_cmdq 548 */ 549 VPU_JSM_MSG_CREATE_CMD_QUEUE = 0x1114, 550 /** 551 * Control command: Destroy command queue 552 * @see vpu_ipc_msg_payload_hws_destroy_cmdq 553 */ 554 VPU_JSM_MSG_DESTROY_CMD_QUEUE = 0x1115, 555 /** 556 * Control command: Set context scheduling properties 557 * @see vpu_ipc_msg_payload_hws_set_context_sched_properties 558 */ 559 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES = 0x1116, 560 /** 561 * Register a doorbell to notify VPU of new work. The doorbell may later be 562 * deallocated or reassigned to another context. 563 * @see vpu_jsm_hws_register_db 564 */ 565 VPU_JSM_MSG_HWS_REGISTER_DB = 0x1117, 566 /** 567 * Control command: Log buffer setting 568 * @see vpu_ipc_msg_payload_hws_set_scheduling_log 569 */ 570 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG = 0x1118, 571 /** 572 * Control command: Suspend command queue. 573 * @see vpu_ipc_msg_payload_hws_suspend_cmdq 574 */ 575 VPU_JSM_MSG_HWS_SUSPEND_CMDQ = 0x1119, 576 /** 577 * Control command: Resume command queue 578 * @see vpu_ipc_msg_payload_hws_resume_cmdq 579 */ 580 VPU_JSM_MSG_HWS_RESUME_CMDQ = 0x111a, 581 /** 582 * Control command: Resume engine after reset 583 * @see vpu_ipc_msg_payload_hws_resume_engine 584 */ 585 VPU_JSM_MSG_HWS_ENGINE_RESUME = 0x111b, 586 /* Control command: Enable survivability/DCT mode */ 587 VPU_JSM_MSG_DCT_ENABLE = 0x111c, 588 /* Control command: Disable survivability/DCT mode */ 589 VPU_JSM_MSG_DCT_DISABLE = 0x111d, 590 /** 591 * Dump VPU state. To be used for debug purposes only. 592 * NOTE: Please introduce new ASYNC commands before this one. * 593 */ 594 VPU_JSM_MSG_STATE_DUMP = 0x11FF, 595 596 /* IPC Host -> Device, General commands */ 597 VPU_JSM_MSG_GENERAL_CMD = 0x1200, 598 VPU_JSM_MSG_BLOB_DEINIT_DEPRECATED = VPU_JSM_MSG_GENERAL_CMD, 599 /** 600 * Control dyndbg behavior by executing a dyndbg command; equivalent to 601 * Linux command: 602 * @verbatim echo '<dyndbg_cmd>' > <debugfs>/dynamic_debug/control @endverbatim 603 */ 604 VPU_JSM_MSG_DYNDBG_CONTROL = 0x1201, 605 /** 606 * Perform the save procedure for the D0i3 entry 607 */ 608 VPU_JSM_MSG_PWR_D0I3_ENTER = 0x1202, 609 610 /* IPC Device -> Host, Job completion */ 611 VPU_JSM_MSG_JOB_DONE = 0x2100, 612 /** 613 * IPC Device -> Host, Fence signalled 614 * @see vpu_ipc_msg_payload_native_fence_signalled 615 */ 616 VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED = 0x2101, 617 618 /* IPC Device -> Host, Async command completion */ 619 VPU_JSM_MSG_ASYNC_CMD_DONE = 0x2200, 620 /** 621 * IPC Device -> Host, engine reset complete 622 * @see vpu_ipc_msg_payload_engine_reset_done 623 */ 624 VPU_JSM_MSG_ENGINE_RESET_DONE = VPU_JSM_MSG_ASYNC_CMD_DONE, 625 VPU_JSM_MSG_ENGINE_PREEMPT_DONE = 0x2201, 626 VPU_JSM_MSG_REGISTER_DB_DONE = 0x2202, 627 VPU_JSM_MSG_UNREGISTER_DB_DONE = 0x2203, 628 /** 629 * Response to query engine heartbeat. 630 * @see vpu_ipc_msg_payload_query_engine_hb_done 631 */ 632 VPU_JSM_MSG_QUERY_ENGINE_HB_DONE = 0x2204, 633 VPU_JSM_MSG_GET_POWER_LEVEL_COUNT_DONE = 0x2205, 634 VPU_JSM_MSG_GET_POWER_LEVEL_DONE = 0x2206, 635 VPU_JSM_MSG_SET_POWER_LEVEL_DONE = 0x2207, 636 /* @deprecated */ 637 VPU_JSM_MSG_METRIC_STREAMER_OPEN_DONE = 0x2208, 638 /* @deprecated */ 639 VPU_JSM_MSG_METRIC_STREAMER_CLOSE_DONE = 0x2209, 640 /** Response to VPU_JSM_MSG_TRACE_SET_CONFIG. */ 641 VPU_JSM_MSG_TRACE_SET_CONFIG_RSP = 0x220a, 642 /** Response to VPU_JSM_MSG_TRACE_GET_CONFIG. */ 643 VPU_JSM_MSG_TRACE_GET_CONFIG_RSP = 0x220b, 644 /** Response to VPU_JSM_MSG_TRACE_GET_CAPABILITY. */ 645 VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP = 0x220c, 646 /** Response to VPU_JSM_MSG_TRACE_GET_NAME. */ 647 VPU_JSM_MSG_TRACE_GET_NAME_RSP = 0x220d, 648 /** 649 * Response to VPU_JSM_MSG_SSID_RELEASE. 650 * @see vpu_ipc_msg_payload_ssid_release 651 */ 652 VPU_JSM_MSG_SSID_RELEASE_DONE = 0x220e, 653 /** 654 * Response to VPU_JSM_MSG_METRIC_STREAMER_START. 655 * VPU will return an error result if metric collection cannot be started, 656 * e.g. when the specified metric mask is invalid. 657 * @see vpu_jsm_metric_streamer_done 658 */ 659 VPU_JSM_MSG_METRIC_STREAMER_START_DONE = 0x220f, 660 /** 661 * Response to VPU_JSM_MSG_METRIC_STREAMER_STOP. 662 * Returns information about collected metric data. 663 * @see vpu_jsm_metric_streamer_done 664 */ 665 VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE = 0x2210, 666 /** 667 * Response to VPU_JSM_MSG_METRIC_STREAMER_UPDATE. 668 * Returns information about collected metric data. 669 * @see vpu_jsm_metric_streamer_done 670 */ 671 VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE = 0x2211, 672 /** 673 * Response to VPU_JSM_MSG_METRIC_STREAMER_INFO. 674 * Returns a description of the metric groups and metric counters. 675 * @see vpu_jsm_metric_streamer_done 676 */ 677 VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE = 0x2212, 678 /** 679 * Asynchronous event sent from the VPU to the host either when the current 680 * metric buffer is full or when the VPU has collected a multiple of 681 * @ref vpu_jsm_metric_streamer_start::notify_sample_count samples as indicated 682 * through the start command (VPU_JSM_MSG_METRIC_STREAMER_START). Returns 683 * information about collected metric data. 684 * @see vpu_jsm_metric_streamer_done 685 */ 686 VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION = 0x2213, 687 /** 688 * Response to control command: Priority band setup 689 * @see vpu_ipc_msg_payload_hws_priority_band_setup 690 */ 691 VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP_RSP = 0x2214, 692 /** 693 * Response to control command: Create command queue 694 * @see vpu_ipc_msg_payload_hws_create_cmdq_rsp 695 */ 696 VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP = 0x2215, 697 /** 698 * Response to control command: Destroy command queue 699 * @see vpu_ipc_msg_payload_hws_destroy_cmdq 700 */ 701 VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP = 0x2216, 702 /** 703 * Response to control command: Set context scheduling properties 704 * @see vpu_ipc_msg_payload_hws_set_context_sched_properties 705 */ 706 VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP = 0x2217, 707 /** 708 * Response to control command: Log buffer setting 709 * @see vpu_ipc_msg_payload_hws_set_scheduling_log 710 */ 711 VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP = 0x2218, 712 /** 713 * IPC Device -> Host, HWS notify index entry of log buffer written 714 * @see vpu_ipc_msg_payload_hws_scheduling_log_notification 715 */ 716 VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION = 0x2219, 717 /** 718 * IPC Device -> Host, HWS completion of a context suspend request 719 * @see vpu_ipc_msg_payload_hws_suspend_cmdq 720 */ 721 VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE = 0x221a, 722 /** 723 * Response to control command: Resume command queue 724 * @see vpu_ipc_msg_payload_hws_resume_cmdq 725 */ 726 VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP = 0x221b, 727 /** 728 * Response to control command: Resume engine command response 729 * @see vpu_ipc_msg_payload_hws_resume_engine 730 */ 731 VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE = 0x221c, 732 /* Response to control command: Enable survivability/DCT mode */ 733 VPU_JSM_MSG_DCT_ENABLE_DONE = 0x221d, 734 /* Response to control command: Disable survivability/DCT mode */ 735 VPU_JSM_MSG_DCT_DISABLE_DONE = 0x221e, 736 /** 737 * Response to state dump control command. 738 * NOTE: Please introduce new ASYNC responses before this one. * 739 */ 740 VPU_JSM_MSG_STATE_DUMP_RSP = 0x22FF, 741 742 /* IPC Device -> Host, General command completion */ 743 VPU_JSM_MSG_GENERAL_CMD_DONE = 0x2300, 744 VPU_JSM_MSG_BLOB_DEINIT_DONE = VPU_JSM_MSG_GENERAL_CMD_DONE, 745 /** Response to VPU_JSM_MSG_DYNDBG_CONTROL. */ 746 VPU_JSM_MSG_DYNDBG_CONTROL_RSP = 0x2301, 747 /** 748 * Acknowledgment of completion of the save procedure initiated by 749 * VPU_JSM_MSG_PWR_D0I3_ENTER 750 */ 751 VPU_JSM_MSG_PWR_D0I3_ENTER_DONE = 0x2302, 752 }; 753 754 enum vpu_ipc_msg_status { VPU_JSM_MSG_FREE, VPU_JSM_MSG_ALLOCATED }; 755 756 /* 757 * Host <-> LRT IPC message payload definitions 758 */ 759 struct vpu_ipc_msg_payload_engine_reset { 760 /* Engine to be reset. */ 761 u32 engine_idx; 762 /* Reserved */ 763 u32 reserved_0; 764 }; 765 766 struct vpu_ipc_msg_payload_engine_preempt { 767 /* Engine to be preempted. */ 768 u32 engine_idx; 769 /* ID of the preemption request. */ 770 u32 preempt_id; 771 }; 772 773 /** 774 * Register doorbell command structure. 775 * This structure supports doorbell registration for only OS scheduling. 776 * @see VPU_JSM_MSG_REGISTER_DB 777 */ 778 struct vpu_ipc_msg_payload_register_db { 779 /** Index of the doorbell to register. */ 780 u32 db_idx; 781 /** Reserved */ 782 u32 reserved_0; 783 /** Virtual address in Global GTT pointing to the start of job queue. */ 784 u64 jobq_base; 785 /** Size of the job queue in bytes. */ 786 u32 jobq_size; 787 /** Host sub-stream ID for the context assigned to the doorbell. */ 788 u32 host_ssid; 789 }; 790 791 /** 792 * Unregister doorbell command structure. 793 * Request structure to unregister a doorbell for both HW and OS scheduling. 794 * @see VPU_JSM_MSG_UNREGISTER_DB 795 */ 796 struct vpu_ipc_msg_payload_unregister_db { 797 /** Index of the doorbell to unregister. */ 798 u32 db_idx; 799 /** Reserved */ 800 u32 reserved_0; 801 }; 802 803 /** 804 * Heartbeat request structure 805 * @see VPU_JSM_MSG_QUERY_ENGINE_HB 806 */ 807 struct vpu_ipc_msg_payload_query_engine_hb { 808 /** Engine to return heartbeat value. */ 809 u32 engine_idx; 810 /** Reserved */ 811 u32 reserved_0; 812 }; 813 814 struct vpu_ipc_msg_payload_power_level { 815 /** 816 * Requested power level. The power level value is in the 817 * range [0, power_level_count-1] where power_level_count 818 * is the number of available power levels as returned by 819 * the get power level count command. A power level of 0 820 * corresponds to the maximum possible power level, while 821 * power_level_count-1 corresponds to the minimum possible 822 * power level. Values outside of this range are not 823 * considered to be valid. 824 */ 825 u32 power_level; 826 /* Reserved */ 827 u32 reserved_0; 828 }; 829 830 /** 831 * Structure for requesting ssid release 832 * @see VPU_JSM_MSG_SSID_RELEASE 833 */ 834 struct vpu_ipc_msg_payload_ssid_release { 835 /** Host sub-stream ID for the context to be released. */ 836 u32 host_ssid; 837 /** Reserved */ 838 u32 reserved_0; 839 }; 840 841 /** 842 * @brief Metric streamer start command structure. 843 * This structure is also used with VPU_JSM_MSG_METRIC_STREAMER_INFO to request metric 844 * groups and metric counters description from the firmware. 845 * @see VPU_JSM_MSG_METRIC_STREAMER_START 846 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 847 */ 848 struct vpu_jsm_metric_streamer_start { 849 /** 850 * Bitmask to select the desired metric groups. 851 * A metric group can belong only to one metric streamer instance at a time. 852 * Since each metric streamer instance has a unique set of metric groups, it 853 * can also identify a metric streamer instance if more than one instance was 854 * started. If the VPU device does not support multiple metric streamer instances, 855 * then VPU_JSM_MSG_METRIC_STREAMER_START will return an error even if the second 856 * instance has different groups to the first. 857 */ 858 u64 metric_group_mask; 859 /** Sampling rate in nanoseconds. */ 860 u64 sampling_rate; 861 /** 862 * If > 0 the VPU will send a VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION message 863 * after every @ref notify_sample_count samples is collected or dropped by the VPU. 864 * If set to UINT_MAX the VPU will only generate a notification when the metric 865 * buffer is full. If set to 0 the VPU will never generate a notification. 866 */ 867 u32 notify_sample_count; 868 u32 reserved_0; 869 /** 870 * Address and size of the buffer where the VPU will write metric data. The 871 * VPU writes all counters from enabled metric groups one after another. If 872 * there is no space left to write data at the next sample period the VPU 873 * will switch to the next buffer (@ref next_buffer_addr) and will optionally 874 * send a notification to the host driver if @ref notify_sample_count is non-zero. 875 * If @ref next_buffer_addr is NULL the VPU will stop collecting metric data. 876 */ 877 u64 buffer_addr; 878 u64 buffer_size; 879 /** 880 * Address and size of the next buffer to write metric data to after the initial 881 * buffer is full. If the address is NULL the VPU will stop collecting metric 882 * data. 883 */ 884 u64 next_buffer_addr; 885 u64 next_buffer_size; 886 }; 887 888 /** 889 * @brief Metric streamer stop command structure. 890 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP 891 */ 892 struct vpu_jsm_metric_streamer_stop { 893 /** Bitmask to select the desired metric groups. */ 894 u64 metric_group_mask; 895 }; 896 897 /** 898 * Provide VPU FW with buffers to write metric data. 899 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE 900 */ 901 struct vpu_jsm_metric_streamer_update { 902 /** Metric group mask that identifies metric streamer instance. */ 903 u64 metric_group_mask; 904 /** 905 * Address and size of the buffer where the VPU will write metric data. 906 * This member dictates how the update operation should perform: 907 * 1. client needs information about the number of collected samples and the 908 * amount of data written to the current buffer 909 * 2. client wants to switch to a new buffer 910 * 911 * Case 1. is identified by the buffer address being 0 or the same as the 912 * currently used buffer address. In this case the buffer size is ignored and 913 * the size of the current buffer is unchanged. The VPU will return an update 914 * in the vpu_jsm_metric_streamer_done structure. The internal writing position 915 * into the buffer is not changed. 916 * 917 * Case 2. is identified by the address being non-zero and differs from the 918 * current buffer address. The VPU will immediately switch data collection to 919 * the new buffer. Then the VPU will return an update in the 920 * vpu_jsm_metric_streamer_done structure. 921 */ 922 u64 buffer_addr; 923 u64 buffer_size; 924 /** 925 * Address and size of the next buffer to write metric data after the initial 926 * buffer is full. If the address is NULL the VPU will stop collecting metric 927 * data but will continue to record dropped samples. 928 * 929 * Note that there is a hazard possible if both buffer_addr and the next_buffer_addr 930 * are non-zero in same update request. It is the host's responsibility to ensure 931 * that both addresses make sense even if the VPU just switched to writing samples 932 * from the current to the next buffer. 933 */ 934 u64 next_buffer_addr; 935 u64 next_buffer_size; 936 }; 937 938 struct vpu_ipc_msg_payload_job_done { 939 /* Engine to which the job was submitted. */ 940 u32 engine_idx; 941 /* Index of the doorbell to which the job was submitted */ 942 u32 db_idx; 943 /* ID of the completed job */ 944 u32 job_id; 945 /* Status of the completed job */ 946 u32 job_status; 947 /* Host SSID */ 948 u32 host_ssid; 949 /* Zero Padding */ 950 u32 reserved_0; 951 /* Command queue id */ 952 u64 cmdq_id; 953 }; 954 955 /** 956 * Notification message upon native fence signalling. 957 * @see VPU_JSM_MSG_NATIVE_FENCE_SIGNALLED 958 */ 959 struct vpu_ipc_msg_payload_native_fence_signalled { 960 /** Engine ID. */ 961 u32 engine_idx; 962 /** Host SSID. */ 963 u32 host_ssid; 964 /** CMDQ ID */ 965 u64 cmdq_id; 966 /** Fence object handle. */ 967 u64 fence_handle; 968 }; 969 970 /** 971 * vpu_ipc_msg_payload_engine_reset_done will contain an array of this structure 972 * which contains which queues caused reset if FW was able to detect any error. 973 * @see vpu_ipc_msg_payload_engine_reset_done 974 */ 975 struct vpu_jsm_engine_reset_context { 976 /** Host SSID */ 977 u32 host_ssid; 978 /** Zero Padding */ 979 u32 reserved_0; 980 /** Command queue id */ 981 u64 cmdq_id; 982 /** See VPU_ENGINE_RESET_CONTEXT_* defines */ 983 u64 flags; 984 }; 985 986 /** 987 * Engine reset response. 988 * @see VPU_JSM_MSG_ENGINE_RESET_DONE 989 */ 990 struct vpu_ipc_msg_payload_engine_reset_done { 991 /** Engine ordinal */ 992 u32 engine_idx; 993 /** Number of impacted contexts */ 994 u32 num_impacted_contexts; 995 /** Array of impacted command queue ids and their flags */ 996 struct vpu_jsm_engine_reset_context 997 impacted_contexts[VPU_MAX_ENGINE_RESET_IMPACTED_CONTEXTS]; 998 }; 999 1000 struct vpu_ipc_msg_payload_engine_preempt_done { 1001 /* Engine preempted. */ 1002 u32 engine_idx; 1003 /* ID of the preemption request. */ 1004 u32 preempt_id; 1005 }; 1006 1007 /** 1008 * Response structure for register doorbell command for both OS 1009 * and HW scheduling. 1010 * @see VPU_JSM_MSG_REGISTER_DB 1011 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1012 */ 1013 struct vpu_ipc_msg_payload_register_db_done { 1014 /* Index of the registered doorbell. */ 1015 u32 db_idx; 1016 /* Reserved */ 1017 u32 reserved_0; 1018 }; 1019 1020 /** 1021 * Response structure for unregister doorbell command for both OS 1022 * and HW scheduling. 1023 * @see VPU_JSM_MSG_UNREGISTER_DB 1024 */ 1025 struct vpu_ipc_msg_payload_unregister_db_done { 1026 /* Index of the unregistered doorbell. */ 1027 u32 db_idx; 1028 /* Reserved */ 1029 u32 reserved_0; 1030 }; 1031 1032 /** 1033 * Structure for heartbeat response 1034 * @see VPU_JSM_MSG_QUERY_ENGINE_HB_DONE 1035 */ 1036 struct vpu_ipc_msg_payload_query_engine_hb_done { 1037 /** Engine returning heartbeat value. */ 1038 u32 engine_idx; 1039 /** Reserved */ 1040 u32 reserved_0; 1041 /** Heartbeat value. */ 1042 u64 heartbeat; 1043 }; 1044 1045 struct vpu_ipc_msg_payload_get_power_level_count_done { 1046 /** 1047 * Number of supported power levels. The maximum possible 1048 * value of power_level_count is 16 but this may vary across 1049 * implementations. 1050 */ 1051 u32 power_level_count; 1052 /* Reserved */ 1053 u32 reserved_0; 1054 /** 1055 * Power consumption limit for each supported power level in 1056 * [0-100%] range relative to power level 0. 1057 */ 1058 u8 power_limit[16]; 1059 }; 1060 1061 /** 1062 * HWS priority band setup request / response 1063 * @see VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP 1064 */ 1065 struct vpu_ipc_msg_payload_hws_priority_band_setup { 1066 /* 1067 * Grace period in 100ns units when preempting another priority band for 1068 * this priority band 1069 */ 1070 u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 1071 /* 1072 * Default quantum in 100ns units for scheduling across processes 1073 * within a priority band 1074 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 1075 */ 1076 u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS]; 1077 /* 1078 * Default grace period in 100ns units for processes that preempt each 1079 * other within a priority band 1080 */ 1081 u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS]; 1082 /* 1083 * For normal priority band, specifies the target VPU percentage 1084 * in situations when it's starved by the focus band. 1085 */ 1086 u32 normal_band_percentage; 1087 /* 1088 * TDR timeout value in milliseconds. Default value of 0 meaning no timeout. 1089 */ 1090 u32 tdr_timeout; 1091 /* Non-interactive queue timeout for no progress of heartbeat in milliseconds. 1092 * Default value of 0 meaning no timeout. 1093 */ 1094 u32 non_interactive_no_progress_timeout; 1095 /* 1096 * Non-interactive queue upper limit timeout value in milliseconds. Default 1097 * value of 0 meaning no timeout. 1098 */ 1099 u32 non_interactive_timeout; 1100 }; 1101 1102 /** 1103 * @brief HWS create command queue request. 1104 * Host will create a command queue via this command. 1105 * Note: Cmdq group is a handle of an object which 1106 * may contain one or more command queues. 1107 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE 1108 */ 1109 struct vpu_ipc_msg_payload_hws_create_cmdq { 1110 /* Process id */ 1111 u64 process_id; 1112 /* Host SSID */ 1113 u32 host_ssid; 1114 /* Engine for which queue is being created */ 1115 u32 engine_idx; 1116 /* Cmdq group: only used for HWS logging of state changes */ 1117 u64 cmdq_group; 1118 /* Command queue id */ 1119 u64 cmdq_id; 1120 /* Command queue base */ 1121 u64 cmdq_base; 1122 /* Command queue size */ 1123 u32 cmdq_size; 1124 /* Zero padding */ 1125 u32 reserved_0; 1126 }; 1127 1128 /** 1129 * HWS create command queue response. 1130 * @see VPU_JSM_MSG_CREATE_CMD_QUEUE_RSP 1131 */ 1132 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp { 1133 /** Process id */ 1134 u64 process_id; 1135 /** Host SSID */ 1136 u32 host_ssid; 1137 /** Engine for which queue is being created */ 1138 u32 engine_idx; 1139 /** Command queue group */ 1140 u64 cmdq_group; 1141 /** Command queue id */ 1142 u64 cmdq_id; 1143 }; 1144 1145 /** 1146 * HWS destroy command queue request / response 1147 * @see VPU_JSM_MSG_DESTROY_CMD_QUEUE 1148 * @see VPU_JSM_MSG_DESTROY_CMD_QUEUE_RSP 1149 */ 1150 struct vpu_ipc_msg_payload_hws_destroy_cmdq { 1151 /** Host SSID */ 1152 u32 host_ssid; 1153 /** Zero Padding */ 1154 u32 reserved; 1155 /** Command queue id */ 1156 u64 cmdq_id; 1157 }; 1158 1159 /** 1160 * HWS set context scheduling properties request / response 1161 * @see VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES 1162 * @see VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES_RSP 1163 */ 1164 struct vpu_ipc_msg_payload_hws_set_context_sched_properties { 1165 /** Host SSID */ 1166 u32 host_ssid; 1167 /** Zero Padding */ 1168 u32 reserved_0; 1169 /** Command queue id */ 1170 u64 cmdq_id; 1171 /** 1172 * Priority band to assign to work of this context. 1173 * Available priority bands: @see enum vpu_job_scheduling_priority_band 1174 */ 1175 u32 priority_band; 1176 /** Inside realtime band assigns a further priority */ 1177 u32 realtime_priority_level; 1178 /** Priority relative to other contexts in the same process */ 1179 s32 in_process_priority; 1180 /** Zero padding / Reserved */ 1181 u32 reserved_1; 1182 /** 1183 * Context quantum relative to other contexts of same priority in the same process 1184 * Minimum value supported by NPU is 1ms (10000 in 100ns units). 1185 */ 1186 u64 context_quantum; 1187 /** Grace period when preempting context of the same priority within the same process */ 1188 u64 grace_period_same_priority; 1189 /** Grace period when preempting context of a lower priority within the same process */ 1190 u64 grace_period_lower_priority; 1191 }; 1192 1193 /** 1194 * Register doorbell command structure. 1195 * This structure supports doorbell registration for both HW and OS scheduling. 1196 * Note: Queue base and size are added here so that the same structure can be used for 1197 * OS scheduling and HW scheduling. For OS scheduling, cmdq_id will be ignored 1198 * and cmdq_base and cmdq_size will be used. For HW scheduling, cmdq_base and cmdq_size will be 1199 * ignored and cmdq_id is used. 1200 * @see VPU_JSM_MSG_HWS_REGISTER_DB 1201 */ 1202 struct vpu_jsm_hws_register_db { 1203 /** Index of the doorbell to register. */ 1204 u32 db_id; 1205 /** Host sub-stream ID for the context assigned to the doorbell. */ 1206 u32 host_ssid; 1207 /** ID of the command queue associated with the doorbell. */ 1208 u64 cmdq_id; 1209 /** Virtual address pointing to the start of command queue. */ 1210 u64 cmdq_base; 1211 /** Size of the command queue in bytes. */ 1212 u64 cmdq_size; 1213 }; 1214 1215 /** 1216 * Structure to set another buffer to be used for scheduling-related logging. 1217 * The size of the logging buffer and the number of entries is defined as part of the 1218 * buffer itself as described next. 1219 * The log buffer received from the host is made up of; 1220 * - header: 32 bytes in size, as shown in @ref vpu_hws_log_buffer_header. 1221 * The header contains the number of log entries in the buffer. 1222 * - log entry: 0 to n-1, each log entry is 32 bytes in size, as shown in 1223 * @ref vpu_hws_log_buffer_entry. 1224 * The entry contains the VPU timestamp, operation type and data. 1225 * The host should provide the notify index value of log buffer to VPU. This is a 1226 * value defined within the log buffer and when written to will generate the 1227 * scheduling log notification. 1228 * The host should set engine_idx and vpu_log_buffer_va to 0 to disable logging 1229 * for a particular engine. 1230 * VPU will handle one log buffer for each of supported engines. 1231 * VPU should allow the logging to consume one host_ssid. 1232 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1233 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG_RSP 1234 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1235 */ 1236 struct vpu_ipc_msg_payload_hws_set_scheduling_log { 1237 /** Engine ordinal */ 1238 u32 engine_idx; 1239 /** Host SSID */ 1240 u32 host_ssid; 1241 /** 1242 * VPU log buffer virtual address. 1243 * Set to 0 to disable logging for this engine. 1244 */ 1245 u64 vpu_log_buffer_va; 1246 /** 1247 * Notify index of log buffer. VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1248 * is generated when an event log is written to this index. 1249 */ 1250 u64 notify_index; 1251 /** 1252 * Field is now deprecated, will be removed when KMD is updated to support removal 1253 */ 1254 u32 enable_extra_events; 1255 /** Zero Padding */ 1256 u32 reserved_0; 1257 }; 1258 1259 /** 1260 * The scheduling log notification is generated by VPU when it writes 1261 * an event into the log buffer at the notify_index. VPU notifies host with 1262 * VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION. This is an asynchronous 1263 * message from VPU to host. 1264 * @see VPU_JSM_MSG_HWS_SCHEDULING_LOG_NOTIFICATION 1265 * @see VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG 1266 */ 1267 struct vpu_ipc_msg_payload_hws_scheduling_log_notification { 1268 /** Engine ordinal */ 1269 u32 engine_idx; 1270 /** Zero Padding */ 1271 u32 reserved_0; 1272 }; 1273 1274 /** 1275 * HWS suspend command queue request and done structure. 1276 * Host will request the suspend of contexts and VPU will; 1277 * - Suspend all work on this context 1278 * - Preempt any running work 1279 * - Asynchronously perform the above and return success immediately once 1280 * all items above are started successfully 1281 * - Notify the host of completion of these operations via 1282 * VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1283 * - Reject any other context operations on a context with an in-flight 1284 * suspend request running 1285 * Same structure used when VPU notifies host of completion of a context suspend 1286 * request. The ids and suspend fence value reported in this command will match 1287 * the one in the request from the host to suspend the context. Once suspend is 1288 * complete, VPU will not access any data relating to this command queue until 1289 * it is resumed. 1290 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ 1291 * @see VPU_JSM_MSG_HWS_SUSPEND_CMDQ_DONE 1292 */ 1293 struct vpu_ipc_msg_payload_hws_suspend_cmdq { 1294 /** Host SSID */ 1295 u32 host_ssid; 1296 /** Zero Padding */ 1297 u32 reserved_0; 1298 /** Command queue id */ 1299 u64 cmdq_id; 1300 /** 1301 * Suspend fence value - reported by the VPU suspend context 1302 * completed once suspend is complete. 1303 */ 1304 u64 suspend_fence_value; 1305 }; 1306 1307 /** 1308 * HWS Resume command queue request / response structure. 1309 * Host will request the resume of a context; 1310 * - VPU will resume all work on this context 1311 * - Scheduler will allow this context to be scheduled 1312 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ 1313 * @see VPU_JSM_MSG_HWS_RESUME_CMDQ_RSP 1314 */ 1315 struct vpu_ipc_msg_payload_hws_resume_cmdq { 1316 /** Host SSID */ 1317 u32 host_ssid; 1318 /** Zero Padding */ 1319 u32 reserved_0; 1320 /** Command queue id */ 1321 u64 cmdq_id; 1322 }; 1323 1324 /** 1325 * HWS Resume engine request / response structure. 1326 * After a HWS engine reset, all scheduling is stopped on VPU until an engine resume. 1327 * Host shall send this command to resume scheduling of any valid queue. 1328 * @see VPU_JSM_MSG_HWS_ENGINE_RESUME 1329 * @see VPU_JSM_MSG_HWS_RESUME_ENGINE_DONE 1330 */ 1331 struct vpu_ipc_msg_payload_hws_resume_engine { 1332 /** Engine to be resumed */ 1333 u32 engine_idx; 1334 /** Reserved */ 1335 u32 reserved_0; 1336 }; 1337 1338 /** 1339 * Payload for VPU_JSM_MSG_TRACE_SET_CONFIG[_RSP] and 1340 * VPU_JSM_MSG_TRACE_GET_CONFIG_RSP messages. 1341 * 1342 * The payload is interpreted differently depending on the type of message: 1343 * 1344 * - For VPU_JSM_MSG_TRACE_SET_CONFIG, the payload specifies the desired 1345 * logging configuration to be set. 1346 * 1347 * - For VPU_JSM_MSG_TRACE_SET_CONFIG_RSP, the payload reports the logging 1348 * configuration that was set after a VPU_JSM_MSG_TRACE_SET_CONFIG request. 1349 * The host can compare this payload with the one it sent in the 1350 * VPU_JSM_MSG_TRACE_SET_CONFIG request to check whether or not the 1351 * configuration was set as desired. 1352 * 1353 * - VPU_JSM_MSG_TRACE_GET_CONFIG_RSP, the payload reports the current logging 1354 * configuration. 1355 */ 1356 struct vpu_ipc_msg_payload_trace_config { 1357 /** 1358 * Logging level (currently set or to be set); see 'mvLog_t' enum for 1359 * acceptable values. The specified logging level applies to all 1360 * destinations and HW components 1361 */ 1362 u32 trace_level; 1363 /** 1364 * Bitmask of logging destinations (currently enabled or to be enabled); 1365 * bitwise OR of values defined in logging_destination enum. 1366 */ 1367 u32 trace_destination_mask; 1368 /** 1369 * Bitmask of loggable HW components (currently enabled or to be enabled); 1370 * bitwise OR of values defined in loggable_hw_component enum. 1371 */ 1372 u64 trace_hw_component_mask; 1373 u64 reserved_0; /**< Reserved for future extensions. */ 1374 }; 1375 1376 /** 1377 * Payload for VPU_JSM_MSG_TRACE_GET_CAPABILITY_RSP messages. 1378 */ 1379 struct vpu_ipc_msg_payload_trace_capability_rsp { 1380 u32 trace_destination_mask; /**< Bitmask of supported logging destinations. */ 1381 u32 reserved_0; 1382 u64 trace_hw_component_mask; /**< Bitmask of supported loggable HW components. */ 1383 u64 reserved_1; /**< Reserved for future extensions. */ 1384 }; 1385 1386 /** 1387 * Payload for VPU_JSM_MSG_TRACE_GET_NAME requests. 1388 */ 1389 struct vpu_ipc_msg_payload_trace_get_name { 1390 /** 1391 * The type of the entity to query name for; see logging_entity_type for 1392 * possible values. 1393 */ 1394 u32 entity_type; 1395 u32 reserved_0; 1396 /** 1397 * The ID of the entity to query name for; possible values depends on the 1398 * entity type. 1399 */ 1400 u64 entity_id; 1401 }; 1402 1403 /** 1404 * Payload for VPU_JSM_MSG_TRACE_GET_NAME_RSP responses. 1405 */ 1406 struct vpu_ipc_msg_payload_trace_get_name_rsp { 1407 /** 1408 * The type of the entity whose name was queried; see logging_entity_type 1409 * for possible values. 1410 */ 1411 u32 entity_type; 1412 u32 reserved_0; 1413 /** 1414 * The ID of the entity whose name was queried; possible values depends on 1415 * the entity type. 1416 */ 1417 u64 entity_id; 1418 /** Reserved for future extensions. */ 1419 u64 reserved_1; 1420 /** The name of the entity. */ 1421 char entity_name[VPU_TRACE_ENTITY_NAME_MAX_LEN]; 1422 }; 1423 1424 /** 1425 * Data sent from the VPU to the host in all metric streamer response messages 1426 * and in asynchronous notification. 1427 * @see VPU_JSM_MSG_METRIC_STREAMER_START_DONE 1428 * @see VPU_JSM_MSG_METRIC_STREAMER_STOP_DONE 1429 * @see VPU_JSM_MSG_METRIC_STREAMER_UPDATE_DONE 1430 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO_DONE 1431 * @see VPU_JSM_MSG_METRIC_STREAMER_NOTIFICATION 1432 */ 1433 struct vpu_jsm_metric_streamer_done { 1434 /** Metric group mask that identifies metric streamer instance. */ 1435 u64 metric_group_mask; 1436 /** 1437 * Size in bytes of single sample - total size of all enabled counters. 1438 * Some VPU implementations may align sample_size to more than 8 bytes. 1439 */ 1440 u32 sample_size; 1441 u32 reserved_0; 1442 /** 1443 * Number of samples collected since the metric streamer was started. 1444 * This will be 0 if the metric streamer was not started. 1445 */ 1446 u32 samples_collected; 1447 /** 1448 * Number of samples dropped since the metric streamer was started. This 1449 * is incremented every time the metric streamer is not able to write 1450 * collected samples because the current buffer is full and there is no 1451 * next buffer to switch to. 1452 */ 1453 u32 samples_dropped; 1454 /** Address of the buffer that contains the latest metric data. */ 1455 u64 buffer_addr; 1456 /** 1457 * Number of bytes written into the metric data buffer. In response to the 1458 * VPU_JSM_MSG_METRIC_STREAMER_INFO request this field contains the size of 1459 * all group and counter descriptors. The size is updated even if the buffer 1460 * in the request was NULL or too small to hold descriptors of all counters 1461 */ 1462 u64 bytes_written; 1463 }; 1464 1465 /** 1466 * Metric group description placed in the metric buffer after successful completion 1467 * of the VPU_JSM_MSG_METRIC_STREAMER_INFO command. This is followed by one or more 1468 * @ref vpu_jsm_metric_counter_descriptor records. 1469 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1470 */ 1471 struct vpu_jsm_metric_group_descriptor { 1472 /** 1473 * Offset to the next metric group (8-byte aligned). If this offset is 0 this 1474 * is the last descriptor. The value of metric_info_size must be greater than 1475 * or equal to sizeof(struct vpu_jsm_metric_group_descriptor) + name_string_size 1476 * + description_string_size and must be 8-byte aligned. 1477 */ 1478 u32 next_metric_group_info_offset; 1479 /** 1480 * Offset to the first metric counter description record (8-byte aligned). 1481 * @see vpu_jsm_metric_counter_descriptor 1482 */ 1483 u32 next_metric_counter_info_offset; 1484 /** Index of the group. This corresponds to bit index in metric_group_mask. */ 1485 u32 group_id; 1486 /** Number of counters in the metric group. */ 1487 u32 num_counters; 1488 /** Data size for all counters, must be a multiple of 8 bytes.*/ 1489 u32 metric_group_data_size; 1490 /** 1491 * Metric group domain number. Cannot use multiple, simultaneous metric groups 1492 * from the same domain. 1493 */ 1494 u32 domain; 1495 /** 1496 * Counter name string size. The string must include a null termination character. 1497 * The FW may use a fixed size name or send a different name for each counter. 1498 * If the VPU uses fixed size strings, all characters from the end of the name 1499 * to the of the fixed size character array must be zeroed. 1500 */ 1501 u32 name_string_size; 1502 /** Counter description string size, @see name_string_size */ 1503 u32 description_string_size; 1504 u64 reserved_0; 1505 /** 1506 * Right after this structure, the VPU writes name and description of 1507 * the metric group. 1508 */ 1509 }; 1510 1511 /** 1512 * Metric counter description, placed in the buffer after vpu_jsm_metric_group_descriptor. 1513 * @see VPU_JSM_MSG_METRIC_STREAMER_INFO 1514 */ 1515 struct vpu_jsm_metric_counter_descriptor { 1516 /** 1517 * Offset to the next counter in a group (8-byte aligned). If this offset is 1518 * 0 this is the last counter in the group. 1519 */ 1520 u32 next_metric_counter_info_offset; 1521 /** 1522 * Offset to the counter data from the start of samples in this metric group. 1523 * Note that metric_data_offset % metric_data_size must be 0. 1524 */ 1525 u32 metric_data_offset; 1526 /** Size of the metric counter data in bytes. */ 1527 u32 metric_data_size; 1528 /** Metric type, see Level Zero API for definitions. */ 1529 u32 tier; 1530 /** Metric type, see set_metric_type_t for definitions. */ 1531 u32 metric_type; 1532 /** Metric type, see set_value_type_t for definitions. */ 1533 u32 metric_value_type; 1534 /** 1535 * Counter name string size. The string must include a null termination character. 1536 * The FW may use a fixed size name or send a different name for each counter. 1537 * If the VPU uses fixed size strings, all characters from the end of the name 1538 * to the of the fixed size character array must be zeroed. 1539 */ 1540 u32 name_string_size; 1541 /** Counter description string size, @see name_string_size */ 1542 u32 description_string_size; 1543 /** Counter component name string size, @see name_string_size */ 1544 u32 component_string_size; 1545 /** Counter string size, @see name_string_size */ 1546 u32 units_string_size; 1547 u64 reserved_0; 1548 /** 1549 * Right after this structure, the VPU writes name, description 1550 * component and unit strings. 1551 */ 1552 }; 1553 1554 /** 1555 * Payload for VPU_JSM_MSG_DYNDBG_CONTROL requests. 1556 * 1557 * VPU_JSM_MSG_DYNDBG_CONTROL are used to control the VPU FW Dynamic Debug 1558 * feature, which allows developers to selectively enable / disable MVLOG_DEBUG 1559 * messages. This is equivalent to the Dynamic Debug functionality provided by 1560 * Linux 1561 * (https://www.kernel.org/doc/html/latest/admin-guide/dynamic-debug-howto.html) 1562 * The host can control Dynamic Debug behavior by sending dyndbg commands, which 1563 * have the same syntax as Linux 1564 * dyndbg commands. 1565 * 1566 * NOTE: in order for MVLOG_DEBUG messages to be actually printed, the host 1567 * still has to set the logging level to MVLOG_DEBUG, using the 1568 * VPU_JSM_MSG_TRACE_SET_CONFIG command. 1569 * 1570 * The host can see the current dynamic debug configuration by executing a 1571 * special 'show' command. The dyndbg configuration will be printed to the 1572 * configured logging destination using MVLOG_INFO logging level. 1573 */ 1574 struct vpu_ipc_msg_payload_dyndbg_control { 1575 /** 1576 * Dyndbg command (same format as Linux dyndbg); must be a NULL-terminated 1577 * string. 1578 */ 1579 char dyndbg_cmd[VPU_DYNDBG_CMD_MAX_LEN]; 1580 }; 1581 1582 /** 1583 * Payload for VPU_JSM_MSG_PWR_D0I3_ENTER 1584 * 1585 * This is a bi-directional payload. 1586 */ 1587 struct vpu_ipc_msg_payload_pwr_d0i3_enter { 1588 /** 1589 * 0: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is not sent to the host driver 1590 * The driver will poll for D0i2 Idle state transitions. 1591 * 1: VPU_JSM_MSG_PWR_D0I3_ENTER_DONE is sent after VPU state save is complete 1592 */ 1593 u32 send_response; 1594 u32 reserved_0; 1595 }; 1596 1597 /** 1598 * Payload for VPU_JSM_MSG_DCT_ENABLE message. 1599 * 1600 * Default values for DCT active/inactive times are 5.3ms and 30ms respectively, 1601 * corresponding to a 85% duty cycle. This payload allows the host to tune these 1602 * values according to application requirements. 1603 */ 1604 struct vpu_ipc_msg_payload_pwr_dct_control { 1605 /** Duty cycle active time in microseconds */ 1606 u32 dct_active_us; 1607 /** Duty cycle inactive time in microseconds */ 1608 u32 dct_inactive_us; 1609 }; 1610 1611 /* 1612 * Payloads union, used to define complete message format. 1613 */ 1614 union vpu_ipc_msg_payload { 1615 struct vpu_ipc_msg_payload_engine_reset engine_reset; 1616 struct vpu_ipc_msg_payload_engine_preempt engine_preempt; 1617 struct vpu_ipc_msg_payload_register_db register_db; 1618 struct vpu_ipc_msg_payload_unregister_db unregister_db; 1619 struct vpu_ipc_msg_payload_query_engine_hb query_engine_hb; 1620 struct vpu_ipc_msg_payload_power_level power_level; 1621 struct vpu_jsm_metric_streamer_start metric_streamer_start; 1622 struct vpu_jsm_metric_streamer_stop metric_streamer_stop; 1623 struct vpu_jsm_metric_streamer_update metric_streamer_update; 1624 struct vpu_ipc_msg_payload_ssid_release ssid_release; 1625 struct vpu_jsm_hws_register_db hws_register_db; 1626 struct vpu_ipc_msg_payload_job_done job_done; 1627 struct vpu_ipc_msg_payload_native_fence_signalled native_fence_signalled; 1628 struct vpu_ipc_msg_payload_engine_reset_done engine_reset_done; 1629 struct vpu_ipc_msg_payload_engine_preempt_done engine_preempt_done; 1630 struct vpu_ipc_msg_payload_register_db_done register_db_done; 1631 struct vpu_ipc_msg_payload_unregister_db_done unregister_db_done; 1632 struct vpu_ipc_msg_payload_query_engine_hb_done query_engine_hb_done; 1633 struct vpu_ipc_msg_payload_get_power_level_count_done get_power_level_count_done; 1634 struct vpu_jsm_metric_streamer_done metric_streamer_done; 1635 struct vpu_ipc_msg_payload_trace_config trace_config; 1636 struct vpu_ipc_msg_payload_trace_capability_rsp trace_capability; 1637 struct vpu_ipc_msg_payload_trace_get_name trace_get_name; 1638 struct vpu_ipc_msg_payload_trace_get_name_rsp trace_get_name_rsp; 1639 struct vpu_ipc_msg_payload_dyndbg_control dyndbg_control; 1640 struct vpu_ipc_msg_payload_hws_priority_band_setup hws_priority_band_setup; 1641 struct vpu_ipc_msg_payload_hws_create_cmdq hws_create_cmdq; 1642 struct vpu_ipc_msg_payload_hws_create_cmdq_rsp hws_create_cmdq_rsp; 1643 struct vpu_ipc_msg_payload_hws_destroy_cmdq hws_destroy_cmdq; 1644 struct vpu_ipc_msg_payload_hws_set_context_sched_properties 1645 hws_set_context_sched_properties; 1646 struct vpu_ipc_msg_payload_hws_set_scheduling_log hws_set_scheduling_log; 1647 struct vpu_ipc_msg_payload_hws_scheduling_log_notification hws_scheduling_log_notification; 1648 struct vpu_ipc_msg_payload_hws_suspend_cmdq hws_suspend_cmdq; 1649 struct vpu_ipc_msg_payload_hws_resume_cmdq hws_resume_cmdq; 1650 struct vpu_ipc_msg_payload_hws_resume_engine hws_resume_engine; 1651 struct vpu_ipc_msg_payload_pwr_d0i3_enter pwr_d0i3_enter; 1652 struct vpu_ipc_msg_payload_pwr_dct_control pwr_dct_control; 1653 }; 1654 1655 /* 1656 * Host <-> LRT IPC message base structure. 1657 * 1658 * NOTE: All instances of this object must be aligned on a 64B boundary 1659 * to allow proper handling of VPU cache operations. 1660 */ 1661 struct vpu_jsm_msg { 1662 /* Reserved */ 1663 u64 reserved_0; 1664 /* Message type, see vpu_ipc_msg_type enum. */ 1665 u32 type; 1666 /* Buffer status, see vpu_ipc_msg_status enum. */ 1667 u32 status; 1668 /* 1669 * Request ID, provided by the host in a request message and passed 1670 * back by VPU in the response message. 1671 */ 1672 u32 request_id; 1673 /* Request return code set by the VPU, see VPU_JSM_STATUS_* defines. */ 1674 u32 result; 1675 u64 reserved_1; 1676 /* Message payload depending on message type, see vpu_ipc_msg_payload union. */ 1677 union vpu_ipc_msg_payload payload; 1678 }; 1679 1680 #pragma pack(pop) 1681 1682 #endif 1683 1684 ///@} 1685