xref: /linux/drivers/accel/ivpu/ivpu_hw.h (revision 52e6b198833411564e0b9ce6e96bbd3d72f961e7) 
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2020-2025 Intel Corporation
4  */
5 
6 #ifndef __IVPU_HW_H__
7 #define __IVPU_HW_H__
8 
9 #include "ivpu_drv.h"
10 #include "ivpu_hw_btrs.h"
11 #include "ivpu_hw_ip.h"
12 
13 struct ivpu_addr_range {
14 	resource_size_t start;
15 	resource_size_t end;
16 };
17 
18 struct ivpu_hw_info {
19 	struct {
20 		bool (*btrs_irq_handler)(struct ivpu_device *vdev, int irq);
21 		bool (*ip_irq_handler)(struct ivpu_device *vdev, int irq);
22 	} irq;
23 	struct {
24 		struct ivpu_addr_range runtime;
25 		struct ivpu_addr_range global;
26 		struct ivpu_addr_range user;
27 		struct ivpu_addr_range shave;
28 		struct ivpu_addr_range dma;
29 	} ranges;
30 	struct {
31 		u8 min_ratio;
32 		u8 max_ratio;
33 		/*
34 		 * Pll ratio for the efficiency frequency. The VPU has optimum
35 		 * performance to power ratio at this frequency.
36 		 */
37 		u8 pn_ratio;
38 		u32 profiling_freq;
39 	} pll;
40 	struct {
41 		u32 grace_period[VPU_HWS_NUM_PRIORITY_BANDS];
42 		u32 process_quantum[VPU_HWS_NUM_PRIORITY_BANDS];
43 		u32 process_grace_period[VPU_HWS_NUM_PRIORITY_BANDS];
44 	} hws;
45 	u32 tile_fuse;
46 	u32 sku;
47 	u16 config;
48 	int dma_bits;
49 	ktime_t d0i3_entry_host_ts;
50 	u64 d0i3_entry_vpu_ts;
51 	atomic_t firewall_irq_counter;
52 };
53 
54 int ivpu_hw_init(struct ivpu_device *vdev);
55 int ivpu_hw_range_init(struct ivpu_device *vdev, struct ivpu_addr_range *range, u64 start,
56 		       u64 size);
57 int ivpu_hw_power_up(struct ivpu_device *vdev);
58 int ivpu_hw_power_down(struct ivpu_device *vdev);
59 int ivpu_hw_reset(struct ivpu_device *vdev);
60 int ivpu_hw_boot_fw(struct ivpu_device *vdev);
61 void ivpu_hw_profiling_freq_drive(struct ivpu_device *vdev, bool enable);
62 void ivpu_irq_handlers_init(struct ivpu_device *vdev);
63 void ivpu_hw_irq_enable(struct ivpu_device *vdev);
64 void ivpu_hw_irq_disable(struct ivpu_device *vdev);
65 irqreturn_t ivpu_hw_irq_handler(int irq, void *ptr);
66 
67 static inline u32 ivpu_hw_btrs_irq_handler(struct ivpu_device *vdev, int irq)
68 {
69 	return vdev->hw->irq.btrs_irq_handler(vdev, irq);
70 }
71 
72 static inline u32 ivpu_hw_ip_irq_handler(struct ivpu_device *vdev, int irq)
73 {
74 	return vdev->hw->irq.ip_irq_handler(vdev, irq);
75 }
76 
77 static inline u64 ivpu_hw_range_size(const struct ivpu_addr_range *range)
78 {
79 	return range->end - range->start;
80 }
81 
82 static inline u32 ivpu_hw_dpu_max_freq_get(struct ivpu_device *vdev)
83 {
84 	return ivpu_hw_btrs_dpu_max_freq_get(vdev);
85 }
86 
87 static inline u32 ivpu_hw_dpu_freq_get(struct ivpu_device *vdev)
88 {
89 	return ivpu_hw_btrs_dpu_freq_get(vdev);
90 }
91 
92 static inline void ivpu_hw_irq_clear(struct ivpu_device *vdev)
93 {
94 	ivpu_hw_ip_irq_clear(vdev);
95 }
96 
97 static inline u32 ivpu_hw_profiling_freq_get(struct ivpu_device *vdev)
98 {
99 	return vdev->hw->pll.profiling_freq;
100 }
101 
102 static inline void ivpu_hw_diagnose_failure(struct ivpu_device *vdev)
103 {
104 	ivpu_hw_ip_diagnose_failure(vdev);
105 	ivpu_hw_btrs_diagnose_failure(vdev);
106 }
107 
108 static inline u32 ivpu_hw_telemetry_offset_get(struct ivpu_device *vdev)
109 {
110 	return ivpu_hw_btrs_telemetry_offset_get(vdev);
111 }
112 
113 static inline u32 ivpu_hw_telemetry_size_get(struct ivpu_device *vdev)
114 {
115 	return ivpu_hw_btrs_telemetry_size_get(vdev);
116 }
117 
118 static inline u32 ivpu_hw_telemetry_enable_get(struct ivpu_device *vdev)
119 {
120 	return ivpu_hw_btrs_telemetry_enable_get(vdev);
121 }
122 
123 static inline bool ivpu_hw_is_idle(struct ivpu_device *vdev)
124 {
125 	return ivpu_hw_btrs_is_idle(vdev);
126 }
127 
128 static inline int ivpu_hw_wait_for_idle(struct ivpu_device *vdev)
129 {
130 	return ivpu_hw_btrs_wait_for_idle(vdev);
131 }
132 
133 static inline void ivpu_hw_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr)
134 {
135 	ivpu_hw_ip_ipc_tx_set(vdev, vpu_addr);
136 }
137 
138 static inline void ivpu_hw_db_set(struct ivpu_device *vdev, u32 db_id)
139 {
140 	ivpu_hw_ip_db_set(vdev, db_id);
141 }
142 
143 static inline u32 ivpu_hw_ipc_rx_addr_get(struct ivpu_device *vdev)
144 {
145 	return ivpu_hw_ip_ipc_rx_addr_get(vdev);
146 }
147 
148 static inline u32 ivpu_hw_ipc_rx_count_get(struct ivpu_device *vdev)
149 {
150 	return ivpu_hw_ip_ipc_rx_count_get(vdev);
151 }
152 
153 #endif /* __IVPU_HW_H__ */
154