xref: /linux/arch/x86/kernel/cpu/proc.c (revision 42fda66387daa53538ae13a2c858396aaf037158)
1 #include <linux/smp.h>
2 #include <linux/timex.h>
3 #include <linux/string.h>
4 #include <asm/semaphore.h>
5 #include <linux/seq_file.h>
6 #include <linux/cpufreq.h>
7 
8 /*
9  *	Get CPU information for use by the procfs.
10  */
11 static int show_cpuinfo(struct seq_file *m, void *v)
12 {
13 	/*
14 	 * These flag bits must match the definitions in <asm/cpufeature.h>.
15 	 * NULL means this bit is undefined or reserved; either way it doesn't
16 	 * have meaning as far as Linux is concerned.  Note that it's important
17 	 * to realize there is a difference between this table and CPUID -- if
18 	 * applications want to get the raw CPUID data, they should access
19 	 * /dev/cpu/<cpu_nr>/cpuid instead.
20 	 */
21 	static const char * const x86_cap_flags[] = {
22 		/* Intel-defined */
23 	        "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
24 	        "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
25 	        "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
26 	        "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
27 
28 		/* AMD-defined */
29 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
30 		NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
31 		NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
32 		NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
33 		"3dnowext", "3dnow",
34 
35 		/* Transmeta-defined */
36 		"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
37 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
38 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
39 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
40 
41 		/* Other (Linux-defined) */
42 		"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
43 		NULL, NULL, NULL, NULL,
44 		"constant_tsc", "up", NULL, "arch_perfmon",
45 		"pebs", "bts", NULL, "sync_rdtsc",
46 		"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
47 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
48 
49 		/* Intel-defined (#2) */
50 		"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
51 		"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
52 		NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt",
53 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
54 
55 		/* VIA/Cyrix/Centaur-defined */
56 		NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
57 		"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
58 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
59 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
60 
61 		/* AMD-defined (#2) */
62 		"lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
63 		"altmovcr8", "abm", "sse4a",
64 		"misalignsse", "3dnowprefetch",
65 		"osvw", "ibs", NULL, NULL, NULL, NULL,
66 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
67 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
68 
69 		/* Auxiliary (Linux-defined) */
70 		"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
71 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
72 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
73 		NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
74 	};
75 	static const char * const x86_power_flags[] = {
76 		"ts",	/* temperature sensor */
77 		"fid",  /* frequency id control */
78 		"vid",  /* voltage id control */
79 		"ttp",  /* thermal trip */
80 		"tm",
81 		"stc",
82 		"100mhzsteps",
83 		"hwpstate",
84 		"",	/* constant_tsc - moved to flags */
85 		/* nothing */
86 	};
87 	struct cpuinfo_x86 *c = v;
88 	int i, n = c - cpu_data;
89 	int fpu_exception;
90 
91 #ifdef CONFIG_SMP
92 	if (!cpu_online(n))
93 		return 0;
94 #endif
95 	seq_printf(m, "processor\t: %d\n"
96 		"vendor_id\t: %s\n"
97 		"cpu family\t: %d\n"
98 		"model\t\t: %d\n"
99 		"model name\t: %s\n",
100 		n,
101 		c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
102 		c->x86,
103 		c->x86_model,
104 		c->x86_model_id[0] ? c->x86_model_id : "unknown");
105 
106 	if (c->x86_mask || c->cpuid_level >= 0)
107 		seq_printf(m, "stepping\t: %d\n", c->x86_mask);
108 	else
109 		seq_printf(m, "stepping\t: unknown\n");
110 
111 	if ( cpu_has(c, X86_FEATURE_TSC) ) {
112 		unsigned int freq = cpufreq_quick_get(n);
113 		if (!freq)
114 			freq = cpu_khz;
115 		seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
116 			freq / 1000, (freq % 1000));
117 	}
118 
119 	/* Cache size */
120 	if (c->x86_cache_size >= 0)
121 		seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
122 #ifdef CONFIG_X86_HT
123 	if (c->x86_max_cores * smp_num_siblings > 1) {
124 		seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
125 		seq_printf(m, "siblings\t: %d\n",
126 				cpus_weight(per_cpu(cpu_core_map, n)));
127 		seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
128 		seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
129 	}
130 #endif
131 
132 	/* We use exception 16 if we have hardware math and we've either seen it or the CPU claims it is internal */
133 	fpu_exception = c->hard_math && (ignore_fpu_irq || cpu_has_fpu);
134 	seq_printf(m, "fdiv_bug\t: %s\n"
135 			"hlt_bug\t\t: %s\n"
136 			"f00f_bug\t: %s\n"
137 			"coma_bug\t: %s\n"
138 			"fpu\t\t: %s\n"
139 			"fpu_exception\t: %s\n"
140 			"cpuid level\t: %d\n"
141 			"wp\t\t: %s\n"
142 			"flags\t\t:",
143 		     c->fdiv_bug ? "yes" : "no",
144 		     c->hlt_works_ok ? "no" : "yes",
145 		     c->f00f_bug ? "yes" : "no",
146 		     c->coma_bug ? "yes" : "no",
147 		     c->hard_math ? "yes" : "no",
148 		     fpu_exception ? "yes" : "no",
149 		     c->cpuid_level,
150 		     c->wp_works_ok ? "yes" : "no");
151 
152 	for ( i = 0 ; i < 32*NCAPINTS ; i++ )
153 		if ( test_bit(i, c->x86_capability) &&
154 		     x86_cap_flags[i] != NULL )
155 			seq_printf(m, " %s", x86_cap_flags[i]);
156 
157 	for (i = 0; i < 32; i++)
158 		if (c->x86_power & (1 << i)) {
159 			if (i < ARRAY_SIZE(x86_power_flags) &&
160 			    x86_power_flags[i])
161 				seq_printf(m, "%s%s",
162 					   x86_power_flags[i][0]?" ":"",
163 					   x86_power_flags[i]);
164 			else
165 				seq_printf(m, " [%d]", i);
166 		}
167 
168 	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
169 		     c->loops_per_jiffy/(500000/HZ),
170 		     (c->loops_per_jiffy/(5000/HZ)) % 100);
171 	seq_printf(m, "clflush size\t: %u\n\n", c->x86_clflush_size);
172 
173 	return 0;
174 }
175 
176 static void *c_start(struct seq_file *m, loff_t *pos)
177 {
178 	return *pos < NR_CPUS ? cpu_data + *pos : NULL;
179 }
180 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
181 {
182 	++*pos;
183 	return c_start(m, pos);
184 }
185 static void c_stop(struct seq_file *m, void *v)
186 {
187 }
188 struct seq_operations cpuinfo_op = {
189 	.start	= c_start,
190 	.next	= c_next,
191 	.stop	= c_stop,
192 	.show	= show_cpuinfo,
193 };
194