1 #ifndef _ASM_X86_SMP_H 2 #define _ASM_X86_SMP_H 3 #ifndef __ASSEMBLY__ 4 #include <linux/cpumask.h> 5 #include <asm/percpu.h> 6 7 /* 8 * We need the APIC definitions automatically as part of 'smp.h' 9 */ 10 #ifdef CONFIG_X86_LOCAL_APIC 11 # include <asm/mpspec.h> 12 # include <asm/apic.h> 13 # ifdef CONFIG_X86_IO_APIC 14 # include <asm/io_apic.h> 15 # endif 16 #endif 17 #include <asm/thread_info.h> 18 #include <asm/cpumask.h> 19 20 extern int smp_num_siblings; 21 extern unsigned int num_processors; 22 23 DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); 24 DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); 25 /* cpus sharing the last level cache: */ 26 DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); 27 DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id); 28 DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number); 29 30 static inline struct cpumask *cpu_llc_shared_mask(int cpu) 31 { 32 return per_cpu(cpu_llc_shared_map, cpu); 33 } 34 35 DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); 36 DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); 37 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) 38 DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid); 39 #endif 40 41 /* Static state in head.S used to set up a CPU */ 42 extern unsigned long stack_start; /* Initial stack pointer address */ 43 44 struct task_struct; 45 46 struct smp_ops { 47 void (*smp_prepare_boot_cpu)(void); 48 void (*smp_prepare_cpus)(unsigned max_cpus); 49 void (*smp_cpus_done)(unsigned max_cpus); 50 51 void (*stop_other_cpus)(int wait); 52 void (*smp_send_reschedule)(int cpu); 53 54 int (*cpu_up)(unsigned cpu, struct task_struct *tidle); 55 int (*cpu_disable)(void); 56 void (*cpu_die)(unsigned int cpu); 57 void (*play_dead)(void); 58 59 void (*send_call_func_ipi)(const struct cpumask *mask); 60 void (*send_call_func_single_ipi)(int cpu); 61 }; 62 63 /* Globals due to paravirt */ 64 extern void set_cpu_sibling_map(int cpu); 65 66 #ifdef CONFIG_SMP 67 extern struct smp_ops smp_ops; 68 69 static inline void smp_send_stop(void) 70 { 71 smp_ops.stop_other_cpus(0); 72 } 73 74 static inline void stop_other_cpus(void) 75 { 76 smp_ops.stop_other_cpus(1); 77 } 78 79 static inline void smp_prepare_boot_cpu(void) 80 { 81 smp_ops.smp_prepare_boot_cpu(); 82 } 83 84 static inline void smp_prepare_cpus(unsigned int max_cpus) 85 { 86 smp_ops.smp_prepare_cpus(max_cpus); 87 } 88 89 static inline void smp_cpus_done(unsigned int max_cpus) 90 { 91 smp_ops.smp_cpus_done(max_cpus); 92 } 93 94 static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle) 95 { 96 return smp_ops.cpu_up(cpu, tidle); 97 } 98 99 static inline int __cpu_disable(void) 100 { 101 return smp_ops.cpu_disable(); 102 } 103 104 static inline void __cpu_die(unsigned int cpu) 105 { 106 smp_ops.cpu_die(cpu); 107 } 108 109 static inline void play_dead(void) 110 { 111 smp_ops.play_dead(); 112 } 113 114 static inline void smp_send_reschedule(int cpu) 115 { 116 smp_ops.smp_send_reschedule(cpu); 117 } 118 119 static inline void arch_send_call_function_single_ipi(int cpu) 120 { 121 smp_ops.send_call_func_single_ipi(cpu); 122 } 123 124 static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) 125 { 126 smp_ops.send_call_func_ipi(mask); 127 } 128 129 void cpu_disable_common(void); 130 void native_smp_prepare_boot_cpu(void); 131 void native_smp_prepare_cpus(unsigned int max_cpus); 132 void native_smp_cpus_done(unsigned int max_cpus); 133 void common_cpu_up(unsigned int cpunum, struct task_struct *tidle); 134 int native_cpu_up(unsigned int cpunum, struct task_struct *tidle); 135 int native_cpu_disable(void); 136 int common_cpu_die(unsigned int cpu); 137 void native_cpu_die(unsigned int cpu); 138 void native_play_dead(void); 139 void play_dead_common(void); 140 void wbinvd_on_cpu(int cpu); 141 int wbinvd_on_all_cpus(void); 142 143 void native_send_call_func_ipi(const struct cpumask *mask); 144 void native_send_call_func_single_ipi(int cpu); 145 void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle); 146 147 void smp_store_boot_cpu_info(void); 148 void smp_store_cpu_info(int id); 149 #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) 150 151 #else /* !CONFIG_SMP */ 152 #define wbinvd_on_cpu(cpu) wbinvd() 153 static inline int wbinvd_on_all_cpus(void) 154 { 155 wbinvd(); 156 return 0; 157 } 158 #endif /* CONFIG_SMP */ 159 160 extern unsigned disabled_cpus; 161 162 #ifdef CONFIG_X86_32_SMP 163 /* 164 * This function is needed by all SMP systems. It must _always_ be valid 165 * from the initial startup. We map APIC_BASE very early in page_setup(), 166 * so this is correct in the x86 case. 167 */ 168 #define raw_smp_processor_id() (this_cpu_read(cpu_number)) 169 extern int safe_smp_processor_id(void); 170 171 #elif defined(CONFIG_X86_64_SMP) 172 #define raw_smp_processor_id() (this_cpu_read(cpu_number)) 173 174 #define stack_smp_processor_id() \ 175 ({ \ 176 struct thread_info *ti; \ 177 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ 178 ti->cpu; \ 179 }) 180 #define safe_smp_processor_id() smp_processor_id() 181 182 #endif 183 184 #ifdef CONFIG_X86_LOCAL_APIC 185 186 #ifndef CONFIG_X86_64 187 static inline int logical_smp_processor_id(void) 188 { 189 /* we don't want to mark this access volatile - bad code generation */ 190 return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); 191 } 192 193 #endif 194 195 extern int hard_smp_processor_id(void); 196 197 #else /* CONFIG_X86_LOCAL_APIC */ 198 199 # ifndef CONFIG_SMP 200 # define hard_smp_processor_id() 0 201 # endif 202 203 #endif /* CONFIG_X86_LOCAL_APIC */ 204 205 #ifdef CONFIG_DEBUG_NMI_SELFTEST 206 extern void nmi_selftest(void); 207 #else 208 #define nmi_selftest() do { } while (0) 209 #endif 210 211 #endif /* __ASSEMBLY__ */ 212 #endif /* _ASM_X86_SMP_H */ 213