1 #ifndef _ASM_X86_CPUFEATURE_H 2 #define _ASM_X86_CPUFEATURE_H 3 4 #include <asm/processor.h> 5 6 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) 7 8 #include <asm/asm.h> 9 #include <linux/bitops.h> 10 11 enum cpuid_leafs 12 { 13 CPUID_1_EDX = 0, 14 CPUID_8000_0001_EDX, 15 CPUID_8086_0001_EDX, 16 CPUID_LNX_1, 17 CPUID_1_ECX, 18 CPUID_C000_0001_EDX, 19 CPUID_8000_0001_ECX, 20 CPUID_LNX_2, 21 CPUID_LNX_3, 22 CPUID_7_0_EBX, 23 CPUID_D_1_EAX, 24 CPUID_F_0_EDX, 25 CPUID_F_1_EDX, 26 CPUID_8000_0008_EBX, 27 CPUID_6_EAX, 28 CPUID_8000_000A_EDX, 29 }; 30 31 #ifdef CONFIG_X86_FEATURE_NAMES 32 extern const char * const x86_cap_flags[NCAPINTS*32]; 33 extern const char * const x86_power_flags[32]; 34 #define X86_CAP_FMT "%s" 35 #define x86_cap_flag(flag) x86_cap_flags[flag] 36 #else 37 #define X86_CAP_FMT "%d:%d" 38 #define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31) 39 #endif 40 41 /* 42 * In order to save room, we index into this array by doing 43 * X86_BUG_<name> - NCAPINTS*32. 44 */ 45 extern const char * const x86_bug_flags[NBUGINTS*32]; 46 47 #define test_cpu_cap(c, bit) \ 48 test_bit(bit, (unsigned long *)((c)->x86_capability)) 49 50 #define REQUIRED_MASK_BIT_SET(bit) \ 51 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ 52 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) || \ 53 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) || \ 54 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ 55 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ 56 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ 57 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \ 58 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) || \ 59 (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8)) || \ 60 (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9)) ) 61 62 #define DISABLED_MASK_BIT_SET(bit) \ 63 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & DISABLED_MASK0)) || \ 64 (((bit)>>5)==1 && (1UL<<((bit)&31) & DISABLED_MASK1)) || \ 65 (((bit)>>5)==2 && (1UL<<((bit)&31) & DISABLED_MASK2)) || \ 66 (((bit)>>5)==3 && (1UL<<((bit)&31) & DISABLED_MASK3)) || \ 67 (((bit)>>5)==4 && (1UL<<((bit)&31) & DISABLED_MASK4)) || \ 68 (((bit)>>5)==5 && (1UL<<((bit)&31) & DISABLED_MASK5)) || \ 69 (((bit)>>5)==6 && (1UL<<((bit)&31) & DISABLED_MASK6)) || \ 70 (((bit)>>5)==7 && (1UL<<((bit)&31) & DISABLED_MASK7)) || \ 71 (((bit)>>5)==8 && (1UL<<((bit)&31) & DISABLED_MASK8)) || \ 72 (((bit)>>5)==9 && (1UL<<((bit)&31) & DISABLED_MASK9)) ) 73 74 #define cpu_has(c, bit) \ 75 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 76 test_cpu_cap(c, bit)) 77 78 #define this_cpu_has(bit) \ 79 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \ 80 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability)) 81 82 /* 83 * This macro is for detection of features which need kernel 84 * infrastructure to be used. It may *not* directly test the CPU 85 * itself. Use the cpu_has() family if you want true runtime 86 * testing of CPU features, like in hypervisor code where you are 87 * supporting a possible guest feature where host support for it 88 * is not relevant. 89 */ 90 #define cpu_feature_enabled(bit) \ 91 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit)) 92 93 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) 94 95 #define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability)) 96 #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) 97 #define setup_clear_cpu_cap(bit) do { \ 98 clear_cpu_cap(&boot_cpu_data, bit); \ 99 set_bit(bit, (unsigned long *)cpu_caps_cleared); \ 100 } while (0) 101 #define setup_force_cpu_cap(bit) do { \ 102 set_cpu_cap(&boot_cpu_data, bit); \ 103 set_bit(bit, (unsigned long *)cpu_caps_set); \ 104 } while (0) 105 106 #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) 107 #define cpu_has_pse boot_cpu_has(X86_FEATURE_PSE) 108 #define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC) 109 #define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE) 110 #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) 111 #define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR) 112 #define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM) 113 #define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2) 114 #define cpu_has_aes boot_cpu_has(X86_FEATURE_AES) 115 #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX) 116 #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2) 117 #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH) 118 #define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) 119 #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) 120 #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) 121 #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) 122 #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) 123 #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) 124 #define cpu_has_osxsave boot_cpu_has(X86_FEATURE_OSXSAVE) 125 #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) 126 /* 127 * Do not add any more of those clumsy macros - use static_cpu_has() for 128 * fast paths and boot_cpu_has() otherwise! 129 */ 130 131 #if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS) 132 /* 133 * Static testing of CPU features. Used the same as boot_cpu_has(). 134 * These will statically patch the target code for additional 135 * performance. 136 */ 137 static __always_inline __pure bool _static_cpu_has(u16 bit) 138 { 139 asm_volatile_goto("1: jmp 6f\n" 140 "2:\n" 141 ".skip -(((5f-4f) - (2b-1b)) > 0) * " 142 "((5f-4f) - (2b-1b)),0x90\n" 143 "3:\n" 144 ".section .altinstructions,\"a\"\n" 145 " .long 1b - .\n" /* src offset */ 146 " .long 4f - .\n" /* repl offset */ 147 " .word %P1\n" /* always replace */ 148 " .byte 3b - 1b\n" /* src len */ 149 " .byte 5f - 4f\n" /* repl len */ 150 " .byte 3b - 2b\n" /* pad len */ 151 ".previous\n" 152 ".section .altinstr_replacement,\"ax\"\n" 153 "4: jmp %l[t_no]\n" 154 "5:\n" 155 ".previous\n" 156 ".section .altinstructions,\"a\"\n" 157 " .long 1b - .\n" /* src offset */ 158 " .long 0\n" /* no replacement */ 159 " .word %P0\n" /* feature bit */ 160 " .byte 3b - 1b\n" /* src len */ 161 " .byte 0\n" /* repl len */ 162 " .byte 0\n" /* pad len */ 163 ".previous\n" 164 ".section .altinstr_aux,\"ax\"\n" 165 "6:\n" 166 " testb %[bitnum],%[cap_byte]\n" 167 " jnz %l[t_yes]\n" 168 " jmp %l[t_no]\n" 169 ".previous\n" 170 : : "i" (bit), "i" (X86_FEATURE_ALWAYS), 171 [bitnum] "i" (1 << (bit & 7)), 172 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3]) 173 : : t_yes, t_no); 174 t_yes: 175 return true; 176 t_no: 177 return false; 178 } 179 180 #define static_cpu_has(bit) \ 181 ( \ 182 __builtin_constant_p(boot_cpu_has(bit)) ? \ 183 boot_cpu_has(bit) : \ 184 _static_cpu_has(bit) \ 185 ) 186 #else 187 /* 188 * Fall back to dynamic for gcc versions which don't support asm goto. Should be 189 * a minority now anyway. 190 */ 191 #define static_cpu_has(bit) boot_cpu_has(bit) 192 #endif 193 194 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) 195 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) 196 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) 197 198 #define static_cpu_has_bug(bit) static_cpu_has((bit)) 199 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) 200 201 #define MAX_CPU_FEATURES (NCAPINTS * 32) 202 #define cpu_have_feature boot_cpu_has 203 204 #define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X" 205 #define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \ 206 boot_cpu_data.x86_model 207 208 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */ 209 #endif /* _ASM_X86_CPUFEATURE_H */ 210