xref: /linux/arch/x86/Kconfig (revision b9020bdb9f76b58117f9902db3047693fd12b11b)
1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0
2daa93fabSSam Ravnborg# Select 32 or 64 bit
3daa93fabSSam Ravnborgconfig 64BIT
4104daea1SMasahiro Yamada	bool "64-bit kernel" if "$(ARCH)" = "x86"
5104daea1SMasahiro Yamada	default "$(ARCH)" != "i386"
6a7f7f624SMasahiro Yamada	help
7daa93fabSSam Ravnborg	  Say yes to build a 64-bit kernel - formerly known as x86_64
8daa93fabSSam Ravnborg	  Say no to build a 32-bit kernel - formerly known as i386
9daa93fabSSam Ravnborg
10daa93fabSSam Ravnborgconfig X86_32
113120e25eSJan Beulich	def_bool y
123120e25eSJan Beulich	depends on !64BIT
13341c787eSIngo Molnar	# Options that are inherently 32-bit kernel only:
14341c787eSIngo Molnar	select ARCH_WANT_IPC_PARSE_VERSION
15341c787eSIngo Molnar	select CLKSRC_I8253
16341c787eSIngo Molnar	select CLONE_BACKWARDS
17157e118bSThomas Gleixner	select GENERIC_VDSO_32
18117ed454SThomas Gleixner	select HAVE_DEBUG_STACKOVERFLOW
19157e118bSThomas Gleixner	select KMAP_LOCAL
20341c787eSIngo Molnar	select MODULES_USE_ELF_REL
21341c787eSIngo Molnar	select OLD_SIGACTION
222ca408d9SBrian Gerst	select ARCH_SPLIT_ARG64
23daa93fabSSam Ravnborg
24daa93fabSSam Ravnborgconfig X86_64
253120e25eSJan Beulich	def_bool y
263120e25eSJan Beulich	depends on 64BIT
27d94e0685SIngo Molnar	# Options that are inherently 64-bit kernel only:
284eb0716eSAlexandre Ghiti	select ARCH_HAS_GIGANTIC_PAGE
29f9aad622SAnshuman Khandual	select ARCH_HAS_PTDUMP
303049def1SJeff Xu	select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS
31c12d3362SArd Biesheuvel	select ARCH_SUPPORTS_INT128 if CC_HAS_INT128
320bff0aaeSSuren Baghdasaryan	select ARCH_SUPPORTS_PER_VMA_LOCK
3375182022SPeter Xu	select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
34d94e0685SIngo Molnar	select HAVE_ARCH_SOFT_DIRTY
35d94e0685SIngo Molnar	select MODULES_USE_ELF_RELA
36f616ab59SChristoph Hellwig	select NEED_DMA_MAP_STATE
3709230cbcSChristoph Hellwig	select SWIOTLB
387facdc42SAl Viro	select ARCH_HAS_ELFCORE_COMPAT
3963703f37SKefeng Wang	select ZONE_DMA32
4014e56fb2SMike Rapoport (IBM)	select EXECMEM if DYNAMIC_FTRACE
41*b9020bdbSTony Luck	select ACPI_MRRM if ACPI
421032c0baSSam Ravnborg
43518049d9SSteven Rostedt (VMware)config FORCE_DYNAMIC_FTRACE
44518049d9SSteven Rostedt (VMware)	def_bool y
45518049d9SSteven Rostedt (VMware)	depends on X86_32
46518049d9SSteven Rostedt (VMware)	depends on FUNCTION_TRACER
47518049d9SSteven Rostedt (VMware)	select DYNAMIC_FTRACE
48518049d9SSteven Rostedt (VMware)	help
49518049d9SSteven Rostedt (VMware)	  We keep the static function tracing (!DYNAMIC_FTRACE) around
50518049d9SSteven Rostedt (VMware)	  in order to test the non static function tracing in the
51518049d9SSteven Rostedt (VMware)	  generic code, as other architectures still use it. But we
52518049d9SSteven Rostedt (VMware)	  only need to keep it around for x86_64. No need to keep it
53518049d9SSteven Rostedt (VMware)	  for x86_32. For x86_32, force DYNAMIC_FTRACE.
54d94e0685SIngo Molnar#
55d94e0685SIngo Molnar# Arch settings
56d94e0685SIngo Molnar#
57d94e0685SIngo Molnar# ( Note that options that are marked 'if X86_64' could in principle be
58d94e0685SIngo Molnar#   ported to 32-bit as well. )
59d94e0685SIngo Molnar#
608d5fffb9SSam Ravnborgconfig X86
613c2362e6SHarvey Harrison	def_bool y
62c763ea26SIngo Molnar	#
63c763ea26SIngo Molnar	# Note: keep this list sorted alphabetically
64c763ea26SIngo Molnar	#
656471b825SIngo Molnar	select ACPI_LEGACY_TABLES_LOOKUP	if ACPI
666e0a0ea1SGraeme Gregory	select ACPI_SYSTEM_POWER_STATES_SUPPORT	if ACPI
67a02f66bbSJames Morse	select ACPI_HOTPLUG_CPU			if ACPI_PROCESSOR && HOTPLUG_CPU
68942fa985SYury Norov	select ARCH_32BIT_OFF_T			if X86_32
692a21ad57SThomas Gleixner	select ARCH_CLOCKSOURCE_INIT
70fe42754bSSean Christopherson	select ARCH_CONFIGURES_CPU_MITIGATIONS
711f6d3a8fSMasami Hiramatsu	select ARCH_CORRECT_STACKTRACE_ON_KRETPROBE
721e866974SAnshuman Khandual	select ARCH_ENABLE_HUGEPAGE_MIGRATION if X86_64 && HUGETLB_PAGE && MIGRATION
735c11f00bSDavid Hildenbrand	select ARCH_ENABLE_MEMORY_HOTPLUG if X86_64
7491024b3cSAnshuman Khandual	select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG
75cebc774fSAnshuman Khandual	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if (PGTABLE_LEVELS > 2) && (X86_64 || X86_PAE)
761e866974SAnshuman Khandual	select ARCH_ENABLE_THP_MIGRATION if X86_64 && TRANSPARENT_HUGEPAGE
7791dda51aSAleksey Makarov	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI
78c2280be8SAnshuman Khandual	select ARCH_HAS_CACHE_LINE_SIZE
791156b441SDavidlohr Bueso	select ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
807c7077a7SThomas Gleixner	select ARCH_HAS_CPU_FINALIZE_INIT
818f23f5dbSJason Gunthorpe	select ARCH_HAS_CPU_PASID		if IOMMU_SVA
8255d1ecceSEric Biggers	select ARCH_HAS_CRC32
834ffd5086SEric Biggers	select ARCH_HAS_CRC64			if X86_64
84dbdda1fdSEric Biggers	select ARCH_HAS_CRC_T10DIF
852792d84eSKees Cook	select ARCH_HAS_CURRENT_STACK_POINTER
86fa5b6ec9SLaura Abbott	select ARCH_HAS_DEBUG_VIRTUAL
87399145f9SAnshuman Khandual	select ARCH_HAS_DEBUG_VM_PGTABLE	if !X86_PAE
8821266be9SDan Williams	select ARCH_HAS_DEVMEM_IS_ALLOWED
89de6c85bfSChristoph Hellwig	select ARCH_HAS_DMA_OPS			if GART_IOMMU || XEN
90b1a57bbfSDouglas Anderson	select ARCH_HAS_EARLY_DEBUG		if KGDB
916471b825SIngo Molnar	select ARCH_HAS_ELF_RANDOMIZE
9264f6a4e1SMike Rapoport (Microsoft)	select ARCH_HAS_EXECMEM_ROX		if X86_64
9372d93104SLinus Torvalds	select ARCH_HAS_FAST_MULTIPLIER
946974f0c4SDaniel Micay	select ARCH_HAS_FORTIFY_SOURCE
95957e3facSRiku Voipio	select ARCH_HAS_GCOV_PROFILE_ALL
96bece04b5SMarco Elver	select ARCH_HAS_KCOV			if X86_64
97b0b8a15bSSamuel Holland	select ARCH_HAS_KERNEL_FPU_SUPPORT
980c9c1d56SThiago Jung Bauermann	select ARCH_HAS_MEM_ENCRYPT
9910bcc80eSMathieu Desnoyers	select ARCH_HAS_MEMBARRIER_SYNC_CORE
10049f88c70SPaul E. McKenney	select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
1010ebeea8cSDaniel Borkmann	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
102c763ea26SIngo Molnar	select ARCH_HAS_PMEM_API		if X86_64
103476e8583SPeter Zijlstra	select ARCH_HAS_PREEMPT_LAZY
10417596731SRobin Murphy	select ARCH_HAS_PTE_DEVMAP		if X86_64
1053010a5eaSLaurent Dufour	select ARCH_HAS_PTE_SPECIAL
10671ce1ab5SKinsey Ho	select ARCH_HAS_HW_PTE_YOUNG
107eed9a328SYu Zhao	select ARCH_HAS_NONLEAF_PMD_YOUNG	if PGTABLE_LEVELS > 2
1080aed55afSDan Williams	select ARCH_HAS_UACCESS_FLUSHCACHE	if X86_64
109ec6347bbSDan Williams	select ARCH_HAS_COPY_MC			if X86_64
110d2852a22SDaniel Borkmann	select ARCH_HAS_SET_MEMORY
111d253ca0cSRick Edgecombe	select ARCH_HAS_SET_DIRECT_MAP
112ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_KERNEL_RWX
113ad21fc4fSLaura Abbott	select ARCH_HAS_STRICT_MODULE_RWX
114ac1ab12aSMathieu Desnoyers	select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE
11525c619e5SBrian Gerst	select ARCH_HAS_SYSCALL_WRAPPER
116918327e9SKees Cook	select ARCH_HAS_UBSAN
1177e01ccb4SZong Li	select ARCH_HAS_DEBUG_WX
11863703f37SKefeng Wang	select ARCH_HAS_ZONE_DMA_SET if EXPERT
1196471b825SIngo Molnar	select ARCH_HAVE_NMI_SAFE_CMPXCHG
120ba386777SVignesh Balasubramanian	select ARCH_HAVE_EXTRA_ELF_NOTES
12104d5ea46SAneesh Kumar K.V	select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE
1226471b825SIngo Molnar	select ARCH_MIGHT_HAVE_ACPI_PDC		if ACPI
12377fbbc81SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
1245e2c18c0SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
1253599fe12SThomas Gleixner	select ARCH_STACKWALK
1262c870e61SArnd Bergmann	select ARCH_SUPPORTS_ACPI
1276471b825SIngo Molnar	select ARCH_SUPPORTS_ATOMIC_RMW
1285d6ad668SMike Rapoport	select ARCH_SUPPORTS_DEBUG_PAGEALLOC
129d283d422SPasha Tatashin	select ARCH_SUPPORTS_PAGE_TABLE_CHECK	if X86_64
1306471b825SIngo Molnar	select ARCH_SUPPORTS_NUMA_BALANCING	if X86_64
13114df3267SThomas Gleixner	select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP	if NR_CPUS <= 4096
1323c516f89SSami Tolvanen	select ARCH_SUPPORTS_CFI_CLANG		if X86_64
1333c516f89SSami Tolvanen	select ARCH_USES_CFI_TRAPS		if X86_64 && CFI_CLANG
134583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG
135583bfd48SNathan Chancellor	select ARCH_SUPPORTS_LTO_CLANG_THIN
136d2d6422fSSebastian Andrzej Siewior	select ARCH_SUPPORTS_RT
137315ad878SRong Xu	select ARCH_SUPPORTS_AUTOFDO_CLANG
138d5dc9583SRong Xu	select ARCH_SUPPORTS_PROPELLER_CLANG    if X86_64
1396471b825SIngo Molnar	select ARCH_USE_BUILTIN_BSWAP
140909639aaSH. Peter Anvin (Intel)	select ARCH_USE_CMPXCHG_LOCKREF		if X86_CX8
141dce44566SAnshuman Khandual	select ARCH_USE_MEMTEST
1426471b825SIngo Molnar	select ARCH_USE_QUEUED_RWLOCKS
1436471b825SIngo Molnar	select ARCH_USE_QUEUED_SPINLOCKS
1442ce0d7f9SMark Brown	select ARCH_USE_SYM_ANNOTATIONS
145ce4a4e56SAndy Lutomirski	select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
14681c22041SDaniel Borkmann	select ARCH_WANT_DEFAULT_BPF_JIT	if X86_64
147c763ea26SIngo Molnar	select ARCH_WANTS_DYNAMIC_TASK_STRUCT
14851c2ee6dSNick Desaulniers	select ARCH_WANTS_NO_INSTR
14907431506SAnshuman Khandual	select ARCH_WANT_GENERAL_HUGETLB
1503876d4a3SAlexandre Ghiti	select ARCH_WANT_HUGE_PMD_SHARE
15159612b24SNathan Chancellor	select ARCH_WANT_LD_ORPHAN_WARN
1520b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP	if X86_64
1530b6f1582SAneesh Kumar K.V	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP	if X86_64
15408efe293SFrank van der Linden	select ARCH_WANT_HUGETLB_VMEMMAP_PREINIT if X86_64
15538d8b4e6SHuang Ying	select ARCH_WANTS_THP_SWAP		if X86_64
156b5f06f64SBalbir Singh	select ARCH_HAS_PARANOID_L1D_FLUSH
15710916706SShile Zhang	select BUILDTIME_TABLE_SORT
1586471b825SIngo Molnar	select CLKEVT_I8253
1596471b825SIngo Molnar	select CLOCKSOURCE_WATCHDOG
1607cf8f44aSAlexander Potapenko	# Word-size accesses may read uninitialized data past the trailing \0
1617cf8f44aSAlexander Potapenko	# in strings and cause false KMSAN reports.
1627cf8f44aSAlexander Potapenko	select DCACHE_WORD_ACCESS		if !KMSAN
1633aac3ebeSThomas Gleixner	select DYNAMIC_SIGFRAME
16445471cd9SLinus Torvalds	select EDAC_ATOMIC_SCRUB
16545471cd9SLinus Torvalds	select EDAC_SUPPORT
1666471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_BROADCAST	if X86_64 || (X86_32 && X86_LOCAL_APIC)
167cb81deefSThomas Gleixner	select GENERIC_CLOCKEVENTS_BROADCAST_IDLE	if GENERIC_CLOCKEVENTS_BROADCAST
1686471b825SIngo Molnar	select GENERIC_CLOCKEVENTS_MIN_ADJUST
1696471b825SIngo Molnar	select GENERIC_CMOS_UPDATE
1706471b825SIngo Molnar	select GENERIC_CPU_AUTOPROBE
1715b95f94cSJames Morse	select GENERIC_CPU_DEVICES
17261dc0f55SThomas Gleixner	select GENERIC_CPU_VULNERABILITIES
1736471b825SIngo Molnar	select GENERIC_EARLY_IOREMAP
17427d6b4d1SThomas Gleixner	select GENERIC_ENTRY
1756471b825SIngo Molnar	select GENERIC_IOMAP
176c7d6c9ddSThomas Gleixner	select GENERIC_IRQ_EFFECTIVE_AFF_MASK	if SMP
1770fa115daSThomas Gleixner	select GENERIC_IRQ_MATRIX_ALLOCATOR	if X86_LOCAL_APIC
178ad7a929fSThomas Gleixner	select GENERIC_IRQ_MIGRATION		if SMP
1796471b825SIngo Molnar	select GENERIC_IRQ_PROBE
180c201c917SThomas Gleixner	select GENERIC_IRQ_RESERVATION_MODE
1816471b825SIngo Molnar	select GENERIC_IRQ_SHOW
1826471b825SIngo Molnar	select GENERIC_PENDING_IRQ		if SMP
1836471b825SIngo Molnar	select GENERIC_SMP_IDLE_THREAD
1846471b825SIngo Molnar	select GENERIC_TIME_VSYSCALL
1857ac87074SVincenzo Frascino	select GENERIC_GETTIMEOFDAY
186dafde296SThomas Weißschuh	select GENERIC_VDSO_DATA_STORE
187550a77a7SDmitry Safonov	select GENERIC_VDSO_TIME_NS
1887e90ffb7SAdrian Hunter	select GENERIC_VDSO_OVERFLOW_PROTECT
1896ca297d4SPeter Zijlstra	select GUP_GET_PXX_LOW_HIGH		if X86_PAE
19017e5888eSHans de Goede	select HARDIRQS_SW_RESEND
1917edaeb68SThomas Gleixner	select HARDLOCKUP_CHECK_TIMESTAMP	if X86_64
192fcbfe812SNiklas Schnelle	select HAS_IOPORT
1936471b825SIngo Molnar	select HAVE_ACPI_APEI			if ACPI
1946471b825SIngo Molnar	select HAVE_ACPI_APEI_NMI		if ACPI
1952a19be61SVlastimil Babka	select HAVE_ALIGNED_STRUCT_PAGE
1966471b825SIngo Molnar	select HAVE_ARCH_AUDITSYSCALL
1976471b825SIngo Molnar	select HAVE_ARCH_HUGE_VMAP		if X86_64 || X86_PAE
198eed1fceeSSong Liu	select HAVE_ARCH_HUGE_VMALLOC		if X86_64
1996471b825SIngo Molnar	select HAVE_ARCH_JUMP_LABEL
200b34006c4SArd Biesheuvel	select HAVE_ARCH_JUMP_LABEL_RELATIVE
201d17a1d97SAndrey Ryabinin	select HAVE_ARCH_KASAN			if X86_64
2020609ae01SDaniel Axtens	select HAVE_ARCH_KASAN_VMALLOC		if X86_64
2031dc0da6eSAlexander Potapenko	select HAVE_ARCH_KFENCE
2044ca8cc8dSAlexander Potapenko	select HAVE_ARCH_KMSAN			if X86_64
2056471b825SIngo Molnar	select HAVE_ARCH_KGDB
2069e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_BITS		if MMU
2079e08f57dSDaniel Cashman	select HAVE_ARCH_MMAP_RND_COMPAT_BITS	if MMU && COMPAT
2081b028f78SDmitry Safonov	select HAVE_ARCH_COMPAT_MMAP_BASES	if MMU && COMPAT
209271ca788SArd Biesheuvel	select HAVE_ARCH_PREL32_RELOCATIONS
2106471b825SIngo Molnar	select HAVE_ARCH_SECCOMP_FILTER
211f7d83c1cSKees Cook	select HAVE_ARCH_THREAD_STRUCT_WHITELIST
212afaef01cSAlexander Popov	select HAVE_ARCH_STACKLEAK
2136471b825SIngo Molnar	select HAVE_ARCH_TRACEHOOK
2146471b825SIngo Molnar	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
215a00cc7d9SMatthew Wilcox	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
216b64d8d1eSPeter Xu	select HAVE_ARCH_USERFAULTFD_WP         if X86_64 && USERFAULTFD
2177677f7fdSAxel Rasmussen	select HAVE_ARCH_USERFAULTFD_MINOR	if X86_64 && USERFAULTFD
218e37e43a4SAndy Lutomirski	select HAVE_ARCH_VMAP_STACK		if X86_64
219fe950f60SKees Cook	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET
220c763ea26SIngo Molnar	select HAVE_ARCH_WITHIN_STACK_FRAMES
2212ff2b7ecSMasahiro Yamada	select HAVE_ASM_MODVERSIONS
2226471b825SIngo Molnar	select HAVE_CMPXCHG_DOUBLE
2236471b825SIngo Molnar	select HAVE_CMPXCHG_LOCAL
22424a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER		if X86_64
22524a9c541SFrederic Weisbecker	select HAVE_CONTEXT_TRACKING_USER_OFFSTACK	if HAVE_CONTEXT_TRACKING_USER
2266471b825SIngo Molnar	select HAVE_C_RECORDMCOUNT
22703f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL_MCOUNT		if HAVE_OBJTOOL
228280981d6SSathvika Vasireddy	select HAVE_OBJTOOL_NOP_MCOUNT		if HAVE_OBJTOOL_MCOUNT
2294ed308c4SSteven Rostedt (Google)	select HAVE_BUILDTIME_MCOUNT_SORT
2306471b825SIngo Molnar	select HAVE_DEBUG_KMEMLEAK
2319c5a3621SAkinobu Mita	select HAVE_DMA_CONTIGUOUS
232677aa9f7SSteven Rostedt	select HAVE_DYNAMIC_FTRACE
23306aeaaeaSMasami Hiramatsu	select HAVE_DYNAMIC_FTRACE_WITH_REGS
23402a474caSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_ARGS	if X86_64
235762abbc0SMasami Hiramatsu (Google)	select HAVE_FTRACE_REGS_HAVING_PT_REGS	if X86_64
236562955feSSteven Rostedt (VMware)	select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
237c316eb44SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT	if X86_64
238503e4510SHeiko Carstens	select HAVE_SAMPLE_FTRACE_DIRECT_MULTI	if X86_64
23903f5781bSWang YanQing	select HAVE_EBPF_JIT
24058340a07SJohannes Berg	select HAVE_EFFICIENT_UNALIGNED_ACCESS
241976ba8daSArnd Bergmann	select HAVE_EISA			if X86_32
2425f56a5dfSJiri Slaby	select HAVE_EXIT_THREAD
24325176ad0SDavid Hildenbrand	select HAVE_GUP_FAST
244644e0e8dSSteven Rostedt (VMware)	select HAVE_FENTRY			if X86_64 || DYNAMIC_FTRACE
245a762e926SMasami Hiramatsu (Google)	select HAVE_FTRACE_GRAPH_FUNC		if HAVE_FUNCTION_GRAPH_TRACER
2466471b825SIngo Molnar	select HAVE_FTRACE_MCOUNT_RECORD
247a3ed4157SMasami Hiramatsu (Google)	select HAVE_FUNCTION_GRAPH_FREGS	if HAVE_FUNCTION_GRAPH_TRACER
2484a30e4c9SSteven Rostedt (VMware)	select HAVE_FUNCTION_GRAPH_TRACER	if X86_32 || (X86_64 && DYNAMIC_FTRACE)
2496471b825SIngo Molnar	select HAVE_FUNCTION_TRACER
2506b90bd4bSEmese Revfy	select HAVE_GCC_PLUGINS
2510067f129SK.Prasad	select HAVE_HW_BREAKPOINT
2526471b825SIngo Molnar	select HAVE_IOREMAP_PROT
253624db9eaSThomas Gleixner	select HAVE_IRQ_EXIT_ON_IRQ_STACK	if X86_64
2546471b825SIngo Molnar	select HAVE_IRQ_TIME_ACCOUNTING
2554ab7674fSJosh Poimboeuf	select HAVE_JUMP_LABEL_HACK		if HAVE_OBJTOOL
2566471b825SIngo Molnar	select HAVE_KERNEL_BZIP2
2576471b825SIngo Molnar	select HAVE_KERNEL_GZIP
2586471b825SIngo Molnar	select HAVE_KERNEL_LZ4
2596471b825SIngo Molnar	select HAVE_KERNEL_LZMA
2606471b825SIngo Molnar	select HAVE_KERNEL_LZO
2616471b825SIngo Molnar	select HAVE_KERNEL_XZ
262fb46d057SNick Terrell	select HAVE_KERNEL_ZSTD
2636471b825SIngo Molnar	select HAVE_KPROBES
2646471b825SIngo Molnar	select HAVE_KPROBES_ON_FTRACE
265540adea3SMasami Hiramatsu	select HAVE_FUNCTION_ERROR_INJECTION
2666471b825SIngo Molnar	select HAVE_KRETPROBES
267f3a112c0SMasami Hiramatsu	select HAVE_RETHOOK
2686471b825SIngo Molnar	select HAVE_LIVEPATCH			if X86_64
2690102752eSFrederic Weisbecker	select HAVE_MIXED_BREAKPOINTS_REGS
270ee9f8fceSJosh Poimboeuf	select HAVE_MOD_ARCH_SPECIFIC
2719f132f7eSJoel Fernandes (Google)	select HAVE_MOVE_PMD
272be37c98dSKalesh Singh	select HAVE_MOVE_PUD
27322102f45SJosh Poimboeuf	select HAVE_NOINSTR_HACK		if HAVE_OBJTOOL
27442a0bb3fSPetr Mladek	select HAVE_NMI
275489e355bSJosh Poimboeuf	select HAVE_NOINSTR_VALIDATION		if HAVE_OBJTOOL
27603f16cd0SJosh Poimboeuf	select HAVE_OBJTOOL			if X86_64
2776471b825SIngo Molnar	select HAVE_OPTPROBES
2785394f1e9SArnd Bergmann	select HAVE_PAGE_SIZE_4KB
2796471b825SIngo Molnar	select HAVE_PCSPKR_PLATFORM
2806471b825SIngo Molnar	select HAVE_PERF_EVENTS
281c01d4323SFrederic Weisbecker	select HAVE_PERF_EVENTS_NMI
28292e5aae4SNicholas Piggin	select HAVE_HARDLOCKUP_DETECTOR_PERF	if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
283eb01d42aSChristoph Hellwig	select HAVE_PCI
284c5e63197SJiri Olsa	select HAVE_PERF_REGS
285c5ebcedbSJiri Olsa	select HAVE_PERF_USER_STACK_DUMP
286a3725973SRik van Riel	select MMU_GATHER_RCU_TABLE_FREE
2871e9fdf21SPeter Zijlstra	select MMU_GATHER_MERGE_VMAS
28800998085SThomas Gleixner	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
2896471b825SIngo Molnar	select HAVE_REGS_AND_STACK_ACCESS_API
29003f16cd0SJosh Poimboeuf	select HAVE_RELIABLE_STACKTRACE		if UNWINDER_ORC || STACK_VALIDATION
2913c88ee19SMasami Hiramatsu	select HAVE_FUNCTION_ARG_ACCESS_API
2927ecd19cfSKefeng Wang	select HAVE_SETUP_PER_CPU_AREA
293cd1a41ceSThomas Gleixner	select HAVE_SOFTIRQ_ON_OWN_STACK
2940ee2689bSBrian Gerst	select HAVE_STACKPROTECTOR
29503f16cd0SJosh Poimboeuf	select HAVE_STACK_VALIDATION		if HAVE_OBJTOOL
296e6d6c071SJosh Poimboeuf	select HAVE_STATIC_CALL
29703f16cd0SJosh Poimboeuf	select HAVE_STATIC_CALL_INLINE		if HAVE_OBJTOOL
29899cf983cSMark Rutland	select HAVE_PREEMPT_DYNAMIC_CALL
299d6761b8fSMathieu Desnoyers	select HAVE_RSEQ
30009498135SMiguel Ojeda	select HAVE_RUST			if X86_64
3016471b825SIngo Molnar	select HAVE_SYSCALL_TRACEPOINTS
3025f3da8c0SJosh Poimboeuf	select HAVE_UACCESS_VALIDATION		if HAVE_OBJTOOL
3036471b825SIngo Molnar	select HAVE_UNSTABLE_SCHED_CLOCK
3047c68af6eSAvi Kivity	select HAVE_USER_RETURN_NOTIFIER
3057ac87074SVincenzo Frascino	select HAVE_GENERIC_VDSO
30633385150SJason A. Donenfeld	select VDSO_GETRANDOM			if X86_64
3070c7ffa32SThomas Gleixner	select HOTPLUG_PARALLEL			if SMP && X86_64
30805736e4aSThomas Gleixner	select HOTPLUG_SMT			if SMP
3090c7ffa32SThomas Gleixner	select HOTPLUG_SPLIT_STARTUP		if SMP && X86_32
310c0185808SThomas Gleixner	select IRQ_FORCED_THREADING
311c2508ec5SLinus Torvalds	select LOCK_MM_AND_FIND_VMA
3127ecd19cfSKefeng Wang	select NEED_PER_CPU_EMBED_FIRST_CHUNK
3137ecd19cfSKefeng Wang	select NEED_PER_CPU_PAGE_FIRST_CHUNK
31486596f0aSChristoph Hellwig	select NEED_SG_DMA_LENGTH
31587482708SMike Rapoport (Microsoft)	select NUMA_MEMBLKS			if NUMA
3162eac9c2dSChristoph Hellwig	select PCI_DOMAINS			if PCI
317625210cfSSinan Kaya	select PCI_LOCKLESS_CONFIG		if PCI
3186471b825SIngo Molnar	select PERF_EVENTS
3193195ef59SPrarit Bhargava	select RTC_LIB
320d6faca40SArnd Bergmann	select RTC_MC146818_LIB
3216471b825SIngo Molnar	select SPARSE_IRQ
3226471b825SIngo Molnar	select SYSCTL_EXCEPTION_TRACE
32315f4eae7SAndy Lutomirski	select THREAD_INFO_IN_TASK
3244aae683fSMasahiro Yamada	select TRACE_IRQFLAGS_SUPPORT
3254510bffbSMark Rutland	select TRACE_IRQFLAGS_NMI_SUPPORT
3266471b825SIngo Molnar	select USER_STACKTRACE_SUPPORT
3273b02a051SIngo Molnar	select HAVE_ARCH_KCSAN			if X86_64
3280c608dadSAubrey Li	select PROC_PID_ARCH_STATUS		if PROC_FS
32950468e43SJarkko Sakkinen	select HAVE_ARCH_NODE_DEV_GROUP		if X86_SGX
330d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B		if X86_64 || X86_ALIGNMENT_16
331d49a0626SPeter Zijlstra	select FUNCTION_ALIGNMENT_4B
3329e2b4be3SNayna Jain	imply IMA_SECURE_AND_OR_TRUSTED_BOOT    if EFI
333ceea991aSJiri Olsa	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
3344817f70cSQi Zheng	select ARCH_SUPPORTS_PT_RECLAIM		if X86_64
3357d8330a5SBalbir Singh
336ba7e4d13SIngo Molnarconfig INSTRUCTION_DECODER
3373120e25eSJan Beulich	def_bool y
3383120e25eSJan Beulich	depends on KPROBES || PERF_EVENTS || UPROBES
339ba7e4d13SIngo Molnar
34051b26adaSLinus Torvaldsconfig OUTPUT_FORMAT
34151b26adaSLinus Torvalds	string
34251b26adaSLinus Torvalds	default "elf32-i386" if X86_32
34351b26adaSLinus Torvalds	default "elf64-x86-64" if X86_64
34451b26adaSLinus Torvalds
3458d5fffb9SSam Ravnborgconfig LOCKDEP_SUPPORT
3463c2362e6SHarvey Harrison	def_bool y
3478d5fffb9SSam Ravnborg
3488d5fffb9SSam Ravnborgconfig STACKTRACE_SUPPORT
3493c2362e6SHarvey Harrison	def_bool y
3508d5fffb9SSam Ravnborg
3518d5fffb9SSam Ravnborgconfig MMU
3523c2362e6SHarvey Harrison	def_bool y
3538d5fffb9SSam Ravnborg
3549e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MIN
3559e08f57dSDaniel Cashman	default 28 if 64BIT
3569e08f57dSDaniel Cashman	default 8
3579e08f57dSDaniel Cashman
3589e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_BITS_MAX
3599e08f57dSDaniel Cashman	default 32 if 64BIT
3609e08f57dSDaniel Cashman	default 16
3619e08f57dSDaniel Cashman
3629e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3639e08f57dSDaniel Cashman	default 8
3649e08f57dSDaniel Cashman
3659e08f57dSDaniel Cashmanconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3669e08f57dSDaniel Cashman	default 16
3679e08f57dSDaniel Cashman
3688d5fffb9SSam Ravnborgconfig SBUS
3698d5fffb9SSam Ravnborg	bool
3708d5fffb9SSam Ravnborg
3718d5fffb9SSam Ravnborgconfig GENERIC_ISA_DMA
3723120e25eSJan Beulich	def_bool y
3733120e25eSJan Beulich	depends on ISA_DMA_API
3748d5fffb9SSam Ravnborg
375d911c67eSAlexander Potapenkoconfig GENERIC_CSUM
376d911c67eSAlexander Potapenko	bool
377d911c67eSAlexander Potapenko	default y if KMSAN || KASAN
378d911c67eSAlexander Potapenko
3798d5fffb9SSam Ravnborgconfig GENERIC_BUG
3803c2362e6SHarvey Harrison	def_bool y
3818d5fffb9SSam Ravnborg	depends on BUG
382b93a531eSJan Beulich	select GENERIC_BUG_RELATIVE_POINTERS if X86_64
383b93a531eSJan Beulich
384b93a531eSJan Beulichconfig GENERIC_BUG_RELATIVE_POINTERS
385b93a531eSJan Beulich	bool
3868d5fffb9SSam Ravnborg
3878d5fffb9SSam Ravnborgconfig ARCH_MAY_HAVE_PC_FDC
3883120e25eSJan Beulich	def_bool y
3893120e25eSJan Beulich	depends on ISA_DMA_API
3908d5fffb9SSam Ravnborg
3911032c0baSSam Ravnborgconfig GENERIC_CALIBRATE_DELAY
3921032c0baSSam Ravnborg	def_bool y
3931032c0baSSam Ravnborg
3949a0b8415Svenkatesh.pallipadi@intel.comconfig ARCH_HAS_CPU_RELAX
3959a0b8415Svenkatesh.pallipadi@intel.com	def_bool y
3968d5fffb9SSam Ravnborg
397801e4062SJohannes Bergconfig ARCH_HIBERNATION_POSSIBLE
398801e4062SJohannes Berg	def_bool y
399801e4062SJohannes Berg
400f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
401f4cb5700SJohannes Berg	def_bool y
402f4cb5700SJohannes Berg
4038d5fffb9SSam Ravnborgconfig AUDIT_ARCH
404e0fd24a3SJan Beulich	def_bool y if X86_64
4058d5fffb9SSam Ravnborg
406d6f2d75aSAndrey Ryabininconfig KASAN_SHADOW_OFFSET
407d6f2d75aSAndrey Ryabinin	hex
408d6f2d75aSAndrey Ryabinin	depends on KASAN
409d6f2d75aSAndrey Ryabinin	default 0xdffffc0000000000
410d6f2d75aSAndrey Ryabinin
41169575d38SShane Wangconfig HAVE_INTEL_TXT
41269575d38SShane Wang	def_bool y
4136ea30386SKees Cook	depends on INTEL_IOMMU && ACPI
41469575d38SShane Wang
4156b0c3d44SSam Ravnborgconfig X86_64_SMP
4166b0c3d44SSam Ravnborg	def_bool y
4176b0c3d44SSam Ravnborg	depends on X86_64 && SMP
4186b0c3d44SSam Ravnborg
4192b144498SSrikar Dronamrajuconfig ARCH_SUPPORTS_UPROBES
4202b144498SSrikar Dronamraju	def_bool y
4212b144498SSrikar Dronamraju
422d20642f0SRob Herringconfig FIX_EARLYCON_MEM
423d20642f0SRob Herring	def_bool y
424d20642f0SRob Herring
42594d49eb3SKirill A. Shutemovconfig DYNAMIC_PHYSICAL_MASK
42694d49eb3SKirill A. Shutemov	bool
42794d49eb3SKirill A. Shutemov
42898233368SKirill A. Shutemovconfig PGTABLE_LEVELS
42998233368SKirill A. Shutemov	int
43077ef56e4SKirill A. Shutemov	default 5 if X86_5LEVEL
43198233368SKirill A. Shutemov	default 4 if X86_64
43298233368SKirill A. Shutemov	default 3 if X86_PAE
43398233368SKirill A. Shutemov	default 2
43498233368SKirill A. Shutemov
435506f1d07SSam Ravnborgmenu "Processor type and features"
436506f1d07SSam Ravnborg
437506f1d07SSam Ravnborgconfig SMP
438506f1d07SSam Ravnborg	bool "Symmetric multi-processing support"
439a7f7f624SMasahiro Yamada	help
440506f1d07SSam Ravnborg	  This enables support for systems with more than one CPU. If you have
4414a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
4424a474157SRobert Graffham	  than one CPU, say Y.
443506f1d07SSam Ravnborg
4444a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
445506f1d07SSam Ravnborg	  machines, but will use only one CPU of a multiprocessor machine. If
446506f1d07SSam Ravnborg	  you say Y here, the kernel will run on many, but not all,
4474a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
448506f1d07SSam Ravnborg	  will run faster if you say N here.
449506f1d07SSam Ravnborg
450506f1d07SSam Ravnborg	  Note that if you say Y here and choose architecture "586" or
451506f1d07SSam Ravnborg	  "Pentium" under "Processor family", the kernel will not work on 486
452506f1d07SSam Ravnborg	  architectures. Similarly, multiprocessor kernels for the "PPro"
453506f1d07SSam Ravnborg	  architecture may not work on all Pentium based boards.
454506f1d07SSam Ravnborg
455506f1d07SSam Ravnborg	  People using multiprocessor machines who say Y here should also say
456506f1d07SSam Ravnborg	  Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
457506f1d07SSam Ravnborg	  Management" code will be disabled if you say Y here.
458506f1d07SSam Ravnborg
459ff61f079SJonathan Corbet	  See also <file:Documentation/arch/x86/i386/IO-APIC.rst>,
4604f4cfa6cSMauro Carvalho Chehab	  <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO available at
461506f1d07SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
462506f1d07SSam Ravnborg
463506f1d07SSam Ravnborg	  If you don't know what to do here, say N.
464506f1d07SSam Ravnborg
46506cd9a7dSYinghai Luconfig X86_X2APIC
4669232c49fSMateusz Jończyk	bool "x2APIC interrupt controller architecture support"
46719e3d60dSJan Kiszka	depends on X86_LOCAL_APIC && X86_64 && (IRQ_REMAP || HYPERVISOR_GUEST)
4689232c49fSMateusz Jończyk	default y
469a7f7f624SMasahiro Yamada	help
4709232c49fSMateusz Jończyk	  x2APIC is an interrupt controller architecture, a component of which
4719232c49fSMateusz Jończyk	  (the local APIC) is present in the CPU. It allows faster access to
4729232c49fSMateusz Jończyk	  the local APIC and supports a larger number of CPUs in the system
4739232c49fSMateusz Jończyk	  than the predecessors.
47406cd9a7dSYinghai Lu
4759232c49fSMateusz Jończyk	  x2APIC was introduced in Intel CPUs around 2008 and in AMD EPYC CPUs
4769232c49fSMateusz Jończyk	  in 2019, but it can be disabled by the BIOS. It is also frequently
4779232c49fSMateusz Jończyk	  emulated in virtual machines, even when the host CPU does not support
4789232c49fSMateusz Jończyk	  it. Support in the CPU can be checked by executing
47999bb1bd8SMateusz Jończyk		grep x2apic /proc/cpuinfo
48006cd9a7dSYinghai Lu
48199bb1bd8SMateusz Jończyk	  If this configuration option is disabled, the kernel will boot with
48299bb1bd8SMateusz Jończyk	  very reduced functionality and performance on some platforms that
48399bb1bd8SMateusz Jończyk	  have x2APIC enabled. On the other hand, on hardware that does not
48499bb1bd8SMateusz Jończyk	  support x2APIC, a kernel with this option enabled will just fallback
48599bb1bd8SMateusz Jończyk	  to older APIC implementations.
486b8d1d163SDaniel Sneddon
48799bb1bd8SMateusz Jończyk	  If in doubt, say Y.
48806cd9a7dSYinghai Lu
4897fec07fdSJacob Panconfig X86_POSTED_MSI
4907fec07fdSJacob Pan	bool "Enable MSI and MSI-x delivery by posted interrupts"
4917fec07fdSJacob Pan	depends on X86_64 && IRQ_REMAP
4927fec07fdSJacob Pan	help
4937fec07fdSJacob Pan	  This enables MSIs that are under interrupt remapping to be delivered as
4947fec07fdSJacob Pan	  posted interrupts to the host kernel. Interrupt throughput can
4957fec07fdSJacob Pan	  potentially be improved by coalescing CPU notifications during high
4967fec07fdSJacob Pan	  frequency bursts.
4977fec07fdSJacob Pan
4987fec07fdSJacob Pan	  If you don't know what to do here, say N.
4997fec07fdSJacob Pan
5006695c85bSYinghai Luconfig X86_MPPARSE
5014590d98fSAndy Shevchenko	bool "Enable MPS table" if ACPI
5027a527688SJan Beulich	default y
5035ab74722SIngo Molnar	depends on X86_LOCAL_APIC
504a7f7f624SMasahiro Yamada	help
5056695c85bSYinghai Lu	  For old smp systems that do not have proper acpi support. Newer systems
5066695c85bSYinghai Lu	  (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
5076695c85bSYinghai Lu
508e6d42931SJohannes Weinerconfig X86_CPU_RESCTRL
509e6d42931SJohannes Weiner	bool "x86 CPU resource control support"
5106fe07ce3SBabu Moger	depends on X86 && (CPU_SUP_INTEL || CPU_SUP_AMD)
51159fe5a77SThomas Gleixner	select KERNFS
512e79f15a4SChen Yu	select PROC_CPU_RESCTRL		if PROC_FS
51370288405SJames Morse	select RESCTRL_FS_PSEUDO_LOCK
51478e99b4aSFenghua Yu	help
515e6d42931SJohannes Weiner	  Enable x86 CPU resource control support.
5166fe07ce3SBabu Moger
5176fe07ce3SBabu Moger	  Provide support for the allocation and monitoring of system resources
5186fe07ce3SBabu Moger	  usage by the CPU.
5196fe07ce3SBabu Moger
5206fe07ce3SBabu Moger	  Intel calls this Intel Resource Director Technology
5216fe07ce3SBabu Moger	  (Intel(R) RDT). More information about RDT can be found in the
5226fe07ce3SBabu Moger	  Intel x86 Architecture Software Developer Manual.
5236fe07ce3SBabu Moger
5246fe07ce3SBabu Moger	  AMD calls this AMD Platform Quality of Service (AMD QoS).
5256fe07ce3SBabu Moger	  More information about AMD QoS can be found in the AMD64 Technology
5266fe07ce3SBabu Moger	  Platform Quality of Service Extensions manual.
52778e99b4aSFenghua Yu
52878e99b4aSFenghua Yu	  Say N if unsure.
52978e99b4aSFenghua Yu
53070288405SJames Morseconfig RESCTRL_FS_PSEUDO_LOCK
53170288405SJames Morse	bool
53270288405SJames Morse	help
53370288405SJames Morse	  Software mechanism to pin data in a cache portion using
53470288405SJames Morse	  micro-architecture specific knowledge.
53570288405SJames Morse
5362cce9591SH. Peter Anvin (Intel)config X86_FRED
5372cce9591SH. Peter Anvin (Intel)	bool "Flexible Return and Event Delivery"
5382cce9591SH. Peter Anvin (Intel)	depends on X86_64
5392cce9591SH. Peter Anvin (Intel)	help
5402cce9591SH. Peter Anvin (Intel)	  When enabled, try to use Flexible Return and Event Delivery
5412cce9591SH. Peter Anvin (Intel)	  instead of the legacy SYSCALL/SYSENTER/IDT architecture for
5422cce9591SH. Peter Anvin (Intel)	  ring transitions and exception/interrupt handling if the
5433c41786cSPaul Menzel	  system supports it.
5442cce9591SH. Peter Anvin (Intel)
545c5c606d9SRavikiran G Thirumalaiconfig X86_EXTENDED_PLATFORM
546c5c606d9SRavikiran G Thirumalai	bool "Support for extended (non-PC) x86 platforms"
547c5c606d9SRavikiran G Thirumalai	default y
548a7f7f624SMasahiro Yamada	help
54906ac8346SIngo Molnar	  If you disable this option then the kernel will only support
55006ac8346SIngo Molnar	  standard PC platforms. (which covers the vast majority of
55106ac8346SIngo Molnar	  systems out there.)
55206ac8346SIngo Molnar
5538425091fSRavikiran G Thirumalai	  If you enable this option then you'll be able to select support
55471d99ea4SMasahiro Yamada	  for the following non-PC x86 platforms, depending on the value of
55571d99ea4SMasahiro Yamada	  CONFIG_64BIT.
55671d99ea4SMasahiro Yamada
55771d99ea4SMasahiro Yamada	  32-bit platforms (CONFIG_64BIT=n):
5584047e877SMateusz Jończyk		Goldfish (mostly Android emulator)
5594047e877SMateusz Jończyk		Intel CE media processor (CE4100) SoC
5604047e877SMateusz Jończyk		Intel Quark
5618425091fSRavikiran G Thirumalai		RDC R-321x SoC
56206ac8346SIngo Molnar
56371d99ea4SMasahiro Yamada	  64-bit platforms (CONFIG_64BIT=y):
56444b111b5SSteffen Persvold		Numascale NumaChip
5658425091fSRavikiran G Thirumalai		ScaleMP vSMP
5668425091fSRavikiran G Thirumalai		SGI Ultraviolet
567ca5955ddSArnd Bergmann		Merrifield/Moorefield MID devices
5684047e877SMateusz Jończyk		Goldfish (mostly Android emulator)
5698425091fSRavikiran G Thirumalai
5708425091fSRavikiran G Thirumalai	  If you have one of these systems, or if you want to build a
5718425091fSRavikiran G Thirumalai	  generic distribution kernel, say Y here - otherwise say N.
57271d99ea4SMasahiro Yamada
573c5c606d9SRavikiran G Thirumalai# This is an alphabetically sorted list of 64 bit extended platforms
574c5c606d9SRavikiran G Thirumalai# Please maintain the alphabetic order if and when there are additions
57544b111b5SSteffen Persvoldconfig X86_NUMACHIP
57644b111b5SSteffen Persvold	bool "Numascale NumaChip"
57744b111b5SSteffen Persvold	depends on X86_64
57844b111b5SSteffen Persvold	depends on X86_EXTENDED_PLATFORM
57944b111b5SSteffen Persvold	depends on NUMA
58044b111b5SSteffen Persvold	depends on SMP
58144b111b5SSteffen Persvold	depends on X86_X2APIC
582f9726bfdSDaniel J Blueman	depends on PCI_MMCONFIG
583a7f7f624SMasahiro Yamada	help
58444b111b5SSteffen Persvold	  Adds support for Numascale NumaChip large-SMP systems. Needed to
58544b111b5SSteffen Persvold	  enable more than ~168 cores.
58644b111b5SSteffen Persvold	  If you don't have one of these, you should say N here.
58703b48632SNick Piggin
5886a48565eSIngo Molnarconfig X86_VSMP
589c5c606d9SRavikiran G Thirumalai	bool "ScaleMP vSMP"
5906276a074SBorislav Petkov	select HYPERVISOR_GUEST
5916a48565eSIngo Molnar	select PARAVIRT
5926a48565eSIngo Molnar	depends on X86_64 && PCI
593c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
594ead91d4bSShai Fultheim	depends on SMP
595a7f7f624SMasahiro Yamada	help
5966a48565eSIngo Molnar	  Support for ScaleMP vSMP systems.  Say 'Y' here if this kernel is
5976a48565eSIngo Molnar	  supposed to run on these EM64T-based machines.  Only choose this option
5986a48565eSIngo Molnar	  if you have one of these machines.
5996a48565eSIngo Molnar
600c5c606d9SRavikiran G Thirumalaiconfig X86_UV
601c5c606d9SRavikiran G Thirumalai	bool "SGI Ultraviolet"
602c5c606d9SRavikiran G Thirumalai	depends on X86_64
603c5c606d9SRavikiran G Thirumalai	depends on X86_EXTENDED_PLATFORM
60454c28d29SJack Steiner	depends on NUMA
6051ecb4ae5SAndrew Morton	depends on EFI
606c2209ea5SIngo Molnar	depends on KEXEC_CORE
6079d6c26e7SSuresh Siddha	depends on X86_X2APIC
6081222e564SIngo Molnar	depends on PCI
609a7f7f624SMasahiro Yamada	help
610c5c606d9SRavikiran G Thirumalai	  This option is needed in order to support SGI Ultraviolet systems.
611c5c606d9SRavikiran G Thirumalai	  If you don't have one of these, you should say N here.
612c5c606d9SRavikiran G Thirumalai
613ca5955ddSArnd Bergmannconfig X86_INTEL_MID
614ca5955ddSArnd Bergmann	bool "Intel Z34xx/Z35xx MID platform support"
615ca5955ddSArnd Bergmann	depends on X86_EXTENDED_PLATFORM
616ca5955ddSArnd Bergmann	depends on X86_PLATFORM_DEVICES
617ca5955ddSArnd Bergmann	depends on PCI
618ca5955ddSArnd Bergmann	depends on X86_64 || (EXPERT && PCI_GOANY)
619ca5955ddSArnd Bergmann	depends on X86_IO_APIC
620ca5955ddSArnd Bergmann	select I2C
621ca5955ddSArnd Bergmann	select DW_APB_TIMER
622ca5955ddSArnd Bergmann	select INTEL_SCU_PCI
623ca5955ddSArnd Bergmann	help
624ca5955ddSArnd Bergmann	  Select to build a kernel capable of supporting 64-bit Intel MID
625ca5955ddSArnd Bergmann	  (Mobile Internet Device) platform systems which do not have
626ca5955ddSArnd Bergmann	  the PCI legacy interfaces.
627ca5955ddSArnd Bergmann
628ca5955ddSArnd Bergmann	  The only supported devices are the 22nm Merrified (Z34xx)
629ca5955ddSArnd Bergmann	  and Moorefield (Z35xx) SoC used in the Intel Edison board and
630ca5955ddSArnd Bergmann	  a small number of Android devices such as the Asus Zenfone 2,
631ca5955ddSArnd Bergmann	  Asus FonePad 8 and Dell Venue 7.
632ca5955ddSArnd Bergmann
633ca5955ddSArnd Bergmann	  If you are building for a PC class system or non-MID tablet
634ca5955ddSArnd Bergmann	  SoCs like Bay Trail (Z36xx/Z37xx), say N here.
635ca5955ddSArnd Bergmann
636ca5955ddSArnd Bergmann	  Intel MID platforms are based on an Intel processor and chipset which
637ca5955ddSArnd Bergmann	  consume less power than most of the x86 derivatives.
638506f1d07SSam Ravnborg
639ddd70cf9SJun Nakajimaconfig X86_GOLDFISH
640ddd70cf9SJun Nakajima	bool "Goldfish (Virtual Platform)"
641cb7b8023SBen Hutchings	depends on X86_EXTENDED_PLATFORM
642a7f7f624SMasahiro Yamada	help
643ddd70cf9SJun Nakajima	  Enable support for the Goldfish virtual platform used primarily
644ddd70cf9SJun Nakajima	  for Android development. Unless you are building for the Android
645ddd70cf9SJun Nakajima	  Goldfish emulator say N here.
646ddd70cf9SJun Nakajima
647ca5955ddSArnd Bergmann# Following is an alphabetically sorted list of 32 bit extended platforms
648ca5955ddSArnd Bergmann# Please maintain the alphabetic order if and when there are additions
649ca5955ddSArnd Bergmann
650c751e17bSThomas Gleixnerconfig X86_INTEL_CE
651c751e17bSThomas Gleixner	bool "CE4100 TV platform"
652c751e17bSThomas Gleixner	depends on PCI
653c751e17bSThomas Gleixner	depends on PCI_GODIRECT
6546084a6e2SJiang Liu	depends on X86_IO_APIC
655c751e17bSThomas Gleixner	depends on X86_32
656c751e17bSThomas Gleixner	depends on X86_EXTENDED_PLATFORM
65737bc9f50SDirk Brandewie	select X86_REBOOTFIXUPS
658da6b737bSSebastian Andrzej Siewior	select OF
659da6b737bSSebastian Andrzej Siewior	select OF_EARLY_FLATTREE
660a7f7f624SMasahiro Yamada	help
661c751e17bSThomas Gleixner	  Select for the Intel CE media processor (CE4100) SOC.
662c751e17bSThomas Gleixner	  This option compiles in support for the CE4100 SOC for settop
663c751e17bSThomas Gleixner	  boxes and media devices.
664c751e17bSThomas Gleixner
6658bbc2a13SBryan O'Donoghueconfig X86_INTEL_QUARK
6668bbc2a13SBryan O'Donoghue	bool "Intel Quark platform support"
6678bbc2a13SBryan O'Donoghue	depends on X86_32
6688bbc2a13SBryan O'Donoghue	depends on X86_EXTENDED_PLATFORM
6698bbc2a13SBryan O'Donoghue	depends on X86_PLATFORM_DEVICES
6708bbc2a13SBryan O'Donoghue	depends on X86_TSC
6718bbc2a13SBryan O'Donoghue	depends on PCI
6728bbc2a13SBryan O'Donoghue	depends on PCI_GOANY
6738bbc2a13SBryan O'Donoghue	depends on X86_IO_APIC
6748bbc2a13SBryan O'Donoghue	select IOSF_MBI
6758bbc2a13SBryan O'Donoghue	select INTEL_IMR
6769ab6eb51SAndy Shevchenko	select COMMON_CLK
677a7f7f624SMasahiro Yamada	help
6788bbc2a13SBryan O'Donoghue	  Select to include support for Quark X1000 SoC.
6798bbc2a13SBryan O'Donoghue	  Say Y here if you have a Quark based system such as the Arduino
6808bbc2a13SBryan O'Donoghue	  compatible Intel Galileo.
6818bbc2a13SBryan O'Donoghue
682e35e328dSMateusz Jończykconfig X86_RDC321X
683e35e328dSMateusz Jończyk	bool "RDC R-321x SoC"
684e35e328dSMateusz Jończyk	depends on X86_32
685e35e328dSMateusz Jończyk	depends on X86_EXTENDED_PLATFORM
686e35e328dSMateusz Jończyk	select M486
687e35e328dSMateusz Jończyk	select X86_REBOOTFIXUPS
688e35e328dSMateusz Jończyk	help
689e35e328dSMateusz Jończyk	  This option is needed for RDC R-321x system-on-chip, also known
690e35e328dSMateusz Jończyk	  as R-8610-(G).
691e35e328dSMateusz Jończyk	  If you don't have one of these chips, you should say N here.
692e35e328dSMateusz Jończyk
6933d48aab1SMika Westerbergconfig X86_INTEL_LPSS
6943d48aab1SMika Westerberg	bool "Intel Low Power Subsystem Support"
6955962dd22SSinan Kaya	depends on X86 && ACPI && PCI
6963d48aab1SMika Westerberg	select COMMON_CLK
6970f531431SMathias Nyman	select PINCTRL
698eebb3e8dSAndy Shevchenko	select IOSF_MBI
699a7f7f624SMasahiro Yamada	help
7003d48aab1SMika Westerberg	  Select to build support for Intel Low Power Subsystem such as
7013d48aab1SMika Westerberg	  found on Intel Lynxpoint PCH. Selecting this option enables
7020f531431SMathias Nyman	  things like clock tree (common clock framework) and pincontrol
7030f531431SMathias Nyman	  which are needed by the LPSS peripheral drivers.
7043d48aab1SMika Westerberg
70592082a88SKen Xueconfig X86_AMD_PLATFORM_DEVICE
70692082a88SKen Xue	bool "AMD ACPI2Platform devices support"
70792082a88SKen Xue	depends on ACPI
70892082a88SKen Xue	select COMMON_CLK
70992082a88SKen Xue	select PINCTRL
710a7f7f624SMasahiro Yamada	help
71192082a88SKen Xue	  Select to interpret AMD specific ACPI device to platform device
71292082a88SKen Xue	  such as I2C, UART, GPIO found on AMD Carrizo and later chipsets.
71392082a88SKen Xue	  I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
71492082a88SKen Xue	  implemented under PINCTRL subsystem.
71592082a88SKen Xue
716ced3ce76SDavid E. Boxconfig IOSF_MBI
717ced3ce76SDavid E. Box	tristate "Intel SoC IOSF Sideband support for SoC platforms"
718ced3ce76SDavid E. Box	depends on PCI
719a7f7f624SMasahiro Yamada	help
720ced3ce76SDavid E. Box	  This option enables sideband register access support for Intel SoC
721ced3ce76SDavid E. Box	  platforms. On these platforms the IOSF sideband is used in lieu of
722ced3ce76SDavid E. Box	  MSR's for some register accesses, mostly but not limited to thermal
723ced3ce76SDavid E. Box	  and power. Drivers may query the availability of this device to
724ced3ce76SDavid E. Box	  determine if they need the sideband in order to work on these
725ced3ce76SDavid E. Box	  platforms. The sideband is available on the following SoC products.
726ced3ce76SDavid E. Box	  This list is not meant to be exclusive.
727ced3ce76SDavid E. Box	   - BayTrail
728ced3ce76SDavid E. Box	   - Braswell
729ced3ce76SDavid E. Box	   - Quark
730ced3ce76SDavid E. Box
731ced3ce76SDavid E. Box	  You should say Y if you are running a kernel on one of these SoC's.
732ced3ce76SDavid E. Box
733ed2226bdSDavid E. Boxconfig IOSF_MBI_DEBUG
734ed2226bdSDavid E. Box	bool "Enable IOSF sideband access through debugfs"
735ed2226bdSDavid E. Box	depends on IOSF_MBI && DEBUG_FS
736a7f7f624SMasahiro Yamada	help
737ed2226bdSDavid E. Box	  Select this option to expose the IOSF sideband access registers (MCR,
738ed2226bdSDavid E. Box	  MDR, MCRX) through debugfs to write and read register information from
739ed2226bdSDavid E. Box	  different units on the SoC. This is most useful for obtaining device
740ed2226bdSDavid E. Box	  state information for debug and analysis. As this is a general access
741ed2226bdSDavid E. Box	  mechanism, users of this option would have specific knowledge of the
742ed2226bdSDavid E. Box	  device they want to access.
743ed2226bdSDavid E. Box
744ed2226bdSDavid E. Box	  If you don't require the option or are in doubt, say N.
745ed2226bdSDavid E. Box
746d949f36fSLinus Torvaldsconfig X86_SUPPORTS_MEMORY_FAILURE
7476fc108a0SJan Beulich	def_bool y
748d949f36fSLinus Torvalds	# MCE code calls memory_failure():
749d949f36fSLinus Torvalds	depends on X86_MCE
750d949f36fSLinus Torvalds	# On 32-bit this adds too big of NODES_SHIFT and we run out of page flags:
751d949f36fSLinus Torvalds	# On 32-bit SPARSEMEM adds too big of SECTIONS_WIDTH:
752d949f36fSLinus Torvalds	depends on X86_64 || !SPARSEMEM
753d949f36fSLinus Torvalds	select ARCH_SUPPORTS_MEMORY_FAILURE
754d949f36fSLinus Torvalds
75582148d1dSShérabconfig X86_32_IRIS
75682148d1dSShérab	tristate "Eurobraille/Iris poweroff module"
75782148d1dSShérab	depends on X86_32
758a7f7f624SMasahiro Yamada	help
75982148d1dSShérab	  The Iris machines from EuroBraille do not have APM or ACPI support
76082148d1dSShérab	  to shut themselves down properly.  A special I/O sequence is
76182148d1dSShérab	  needed to do so, which is what this module does at
76282148d1dSShérab	  kernel shutdown.
76382148d1dSShérab
76482148d1dSShérab	  This is only for Iris machines from EuroBraille.
76582148d1dSShérab
76682148d1dSShérab	  If unused, say N.
76782148d1dSShérab
768ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
7693c2362e6SHarvey Harrison	def_bool y
7703c2362e6SHarvey Harrison	prompt "Single-depth WCHAN output"
771a87d0914SKen Chen	depends on X86
772a7f7f624SMasahiro Yamada	help
773506f1d07SSam Ravnborg	  Calculate simpler /proc/<PID>/wchan values. If this option
774506f1d07SSam Ravnborg	  is disabled then wchan values will recurse back to the
775506f1d07SSam Ravnborg	  caller function. This provides more accurate wchan values,
776506f1d07SSam Ravnborg	  at the expense of slightly more scheduling overhead.
777506f1d07SSam Ravnborg
778506f1d07SSam Ravnborg	  If in doubt, say "Y".
779506f1d07SSam Ravnborg
7806276a074SBorislav Petkovmenuconfig HYPERVISOR_GUEST
7816276a074SBorislav Petkov	bool "Linux guest support"
782a7f7f624SMasahiro Yamada	help
7836276a074SBorislav Petkov	  Say Y here to enable options for running Linux under various hyper-
7846276a074SBorislav Petkov	  visors. This option enables basic hypervisor detection and platform
7856276a074SBorislav Petkov	  setup.
786506f1d07SSam Ravnborg
7876276a074SBorislav Petkov	  If you say N, all options in this submenu will be skipped and
7886276a074SBorislav Petkov	  disabled, and Linux guest support won't be built in.
789506f1d07SSam Ravnborg
7906276a074SBorislav Petkovif HYPERVISOR_GUEST
791506f1d07SSam Ravnborg
792e61bd94aSEduardo Pereira Habkostconfig PARAVIRT
793e61bd94aSEduardo Pereira Habkost	bool "Enable paravirtualization code"
794a0e2bf7cSJuergen Gross	depends on HAVE_STATIC_CALL
795a7f7f624SMasahiro Yamada	help
796e61bd94aSEduardo Pereira Habkost	  This changes the kernel so it can modify itself when it is run
797e61bd94aSEduardo Pereira Habkost	  under a hypervisor, potentially improving performance significantly
798e61bd94aSEduardo Pereira Habkost	  over full virtualization.  However, when run without a hypervisor
799e61bd94aSEduardo Pereira Habkost	  the kernel is theoretically slower and slightly larger.
800e61bd94aSEduardo Pereira Habkost
801c00a280aSJuergen Grossconfig PARAVIRT_XXL
802c00a280aSJuergen Gross	bool
803c00a280aSJuergen Gross
8046276a074SBorislav Petkovconfig PARAVIRT_DEBUG
8056276a074SBorislav Petkov	bool "paravirt-ops debugging"
8066276a074SBorislav Petkov	depends on PARAVIRT && DEBUG_KERNEL
807a7f7f624SMasahiro Yamada	help
8086276a074SBorislav Petkov	  Enable to debug paravirt_ops internals.  Specifically, BUG if
8096276a074SBorislav Petkov	  a paravirt_op is missing when it is called.
8106276a074SBorislav Petkov
811b4ecc126SJeremy Fitzhardingeconfig PARAVIRT_SPINLOCKS
812b4ecc126SJeremy Fitzhardinge	bool "Paravirtualization layer for spinlocks"
8136ea30386SKees Cook	depends on PARAVIRT && SMP
814a7f7f624SMasahiro Yamada	help
815b4ecc126SJeremy Fitzhardinge	  Paravirtualized spinlocks allow a pvops backend to replace the
816b4ecc126SJeremy Fitzhardinge	  spinlock implementation with something virtualization-friendly
817b4ecc126SJeremy Fitzhardinge	  (for example, block the virtual CPU rather than spinning).
818b4ecc126SJeremy Fitzhardinge
8194c4e4f61SRaghavendra K T	  It has a minimal impact on native kernels and gives a nice performance
8204c4e4f61SRaghavendra K T	  benefit on paravirtualized KVM / Xen kernels.
821b4ecc126SJeremy Fitzhardinge
8224c4e4f61SRaghavendra K T	  If you are unsure how to answer this question, answer Y.
823b4ecc126SJeremy Fitzhardinge
824ecca2502SZhao Yakuiconfig X86_HV_CALLBACK_VECTOR
825ecca2502SZhao Yakui	def_bool n
826ecca2502SZhao Yakui
8276276a074SBorislav Petkovsource "arch/x86/xen/Kconfig"
8286276a074SBorislav Petkov
8296276a074SBorislav Petkovconfig KVM_GUEST
8306276a074SBorislav Petkov	bool "KVM Guest support (including kvmclock)"
8316276a074SBorislav Petkov	depends on PARAVIRT
8326276a074SBorislav Petkov	select PARAVIRT_CLOCK
833a1c4423bSMarcelo Tosatti	select ARCH_CPUIDLE_HALTPOLL
834b1d40575SVitaly Kuznetsov	select X86_HV_CALLBACK_VECTOR
8356276a074SBorislav Petkov	default y
836a7f7f624SMasahiro Yamada	help
8376276a074SBorislav Petkov	  This option enables various optimizations for running under the KVM
8386276a074SBorislav Petkov	  hypervisor. It includes a paravirtualized clock, so that instead
8396276a074SBorislav Petkov	  of relying on a PIT (or probably other) emulation by the
8406276a074SBorislav Petkov	  underlying device model, the host provides the guest with
8416276a074SBorislav Petkov	  timing infrastructure such as time of day, and system time
8426276a074SBorislav Petkov
843a1c4423bSMarcelo Tosatticonfig ARCH_CPUIDLE_HALTPOLL
844a1c4423bSMarcelo Tosatti	def_bool n
845a1c4423bSMarcelo Tosatti	prompt "Disable host haltpoll when loading haltpoll driver"
846a1c4423bSMarcelo Tosatti	help
847a1c4423bSMarcelo Tosatti	  If virtualized under KVM, disable host haltpoll.
848a1c4423bSMarcelo Tosatti
8497733607fSMaran Wilsonconfig PVH
8507733607fSMaran Wilson	bool "Support for running PVH guests"
851a7f7f624SMasahiro Yamada	help
8527733607fSMaran Wilson	  This option enables the PVH entry point for guest virtual machines
8537733607fSMaran Wilson	  as specified in the x86/HVM direct boot ABI.
8547733607fSMaran Wilson
8556276a074SBorislav Petkovconfig PARAVIRT_TIME_ACCOUNTING
8566276a074SBorislav Petkov	bool "Paravirtual steal time accounting"
8576276a074SBorislav Petkov	depends on PARAVIRT
858a7f7f624SMasahiro Yamada	help
8596276a074SBorislav Petkov	  Select this option to enable fine granularity task steal time
8606276a074SBorislav Petkov	  accounting. Time spent executing other tasks in parallel with
8616276a074SBorislav Petkov	  the current vCPU is discounted from the vCPU power. To account for
8626276a074SBorislav Petkov	  that, there can be a small performance impact.
8636276a074SBorislav Petkov
8646276a074SBorislav Petkov	  If in doubt, say N here.
8656276a074SBorislav Petkov
8667af192c9SGerd Hoffmannconfig PARAVIRT_CLOCK
8677af192c9SGerd Hoffmann	bool
8687af192c9SGerd Hoffmann
8694a362601SJan Kiszkaconfig JAILHOUSE_GUEST
8704a362601SJan Kiszka	bool "Jailhouse non-root cell support"
871abde587bSArnd Bergmann	depends on X86_64 && PCI
87287e65d05SJan Kiszka	select X86_PM_TIMER
873a7f7f624SMasahiro Yamada	help
8744a362601SJan Kiszka	  This option allows to run Linux as guest in a Jailhouse non-root
8754a362601SJan Kiszka	  cell. You can leave this option disabled if you only want to start
8764a362601SJan Kiszka	  Jailhouse and run Linux afterwards in the root cell.
8774a362601SJan Kiszka
878ec7972c9SZhao Yakuiconfig ACRN_GUEST
879ec7972c9SZhao Yakui	bool "ACRN Guest support"
880ec7972c9SZhao Yakui	depends on X86_64
881498ad393SZhao Yakui	select X86_HV_CALLBACK_VECTOR
882ec7972c9SZhao Yakui	help
883ec7972c9SZhao Yakui	  This option allows to run Linux as guest in the ACRN hypervisor. ACRN is
884ec7972c9SZhao Yakui	  a flexible, lightweight reference open-source hypervisor, built with
885ec7972c9SZhao Yakui	  real-time and safety-criticality in mind. It is built for embedded
886ec7972c9SZhao Yakui	  IOT with small footprint and real-time features. More details can be
887ec7972c9SZhao Yakui	  found in https://projectacrn.org/.
888ec7972c9SZhao Yakui
88959bd54a8SKuppuswamy Sathyanarayananconfig INTEL_TDX_GUEST
89059bd54a8SKuppuswamy Sathyanarayanan	bool "Intel TDX (Trust Domain Extensions) - Guest Support"
89159bd54a8SKuppuswamy Sathyanarayanan	depends on X86_64 && CPU_SUP_INTEL
89259bd54a8SKuppuswamy Sathyanarayanan	depends on X86_X2APIC
89375d090fdSKirill A. Shutemov	depends on EFI_STUB
8949f98a4f4SVishal Annapurve	depends on PARAVIRT
89541394e33SKirill A. Shutemov	select ARCH_HAS_CC_PLATFORM
896968b4931SKirill A. Shutemov	select X86_MEM_ENCRYPT
89777a512e3SSean Christopherson	select X86_MCE
89875d090fdSKirill A. Shutemov	select UNACCEPTED_MEMORY
89959bd54a8SKuppuswamy Sathyanarayanan	help
90059bd54a8SKuppuswamy Sathyanarayanan	  Support running as a guest under Intel TDX.  Without this support,
90159bd54a8SKuppuswamy Sathyanarayanan	  the guest kernel can not boot or run under TDX.
90259bd54a8SKuppuswamy Sathyanarayanan	  TDX includes memory encryption and integrity capabilities
90359bd54a8SKuppuswamy Sathyanarayanan	  which protect the confidentiality and integrity of guest
90459bd54a8SKuppuswamy Sathyanarayanan	  memory contents and CPU state. TDX guests are protected from
90559bd54a8SKuppuswamy Sathyanarayanan	  some attacks from the VMM.
90659bd54a8SKuppuswamy Sathyanarayanan
9076276a074SBorislav Petkovendif # HYPERVISOR_GUEST
90897349135SJeremy Fitzhardinge
909506f1d07SSam Ravnborgsource "arch/x86/Kconfig.cpu"
910506f1d07SSam Ravnborg
911506f1d07SSam Ravnborgconfig HPET_TIMER
9123c2362e6SHarvey Harrison	def_bool X86_64
913506f1d07SSam Ravnborg	prompt "HPET Timer Support" if X86_32
914a7f7f624SMasahiro Yamada	help
915506f1d07SSam Ravnborg	  Use the IA-PC HPET (High Precision Event Timer) to manage
916506f1d07SSam Ravnborg	  time in preference to the PIT and RTC, if a HPET is
917506f1d07SSam Ravnborg	  present.
918506f1d07SSam Ravnborg	  HPET is the next generation timer replacing legacy 8254s.
919506f1d07SSam Ravnborg	  The HPET provides a stable time base on SMP
920506f1d07SSam Ravnborg	  systems, unlike the TSC, but it is more expensive to access,
9214e7f9df2SMichael S. Tsirkin	  as it is off-chip.  The interface used is documented
9224e7f9df2SMichael S. Tsirkin	  in the HPET spec, revision 1.
923506f1d07SSam Ravnborg
924506f1d07SSam Ravnborg	  You can safely choose Y here.  However, HPET will only be
925506f1d07SSam Ravnborg	  activated if the platform and the BIOS support this feature.
926506f1d07SSam Ravnborg	  Otherwise the 8254 will be used for timing services.
927506f1d07SSam Ravnborg
928506f1d07SSam Ravnborg	  Choose N to continue using the legacy 8254 timer.
929506f1d07SSam Ravnborg
930506f1d07SSam Ravnborgconfig HPET_EMULATE_RTC
9313c2362e6SHarvey Harrison	def_bool y
9323228e1dcSAnand K Mistry	depends on HPET_TIMER && (RTC_DRV_CMOS=m || RTC_DRV_CMOS=y)
933506f1d07SSam Ravnborg
9346a108a14SDavid Rientjes# Mark as expert because too many people got it wrong.
935506f1d07SSam Ravnborg# The code disables itself when not needed.
9367ae9392cSThomas Petazzoniconfig DMI
9377ae9392cSThomas Petazzoni	default y
938cf074402SArd Biesheuvel	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
9396a108a14SDavid Rientjes	bool "Enable DMI scanning" if EXPERT
940a7f7f624SMasahiro Yamada	help
9417ae9392cSThomas Petazzoni	  Enabled scanning of DMI to identify machine quirks. Say Y
9427ae9392cSThomas Petazzoni	  here unless you have verified that your setup is not
9437ae9392cSThomas Petazzoni	  affected by entries in the DMI blacklist. Required by PNP
9447ae9392cSThomas Petazzoni	  BIOS code.
9457ae9392cSThomas Petazzoni
946506f1d07SSam Ravnborgconfig GART_IOMMU
94738901f1cSAndi Kleen	bool "Old AMD GART IOMMU support"
948a4ce5a48SChristoph Hellwig	select IOMMU_HELPER
949506f1d07SSam Ravnborg	select SWIOTLB
95023ac4ae8SAndreas Herrmann	depends on X86_64 && PCI && AMD_NB
951a7f7f624SMasahiro Yamada	help
952ced3c42cSIngo Molnar	  Provides a driver for older AMD Athlon64/Opteron/Turion/Sempron
953ced3c42cSIngo Molnar	  GART based hardware IOMMUs.
954ced3c42cSIngo Molnar
955ced3c42cSIngo Molnar	  The GART supports full DMA access for devices with 32-bit access
956ced3c42cSIngo Molnar	  limitations, on systems with more than 3 GB. This is usually needed
957ced3c42cSIngo Molnar	  for USB, sound, many IDE/SATA chipsets and some other devices.
958ced3c42cSIngo Molnar
959ced3c42cSIngo Molnar	  Newer systems typically have a modern AMD IOMMU, supported via
960ced3c42cSIngo Molnar	  the CONFIG_AMD_IOMMU=y config option.
961ced3c42cSIngo Molnar
962ced3c42cSIngo Molnar	  In normal configurations this driver is only active when needed:
963ced3c42cSIngo Molnar	  there's more than 3 GB of memory and the system contains a
964ced3c42cSIngo Molnar	  32-bit limited device.
965ced3c42cSIngo Molnar
966ced3c42cSIngo Molnar	  If unsure, say Y.
967506f1d07SSam Ravnborg
9688b766b0fSMichal Suchanekconfig BOOT_VESA_SUPPORT
9698b766b0fSMichal Suchanek	bool
9708b766b0fSMichal Suchanek	help
9718b766b0fSMichal Suchanek	  If true, at least one selected framebuffer driver can take advantage
9728b766b0fSMichal Suchanek	  of VESA video modes set at an early boot stage via the vga= parameter.
9738b766b0fSMichal Suchanek
9741184dc2fSMike Travisconfig MAXSMP
975ddb0c5a6SSamuel Thibault	bool "Enable Maximum number of SMP Processors and NUMA Nodes"
9766ea30386SKees Cook	depends on X86_64 && SMP && DEBUG_KERNEL
97736f5101aSMike Travis	select CPUMASK_OFFSTACK
978a7f7f624SMasahiro Yamada	help
979ddb0c5a6SSamuel Thibault	  Enable maximum number of CPUS and NUMA Nodes for this architecture.
9801184dc2fSMike Travis	  If unsure, say N.
981506f1d07SSam Ravnborg
982aec6487eSIngo Molnar#
983aec6487eSIngo Molnar# The maximum number of CPUs supported:
984aec6487eSIngo Molnar#
985aec6487eSIngo Molnar# The main config value is NR_CPUS, which defaults to NR_CPUS_DEFAULT,
986aec6487eSIngo Molnar# and which can be configured interactively in the
987aec6487eSIngo Molnar# [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] range.
988aec6487eSIngo Molnar#
989aec6487eSIngo Molnar# The ranges are different on 32-bit and 64-bit kernels, depending on
990aec6487eSIngo Molnar# hardware capabilities and scalability features of the kernel.
991aec6487eSIngo Molnar#
992aec6487eSIngo Molnar# ( If MAXSMP is enabled we just use the highest possible value and disable
993aec6487eSIngo Molnar#   interactive configuration. )
994aec6487eSIngo Molnar#
995a0d0bb4dSRandy Dunlap
996aec6487eSIngo Molnarconfig NR_CPUS_RANGE_BEGIN
997a0d0bb4dSRandy Dunlap	int
998aec6487eSIngo Molnar	default NR_CPUS_RANGE_END if MAXSMP
999a0d0bb4dSRandy Dunlap	default    1 if !SMP
1000a0d0bb4dSRandy Dunlap	default    2
1001a0d0bb4dSRandy Dunlap
1002aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
1003a0d0bb4dSRandy Dunlap	int
1004a0d0bb4dSRandy Dunlap	depends on X86_32
10050abf5086SArnd Bergmann	default    8 if  SMP
1006a0d0bb4dSRandy Dunlap	default    1 if !SMP
1007a0d0bb4dSRandy Dunlap
1008aec6487eSIngo Molnarconfig NR_CPUS_RANGE_END
1009a0d0bb4dSRandy Dunlap	int
1010a0d0bb4dSRandy Dunlap	depends on X86_64
10111edae1aeSScott Wood	default 8192 if  SMP && CPUMASK_OFFSTACK
10121edae1aeSScott Wood	default  512 if  SMP && !CPUMASK_OFFSTACK
1013a0d0bb4dSRandy Dunlap	default    1 if !SMP
1014aec6487eSIngo Molnar
1015aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1016aec6487eSIngo Molnar	int
1017aec6487eSIngo Molnar	depends on X86_32
1018aec6487eSIngo Molnar	default    8 if  SMP
1019aec6487eSIngo Molnar	default    1 if !SMP
1020aec6487eSIngo Molnar
1021aec6487eSIngo Molnarconfig NR_CPUS_DEFAULT
1022aec6487eSIngo Molnar	int
1023aec6487eSIngo Molnar	depends on X86_64
1024a0d0bb4dSRandy Dunlap	default 8192 if  MAXSMP
1025a0d0bb4dSRandy Dunlap	default   64 if  SMP
1026aec6487eSIngo Molnar	default    1 if !SMP
1027a0d0bb4dSRandy Dunlap
1028506f1d07SSam Ravnborgconfig NR_CPUS
102936f5101aSMike Travis	int "Maximum number of CPUs" if SMP && !MAXSMP
1030aec6487eSIngo Molnar	range NR_CPUS_RANGE_BEGIN NR_CPUS_RANGE_END
1031aec6487eSIngo Molnar	default NR_CPUS_DEFAULT
1032a7f7f624SMasahiro Yamada	help
1033506f1d07SSam Ravnborg	  This allows you to specify the maximum number of CPUs which this
1034bb61ccc7SJosh Boyer	  kernel will support.  If CPUMASK_OFFSTACK is enabled, the maximum
1035cad14bb9SKirill A. Shutemov	  supported value is 8192, otherwise the maximum value is 512.  The
1036506f1d07SSam Ravnborg	  minimum value which makes sense is 2.
1037506f1d07SSam Ravnborg
1038aec6487eSIngo Molnar	  This is purely to save memory: each supported CPU adds about 8KB
1039aec6487eSIngo Molnar	  to the kernel image.
1040506f1d07SSam Ravnborg
104166558b73STim Chenconfig SCHED_CLUSTER
104266558b73STim Chen	bool "Cluster scheduler support"
104366558b73STim Chen	depends on SMP
104466558b73STim Chen	default y
104566558b73STim Chen	help
104666558b73STim Chen	  Cluster scheduler support improves the CPU scheduler's decision
104766558b73STim Chen	  making when dealing with machines that have clusters of CPUs.
104866558b73STim Chen	  Cluster usually means a couple of CPUs which are placed closely
104966558b73STim Chen	  by sharing mid-level caches, last-level cache tags or internal
105066558b73STim Chen	  busses.
105166558b73STim Chen
1052506f1d07SSam Ravnborgconfig SCHED_SMT
1053dbe73364SThomas Gleixner	def_bool y if SMP
1054506f1d07SSam Ravnborg
1055506f1d07SSam Ravnborgconfig SCHED_MC
10563c2362e6SHarvey Harrison	def_bool y
10573c2362e6SHarvey Harrison	prompt "Multi-core scheduler support"
1058c8e56d20SBorislav Petkov	depends on SMP
1059a7f7f624SMasahiro Yamada	help
1060506f1d07SSam Ravnborg	  Multi-core scheduler support improves the CPU scheduler's decision
1061506f1d07SSam Ravnborg	  making when dealing with multi-core CPU chips at a cost of slightly
1062506f1d07SSam Ravnborg	  increased overhead in some places. If unsure say N here.
1063506f1d07SSam Ravnborg
1064de966cf4STim Chenconfig SCHED_MC_PRIO
1065de966cf4STim Chen	bool "CPU core priorities scheduler support"
10663598e577SMeng Li	depends on SCHED_MC
10673598e577SMeng Li	select X86_INTEL_PSTATE if CPU_SUP_INTEL
10683598e577SMeng Li	select X86_AMD_PSTATE if CPU_SUP_AMD && ACPI
10690a21fc12SIngo Molnar	select CPU_FREQ
1070de966cf4STim Chen	default y
1071a7f7f624SMasahiro Yamada	help
1072de966cf4STim Chen	  Intel Turbo Boost Max Technology 3.0 enabled CPUs have a
1073de966cf4STim Chen	  core ordering determined at manufacturing time, which allows
1074de966cf4STim Chen	  certain cores to reach higher turbo frequencies (when running
1075de966cf4STim Chen	  single threaded workloads) than others.
1076de966cf4STim Chen
1077de966cf4STim Chen	  Enabling this kernel feature teaches the scheduler about
1078de966cf4STim Chen	  the TBM3 (aka ITMT) priority order of the CPU cores and adjusts the
1079de966cf4STim Chen	  scheduler's CPU selection logic accordingly, so that higher
1080de966cf4STim Chen	  overall system performance can be achieved.
1081de966cf4STim Chen
1082de966cf4STim Chen	  This feature will have no effect on CPUs without this feature.
1083de966cf4STim Chen
1084de966cf4STim Chen	  If unsure say Y here.
10855e76b2abSTim Chen
108630b8b006SThomas Gleixnerconfig UP_LATE_INIT
108730b8b006SThomas Gleixner	def_bool y
1088ba360f88SThomas Gleixner	depends on !SMP && X86_LOCAL_APIC
108930b8b006SThomas Gleixner
1090506f1d07SSam Ravnborgconfig X86_UP_APIC
109150849eefSJan Beulich	bool "Local APIC support on uniprocessors" if !PCI_MSI
109250849eefSJan Beulich	default PCI_MSI
1093dcbb01fbSArnd Bergmann	depends on X86_32 && !SMP
1094a7f7f624SMasahiro Yamada	help
1095506f1d07SSam Ravnborg	  A local APIC (Advanced Programmable Interrupt Controller) is an
1096506f1d07SSam Ravnborg	  integrated interrupt controller in the CPU. If you have a single-CPU
1097506f1d07SSam Ravnborg	  system which has a processor with a local APIC, you can say Y here to
1098506f1d07SSam Ravnborg	  enable and use it. If you say Y here even though your machine doesn't
1099506f1d07SSam Ravnborg	  have a local APIC, then the kernel will still run with no slowdown at
1100506f1d07SSam Ravnborg	  all. The local APIC supports CPU-generated self-interrupts (timer,
1101506f1d07SSam Ravnborg	  performance counters), and the NMI watchdog which detects hard
1102506f1d07SSam Ravnborg	  lockups.
1103506f1d07SSam Ravnborg
1104506f1d07SSam Ravnborgconfig X86_UP_IOAPIC
1105506f1d07SSam Ravnborg	bool "IO-APIC support on uniprocessors"
1106506f1d07SSam Ravnborg	depends on X86_UP_APIC
1107a7f7f624SMasahiro Yamada	help
1108506f1d07SSam Ravnborg	  An IO-APIC (I/O Advanced Programmable Interrupt Controller) is an
1109506f1d07SSam Ravnborg	  SMP-capable replacement for PC-style interrupt controllers. Most
1110506f1d07SSam Ravnborg	  SMP systems and many recent uniprocessor systems have one.
1111506f1d07SSam Ravnborg
1112506f1d07SSam Ravnborg	  If you have a single-CPU system with an IO-APIC, you can say Y here
1113506f1d07SSam Ravnborg	  to use it. If you say Y here even though your machine doesn't have
1114506f1d07SSam Ravnborg	  an IO-APIC, then the kernel will still run with no slowdown at all.
1115506f1d07SSam Ravnborg
1116506f1d07SSam Ravnborgconfig X86_LOCAL_APIC
11173c2362e6SHarvey Harrison	def_bool y
1118dcbb01fbSArnd Bergmann	depends on X86_64 || SMP || X86_UP_APIC || PCI_MSI
1119b5dc8e6cSJiang Liu	select IRQ_DOMAIN_HIERARCHY
1120506f1d07SSam Ravnborg
11212b5e22afSKirill A. Shutemovconfig ACPI_MADT_WAKEUP
11222b5e22afSKirill A. Shutemov	def_bool y
11232b5e22afSKirill A. Shutemov	depends on X86_64
11242b5e22afSKirill A. Shutemov	depends on ACPI
11252b5e22afSKirill A. Shutemov	depends on SMP
11262b5e22afSKirill A. Shutemov	depends on X86_LOCAL_APIC
11272b5e22afSKirill A. Shutemov
1128506f1d07SSam Ravnborgconfig X86_IO_APIC
1129b1da1e71SJan Beulich	def_bool y
1130b1da1e71SJan Beulich	depends on X86_LOCAL_APIC || X86_UP_IOAPIC
1131506f1d07SSam Ravnborg
113241b9eb26SStefan Assmannconfig X86_REROUTE_FOR_BROKEN_BOOT_IRQS
113341b9eb26SStefan Assmann	bool "Reroute for broken boot IRQs"
113441b9eb26SStefan Assmann	depends on X86_IO_APIC
1135a7f7f624SMasahiro Yamada	help
113641b9eb26SStefan Assmann	  This option enables a workaround that fixes a source of
113741b9eb26SStefan Assmann	  spurious interrupts. This is recommended when threaded
113841b9eb26SStefan Assmann	  interrupt handling is used on systems where the generation of
113941b9eb26SStefan Assmann	  superfluous "boot interrupts" cannot be disabled.
114041b9eb26SStefan Assmann
114141b9eb26SStefan Assmann	  Some chipsets generate a legacy INTx "boot IRQ" when the IRQ
114241b9eb26SStefan Assmann	  entry in the chipset's IO-APIC is masked (as, e.g. the RT
114341b9eb26SStefan Assmann	  kernel does during interrupt handling). On chipsets where this
114441b9eb26SStefan Assmann	  boot IRQ generation cannot be disabled, this workaround keeps
114541b9eb26SStefan Assmann	  the original IRQ line masked so that only the equivalent "boot
114641b9eb26SStefan Assmann	  IRQ" is delivered to the CPUs. The workaround also tells the
114741b9eb26SStefan Assmann	  kernel to set up the IRQ handler on the boot IRQ line. In this
114841b9eb26SStefan Assmann	  way only one interrupt is delivered to the kernel. Otherwise
114941b9eb26SStefan Assmann	  the spurious second interrupt may cause the kernel to bring
115041b9eb26SStefan Assmann	  down (vital) interrupt lines.
115141b9eb26SStefan Assmann
115241b9eb26SStefan Assmann	  Only affects "broken" chipsets. Interrupt sharing may be
115341b9eb26SStefan Assmann	  increased on these systems.
115441b9eb26SStefan Assmann
1155506f1d07SSam Ravnborgconfig X86_MCE
1156bab9bc65SAndi Kleen	bool "Machine Check / overheating reporting"
1157648ed940SChen, Gong	select GENERIC_ALLOCATOR
1158e57dbaf7SBorislav Petkov	default y
1159a7f7f624SMasahiro Yamada	help
1160bab9bc65SAndi Kleen	  Machine Check support allows the processor to notify the
1161bab9bc65SAndi Kleen	  kernel if it detects a problem (e.g. overheating, data corruption).
1162506f1d07SSam Ravnborg	  The action the kernel takes depends on the severity of the problem,
1163bab9bc65SAndi Kleen	  ranging from warning messages to halting the machine.
11644efc0670SAndi Kleen
11655de97c9fSTony Luckconfig X86_MCELOG_LEGACY
11665de97c9fSTony Luck	bool "Support for deprecated /dev/mcelog character device"
11675de97c9fSTony Luck	depends on X86_MCE
1168a7f7f624SMasahiro Yamada	help
11695de97c9fSTony Luck	  Enable support for /dev/mcelog which is needed by the old mcelog
11705de97c9fSTony Luck	  userspace logging daemon. Consider switching to the new generation
11715de97c9fSTony Luck	  rasdaemon solution.
11725de97c9fSTony Luck
1173506f1d07SSam Ravnborgconfig X86_MCE_INTEL
11743c2362e6SHarvey Harrison	def_bool y
11753c2362e6SHarvey Harrison	prompt "Intel MCE features"
1176c1ebf835SAndi Kleen	depends on X86_MCE && X86_LOCAL_APIC
1177a7f7f624SMasahiro Yamada	help
1178506f1d07SSam Ravnborg	  Additional support for intel specific MCE features such as
1179506f1d07SSam Ravnborg	  the thermal monitor.
1180506f1d07SSam Ravnborg
1181506f1d07SSam Ravnborgconfig X86_MCE_AMD
11823c2362e6SHarvey Harrison	def_bool y
11833c2362e6SHarvey Harrison	prompt "AMD MCE features"
1184d35fb312SYazen Ghannam	depends on X86_MCE && X86_LOCAL_APIC
1185a7f7f624SMasahiro Yamada	help
1186506f1d07SSam Ravnborg	  Additional support for AMD specific MCE features such as
1187506f1d07SSam Ravnborg	  the DRAM Error Threshold.
1188506f1d07SSam Ravnborg
11894efc0670SAndi Kleenconfig X86_ANCIENT_MCE
11906fc108a0SJan Beulich	bool "Support for old Pentium 5 / WinChip machine checks"
1191c31d9633SAndi Kleen	depends on X86_32 && X86_MCE
1192a7f7f624SMasahiro Yamada	help
11934efc0670SAndi Kleen	  Include support for machine check handling on old Pentium 5 or WinChip
11945065a706SMasanari Iida	  systems. These typically need to be enabled explicitly on the command
11954efc0670SAndi Kleen	  line.
11964efc0670SAndi Kleen
1197b2762686SAndi Kleenconfig X86_MCE_THRESHOLD
1198b2762686SAndi Kleen	depends on X86_MCE_AMD || X86_MCE_INTEL
11996fc108a0SJan Beulich	def_bool y
1200b2762686SAndi Kleen
1201ea149b36SAndi Kleenconfig X86_MCE_INJECT
1202bc8e80d5SBorislav Petkov	depends on X86_MCE && X86_LOCAL_APIC && DEBUG_FS
1203ea149b36SAndi Kleen	tristate "Machine check injector support"
1204a7f7f624SMasahiro Yamada	help
1205ea149b36SAndi Kleen	  Provide support for injecting machine checks for testing purposes.
1206ea149b36SAndi Kleen	  If you don't know what a machine check is and you don't do kernel
1207ea149b36SAndi Kleen	  QA it is safe to say n.
1208ea149b36SAndi Kleen
120907dc900eSPeter Zijlstrasource "arch/x86/events/Kconfig"
1210e633c65aSKan Liang
12115aef51c3SAndy Lutomirskiconfig X86_LEGACY_VM86
12121e642812SIngo Molnar	bool "Legacy VM86 support"
1213506f1d07SSam Ravnborg	depends on X86_32
1214a7f7f624SMasahiro Yamada	help
12155aef51c3SAndy Lutomirski	  This option allows user programs to put the CPU into V8086
12165aef51c3SAndy Lutomirski	  mode, which is an 80286-era approximation of 16-bit real mode.
12175aef51c3SAndy Lutomirski
12185aef51c3SAndy Lutomirski	  Some very old versions of X and/or vbetool require this option
12195aef51c3SAndy Lutomirski	  for user mode setting.  Similarly, DOSEMU will use it if
12205aef51c3SAndy Lutomirski	  available to accelerate real mode DOS programs.  However, any
12215aef51c3SAndy Lutomirski	  recent version of DOSEMU, X, or vbetool should be fully
12225aef51c3SAndy Lutomirski	  functional even without kernel VM86 support, as they will all
12231e642812SIngo Molnar	  fall back to software emulation. Nevertheless, if you are using
12241e642812SIngo Molnar	  a 16-bit DOS program where 16-bit performance matters, vm86
12251e642812SIngo Molnar	  mode might be faster than emulation and you might want to
12261e642812SIngo Molnar	  enable this option.
12275aef51c3SAndy Lutomirski
12281e642812SIngo Molnar	  Note that any app that works on a 64-bit kernel is unlikely to
12291e642812SIngo Molnar	  need this option, as 64-bit kernels don't, and can't, support
12301e642812SIngo Molnar	  V8086 mode. This option is also unrelated to 16-bit protected
12311e642812SIngo Molnar	  mode and is not needed to run most 16-bit programs under Wine.
12325aef51c3SAndy Lutomirski
12331e642812SIngo Molnar	  Enabling this option increases the complexity of the kernel
12341e642812SIngo Molnar	  and slows down exception handling a tiny bit.
12355aef51c3SAndy Lutomirski
12361e642812SIngo Molnar	  If unsure, say N here.
12375aef51c3SAndy Lutomirski
12385aef51c3SAndy Lutomirskiconfig VM86
12395aef51c3SAndy Lutomirski	bool
12405aef51c3SAndy Lutomirski	default X86_LEGACY_VM86
124134273f41SH. Peter Anvin
124234273f41SH. Peter Anvinconfig X86_16BIT
124334273f41SH. Peter Anvin	bool "Enable support for 16-bit segments" if EXPERT
124434273f41SH. Peter Anvin	default y
1245a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
1246a7f7f624SMasahiro Yamada	help
124734273f41SH. Peter Anvin	  This option is required by programs like Wine to run 16-bit
124834273f41SH. Peter Anvin	  protected mode legacy code on x86 processors.  Disabling
124934273f41SH. Peter Anvin	  this option saves about 300 bytes on i386, or around 6K text
125034273f41SH. Peter Anvin	  plus 16K runtime memory on x86-64,
125134273f41SH. Peter Anvin
125234273f41SH. Peter Anvinconfig X86_ESPFIX32
125334273f41SH. Peter Anvin	def_bool y
125434273f41SH. Peter Anvin	depends on X86_16BIT && X86_32
1255506f1d07SSam Ravnborg
1256197725deSH. Peter Anvinconfig X86_ESPFIX64
1257197725deSH. Peter Anvin	def_bool y
125834273f41SH. Peter Anvin	depends on X86_16BIT && X86_64
1259506f1d07SSam Ravnborg
12601ad83c85SAndy Lutomirskiconfig X86_VSYSCALL_EMULATION
12611ad83c85SAndy Lutomirski	bool "Enable vsyscall emulation" if EXPERT
12621ad83c85SAndy Lutomirski	default y
12631ad83c85SAndy Lutomirski	depends on X86_64
1264a7f7f624SMasahiro Yamada	help
12651ad83c85SAndy Lutomirski	  This enables emulation of the legacy vsyscall page.  Disabling
12661ad83c85SAndy Lutomirski	  it is roughly equivalent to booting with vsyscall=none, except
12671ad83c85SAndy Lutomirski	  that it will also disable the helpful warning if a program
12681ad83c85SAndy Lutomirski	  tries to use a vsyscall.  With this option set to N, offending
12691ad83c85SAndy Lutomirski	  programs will just segfault, citing addresses of the form
12701ad83c85SAndy Lutomirski	  0xffffffffff600?00.
12711ad83c85SAndy Lutomirski
12721ad83c85SAndy Lutomirski	  This option is required by many programs built before 2013, and
12731ad83c85SAndy Lutomirski	  care should be used even with newer programs if set to N.
12741ad83c85SAndy Lutomirski
12751ad83c85SAndy Lutomirski	  Disabling this option saves about 7K of kernel size and
12761ad83c85SAndy Lutomirski	  possibly 4K of additional runtime pagetable memory.
12771ad83c85SAndy Lutomirski
1278111e7b15SThomas Gleixnerconfig X86_IOPL_IOPERM
1279111e7b15SThomas Gleixner	bool "IOPERM and IOPL Emulation"
1280a24ca997SThomas Gleixner	default y
1281a7f7f624SMasahiro Yamada	help
1282111e7b15SThomas Gleixner	  This enables the ioperm() and iopl() syscalls which are necessary
1283111e7b15SThomas Gleixner	  for legacy applications.
1284111e7b15SThomas Gleixner
1285c8137aceSThomas Gleixner	  Legacy IOPL support is an overbroad mechanism which allows user
1286c8137aceSThomas Gleixner	  space aside of accessing all 65536 I/O ports also to disable
1287c8137aceSThomas Gleixner	  interrupts. To gain this access the caller needs CAP_SYS_RAWIO
1288c8137aceSThomas Gleixner	  capabilities and permission from potentially active security
1289c8137aceSThomas Gleixner	  modules.
1290c8137aceSThomas Gleixner
1291c8137aceSThomas Gleixner	  The emulation restricts the functionality of the syscall to
1292c8137aceSThomas Gleixner	  only allowing the full range I/O port access, but prevents the
1293a24ca997SThomas Gleixner	  ability to disable interrupts from user space which would be
1294a24ca997SThomas Gleixner	  granted if the hardware IOPL mechanism would be used.
1295c8137aceSThomas Gleixner
1296506f1d07SSam Ravnborgconfig TOSHIBA
1297506f1d07SSam Ravnborg	tristate "Toshiba Laptop support"
1298506f1d07SSam Ravnborg	depends on X86_32
1299a7f7f624SMasahiro Yamada	help
1300506f1d07SSam Ravnborg	  This adds a driver to safely access the System Management Mode of
1301506f1d07SSam Ravnborg	  the CPU on Toshiba portables with a genuine Toshiba BIOS. It does
1302506f1d07SSam Ravnborg	  not work on models with a Phoenix BIOS. The System Management Mode
1303506f1d07SSam Ravnborg	  is used to set the BIOS and power saving options on Toshiba portables.
1304506f1d07SSam Ravnborg
1305506f1d07SSam Ravnborg	  For information on utilities to make use of this driver see the
1306506f1d07SSam Ravnborg	  Toshiba Linux utilities web site at:
1307506f1d07SSam Ravnborg	  <http://www.buzzard.org.uk/toshiba/>.
1308506f1d07SSam Ravnborg
1309506f1d07SSam Ravnborg	  Say Y if you intend to run this kernel on a Toshiba portable.
1310506f1d07SSam Ravnborg	  Say N otherwise.
1311506f1d07SSam Ravnborg
1312506f1d07SSam Ravnborgconfig X86_REBOOTFIXUPS
13139ba16087SJan Beulich	bool "Enable X86 board specific fixups for reboot"
13149ba16087SJan Beulich	depends on X86_32
1315a7f7f624SMasahiro Yamada	help
1316506f1d07SSam Ravnborg	  This enables chipset and/or board specific fixups to be done
1317506f1d07SSam Ravnborg	  in order to get reboot to work correctly. This is only needed on
1318506f1d07SSam Ravnborg	  some combinations of hardware and BIOS. The symptom, for which
1319506f1d07SSam Ravnborg	  this config is intended, is when reboot ends with a stalled/hung
1320506f1d07SSam Ravnborg	  system.
1321506f1d07SSam Ravnborg
1322506f1d07SSam Ravnborg	  Currently, the only fixup is for the Geode machines using
13235e3a77e9SFlorian Fainelli	  CS5530A and CS5536 chipsets and the RDC R-321x SoC.
1324506f1d07SSam Ravnborg
1325506f1d07SSam Ravnborg	  Say Y if you want to enable the fixup. Currently, it's safe to
1326506f1d07SSam Ravnborg	  enable this option even if you don't need it.
1327506f1d07SSam Ravnborg	  Say N otherwise.
1328506f1d07SSam Ravnborg
1329506f1d07SSam Ravnborgconfig MICROCODE
1330e6bcfdd7SThomas Gleixner	def_bool y
133180030e3dSBorislav Petkov	depends on CPU_SUP_AMD || CPU_SUP_INTEL
133250cef76dSBorislav Petkov (AMD)	select CRYPTO_LIB_SHA256 if CPU_SUP_AMD
133380cc9f10SPeter Oruba
1334fdbd4381SThomas Gleixnerconfig MICROCODE_INITRD32
1335fdbd4381SThomas Gleixner	def_bool y
1336fdbd4381SThomas Gleixner	depends on MICROCODE && X86_32 && BLK_DEV_INITRD
1337fdbd4381SThomas Gleixner
1338a77a94f8SBorislav Petkovconfig MICROCODE_LATE_LOADING
1339a77a94f8SBorislav Petkov	bool "Late microcode loading (DANGEROUS)"
1340c02f48e0SBorislav Petkov	default n
1341634ac23aSThomas Gleixner	depends on MICROCODE && SMP
1342a7f7f624SMasahiro Yamada	help
1343a77a94f8SBorislav Petkov	  Loading microcode late, when the system is up and executing instructions
1344a77a94f8SBorislav Petkov	  is a tricky business and should be avoided if possible. Just the sequence
1345a77a94f8SBorislav Petkov	  of synchronizing all cores and SMT threads is one fragile dance which does
1346a77a94f8SBorislav Petkov	  not guarantee that cores might not softlock after the loading. Therefore,
13479407bda8SThomas Gleixner	  use this at your own risk. Late loading taints the kernel unless the
13489407bda8SThomas Gleixner	  microcode header indicates that it is safe for late loading via the
13499407bda8SThomas Gleixner	  minimal revision check. This minimal revision check can be enforced on
13509407bda8SThomas Gleixner	  the kernel command line with "microcode.minrev=Y".
13519407bda8SThomas Gleixner
13529407bda8SThomas Gleixnerconfig MICROCODE_LATE_FORCE_MINREV
13539407bda8SThomas Gleixner	bool "Enforce late microcode loading minimal revision check"
13549407bda8SThomas Gleixner	default n
13559407bda8SThomas Gleixner	depends on MICROCODE_LATE_LOADING
13569407bda8SThomas Gleixner	help
13579407bda8SThomas Gleixner	  To prevent that users load microcode late which modifies already
13589407bda8SThomas Gleixner	  in use features, newer microcode patches have a minimum revision field
13599407bda8SThomas Gleixner	  in the microcode header, which tells the kernel which minimum
13609407bda8SThomas Gleixner	  revision must be active in the CPU to safely load that new microcode
13619407bda8SThomas Gleixner	  late into the running system. If disabled the check will not
13629407bda8SThomas Gleixner	  be enforced but the kernel will be tainted when the minimal
13639407bda8SThomas Gleixner	  revision check fails.
13649407bda8SThomas Gleixner
13659407bda8SThomas Gleixner	  This minimal revision check can also be controlled via the
13669407bda8SThomas Gleixner	  "microcode.minrev" parameter on the kernel command line.
13679407bda8SThomas Gleixner
13689407bda8SThomas Gleixner	  If unsure say Y.
1369506f1d07SSam Ravnborg
1370506f1d07SSam Ravnborgconfig X86_MSR
1371506f1d07SSam Ravnborg	tristate "/dev/cpu/*/msr - Model-specific register support"
1372a7f7f624SMasahiro Yamada	help
1373506f1d07SSam Ravnborg	  This device gives privileged processes access to the x86
1374506f1d07SSam Ravnborg	  Model-Specific Registers (MSRs).  It is a character device with
1375506f1d07SSam Ravnborg	  major 202 and minors 0 to 31 for /dev/cpu/0/msr to /dev/cpu/31/msr.
1376506f1d07SSam Ravnborg	  MSR accesses are directed to a specific CPU on multi-processor
1377506f1d07SSam Ravnborg	  systems.
1378506f1d07SSam Ravnborg
1379506f1d07SSam Ravnborgconfig X86_CPUID
1380506f1d07SSam Ravnborg	tristate "/dev/cpu/*/cpuid - CPU information support"
1381a7f7f624SMasahiro Yamada	help
1382506f1d07SSam Ravnborg	  This device gives processes access to the x86 CPUID instruction to
1383506f1d07SSam Ravnborg	  be executed on a specific processor.  It is a character device
1384506f1d07SSam Ravnborg	  with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
1385506f1d07SSam Ravnborg	  /dev/cpu/31/cpuid.
1386506f1d07SSam Ravnborg
1387bbeb69ceSArnd Bergmannconfig HIGHMEM4G
1388bbeb69ceSArnd Bergmann	bool "High Memory Support"
1389506f1d07SSam Ravnborg	depends on X86_32
1390a7f7f624SMasahiro Yamada	help
1391bbeb69ceSArnd Bergmann	  Linux can use up to 4 Gigabytes of physical memory on x86 systems.
1392506f1d07SSam Ravnborg	  However, the address space of 32-bit x86 processors is only 4
1393506f1d07SSam Ravnborg	  Gigabytes large. That means that, if you have a large amount of
1394506f1d07SSam Ravnborg	  physical memory, not all of it can be "permanently mapped" by the
1395506f1d07SSam Ravnborg	  kernel. The physical memory that's not permanently mapped is called
1396506f1d07SSam Ravnborg	  "high memory".
1397506f1d07SSam Ravnborg
1398506f1d07SSam Ravnborg	  If you are compiling a kernel which will never run on a machine with
1399506f1d07SSam Ravnborg	  more than 1 Gigabyte total physical RAM, answer "off" here (default
1400506f1d07SSam Ravnborg	  choice and suitable for most users). This will result in a "3GB/1GB"
1401506f1d07SSam Ravnborg	  split: 3GB are mapped so that each process sees a 3GB virtual memory
1402506f1d07SSam Ravnborg	  space and the remaining part of the 4GB virtual memory space is used
1403506f1d07SSam Ravnborg	  by the kernel to permanently map as much physical memory as
1404506f1d07SSam Ravnborg	  possible.
1405506f1d07SSam Ravnborg
1406506f1d07SSam Ravnborg	  If the machine has between 1 and 4 Gigabytes physical RAM, then
1407bbeb69ceSArnd Bergmann	  answer "Y" here.
1408506f1d07SSam Ravnborg
1409bbeb69ceSArnd Bergmann	  If unsure, say N.
1410506f1d07SSam Ravnborg
1411506f1d07SSam Ravnborgchoice
14126a108a14SDavid Rientjes	prompt "Memory split" if EXPERT
1413506f1d07SSam Ravnborg	default VMSPLIT_3G
1414506f1d07SSam Ravnborg	depends on X86_32
1415a7f7f624SMasahiro Yamada	help
1416506f1d07SSam Ravnborg	  Select the desired split between kernel and user memory.
1417506f1d07SSam Ravnborg
1418506f1d07SSam Ravnborg	  If the address range available to the kernel is less than the
1419506f1d07SSam Ravnborg	  physical memory installed, the remaining memory will be available
1420506f1d07SSam Ravnborg	  as "high memory". Accessing high memory is a little more costly
1421506f1d07SSam Ravnborg	  than low memory, as it needs to be mapped into the kernel first.
1422506f1d07SSam Ravnborg	  Note that increasing the kernel address space limits the range
1423506f1d07SSam Ravnborg	  available to user programs, making the address space there
1424506f1d07SSam Ravnborg	  tighter.  Selecting anything other than the default 3G/1G split
1425506f1d07SSam Ravnborg	  will also likely make your kernel incompatible with binary-only
1426506f1d07SSam Ravnborg	  kernel modules.
1427506f1d07SSam Ravnborg
1428506f1d07SSam Ravnborg	  If you are not absolutely sure what you are doing, leave this
1429506f1d07SSam Ravnborg	  option alone!
1430506f1d07SSam Ravnborg
1431506f1d07SSam Ravnborg	config VMSPLIT_3G
1432506f1d07SSam Ravnborg		bool "3G/1G user/kernel split"
1433506f1d07SSam Ravnborg	config VMSPLIT_3G_OPT
1434506f1d07SSam Ravnborg		depends on !X86_PAE
1435506f1d07SSam Ravnborg		bool "3G/1G user/kernel split (for full 1G low memory)"
1436506f1d07SSam Ravnborg	config VMSPLIT_2G
1437506f1d07SSam Ravnborg		bool "2G/2G user/kernel split"
1438506f1d07SSam Ravnborg	config VMSPLIT_2G_OPT
1439506f1d07SSam Ravnborg		depends on !X86_PAE
1440506f1d07SSam Ravnborg		bool "2G/2G user/kernel split (for full 2G low memory)"
1441506f1d07SSam Ravnborg	config VMSPLIT_1G
1442506f1d07SSam Ravnborg		bool "1G/3G user/kernel split"
1443506f1d07SSam Ravnborgendchoice
1444506f1d07SSam Ravnborg
1445506f1d07SSam Ravnborgconfig PAGE_OFFSET
1446506f1d07SSam Ravnborg	hex
1447506f1d07SSam Ravnborg	default 0xB0000000 if VMSPLIT_3G_OPT
1448506f1d07SSam Ravnborg	default 0x80000000 if VMSPLIT_2G
1449506f1d07SSam Ravnborg	default 0x78000000 if VMSPLIT_2G_OPT
1450506f1d07SSam Ravnborg	default 0x40000000 if VMSPLIT_1G
1451506f1d07SSam Ravnborg	default 0xC0000000
1452506f1d07SSam Ravnborg	depends on X86_32
1453506f1d07SSam Ravnborg
1454506f1d07SSam Ravnborgconfig HIGHMEM
1455bbeb69ceSArnd Bergmann	def_bool HIGHMEM4G
1456506f1d07SSam Ravnborg
1457506f1d07SSam Ravnborgconfig X86_PAE
14589ba16087SJan Beulich	bool "PAE (Physical Address Extension) Support"
145988a2b4edSArnd Bergmann	depends on X86_32 && X86_HAVE_PAE
1460d4a451d5SChristoph Hellwig	select PHYS_ADDR_T_64BIT
1461a7f7f624SMasahiro Yamada	help
1462506f1d07SSam Ravnborg	  PAE is required for NX support, and furthermore enables
1463506f1d07SSam Ravnborg	  larger swapspace support for non-overcommit purposes. It
1464506f1d07SSam Ravnborg	  has the cost of more pagetable lookup overhead, and also
1465506f1d07SSam Ravnborg	  consumes more pagetable space per process.
1466506f1d07SSam Ravnborg
146777ef56e4SKirill A. Shutemovconfig X86_5LEVEL
146877ef56e4SKirill A. Shutemov	bool "Enable 5-level page tables support"
146918ec1eafSKirill A. Shutemov	default y
1470eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
1471162434e7SKirill A. Shutemov	select SPARSEMEM_VMEMMAP
147277ef56e4SKirill A. Shutemov	depends on X86_64
1473a7f7f624SMasahiro Yamada	help
147477ef56e4SKirill A. Shutemov	  5-level paging enables access to larger address space:
147577ef56e4SKirill A. Shutemov	  up to 128 PiB of virtual address space and 4 PiB of
147677ef56e4SKirill A. Shutemov	  physical address space.
147777ef56e4SKirill A. Shutemov
147877ef56e4SKirill A. Shutemov	  It will be supported by future Intel CPUs.
147977ef56e4SKirill A. Shutemov
14806657fca0SKirill A. Shutemov	  A kernel with the option enabled can be booted on machines that
14816657fca0SKirill A. Shutemov	  support 4- or 5-level paging.
148277ef56e4SKirill A. Shutemov
1483ff61f079SJonathan Corbet	  See Documentation/arch/x86/x86_64/5level-paging.rst for more
148477ef56e4SKirill A. Shutemov	  information.
148577ef56e4SKirill A. Shutemov
148677ef56e4SKirill A. Shutemov	  Say N if unsure.
148777ef56e4SKirill A. Shutemov
148810971ab2SIngo Molnarconfig X86_DIRECT_GBPAGES
1489e5008abeSLuis R. Rodriguez	def_bool y
14902e1da13fSVlastimil Babka	depends on X86_64
1491a7f7f624SMasahiro Yamada	help
149210971ab2SIngo Molnar	  Certain kernel features effectively disable kernel
149310971ab2SIngo Molnar	  linear 1 GB mappings (even if the CPU otherwise
149410971ab2SIngo Molnar	  supports them), so don't confuse the user by printing
149510971ab2SIngo Molnar	  that we have them enabled.
14969e899816SNick Piggin
14975c280cf6SThomas Gleixnerconfig X86_CPA_STATISTICS
14985c280cf6SThomas Gleixner	bool "Enable statistic for Change Page Attribute"
14995c280cf6SThomas Gleixner	depends on DEBUG_FS
1500a7f7f624SMasahiro Yamada	help
1501b75baaf3SIngo Molnar	  Expose statistics about the Change Page Attribute mechanism, which
1502a943245aSColin Ian King	  helps to determine the effectiveness of preserving large and huge
15035c280cf6SThomas Gleixner	  page mappings when mapping protections are changed.
15045c280cf6SThomas Gleixner
150520f07a04SKirill A. Shutemovconfig X86_MEM_ENCRYPT
150620f07a04SKirill A. Shutemov	select ARCH_HAS_FORCE_DMA_UNENCRYPTED
150720f07a04SKirill A. Shutemov	select DYNAMIC_PHYSICAL_MASK
150820f07a04SKirill A. Shutemov	def_bool n
150920f07a04SKirill A. Shutemov
15107744ccdbSTom Lendackyconfig AMD_MEM_ENCRYPT
15117744ccdbSTom Lendacky	bool "AMD Secure Memory Encryption (SME) support"
15127744ccdbSTom Lendacky	depends on X86_64 && CPU_SUP_AMD
15136c321179STom Lendacky	depends on EFI_STUB
151482fef0adSDavid Rientjes	select DMA_COHERENT_POOL
1515ce9084baSArd Biesheuvel	select ARCH_USE_MEMREMAP_PROT
1516597cfe48SJoerg Roedel	select INSTRUCTION_DECODER
1517aa5a4611STom Lendacky	select ARCH_HAS_CC_PLATFORM
151820f07a04SKirill A. Shutemov	select X86_MEM_ENCRYPT
15196c321179STom Lendacky	select UNACCEPTED_MEMORY
1520c5529418SNikunj A Dadhania	select CRYPTO_LIB_AESGCM
1521a7f7f624SMasahiro Yamada	help
15227744ccdbSTom Lendacky	  Say yes to enable support for the encryption of system memory.
15237744ccdbSTom Lendacky	  This requires an AMD processor that supports Secure Memory
15247744ccdbSTom Lendacky	  Encryption (SME).
15257744ccdbSTom Lendacky
1526506f1d07SSam Ravnborg# Common NUMA Features
1527506f1d07SSam Ravnborgconfig NUMA
1528e133f6eaSRandy Dunlap	bool "NUMA Memory Allocation and Scheduler Support"
1529506f1d07SSam Ravnborg	depends on SMP
15300abf5086SArnd Bergmann	depends on X86_64
15317ecd19cfSKefeng Wang	select USE_PERCPU_NUMA_NODE_ID
15320c436a58SSaurabh Sengar	select OF_NUMA if OF
1533a7f7f624SMasahiro Yamada	help
1534e133f6eaSRandy Dunlap	  Enable NUMA (Non-Uniform Memory Access) support.
1535fd51b2d7SKOSAKI Motohiro
1536506f1d07SSam Ravnborg	  The kernel will try to allocate memory used by a CPU on the
1537506f1d07SSam Ravnborg	  local memory controller of the CPU and add some more
1538506f1d07SSam Ravnborg	  NUMA awareness to the kernel.
1539506f1d07SSam Ravnborg
1540c280ea5eSIngo Molnar	  For 64-bit this is recommended if the system is Intel Core i7
1541fd51b2d7SKOSAKI Motohiro	  (or later), AMD Opteron, or EM64T NUMA.
1542fd51b2d7SKOSAKI Motohiro
1543fd51b2d7SKOSAKI Motohiro	  Otherwise, you should say N.
1544506f1d07SSam Ravnborg
1545eec1d4faSHans Rosenfeldconfig AMD_NUMA
15463c2362e6SHarvey Harrison	def_bool y
15473c2362e6SHarvey Harrison	prompt "Old style AMD Opteron NUMA detection"
15485da0ef9aSTejun Heo	depends on X86_64 && NUMA && PCI
1549a7f7f624SMasahiro Yamada	help
1550eec1d4faSHans Rosenfeld	  Enable AMD NUMA node topology detection.  You should say Y here if
1551eec1d4faSHans Rosenfeld	  you have a multi processor AMD system. This uses an old method to
1552eec1d4faSHans Rosenfeld	  read the NUMA configuration directly from the builtin Northbridge
1553eec1d4faSHans Rosenfeld	  of Opteron. It is recommended to use X86_64_ACPI_NUMA instead,
1554eec1d4faSHans Rosenfeld	  which also takes priority if both are compiled in.
1555506f1d07SSam Ravnborg
1556506f1d07SSam Ravnborgconfig X86_64_ACPI_NUMA
15573c2362e6SHarvey Harrison	def_bool y
15583c2362e6SHarvey Harrison	prompt "ACPI NUMA detection"
1559506f1d07SSam Ravnborg	depends on X86_64 && NUMA && ACPI && PCI
1560506f1d07SSam Ravnborg	select ACPI_NUMA
1561a7f7f624SMasahiro Yamada	help
1562506f1d07SSam Ravnborg	  Enable ACPI SRAT based node topology detection.
1563506f1d07SSam Ravnborg
1564506f1d07SSam Ravnborgconfig NODES_SHIFT
1565d25e26b6SLinus Torvalds	int "Maximum NUMA Nodes (as a power of 2)" if !MAXSMP
156651591e31SDavid Rientjes	range 1 10
156751591e31SDavid Rientjes	default "10" if MAXSMP
1568506f1d07SSam Ravnborg	default "6" if X86_64
1569506f1d07SSam Ravnborg	default "3"
1570a9ee6cf5SMike Rapoport	depends on NUMA
1571a7f7f624SMasahiro Yamada	help
15721184dc2fSMike Travis	  Specify the maximum number of NUMA Nodes available on the target
1573692105b8SMatt LaPlante	  system.  Increases memory reserved to accommodate various tables.
1574506f1d07SSam Ravnborg
1575506f1d07SSam Ravnborgconfig ARCH_FLATMEM_ENABLE
1576506f1d07SSam Ravnborg	def_bool y
15773b16651fSTejun Heo	depends on X86_32 && !NUMA
1578506f1d07SSam Ravnborg
1579506f1d07SSam Ravnborgconfig ARCH_SPARSEMEM_ENABLE
1580506f1d07SSam Ravnborg	def_bool y
1581506f1d07SSam Ravnborg	select SPARSEMEM_STATIC if X86_32
1582506f1d07SSam Ravnborg	select SPARSEMEM_VMEMMAP_ENABLE if X86_64
1583506f1d07SSam Ravnborg
15843b16651fSTejun Heoconfig ARCH_SPARSEMEM_DEFAULT
15856ad57f7fSMike Rapoport	def_bool X86_64 || (NUMA && X86_32)
15863b16651fSTejun Heo
1587506f1d07SSam Ravnborgconfig ARCH_SELECT_MEMORY_MODEL
1588506f1d07SSam Ravnborg	def_bool y
15894eda2bc3SDavid Hildenbrand	depends on ARCH_SPARSEMEM_ENABLE && ARCH_FLATMEM_ENABLE
1590506f1d07SSam Ravnborg
1591506f1d07SSam Ravnborgconfig ARCH_MEMORY_PROBE
1592a0842b70SToshi Kani	bool "Enable sysfs memory/probe interface"
15935c11f00bSDavid Hildenbrand	depends on MEMORY_HOTPLUG
1594a0842b70SToshi Kani	help
1595a0842b70SToshi Kani	  This option enables a sysfs memory/probe interface for testing.
1596cb1aaebeSMauro Carvalho Chehab	  See Documentation/admin-guide/mm/memory-hotplug.rst for more information.
1597a0842b70SToshi Kani	  If you are unsure how to answer this question, answer N.
1598506f1d07SSam Ravnborg
15993b16651fSTejun Heoconfig ARCH_PROC_KCORE_TEXT
16003b16651fSTejun Heo	def_bool y
16013b16651fSTejun Heo	depends on X86_64 && PROC_KCORE
16023b16651fSTejun Heo
1603a29815a3SAvi Kivityconfig ILLEGAL_POINTER_VALUE
1604a29815a3SAvi Kivity	hex
1605a29815a3SAvi Kivity	default 0 if X86_32
1606a29815a3SAvi Kivity	default 0xdead000000000000 if X86_64
1607a29815a3SAvi Kivity
16087a67832cSDan Williamsconfig X86_PMEM_LEGACY_DEVICE
16097a67832cSDan Williams	bool
16107a67832cSDan Williams
1611ec776ef6SChristoph Hellwigconfig X86_PMEM_LEGACY
16127a67832cSDan Williams	tristate "Support non-standard NVDIMMs and ADR protected memory"
16139f53f9faSDan Williams	depends on PHYS_ADDR_T_64BIT
16149f53f9faSDan Williams	depends on BLK_DEV
16157a67832cSDan Williams	select X86_PMEM_LEGACY_DEVICE
16167b27a862SDan Williams	select NUMA_KEEP_MEMINFO if NUMA
16179f53f9faSDan Williams	select LIBNVDIMM
1618ec776ef6SChristoph Hellwig	help
1619ec776ef6SChristoph Hellwig	  Treat memory marked using the non-standard e820 type of 12 as used
1620ec776ef6SChristoph Hellwig	  by the Intel Sandy Bridge-EP reference BIOS as protected memory.
1621ec776ef6SChristoph Hellwig	  The kernel will offer these regions to the 'pmem' driver so
1622ec776ef6SChristoph Hellwig	  they can be used for persistent storage.
1623ec776ef6SChristoph Hellwig
1624ec776ef6SChristoph Hellwig	  Say Y if unsure.
1625ec776ef6SChristoph Hellwig
16269f077871SJeremy Fitzhardingeconfig X86_CHECK_BIOS_CORRUPTION
16279f077871SJeremy Fitzhardinge	bool "Check for low memory corruption"
1628a7f7f624SMasahiro Yamada	help
16299f077871SJeremy Fitzhardinge	  Periodically check for memory corruption in low memory, which
16309f077871SJeremy Fitzhardinge	  is suspected to be caused by BIOS.  Even when enabled in the
16319f077871SJeremy Fitzhardinge	  configuration, it is disabled at runtime.  Enable it by
16329f077871SJeremy Fitzhardinge	  setting "memory_corruption_check=1" on the kernel command
16339f077871SJeremy Fitzhardinge	  line.  By default it scans the low 64k of memory every 60
16349f077871SJeremy Fitzhardinge	  seconds; see the memory_corruption_check_size and
16359f077871SJeremy Fitzhardinge	  memory_corruption_check_period parameters in
16368c27ceffSMauro Carvalho Chehab	  Documentation/admin-guide/kernel-parameters.rst to adjust this.
16379f077871SJeremy Fitzhardinge
16389f077871SJeremy Fitzhardinge	  When enabled with the default parameters, this option has
16399f077871SJeremy Fitzhardinge	  almost no overhead, as it reserves a relatively small amount
16409f077871SJeremy Fitzhardinge	  of memory and scans it infrequently.  It both detects corruption
16419f077871SJeremy Fitzhardinge	  and prevents it from affecting the running system.
16429f077871SJeremy Fitzhardinge
16439f077871SJeremy Fitzhardinge	  It is, however, intended as a diagnostic tool; if repeatable
16449f077871SJeremy Fitzhardinge	  BIOS-originated corruption always affects the same memory,
16459f077871SJeremy Fitzhardinge	  you can use memmap= to prevent the kernel from using that
16469f077871SJeremy Fitzhardinge	  memory.
16479f077871SJeremy Fitzhardinge
1648c885df50SJeremy Fitzhardingeconfig X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
1649c885df50SJeremy Fitzhardinge	bool "Set the default setting of memory_corruption_check"
1650c885df50SJeremy Fitzhardinge	depends on X86_CHECK_BIOS_CORRUPTION
1651c885df50SJeremy Fitzhardinge	default y
1652a7f7f624SMasahiro Yamada	help
1653c885df50SJeremy Fitzhardinge	  Set whether the default state of memory_corruption_check is
1654c885df50SJeremy Fitzhardinge	  on or off.
1655c885df50SJeremy Fitzhardinge
1656506f1d07SSam Ravnborgconfig MATH_EMULATION
1657506f1d07SSam Ravnborg	bool
1658a5b9e5a2SAndy Lutomirski	depends on MODIFY_LDT_SYSCALL
165987d6021bSArnd Bergmann	prompt "Math emulation" if X86_32 && (M486SX || MELAN)
1660a7f7f624SMasahiro Yamada	help
1661506f1d07SSam Ravnborg	  Linux can emulate a math coprocessor (used for floating point
1662506f1d07SSam Ravnborg	  operations) if you don't have one. 486DX and Pentium processors have
1663506f1d07SSam Ravnborg	  a math coprocessor built in, 486SX and 386 do not, unless you added
1664506f1d07SSam Ravnborg	  a 487DX or 387, respectively. (The messages during boot time can
1665506f1d07SSam Ravnborg	  give you some hints here ["man dmesg"].) Everyone needs either a
1666506f1d07SSam Ravnborg	  coprocessor or this emulation.
1667506f1d07SSam Ravnborg
1668506f1d07SSam Ravnborg	  If you don't have a math coprocessor, you need to say Y here; if you
1669506f1d07SSam Ravnborg	  say Y here even though you have a coprocessor, the coprocessor will
1670506f1d07SSam Ravnborg	  be used nevertheless. (This behavior can be changed with the kernel
1671506f1d07SSam Ravnborg	  command line option "no387", which comes handy if your coprocessor
1672506f1d07SSam Ravnborg	  is broken. Try "man bootparam" or see the documentation of your boot
1673506f1d07SSam Ravnborg	  loader (lilo or loadlin) about how to pass options to the kernel at
1674506f1d07SSam Ravnborg	  boot time.) This means that it is a good idea to say Y here if you
1675506f1d07SSam Ravnborg	  intend to use this kernel on different machines.
1676506f1d07SSam Ravnborg
1677506f1d07SSam Ravnborg	  More information about the internals of the Linux math coprocessor
1678506f1d07SSam Ravnborg	  emulation can be found in <file:arch/x86/math-emu/README>.
1679506f1d07SSam Ravnborg
1680506f1d07SSam Ravnborg	  If you are not sure, say Y; apart from resulting in a 66 KB bigger
1681506f1d07SSam Ravnborg	  kernel, it won't hurt.
1682506f1d07SSam Ravnborg
1683506f1d07SSam Ravnborgconfig MTRR
16846fc108a0SJan Beulich	def_bool y
16856a108a14SDavid Rientjes	prompt "MTRR (Memory Type Range Register) support" if EXPERT
1686a7f7f624SMasahiro Yamada	help
1687506f1d07SSam Ravnborg	  On Intel P6 family processors (Pentium Pro, Pentium II and later)
1688506f1d07SSam Ravnborg	  the Memory Type Range Registers (MTRRs) may be used to control
1689506f1d07SSam Ravnborg	  processor access to memory ranges. This is most useful if you have
1690506f1d07SSam Ravnborg	  a video (VGA) card on a PCI or AGP bus. Enabling write-combining
1691506f1d07SSam Ravnborg	  allows bus write transfers to be combined into a larger transfer
1692506f1d07SSam Ravnborg	  before bursting over the PCI/AGP bus. This can increase performance
1693506f1d07SSam Ravnborg	  of image write operations 2.5 times or more. Saying Y here creates a
1694506f1d07SSam Ravnborg	  /proc/mtrr file which may be used to manipulate your processor's
1695506f1d07SSam Ravnborg	  MTRRs. Typically the X server should use this.
1696506f1d07SSam Ravnborg
1697506f1d07SSam Ravnborg	  This code has a reasonably generic interface so that similar
1698506f1d07SSam Ravnborg	  control registers on other processors can be easily supported
1699506f1d07SSam Ravnborg	  as well:
1700506f1d07SSam Ravnborg
1701506f1d07SSam Ravnborg	  The Cyrix 6x86, 6x86MX and M II processors have Address Range
1702506f1d07SSam Ravnborg	  Registers (ARRs) which provide a similar functionality to MTRRs. For
1703506f1d07SSam Ravnborg	  these, the ARRs are used to emulate the MTRRs.
1704506f1d07SSam Ravnborg	  The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
1705506f1d07SSam Ravnborg	  MTRRs. The Centaur C6 (WinChip) has 8 MCRs, allowing
1706506f1d07SSam Ravnborg	  write-combining. All of these processors are supported by this code
1707506f1d07SSam Ravnborg	  and it makes sense to say Y here if you have one of them.
1708506f1d07SSam Ravnborg
1709506f1d07SSam Ravnborg	  Saying Y here also fixes a problem with buggy SMP BIOSes which only
1710506f1d07SSam Ravnborg	  set the MTRRs for the boot CPU and not for the secondary CPUs. This
1711506f1d07SSam Ravnborg	  can lead to all sorts of problems, so it's good to say Y here.
1712506f1d07SSam Ravnborg
1713506f1d07SSam Ravnborg	  You can safely say Y even if your machine doesn't have MTRRs, you'll
1714506f1d07SSam Ravnborg	  just add about 9 KB to your kernel.
1715506f1d07SSam Ravnborg
1716ff61f079SJonathan Corbet	  See <file:Documentation/arch/x86/mtrr.rst> for more information.
1717506f1d07SSam Ravnborg
171895ffa243SYinghai Luconfig MTRR_SANITIZER
17192ffb3501SYinghai Lu	def_bool y
172095ffa243SYinghai Lu	prompt "MTRR cleanup support"
172195ffa243SYinghai Lu	depends on MTRR
1722a7f7f624SMasahiro Yamada	help
1723aba3728cSThomas Gleixner	  Convert MTRR layout from continuous to discrete, so X drivers can
1724aba3728cSThomas Gleixner	  add writeback entries.
172595ffa243SYinghai Lu
1726aba3728cSThomas Gleixner	  Can be disabled with disable_mtrr_cleanup on the kernel command line.
1727692105b8SMatt LaPlante	  The largest mtrr entry size for a continuous block can be set with
1728aba3728cSThomas Gleixner	  mtrr_chunk_size.
172995ffa243SYinghai Lu
17302ffb3501SYinghai Lu	  If unsure, say Y.
173195ffa243SYinghai Lu
173295ffa243SYinghai Luconfig MTRR_SANITIZER_ENABLE_DEFAULT
1733f5098d62SYinghai Lu	int "MTRR cleanup enable value (0-1)"
1734f5098d62SYinghai Lu	range 0 1
1735f5098d62SYinghai Lu	default "0"
173695ffa243SYinghai Lu	depends on MTRR_SANITIZER
1737a7f7f624SMasahiro Yamada	help
1738f5098d62SYinghai Lu	  Enable mtrr cleanup default value
173995ffa243SYinghai Lu
174012031a62SYinghai Luconfig MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
174112031a62SYinghai Lu	int "MTRR cleanup spare reg num (0-7)"
174212031a62SYinghai Lu	range 0 7
174312031a62SYinghai Lu	default "1"
174412031a62SYinghai Lu	depends on MTRR_SANITIZER
1745a7f7f624SMasahiro Yamada	help
174612031a62SYinghai Lu	  mtrr cleanup spare entries default, it can be changed via
1747aba3728cSThomas Gleixner	  mtrr_spare_reg_nr=N on the kernel command line.
174812031a62SYinghai Lu
17492e5d9c85Svenkatesh.pallipadi@intel.comconfig X86_PAT
17506fc108a0SJan Beulich	def_bool y
17516a108a14SDavid Rientjes	prompt "x86 PAT support" if EXPERT
17522a8a2719SIngo Molnar	depends on MTRR
17537a87225aSMatthew Wilcox (Oracle)	select ARCH_USES_PG_ARCH_2
1754a7f7f624SMasahiro Yamada	help
17552e5d9c85Svenkatesh.pallipadi@intel.com	  Use PAT attributes to setup page level cache control.
1756042b78e4SVenki Pallipadi
17572e5d9c85Svenkatesh.pallipadi@intel.com	  PATs are the modern equivalents of MTRRs and are much more
17582e5d9c85Svenkatesh.pallipadi@intel.com	  flexible than MTRRs.
17592e5d9c85Svenkatesh.pallipadi@intel.com
17602e5d9c85Svenkatesh.pallipadi@intel.com	  Say N here if you see bootup problems (boot crash, boot hang,
1761042b78e4SVenki Pallipadi	  spontaneous reboots) or a non-working video driver.
17622e5d9c85Svenkatesh.pallipadi@intel.com
17632e5d9c85Svenkatesh.pallipadi@intel.com	  If unsure, say Y.
17642e5d9c85Svenkatesh.pallipadi@intel.com
1765b971880fSBabu Mogerconfig X86_UMIP
1766796ebc81SRicardo Neri	def_bool y
1767b971880fSBabu Moger	prompt "User Mode Instruction Prevention" if EXPERT
1768a7f7f624SMasahiro Yamada	help
1769b971880fSBabu Moger	  User Mode Instruction Prevention (UMIP) is a security feature in
1770b971880fSBabu Moger	  some x86 processors. If enabled, a general protection fault is
1771b971880fSBabu Moger	  issued if the SGDT, SLDT, SIDT, SMSW or STR instructions are
1772b971880fSBabu Moger	  executed in user mode. These instructions unnecessarily expose
1773b971880fSBabu Moger	  information about the hardware state.
1774796ebc81SRicardo Neri
1775796ebc81SRicardo Neri	  The vast majority of applications do not use these instructions.
1776796ebc81SRicardo Neri	  For the very few that do, software emulation is provided in
1777796ebc81SRicardo Neri	  specific cases in protected and virtual-8086 modes. Emulated
1778796ebc81SRicardo Neri	  results are dummy.
1779aa35f896SRicardo Neri
1780156ff4a5SPeter Zijlstraconfig CC_HAS_IBT
1781156ff4a5SPeter Zijlstra	# GCC >= 9 and binutils >= 2.29
1782156ff4a5SPeter Zijlstra	# Retpoline check to work around https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93654
1783156ff4a5SPeter Zijlstra	# Clang/LLVM >= 14
1784262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/e0b89df2e0f0130881bf6c39bf31d7f6aac00e0f
1785262448f3SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/dfcf69770bc522b9e411c66454934a37c1f35332
1786156ff4a5SPeter Zijlstra	def_bool ((CC_IS_GCC && $(cc-option, -fcf-protection=branch -mindirect-branch-register)) || \
1787262448f3SNathan Chancellor		  (CC_IS_CLANG && CLANG_VERSION >= 140000)) && \
1788156ff4a5SPeter Zijlstra		  $(as-instr,endbr64)
1789156ff4a5SPeter Zijlstra
179018e66b69SRick Edgecombeconfig X86_CET
179118e66b69SRick Edgecombe	def_bool n
179218e66b69SRick Edgecombe	help
179318e66b69SRick Edgecombe	  CET features configured (Shadow stack or IBT)
179418e66b69SRick Edgecombe
1795156ff4a5SPeter Zijlstraconfig X86_KERNEL_IBT
1796156ff4a5SPeter Zijlstra	prompt "Indirect Branch Tracking"
17974fd5f70cSKees Cook	def_bool y
179803f16cd0SJosh Poimboeuf	depends on X86_64 && CC_HAS_IBT && HAVE_OBJTOOL
1799f6a2c2b2SNathan Chancellor	# https://github.com/llvm/llvm-project/commit/9d7001eba9c4cb311e03cd8cdc231f9e579f2d0f
1800f6a2c2b2SNathan Chancellor	depends on !LD_IS_LLD || LLD_VERSION >= 140000
180103f16cd0SJosh Poimboeuf	select OBJTOOL
180218e66b69SRick Edgecombe	select X86_CET
1803156ff4a5SPeter Zijlstra	help
1804156ff4a5SPeter Zijlstra	  Build the kernel with support for Indirect Branch Tracking, a
1805156ff4a5SPeter Zijlstra	  hardware support course-grain forward-edge Control Flow Integrity
1806156ff4a5SPeter Zijlstra	  protection. It enforces that all indirect calls must land on
1807156ff4a5SPeter Zijlstra	  an ENDBR instruction, as such, the compiler will instrument the
1808156ff4a5SPeter Zijlstra	  code with them to make this happen.
1809156ff4a5SPeter Zijlstra
1810ed53a0d9SPeter Zijlstra	  In addition to building the kernel with IBT, seal all functions that
18114cdfc11bSNur Hussein	  are not indirect call targets, avoiding them ever becoming one.
1812ed53a0d9SPeter Zijlstra
1813ed53a0d9SPeter Zijlstra	  This requires LTO like objtool runs and will slow down the build. It
1814ed53a0d9SPeter Zijlstra	  does significantly reduce the number of ENDBR instructions in the
1815ed53a0d9SPeter Zijlstra	  kernel image.
1816ed53a0d9SPeter Zijlstra
181735e97790SDave Hansenconfig X86_INTEL_MEMORY_PROTECTION_KEYS
181838f3e775SBabu Moger	prompt "Memory Protection Keys"
181935e97790SDave Hansen	def_bool y
1820284244a9SDave Hansen	# Note: only available in 64-bit mode
182138f3e775SBabu Moger	depends on X86_64 && (CPU_SUP_INTEL || CPU_SUP_AMD)
182252c8e601SIngo Molnar	select ARCH_USES_HIGH_VMA_FLAGS
182352c8e601SIngo Molnar	select ARCH_HAS_PKEYS
1824a7f7f624SMasahiro Yamada	help
1825284244a9SDave Hansen	  Memory Protection Keys provides a mechanism for enforcing
1826284244a9SDave Hansen	  page-based protections, but without requiring modification of the
1827284244a9SDave Hansen	  page tables when an application changes protection domains.
1828284244a9SDave Hansen
18291eecbcdcSMauro Carvalho Chehab	  For details, see Documentation/core-api/protection-keys.rst
1830284244a9SDave Hansen
1831284244a9SDave Hansen	  If unsure, say y.
183235e97790SDave Hansen
18335626f8d4SJoey Goulyconfig ARCH_PKEY_BITS
18345626f8d4SJoey Gouly	int
18355626f8d4SJoey Gouly	default 4
18365626f8d4SJoey Gouly
1837db616173SMichal Hockochoice
1838db616173SMichal Hocko	prompt "TSX enable mode"
1839db616173SMichal Hocko	depends on CPU_SUP_INTEL
1840db616173SMichal Hocko	default X86_INTEL_TSX_MODE_OFF
1841db616173SMichal Hocko	help
1842db616173SMichal Hocko	  Intel's TSX (Transactional Synchronization Extensions) feature
1843db616173SMichal Hocko	  allows to optimize locking protocols through lock elision which
1844db616173SMichal Hocko	  can lead to a noticeable performance boost.
1845db616173SMichal Hocko
1846db616173SMichal Hocko	  On the other hand it has been shown that TSX can be exploited
1847db616173SMichal Hocko	  to form side channel attacks (e.g. TAA) and chances are there
1848db616173SMichal Hocko	  will be more of those attacks discovered in the future.
1849db616173SMichal Hocko
1850db616173SMichal Hocko	  Therefore TSX is not enabled by default (aka tsx=off). An admin
1851db616173SMichal Hocko	  might override this decision by tsx=on the command line parameter.
1852db616173SMichal Hocko	  Even with TSX enabled, the kernel will attempt to enable the best
1853db616173SMichal Hocko	  possible TAA mitigation setting depending on the microcode available
1854db616173SMichal Hocko	  for the particular machine.
1855db616173SMichal Hocko
1856db616173SMichal Hocko	  This option allows to set the default tsx mode between tsx=on, =off
1857db616173SMichal Hocko	  and =auto. See Documentation/admin-guide/kernel-parameters.txt for more
1858db616173SMichal Hocko	  details.
1859db616173SMichal Hocko
1860db616173SMichal Hocko	  Say off if not sure, auto if TSX is in use but it should be used on safe
1861db616173SMichal Hocko	  platforms or on if TSX is in use and the security aspect of tsx is not
1862db616173SMichal Hocko	  relevant.
1863db616173SMichal Hocko
1864db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_OFF
1865db616173SMichal Hocko	bool "off"
1866db616173SMichal Hocko	help
1867db616173SMichal Hocko	  TSX is disabled if possible - equals to tsx=off command line parameter.
1868db616173SMichal Hocko
1869db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_ON
1870db616173SMichal Hocko	bool "on"
1871db616173SMichal Hocko	help
1872db616173SMichal Hocko	  TSX is always enabled on TSX capable HW - equals the tsx=on command
1873db616173SMichal Hocko	  line parameter.
1874db616173SMichal Hocko
1875db616173SMichal Hockoconfig X86_INTEL_TSX_MODE_AUTO
1876db616173SMichal Hocko	bool "auto"
1877db616173SMichal Hocko	help
1878db616173SMichal Hocko	  TSX is enabled on TSX capable HW that is believed to be safe against
1879db616173SMichal Hocko	  side channel attacks- equals the tsx=auto command line parameter.
1880db616173SMichal Hockoendchoice
1881db616173SMichal Hocko
1882e7e05452SSean Christophersonconfig X86_SGX
1883e7e05452SSean Christopherson	bool "Software Guard eXtensions (SGX)"
1884b8d1d163SDaniel Sneddon	depends on X86_64 && CPU_SUP_INTEL && X86_X2APIC
1885e7e05452SSean Christopherson	depends on CRYPTO=y
1886e7e05452SSean Christopherson	depends on CRYPTO_SHA256=y
1887e7e05452SSean Christopherson	select MMU_NOTIFIER
1888901ddbb9SJarkko Sakkinen	select NUMA_KEEP_MEMINFO if NUMA
188940e0e784STony Luck	select XARRAY_MULTI
1890e7e05452SSean Christopherson	help
1891e7e05452SSean Christopherson	  Intel(R) Software Guard eXtensions (SGX) is a set of CPU instructions
1892e7e05452SSean Christopherson	  that can be used by applications to set aside private regions of code
1893e7e05452SSean Christopherson	  and data, referred to as enclaves. An enclave's private memory can
1894e7e05452SSean Christopherson	  only be accessed by code running within the enclave. Accesses from
1895e7e05452SSean Christopherson	  outside the enclave, including other enclaves, are disallowed by
1896e7e05452SSean Christopherson	  hardware.
1897e7e05452SSean Christopherson
1898e7e05452SSean Christopherson	  If unsure, say N.
1899e7e05452SSean Christopherson
190018e66b69SRick Edgecombeconfig X86_USER_SHADOW_STACK
190118e66b69SRick Edgecombe	bool "X86 userspace shadow stack"
190218e66b69SRick Edgecombe	depends on AS_WRUSS
190318e66b69SRick Edgecombe	depends on X86_64
190418e66b69SRick Edgecombe	select ARCH_USES_HIGH_VMA_FLAGS
1905bcc9d04eSMark Brown	select ARCH_HAS_USER_SHADOW_STACK
190618e66b69SRick Edgecombe	select X86_CET
190718e66b69SRick Edgecombe	help
190818e66b69SRick Edgecombe	  Shadow stack protection is a hardware feature that detects function
190918e66b69SRick Edgecombe	  return address corruption.  This helps mitigate ROP attacks.
191018e66b69SRick Edgecombe	  Applications must be enabled to use it, and old userspace does not
191118e66b69SRick Edgecombe	  get protection "for free".
191218e66b69SRick Edgecombe
191318e66b69SRick Edgecombe	  CPUs supporting shadow stacks were first released in 2020.
191418e66b69SRick Edgecombe
191554acee60SDave Hansen	  See Documentation/arch/x86/shstk.rst for more information.
191618e66b69SRick Edgecombe
191718e66b69SRick Edgecombe	  If unsure, say N.
191818e66b69SRick Edgecombe
1919c33621b4SKai Huangconfig INTEL_TDX_HOST
1920c33621b4SKai Huang	bool "Intel Trust Domain Extensions (TDX) host support"
1921c33621b4SKai Huang	depends on CPU_SUP_INTEL
1922c33621b4SKai Huang	depends on X86_64
1923c33621b4SKai Huang	depends on KVM_INTEL
19243115cabdSKai Huang	depends on X86_X2APIC
1925abe8dbabSKai Huang	select ARCH_KEEP_MEMBLOCK
1926ac3a2208SKai Huang	depends on CONTIG_ALLOC
1927cb8eb06dSDave Hansen	depends on !KEXEC_CORE
192883e1bdc9SKai Huang	depends on X86_MCE
1929c33621b4SKai Huang	help
1930c33621b4SKai Huang	  Intel Trust Domain Extensions (TDX) protects guest VMs from malicious
1931c33621b4SKai Huang	  host and certain physical attacks.  This option enables necessary TDX
1932c33621b4SKai Huang	  support in the host kernel to run confidential VMs.
1933c33621b4SKai Huang
1934c33621b4SKai Huang	  If unsure, say N.
1935c33621b4SKai Huang
1936506f1d07SSam Ravnborgconfig EFI
19379ba16087SJan Beulich	bool "EFI runtime service support"
19385b83683fSHuang, Ying	depends on ACPI
1939f6ce5002SSergey Vlasov	select UCS2_STRING
1940022ee6c5SArd Biesheuvel	select EFI_RUNTIME_WRAPPERS
19411ff2fc02STom Lendacky	select ARCH_USE_MEMREMAP_PROT
1942aba7e066SArd Biesheuvel	select EFI_RUNTIME_MAP if KEXEC_CORE
1943a7f7f624SMasahiro Yamada	help
19448b2cb7a8SHuang, Ying	  This enables the kernel to use EFI runtime services that are
1945506f1d07SSam Ravnborg	  available (such as the EFI variable services).
1946506f1d07SSam Ravnborg
19478b2cb7a8SHuang, Ying	  This option is only useful on systems that have EFI firmware.
19488b2cb7a8SHuang, Ying	  In addition, you should use the latest ELILO loader available
19498b2cb7a8SHuang, Ying	  at <http://elilo.sourceforge.net> in order to take advantage
19508b2cb7a8SHuang, Ying	  of EFI runtime services. However, even with this option, the
19518b2cb7a8SHuang, Ying	  resultant kernel should continue to boot on existing non-EFI
19528b2cb7a8SHuang, Ying	  platforms.
1953506f1d07SSam Ravnborg
1954291f3632SMatt Flemingconfig EFI_STUB
1955291f3632SMatt Fleming	bool "EFI stub support"
1956c6dbd3e5SPeter Zijlstra	depends on EFI
19577b2a583aSMatt Fleming	select RELOCATABLE
1958a7f7f624SMasahiro Yamada	help
1959291f3632SMatt Fleming	  This kernel feature allows a bzImage to be loaded directly
1960291f3632SMatt Fleming	  by EFI firmware without the use of a bootloader.
1961291f3632SMatt Fleming
19624f4cfa6cSMauro Carvalho Chehab	  See Documentation/admin-guide/efi-stub.rst for more information.
19630c759662SMatt Fleming
1964cc3fdda2SArd Biesheuvelconfig EFI_HANDOVER_PROTOCOL
1965cc3fdda2SArd Biesheuvel	bool "EFI handover protocol (DEPRECATED)"
1966cc3fdda2SArd Biesheuvel	depends on EFI_STUB
1967cc3fdda2SArd Biesheuvel	default y
1968cc3fdda2SArd Biesheuvel	help
1969cc3fdda2SArd Biesheuvel	  Select this in order to include support for the deprecated EFI
1970cc3fdda2SArd Biesheuvel	  handover protocol, which defines alternative entry points into the
1971cc3fdda2SArd Biesheuvel	  EFI stub.  This is a practice that has no basis in the UEFI
1972cc3fdda2SArd Biesheuvel	  specification, and requires a priori knowledge on the part of the
1973cc3fdda2SArd Biesheuvel	  bootloader about Linux/x86 specific ways of passing the command line
1974cc3fdda2SArd Biesheuvel	  and initrd, and where in memory those assets may be loaded.
1975cc3fdda2SArd Biesheuvel
1976cc3fdda2SArd Biesheuvel	  If in doubt, say Y. Even though the corresponding support is not
1977cc3fdda2SArd Biesheuvel	  present in upstream GRUB or other bootloaders, most distros build
1978cc3fdda2SArd Biesheuvel	  GRUB with numerous downstream patches applied, and may rely on the
1979cc3fdda2SArd Biesheuvel	  handover protocol as as result.
1980cc3fdda2SArd Biesheuvel
19817d453eeeSMatt Flemingconfig EFI_MIXED
19827d453eeeSMatt Fleming	bool "EFI mixed-mode support"
19837d453eeeSMatt Fleming	depends on EFI_STUB && X86_64
1984a7f7f624SMasahiro Yamada	help
19857d453eeeSMatt Fleming	  Enabling this feature allows a 64-bit kernel to be booted
19867d453eeeSMatt Fleming	  on a 32-bit firmware, provided that your CPU supports 64-bit
19877d453eeeSMatt Fleming	  mode.
19887d453eeeSMatt Fleming
19897d453eeeSMatt Fleming	  Note that it is not possible to boot a mixed-mode enabled
19907d453eeeSMatt Fleming	  kernel via the EFI boot stub - a bootloader that supports
19917d453eeeSMatt Fleming	  the EFI handover protocol must be used.
19927d453eeeSMatt Fleming
19937d453eeeSMatt Fleming	  If unsure, say N.
19947d453eeeSMatt Fleming
19951fff234dSArd Biesheuvelconfig EFI_RUNTIME_MAP
19961fff234dSArd Biesheuvel	bool "Export EFI runtime maps to sysfs" if EXPERT
19971fff234dSArd Biesheuvel	depends on EFI
19981fff234dSArd Biesheuvel	help
19991fff234dSArd Biesheuvel	  Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
20001fff234dSArd Biesheuvel	  That memory map is required by the 2nd kernel to set up EFI virtual
20011fff234dSArd Biesheuvel	  mappings after kexec, but can also be used for debugging purposes.
20021fff234dSArd Biesheuvel
20031fff234dSArd Biesheuvel	  See also Documentation/ABI/testing/sysfs-firmware-efi-runtime-map.
20041fff234dSArd Biesheuvel
20058636a1f9SMasahiro Yamadasource "kernel/Kconfig.hz"
2006506f1d07SSam Ravnborg
20076af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC
20086af51380SEric DeVolder	def_bool y
2009506f1d07SSam Ravnborg
20106af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_FILE
2011c1ad12eeSArnd Bergmann	def_bool X86_64
2012506f1d07SSam Ravnborg
20136af51380SEric DeVolderconfig ARCH_SELECTS_KEXEC_FILE
20146af51380SEric DeVolder	def_bool y
20156af51380SEric DeVolder	depends on KEXEC_FILE
2016b69a2afdSJonathan McDowell	select HAVE_IMA_KEXEC if IMA
201774ca317cSVivek Goyal
2018e6265fe7SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_PURGATORY
2019c1ad12eeSArnd Bergmann	def_bool y
2020b799a09fSAKASHI Takahiro
20216af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG
20226af51380SEric DeVolder	def_bool y
202399d5cadfSJiri Bohac
20246af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_SIG_FORCE
20256af51380SEric DeVolder	def_bool y
202699d5cadfSJiri Bohac
20276af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG
20286af51380SEric DeVolder	def_bool y
202999d5cadfSJiri Bohac
20306af51380SEric DeVolderconfig ARCH_SUPPORTS_KEXEC_JUMP
20316af51380SEric DeVolder	def_bool y
20328e7d8381SVivek Goyal
20336af51380SEric DeVolderconfig ARCH_SUPPORTS_CRASH_DUMP
20346af51380SEric DeVolder	def_bool X86_64 || (X86_32 && HIGHMEM)
20358e7d8381SVivek Goyal
203631daa343SDave Vasilevskyconfig ARCH_DEFAULT_CRASH_DUMP
203731daa343SDave Vasilevsky	def_bool y
203831daa343SDave Vasilevsky
2039ea53ad9cSEric DeVolderconfig ARCH_SUPPORTS_CRASH_HOTPLUG
2040ea53ad9cSEric DeVolder	def_bool y
20413ab83521SHuang Ying
20429c08a2a1SBaoquan Heconfig ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
204385fcde40SBaoquan He	def_bool CRASH_RESERVE
20449c08a2a1SBaoquan He
2045506f1d07SSam Ravnborgconfig PHYSICAL_START
20466a108a14SDavid Rientjes	hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
2047ceefccc9SH. Peter Anvin	default "0x1000000"
2048a7f7f624SMasahiro Yamada	help
2049506f1d07SSam Ravnborg	  This gives the physical address where the kernel is loaded.
2050506f1d07SSam Ravnborg
205143b1d3e6SChris Koch	  If the kernel is not relocatable (CONFIG_RELOCATABLE=n) then bzImage
205243b1d3e6SChris Koch	  will decompress itself to above physical address and run from there.
205343b1d3e6SChris Koch	  Otherwise, bzImage will run from the address where it has been loaded
205443b1d3e6SChris Koch	  by the boot loader. The only exception is if it is loaded below the
205543b1d3e6SChris Koch	  above physical address, in which case it will relocate itself there.
2056506f1d07SSam Ravnborg
2057506f1d07SSam Ravnborg	  In normal kdump cases one does not have to set/change this option
2058506f1d07SSam Ravnborg	  as now bzImage can be compiled as a completely relocatable image
2059506f1d07SSam Ravnborg	  (CONFIG_RELOCATABLE=y) and be used to load and run from a different
2060506f1d07SSam Ravnborg	  address. This option is mainly useful for the folks who don't want
2061506f1d07SSam Ravnborg	  to use a bzImage for capturing the crash dump and want to use a
2062506f1d07SSam Ravnborg	  vmlinux instead. vmlinux is not relocatable hence a kernel needs
2063506f1d07SSam Ravnborg	  to be specifically compiled to run from a specific memory area
2064506f1d07SSam Ravnborg	  (normally a reserved region) and this option comes handy.
2065506f1d07SSam Ravnborg
2066ceefccc9SH. Peter Anvin	  So if you are using bzImage for capturing the crash dump,
2067ceefccc9SH. Peter Anvin	  leave the value here unchanged to 0x1000000 and set
2068ceefccc9SH. Peter Anvin	  CONFIG_RELOCATABLE=y.  Otherwise if you plan to use vmlinux
2069ceefccc9SH. Peter Anvin	  for capturing the crash dump change this value to start of
2070ceefccc9SH. Peter Anvin	  the reserved region.  In other words, it can be set based on
2071ceefccc9SH. Peter Anvin	  the "X" value as specified in the "crashkernel=YM@XM"
2072ceefccc9SH. Peter Anvin	  command line boot parameter passed to the panic-ed
2073330d4810SMauro Carvalho Chehab	  kernel. Please take a look at Documentation/admin-guide/kdump/kdump.rst
2074ceefccc9SH. Peter Anvin	  for more details about crash dumps.
2075506f1d07SSam Ravnborg
2076506f1d07SSam Ravnborg	  Usage of bzImage for capturing the crash dump is recommended as
2077506f1d07SSam Ravnborg	  one does not have to build two kernels. Same kernel can be used
2078506f1d07SSam Ravnborg	  as production kernel and capture kernel. Above option should have
2079506f1d07SSam Ravnborg	  gone away after relocatable bzImage support is introduced. But it
2080506f1d07SSam Ravnborg	  is present because there are users out there who continue to use
2081506f1d07SSam Ravnborg	  vmlinux for dump capture. This option should go away down the
2082506f1d07SSam Ravnborg	  line.
2083506f1d07SSam Ravnborg
2084506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2085506f1d07SSam Ravnborg
2086506f1d07SSam Ravnborgconfig RELOCATABLE
208726717808SH. Peter Anvin	bool "Build a relocatable kernel"
208826717808SH. Peter Anvin	default y
2089a7f7f624SMasahiro Yamada	help
2090506f1d07SSam Ravnborg	  This builds a kernel image that retains relocation information
2091506f1d07SSam Ravnborg	  so it can be loaded someplace besides the default 1MB.
2092506f1d07SSam Ravnborg	  The relocations tend to make the kernel binary about 10% larger,
2093506f1d07SSam Ravnborg	  but are discarded at runtime.
2094506f1d07SSam Ravnborg
2095506f1d07SSam Ravnborg	  One use is for the kexec on panic case where the recovery kernel
2096506f1d07SSam Ravnborg	  must live at a different physical address than the primary
2097506f1d07SSam Ravnborg	  kernel.
2098506f1d07SSam Ravnborg
2099506f1d07SSam Ravnborg	  Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
2100506f1d07SSam Ravnborg	  it has been loaded at and the compile time physical address
21018ab3820fSKees Cook	  (CONFIG_PHYSICAL_START) is used as the minimum location.
2102506f1d07SSam Ravnborg
21038ab3820fSKees Cookconfig RANDOMIZE_BASE
2104e8581e3dSBaoquan He	bool "Randomize the address of the kernel image (KASLR)"
21058ab3820fSKees Cook	depends on RELOCATABLE
21066807c846SIngo Molnar	default y
2107a7f7f624SMasahiro Yamada	help
2108e8581e3dSBaoquan He	  In support of Kernel Address Space Layout Randomization (KASLR),
2109e8581e3dSBaoquan He	  this randomizes the physical address at which the kernel image
2110e8581e3dSBaoquan He	  is decompressed and the virtual address where the kernel
2111e8581e3dSBaoquan He	  image is mapped, as a security feature that deters exploit
2112e8581e3dSBaoquan He	  attempts relying on knowledge of the location of kernel
2113e8581e3dSBaoquan He	  code internals.
2114e8581e3dSBaoquan He
2115ed9f007eSKees Cook	  On 64-bit, the kernel physical and virtual addresses are
2116ed9f007eSKees Cook	  randomized separately. The physical address will be anywhere
2117ed9f007eSKees Cook	  between 16MB and the top of physical memory (up to 64TB). The
2118ed9f007eSKees Cook	  virtual address will be randomized from 16MB up to 1GB (9 bits
2119ed9f007eSKees Cook	  of entropy). Note that this also reduces the memory space
2120ed9f007eSKees Cook	  available to kernel modules from 1.5GB to 1GB.
2121ed9f007eSKees Cook
2122ed9f007eSKees Cook	  On 32-bit, the kernel physical and virtual addresses are
2123ed9f007eSKees Cook	  randomized together. They will be randomized from 16MB up to
2124ed9f007eSKees Cook	  512MB (8 bits of entropy).
21258ab3820fSKees Cook
2126a653f356SKees Cook	  Entropy is generated using the RDRAND instruction if it is
2127e8581e3dSBaoquan He	  supported. If RDTSC is supported, its value is mixed into
2128e8581e3dSBaoquan He	  the entropy pool as well. If neither RDRAND nor RDTSC are
2129ed9f007eSKees Cook	  supported, then entropy is read from the i8254 timer. The
2130ed9f007eSKees Cook	  usable entropy is limited by the kernel being built using
2131ed9f007eSKees Cook	  2GB addressing, and that PHYSICAL_ALIGN must be at a
2132ed9f007eSKees Cook	  minimum of 2MB. As a result, only 10 bits of entropy are
2133ed9f007eSKees Cook	  theoretically possible, but the implementations are further
2134ed9f007eSKees Cook	  limited due to memory layouts.
2135e8581e3dSBaoquan He
21366807c846SIngo Molnar	  If unsure, say Y.
2137da2b6fb9SKees Cook
21388ab3820fSKees Cook# Relocation on x86 needs some additional build support
2139845adf72SH. Peter Anvinconfig X86_NEED_RELOCS
2140845adf72SH. Peter Anvin	def_bool y
21418ab3820fSKees Cook	depends on RANDOMIZE_BASE || (X86_32 && RELOCATABLE)
21429b400d17SArd Biesheuvel	select ARCH_VMLINUX_NEEDS_RELOCS
2143845adf72SH. Peter Anvin
2144506f1d07SSam Ravnborgconfig PHYSICAL_ALIGN
2145a0215061SKees Cook	hex "Alignment value to which kernel should be aligned"
21468ab3820fSKees Cook	default "0x200000"
2147a0215061SKees Cook	range 0x2000 0x1000000 if X86_32
2148a0215061SKees Cook	range 0x200000 0x1000000 if X86_64
2149a7f7f624SMasahiro Yamada	help
2150506f1d07SSam Ravnborg	  This value puts the alignment restrictions on physical address
2151506f1d07SSam Ravnborg	  where kernel is loaded and run from. Kernel is compiled for an
2152506f1d07SSam Ravnborg	  address which meets above alignment restriction.
2153506f1d07SSam Ravnborg
2154506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2155506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is set, kernel will move itself to nearest
2156506f1d07SSam Ravnborg	  address aligned to above value and run from there.
2157506f1d07SSam Ravnborg
2158506f1d07SSam Ravnborg	  If bootloader loads the kernel at a non-aligned address and
2159506f1d07SSam Ravnborg	  CONFIG_RELOCATABLE is not set, kernel will ignore the run time
2160506f1d07SSam Ravnborg	  load address and decompress itself to the address it has been
2161506f1d07SSam Ravnborg	  compiled for and run from there. The address for which kernel is
2162506f1d07SSam Ravnborg	  compiled already meets above alignment restrictions. Hence the
2163506f1d07SSam Ravnborg	  end result is that kernel runs from a physical address meeting
2164506f1d07SSam Ravnborg	  above alignment restrictions.
2165506f1d07SSam Ravnborg
2166a0215061SKees Cook	  On 32-bit this value must be a multiple of 0x2000. On 64-bit
2167a0215061SKees Cook	  this value must be a multiple of 0x200000.
2168a0215061SKees Cook
2169506f1d07SSam Ravnborg	  Don't change this unless you know what you are doing.
2170506f1d07SSam Ravnborg
2171eedb92abSKirill A. Shutemovconfig DYNAMIC_MEMORY_LAYOUT
2172eedb92abSKirill A. Shutemov	bool
2173a7f7f624SMasahiro Yamada	help
2174eedb92abSKirill A. Shutemov	  This option makes base addresses of vmalloc and vmemmap as well as
2175eedb92abSKirill A. Shutemov	  __PAGE_OFFSET movable during boot.
2176eedb92abSKirill A. Shutemov
21770483e1faSThomas Garnierconfig RANDOMIZE_MEMORY
21780483e1faSThomas Garnier	bool "Randomize the kernel memory sections"
21790483e1faSThomas Garnier	depends on X86_64
21800483e1faSThomas Garnier	depends on RANDOMIZE_BASE
2181eedb92abSKirill A. Shutemov	select DYNAMIC_MEMORY_LAYOUT
21820483e1faSThomas Garnier	default RANDOMIZE_BASE
2183a7f7f624SMasahiro Yamada	help
21840483e1faSThomas Garnier	  Randomizes the base virtual address of kernel memory sections
21850483e1faSThomas Garnier	  (physical memory mapping, vmalloc & vmemmap). This security feature
21860483e1faSThomas Garnier	  makes exploits relying on predictable memory locations less reliable.
21870483e1faSThomas Garnier
21880483e1faSThomas Garnier	  The order of allocations remains unchanged. Entropy is generated in
21890483e1faSThomas Garnier	  the same way as RANDOMIZE_BASE. Current implementation in the optimal
21900483e1faSThomas Garnier	  configuration have in average 30,000 different possible virtual
21910483e1faSThomas Garnier	  addresses for each memory section.
21920483e1faSThomas Garnier
21936807c846SIngo Molnar	  If unsure, say Y.
21940483e1faSThomas Garnier
219590397a41SThomas Garnierconfig RANDOMIZE_MEMORY_PHYSICAL_PADDING
219690397a41SThomas Garnier	hex "Physical memory mapping padding" if EXPERT
219790397a41SThomas Garnier	depends on RANDOMIZE_MEMORY
219890397a41SThomas Garnier	default "0xa" if MEMORY_HOTPLUG
219990397a41SThomas Garnier	default "0x0"
220090397a41SThomas Garnier	range 0x1 0x40 if MEMORY_HOTPLUG
220190397a41SThomas Garnier	range 0x0 0x40
2202a7f7f624SMasahiro Yamada	help
220390397a41SThomas Garnier	  Define the padding in terabytes added to the existing physical
220490397a41SThomas Garnier	  memory size during kernel memory randomization. It is useful
220590397a41SThomas Garnier	  for memory hotplug support but reduces the entropy available for
220690397a41SThomas Garnier	  address randomization.
220790397a41SThomas Garnier
220890397a41SThomas Garnier	  If unsure, leave at the default value.
220990397a41SThomas Garnier
22106449dcb0SKirill A. Shutemovconfig ADDRESS_MASKING
22116449dcb0SKirill A. Shutemov	bool "Linear Address Masking support"
22126449dcb0SKirill A. Shutemov	depends on X86_64
22133267cb6dSPawan Gupta	depends on COMPILE_TEST || !CPU_MITIGATIONS # wait for LASS
22146449dcb0SKirill A. Shutemov	help
22156449dcb0SKirill A. Shutemov	  Linear Address Masking (LAM) modifies the checking that is applied
22166449dcb0SKirill A. Shutemov	  to 64-bit linear addresses, allowing software to use of the
22176449dcb0SKirill A. Shutemov	  untranslated address bits for metadata.
22186449dcb0SKirill A. Shutemov
22196449dcb0SKirill A. Shutemov	  The capability can be used for efficient address sanitizers (ASAN)
22206449dcb0SKirill A. Shutemov	  implementation and for optimizations in JITs.
22216449dcb0SKirill A. Shutemov
2222506f1d07SSam Ravnborgconfig HOTPLUG_CPU
2223bebd024eSThomas Gleixner	def_bool y
222440b31360SStephen Rothwell	depends on SMP
2225506f1d07SSam Ravnborg
2226506f1d07SSam Ravnborgconfig COMPAT_VDSO
2227b0b49f26SAndy Lutomirski	def_bool n
2228de711563SMateusz Jończyk	prompt "Workaround for glibc 2.3.2 / 2.3.3 (released in year 2003/2004)"
2229953fee1dSIngo Molnar	depends on COMPAT_32
2230a7f7f624SMasahiro Yamada	help
2231b0b49f26SAndy Lutomirski	  Certain buggy versions of glibc will crash if they are
2232b0b49f26SAndy Lutomirski	  presented with a 32-bit vDSO that is not mapped at the address
2233b0b49f26SAndy Lutomirski	  indicated in its segment table.
2234e84446deSRandy Dunlap
2235b0b49f26SAndy Lutomirski	  The bug was introduced by f866314b89d56845f55e6f365e18b31ec978ec3a
2236b0b49f26SAndy Lutomirski	  and fixed by 3b3ddb4f7db98ec9e912ccdf54d35df4aa30e04a and
2237b0b49f26SAndy Lutomirski	  49ad572a70b8aeb91e57483a11dd1b77e31c4468.  Glibc 2.3.3 is
2238b0b49f26SAndy Lutomirski	  the only released version with the bug, but OpenSUSE 9
2239b0b49f26SAndy Lutomirski	  contains a buggy "glibc 2.3.2".
2240506f1d07SSam Ravnborg
2241b0b49f26SAndy Lutomirski	  The symptom of the bug is that everything crashes on startup, saying:
2242b0b49f26SAndy Lutomirski	  dl_main: Assertion `(void *) ph->p_vaddr == _rtld_local._dl_sysinfo_dso' failed!
2243b0b49f26SAndy Lutomirski
2244b0b49f26SAndy Lutomirski	  Saying Y here changes the default value of the vdso32 boot
2245b0b49f26SAndy Lutomirski	  option from 1 to 0, which turns off the 32-bit vDSO entirely.
2246b0b49f26SAndy Lutomirski	  This works around the glibc bug but hurts performance.
2247b0b49f26SAndy Lutomirski
2248b0b49f26SAndy Lutomirski	  If unsure, say N: if you are compiling your own kernel, you
2249b0b49f26SAndy Lutomirski	  are unlikely to be using a buggy version of glibc.
2250506f1d07SSam Ravnborg
22513dc33bd3SKees Cookchoice
22523dc33bd3SKees Cook	prompt "vsyscall table for legacy applications"
22533dc33bd3SKees Cook	depends on X86_64
2254625b7b7fSAndy Lutomirski	default LEGACY_VSYSCALL_XONLY
22553dc33bd3SKees Cook	help
22563dc33bd3SKees Cook	  Legacy user code that does not know how to find the vDSO expects
22573dc33bd3SKees Cook	  to be able to issue three syscalls by calling fixed addresses in
22583dc33bd3SKees Cook	  kernel space. Since this location is not randomized with ASLR,
22593dc33bd3SKees Cook	  it can be used to assist security vulnerability exploitation.
22603dc33bd3SKees Cook
22613dc33bd3SKees Cook	  This setting can be changed at boot time via the kernel command
2262bf00745eSAndy Lutomirski	  line parameter vsyscall=[emulate|xonly|none].  Emulate mode
2263bf00745eSAndy Lutomirski	  is deprecated and can only be enabled using the kernel command
2264bf00745eSAndy Lutomirski	  line.
22653dc33bd3SKees Cook
22663dc33bd3SKees Cook	  On a system with recent enough glibc (2.14 or newer) and no
22673dc33bd3SKees Cook	  static binaries, you can say None without a performance penalty
22683dc33bd3SKees Cook	  to improve security.
22693dc33bd3SKees Cook
2270bd49e16eSAndy Lutomirski	  If unsure, select "Emulate execution only".
22713dc33bd3SKees Cook
2272bd49e16eSAndy Lutomirski	config LEGACY_VSYSCALL_XONLY
2273bd49e16eSAndy Lutomirski		bool "Emulate execution only"
2274bd49e16eSAndy Lutomirski		help
2275bd49e16eSAndy Lutomirski		  The kernel traps and emulates calls into the fixed vsyscall
2276bd49e16eSAndy Lutomirski		  address mapping and does not allow reads.  This
2277bd49e16eSAndy Lutomirski		  configuration is recommended when userspace might use the
2278bd49e16eSAndy Lutomirski		  legacy vsyscall area but support for legacy binary
2279bd49e16eSAndy Lutomirski		  instrumentation of legacy code is not needed.  It mitigates
2280bd49e16eSAndy Lutomirski		  certain uses of the vsyscall area as an ASLR-bypassing
2281bd49e16eSAndy Lutomirski		  buffer.
22823dc33bd3SKees Cook
22833dc33bd3SKees Cook	config LEGACY_VSYSCALL_NONE
22843dc33bd3SKees Cook		bool "None"
22853dc33bd3SKees Cook		help
22863dc33bd3SKees Cook		  There will be no vsyscall mapping at all. This will
22873dc33bd3SKees Cook		  eliminate any risk of ASLR bypass due to the vsyscall
22883dc33bd3SKees Cook		  fixed address mapping. Attempts to use the vsyscalls
22893dc33bd3SKees Cook		  will be reported to dmesg, so that either old or
22903dc33bd3SKees Cook		  malicious userspace programs can be identified.
22913dc33bd3SKees Cook
22923dc33bd3SKees Cookendchoice
22933dc33bd3SKees Cook
2294516cbf37STim Birdconfig CMDLINE_BOOL
2295516cbf37STim Bird	bool "Built-in kernel command line"
2296a7f7f624SMasahiro Yamada	help
2297516cbf37STim Bird	  Allow for specifying boot arguments to the kernel at
2298516cbf37STim Bird	  build time.  On some systems (e.g. embedded ones), it is
2299516cbf37STim Bird	  necessary or convenient to provide some or all of the
2300516cbf37STim Bird	  kernel boot arguments with the kernel itself (that is,
2301516cbf37STim Bird	  to not rely on the boot loader to provide them.)
2302516cbf37STim Bird
2303516cbf37STim Bird	  To compile command line arguments into the kernel,
2304516cbf37STim Bird	  set this option to 'Y', then fill in the
230569711ca1SSébastien Hinderer	  boot arguments in CONFIG_CMDLINE.
2306516cbf37STim Bird
2307516cbf37STim Bird	  Systems with fully functional boot loaders (i.e. non-embedded)
2308516cbf37STim Bird	  should leave this option set to 'N'.
2309516cbf37STim Bird
2310516cbf37STim Birdconfig CMDLINE
2311516cbf37STim Bird	string "Built-in kernel command string"
2312516cbf37STim Bird	depends on CMDLINE_BOOL
2313516cbf37STim Bird	default ""
2314a7f7f624SMasahiro Yamada	help
2315516cbf37STim Bird	  Enter arguments here that should be compiled into the kernel
2316516cbf37STim Bird	  image and used at boot time.  If the boot loader provides a
2317516cbf37STim Bird	  command line at boot time, it is appended to this string to
2318516cbf37STim Bird	  form the full kernel command line, when the system boots.
2319516cbf37STim Bird
2320516cbf37STim Bird	  However, you can use the CONFIG_CMDLINE_OVERRIDE option to
2321516cbf37STim Bird	  change this behavior.
2322516cbf37STim Bird
2323516cbf37STim Bird	  In most cases, the command line (whether built-in or provided
2324516cbf37STim Bird	  by the boot loader) should specify the device for the root
2325516cbf37STim Bird	  file system.
2326516cbf37STim Bird
2327516cbf37STim Birdconfig CMDLINE_OVERRIDE
2328516cbf37STim Bird	bool "Built-in command line overrides boot loader arguments"
2329645e6466SAnders Roxell	depends on CMDLINE_BOOL && CMDLINE != ""
2330a7f7f624SMasahiro Yamada	help
2331516cbf37STim Bird	  Set this option to 'Y' to have the kernel ignore the boot loader
2332516cbf37STim Bird	  command line, and use ONLY the built-in command line.
2333516cbf37STim Bird
2334516cbf37STim Bird	  This is used to work around broken boot loaders.  This should
2335516cbf37STim Bird	  be set to 'N' under normal conditions.
2336516cbf37STim Bird
2337a5b9e5a2SAndy Lutomirskiconfig MODIFY_LDT_SYSCALL
2338a5b9e5a2SAndy Lutomirski	bool "Enable the LDT (local descriptor table)" if EXPERT
2339a5b9e5a2SAndy Lutomirski	default y
2340a7f7f624SMasahiro Yamada	help
2341a5b9e5a2SAndy Lutomirski	  Linux can allow user programs to install a per-process x86
2342a5b9e5a2SAndy Lutomirski	  Local Descriptor Table (LDT) using the modify_ldt(2) system
2343a5b9e5a2SAndy Lutomirski	  call.  This is required to run 16-bit or segmented code such as
2344a5b9e5a2SAndy Lutomirski	  DOSEMU or some Wine programs.  It is also used by some very old
2345a5b9e5a2SAndy Lutomirski	  threading libraries.
2346a5b9e5a2SAndy Lutomirski
2347a5b9e5a2SAndy Lutomirski	  Enabling this feature adds a small amount of overhead to
2348a5b9e5a2SAndy Lutomirski	  context switches and increases the low-level kernel attack
2349a5b9e5a2SAndy Lutomirski	  surface.  Disabling it removes the modify_ldt(2) system call.
2350a5b9e5a2SAndy Lutomirski
2351a5b9e5a2SAndy Lutomirski	  Saying 'N' here may make sense for embedded or server kernels.
2352a5b9e5a2SAndy Lutomirski
23533aac3ebeSThomas Gleixnerconfig STRICT_SIGALTSTACK_SIZE
23543aac3ebeSThomas Gleixner	bool "Enforce strict size checking for sigaltstack"
23553aac3ebeSThomas Gleixner	depends on DYNAMIC_SIGFRAME
23563aac3ebeSThomas Gleixner	help
23573aac3ebeSThomas Gleixner	  For historical reasons MINSIGSTKSZ is a constant which became
23583aac3ebeSThomas Gleixner	  already too small with AVX512 support. Add a mechanism to
23593aac3ebeSThomas Gleixner	  enforce strict checking of the sigaltstack size against the
23603aac3ebeSThomas Gleixner	  real size of the FPU frame. This option enables the check
23613aac3ebeSThomas Gleixner	  by default. It can also be controlled via the kernel command
23623aac3ebeSThomas Gleixner	  line option 'strict_sas_size' independent of this config
23633aac3ebeSThomas Gleixner	  switch. Enabling it might break existing applications which
23643aac3ebeSThomas Gleixner	  allocate a too small sigaltstack but 'work' because they
23653aac3ebeSThomas Gleixner	  never get a signal delivered.
23663aac3ebeSThomas Gleixner
23673aac3ebeSThomas Gleixner	  Say 'N' unless you want to really enforce this check.
23683aac3ebeSThomas Gleixner
2369d6f635bcSKees Cookconfig CFI_AUTO_DEFAULT
2370d6f635bcSKees Cook	bool "Attempt to use FineIBT by default at boot time"
2371d6f635bcSKees Cook	depends on FINEIBT
2372d6f635bcSKees Cook	default y
2373d6f635bcSKees Cook	help
2374d6f635bcSKees Cook	  Attempt to use FineIBT by default at boot time. If enabled,
2375d6f635bcSKees Cook	  this is the same as booting with "cfi=auto". If disabled,
2376d6f635bcSKees Cook	  this is the same as booting with "cfi=kcfi".
2377d6f635bcSKees Cook
2378b700e7f0SSeth Jenningssource "kernel/livepatch/Kconfig"
2379b700e7f0SSeth Jennings
2380350afa8aSRavi Bangoriaconfig X86_BUS_LOCK_DETECT
2381350afa8aSRavi Bangoria	bool "Split Lock Detect and Bus Lock Detect support"
2382408eb741SRavi Bangoria	depends on CPU_SUP_INTEL || CPU_SUP_AMD
2383350afa8aSRavi Bangoria	default y
2384350afa8aSRavi Bangoria	help
2385350afa8aSRavi Bangoria	  Enable Split Lock Detect and Bus Lock Detect functionalities.
2386350afa8aSRavi Bangoria	  See <file:Documentation/arch/x86/buslock.rst> for more information.
2387350afa8aSRavi Bangoria
2388506f1d07SSam Ravnborgendmenu
2389506f1d07SSam Ravnborg
23901ca3683cSUros Bizjakconfig CC_HAS_NAMED_AS
239147ff30ccSUros Bizjak	def_bool $(success,echo 'int __seg_fs fs; int __seg_gs gs;' | $(CC) -x c - -S -o /dev/null)
239247ff30ccSUros Bizjak	depends on CC_IS_GCC
23931ca3683cSUros Bizjak
2394b6762467SUros Bizjak#
2395b6762467SUros Bizjak# -fsanitize=kernel-address (KASAN) and -fsanitize=thread (KCSAN)
2396b6762467SUros Bizjak# are incompatible with named address spaces with GCC < 13.3
2397b6762467SUros Bizjak# (see GCC PR sanitizer/111736 and also PR sanitizer/115172).
2398b6762467SUros Bizjak#
2399b6762467SUros Bizjak
24009ebe5500SUros Bizjakconfig CC_HAS_NAMED_AS_FIXED_SANITIZERS
2401b6762467SUros Bizjak	def_bool y
2402b6762467SUros Bizjak	depends on !(KASAN || KCSAN) || GCC_VERSION >= 130300
2403b6762467SUros Bizjak	depends on !(UBSAN_BOOL && KASAN) || GCC_VERSION >= 140200
24041ca3683cSUros Bizjak
24051ca3683cSUros Bizjakconfig USE_X86_SEG_SUPPORT
2406b6762467SUros Bizjak	def_bool CC_HAS_NAMED_AS
2407b6762467SUros Bizjak	depends on CC_HAS_NAMED_AS_FIXED_SANITIZERS
24081ca3683cSUros Bizjak
2409f43b9876SPeter Zijlstraconfig CC_HAS_SLS
2410f43b9876SPeter Zijlstra	def_bool $(cc-option,-mharden-sls=all)
2411f43b9876SPeter Zijlstra
2412f43b9876SPeter Zijlstraconfig CC_HAS_RETURN_THUNK
2413f43b9876SPeter Zijlstra	def_bool $(cc-option,-mfunction-return=thunk-extern)
2414f43b9876SPeter Zijlstra
2415bea75b33SThomas Gleixnerconfig CC_HAS_ENTRY_PADDING
2416bea75b33SThomas Gleixner	def_bool $(cc-option,-fpatchable-function-entry=16,16)
2417bea75b33SThomas Gleixner
24180c92385dSPeter Zijlstraconfig CC_HAS_KCFI_ARITY
24190c92385dSPeter Zijlstra	def_bool $(cc-option,-fsanitize=kcfi -fsanitize-kcfi-arity)
24200c92385dSPeter Zijlstra	depends on CC_IS_CLANG && !RUST
24210c92385dSPeter Zijlstra
2422bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_CFI
2423bea75b33SThomas Gleixner	int
2424bea75b33SThomas Gleixner	default 59 if FUNCTION_ALIGNMENT_64B
2425bea75b33SThomas Gleixner	default 27 if FUNCTION_ALIGNMENT_32B
2426bea75b33SThomas Gleixner	default 11 if FUNCTION_ALIGNMENT_16B
2427bea75b33SThomas Gleixner	default  3 if FUNCTION_ALIGNMENT_8B
2428bea75b33SThomas Gleixner	default  0
2429bea75b33SThomas Gleixner
2430bea75b33SThomas Gleixner# Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG
2431bea75b33SThomas Gleixner# except Kconfig can't do arithmetic :/
2432bea75b33SThomas Gleixnerconfig FUNCTION_PADDING_BYTES
2433bea75b33SThomas Gleixner	int
2434bea75b33SThomas Gleixner	default FUNCTION_PADDING_CFI if CFI_CLANG
2435bea75b33SThomas Gleixner	default FUNCTION_ALIGNMENT
2436bea75b33SThomas Gleixner
2437931ab636SPeter Zijlstraconfig CALL_PADDING
2438931ab636SPeter Zijlstra	def_bool n
2439931ab636SPeter Zijlstra	depends on CC_HAS_ENTRY_PADDING && OBJTOOL
2440931ab636SPeter Zijlstra	select FUNCTION_ALIGNMENT_16B
2441931ab636SPeter Zijlstra
2442931ab636SPeter Zijlstraconfig FINEIBT
2443931ab636SPeter Zijlstra	def_bool y
2444aefb2f2eSBreno Leitao	depends on X86_KERNEL_IBT && CFI_CLANG && MITIGATION_RETPOLINE
2445931ab636SPeter Zijlstra	select CALL_PADDING
2446931ab636SPeter Zijlstra
24470c92385dSPeter Zijlstraconfig FINEIBT_BHI
24480c92385dSPeter Zijlstra	def_bool y
24490c92385dSPeter Zijlstra	depends on FINEIBT && CC_HAS_KCFI_ARITY
24500c92385dSPeter Zijlstra
24518f7c0d8bSThomas Gleixnerconfig HAVE_CALL_THUNKS
24528f7c0d8bSThomas Gleixner	def_bool y
24530911b8c5SBreno Leitao	depends on CC_HAS_ENTRY_PADDING && MITIGATION_RETHUNK && OBJTOOL
24548f7c0d8bSThomas Gleixner
24558f7c0d8bSThomas Gleixnerconfig CALL_THUNKS
24568f7c0d8bSThomas Gleixner	def_bool n
2457931ab636SPeter Zijlstra	select CALL_PADDING
24588f7c0d8bSThomas Gleixner
2459b341b20dSPeter Zijlstraconfig PREFIX_SYMBOLS
2460b341b20dSPeter Zijlstra	def_bool y
2461931ab636SPeter Zijlstra	depends on CALL_PADDING && !CFI_CLANG
2462b341b20dSPeter Zijlstra
2463fe42754bSSean Christophersonmenuconfig CPU_MITIGATIONS
2464fe42754bSSean Christopherson	bool "Mitigations for CPU vulnerabilities"
2465f43b9876SPeter Zijlstra	default y
2466f43b9876SPeter Zijlstra	help
2467fe42754bSSean Christopherson	  Say Y here to enable options which enable mitigations for hardware
2468fe42754bSSean Christopherson	  vulnerabilities (usually related to speculative execution).
2469ce0abef6SSean Christopherson	  Mitigations can be disabled or restricted to SMT systems at runtime
2470ce0abef6SSean Christopherson	  via the "mitigations" kernel parameter.
2471f43b9876SPeter Zijlstra
2472ce0abef6SSean Christopherson	  If you say N, all mitigations will be disabled.  This CANNOT be
2473ce0abef6SSean Christopherson	  overridden at runtime.
2474ce0abef6SSean Christopherson
2475ce0abef6SSean Christopherson	  Say 'Y', unless you really know what you are doing.
2476f43b9876SPeter Zijlstra
2477fe42754bSSean Christophersonif CPU_MITIGATIONS
2478f43b9876SPeter Zijlstra
2479ea4654e0SBreno Leitaoconfig MITIGATION_PAGE_TABLE_ISOLATION
2480f43b9876SPeter Zijlstra	bool "Remove the kernel mapping in user mode"
2481f43b9876SPeter Zijlstra	default y
2482f43b9876SPeter Zijlstra	depends on (X86_64 || X86_PAE)
2483f43b9876SPeter Zijlstra	help
2484f43b9876SPeter Zijlstra	  This feature reduces the number of hardware side channels by
2485f43b9876SPeter Zijlstra	  ensuring that the majority of kernel addresses are not mapped
2486f43b9876SPeter Zijlstra	  into userspace.
2487f43b9876SPeter Zijlstra
2488ff61f079SJonathan Corbet	  See Documentation/arch/x86/pti.rst for more details.
2489f43b9876SPeter Zijlstra
2490aefb2f2eSBreno Leitaoconfig MITIGATION_RETPOLINE
2491f43b9876SPeter Zijlstra	bool "Avoid speculative indirect branches in kernel"
2492f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2493f43b9876SPeter Zijlstra	default y
2494f43b9876SPeter Zijlstra	help
2495f43b9876SPeter Zijlstra	  Compile kernel with the retpoline compiler options to guard against
2496f43b9876SPeter Zijlstra	  kernel-to-user data leaks by avoiding speculative indirect
2497f43b9876SPeter Zijlstra	  branches. Requires a compiler with -mindirect-branch=thunk-extern
2498f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2499f43b9876SPeter Zijlstra
25000911b8c5SBreno Leitaoconfig MITIGATION_RETHUNK
2501f43b9876SPeter Zijlstra	bool "Enable return-thunks"
2502aefb2f2eSBreno Leitao	depends on MITIGATION_RETPOLINE && CC_HAS_RETURN_THUNK
2503f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2504b648ab48SBen Hutchings	default y if X86_64
2505f43b9876SPeter Zijlstra	help
2506f43b9876SPeter Zijlstra	  Compile the kernel with the return-thunks compiler option to guard
2507f43b9876SPeter Zijlstra	  against kernel-to-user data leaks by avoiding return speculation.
2508f43b9876SPeter Zijlstra	  Requires a compiler with -mfunction-return=thunk-extern
2509f43b9876SPeter Zijlstra	  support for full protection. The kernel may run slower.
2510f43b9876SPeter Zijlstra
2511ac61d439SBreno Leitaoconfig MITIGATION_UNRET_ENTRY
2512f43b9876SPeter Zijlstra	bool "Enable UNRET on kernel entry"
25130911b8c5SBreno Leitao	depends on CPU_SUP_AMD && MITIGATION_RETHUNK && X86_64
2514f43b9876SPeter Zijlstra	default y
2515f43b9876SPeter Zijlstra	help
2516f43b9876SPeter Zijlstra	  Compile the kernel with support for the retbleed=unret mitigation.
2517f43b9876SPeter Zijlstra
25185fa31af3SBreno Leitaoconfig MITIGATION_CALL_DEPTH_TRACKING
251980e4c1cdSThomas Gleixner	bool "Mitigate RSB underflow with call depth tracking"
252080e4c1cdSThomas Gleixner	depends on CPU_SUP_INTEL && HAVE_CALL_THUNKS
252180e4c1cdSThomas Gleixner	select HAVE_DYNAMIC_FTRACE_NO_PATCHABLE
252280e4c1cdSThomas Gleixner	select CALL_THUNKS
252380e4c1cdSThomas Gleixner	default y
252480e4c1cdSThomas Gleixner	help
252580e4c1cdSThomas Gleixner	  Compile the kernel with call depth tracking to mitigate the Intel
252686e39b94SBreno Leitao	  SKL Return-Stack-Buffer (RSB) underflow issue. The mitigation is off
252786e39b94SBreno Leitao	  by default and needs to be enabled on the kernel command line via the
252886e39b94SBreno Leitao	  retbleed=stuff option. For non-affected systems the overhead of this
252986e39b94SBreno Leitao	  option is marginal as the call depth tracking is using run-time
253086e39b94SBreno Leitao	  generated call thunks in a compiler generated padding area and call
253186e39b94SBreno Leitao	  patching. This increases text size by ~5%. For non affected systems
253286e39b94SBreno Leitao	  this space is unused. On affected SKL systems this results in a
253386e39b94SBreno Leitao	  significant performance gain over the IBRS mitigation.
253480e4c1cdSThomas Gleixner
2535e81dc127SThomas Gleixnerconfig CALL_THUNKS_DEBUG
2536e81dc127SThomas Gleixner	bool "Enable call thunks and call depth tracking debugging"
25375fa31af3SBreno Leitao	depends on MITIGATION_CALL_DEPTH_TRACKING
2538e81dc127SThomas Gleixner	select FUNCTION_ALIGNMENT_32B
2539e81dc127SThomas Gleixner	default n
2540e81dc127SThomas Gleixner	help
2541e81dc127SThomas Gleixner	  Enable call/ret counters for imbalance detection and build in
2542e81dc127SThomas Gleixner	  a noisy dmesg about callthunks generation and call patching for
2543e81dc127SThomas Gleixner	  trouble shooting. The debug prints need to be enabled on the
2544e81dc127SThomas Gleixner	  kernel command line with 'debug-callthunks'.
254554628de6SRandy Dunlap	  Only enable this when you are debugging call thunks as this
254654628de6SRandy Dunlap	  creates a noticeable runtime overhead. If unsure say N.
254780e4c1cdSThomas Gleixner
2548e0b8fcfaSBreno Leitaoconfig MITIGATION_IBPB_ENTRY
2549f43b9876SPeter Zijlstra	bool "Enable IBPB on kernel entry"
2550b648ab48SBen Hutchings	depends on CPU_SUP_AMD && X86_64
2551f43b9876SPeter Zijlstra	default y
2552f43b9876SPeter Zijlstra	help
2553318e8c33SPatrick Bellasi	  Compile the kernel with support for the retbleed=ibpb and
2554318e8c33SPatrick Bellasi	  spec_rstack_overflow={ibpb,ibpb-vmexit} mitigations.
2555f43b9876SPeter Zijlstra
25561da8d217SBreno Leitaoconfig MITIGATION_IBRS_ENTRY
2557f43b9876SPeter Zijlstra	bool "Enable IBRS on kernel entry"
2558b648ab48SBen Hutchings	depends on CPU_SUP_INTEL && X86_64
2559f43b9876SPeter Zijlstra	default y
2560f43b9876SPeter Zijlstra	help
2561f43b9876SPeter Zijlstra	  Compile the kernel with support for the spectre_v2=ibrs mitigation.
2562f43b9876SPeter Zijlstra	  This mitigates both spectre_v2 and retbleed at great cost to
2563f43b9876SPeter Zijlstra	  performance.
2564f43b9876SPeter Zijlstra
2565a033eec9SBreno Leitaoconfig MITIGATION_SRSO
2566fb3bd914SBorislav Petkov (AMD)	bool "Mitigate speculative RAS overflow on AMD"
25670911b8c5SBreno Leitao	depends on CPU_SUP_AMD && X86_64 && MITIGATION_RETHUNK
2568fb3bd914SBorislav Petkov (AMD)	default y
2569fb3bd914SBorislav Petkov (AMD)	help
2570fb3bd914SBorislav Petkov (AMD)	  Enable the SRSO mitigation needed on AMD Zen1-4 machines.
2571fb3bd914SBorislav Petkov (AMD)
25727b75782fSBreno Leitaoconfig MITIGATION_SLS
2573f43b9876SPeter Zijlstra	bool "Mitigate Straight-Line-Speculation"
2574f43b9876SPeter Zijlstra	depends on CC_HAS_SLS && X86_64
2575f43b9876SPeter Zijlstra	select OBJTOOL if HAVE_OBJTOOL
2576f43b9876SPeter Zijlstra	default n
2577f43b9876SPeter Zijlstra	help
2578f43b9876SPeter Zijlstra	  Compile the kernel with straight-line-speculation options to guard
2579f43b9876SPeter Zijlstra	  against straight line speculation. The kernel image might be slightly
2580f43b9876SPeter Zijlstra	  larger.
2581f43b9876SPeter Zijlstra
2582225f2bd0SBreno Leitaoconfig MITIGATION_GDS
2583225f2bd0SBreno Leitao	bool "Mitigate Gather Data Sampling"
2584225f2bd0SBreno Leitao	depends on CPU_SUP_INTEL
2585225f2bd0SBreno Leitao	default y
2586225f2bd0SBreno Leitao	help
2587225f2bd0SBreno Leitao	  Enable mitigation for Gather Data Sampling (GDS). GDS is a hardware
2588225f2bd0SBreno Leitao	  vulnerability which allows unprivileged speculative access to data
2589225f2bd0SBreno Leitao	  which was previously stored in vector registers. The attacker uses gather
2590225f2bd0SBreno Leitao	  instructions to infer the stale vector register data.
2591225f2bd0SBreno Leitao
25928076fcdeSPawan Guptaconfig MITIGATION_RFDS
25938076fcdeSPawan Gupta	bool "RFDS Mitigation"
25948076fcdeSPawan Gupta	depends on CPU_SUP_INTEL
25958076fcdeSPawan Gupta	default y
25968076fcdeSPawan Gupta	help
25978076fcdeSPawan Gupta	  Enable mitigation for Register File Data Sampling (RFDS) by default.
25988076fcdeSPawan Gupta	  RFDS is a hardware vulnerability which affects Intel Atom CPUs. It
25998076fcdeSPawan Gupta	  allows unprivileged speculative access to stale data previously
26008076fcdeSPawan Gupta	  stored in floating point, vector and integer registers.
26018076fcdeSPawan Gupta	  See also <file:Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst>
26028076fcdeSPawan Gupta
26034f511739SJosh Poimboeufconfig MITIGATION_SPECTRE_BHI
26044f511739SJosh Poimboeuf	bool "Mitigate Spectre-BHB (Branch History Injection)"
2605ec9404e4SPawan Gupta	depends on CPU_SUP_INTEL
26064f511739SJosh Poimboeuf	default y
2607ec9404e4SPawan Gupta	help
2608ec9404e4SPawan Gupta	  Enable BHI mitigations. BHI attacks are a form of Spectre V2 attacks
2609ec9404e4SPawan Gupta	  where the branch history buffer is poisoned to speculatively steer
2610ec9404e4SPawan Gupta	  indirect branches.
2611ec9404e4SPawan Gupta	  See <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2612ec9404e4SPawan Gupta
261394045568SBreno Leitaoconfig MITIGATION_MDS
261494045568SBreno Leitao	bool "Mitigate Microarchitectural Data Sampling (MDS) hardware bug"
261594045568SBreno Leitao	depends on CPU_SUP_INTEL
261694045568SBreno Leitao	default y
261794045568SBreno Leitao	help
261894045568SBreno Leitao	  Enable mitigation for Microarchitectural Data Sampling (MDS). MDS is
261994045568SBreno Leitao	  a hardware vulnerability which allows unprivileged speculative access
262094045568SBreno Leitao	  to data which is available in various CPU internal buffers.
262194045568SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/mds.rst>
2622b8da0b33SBreno Leitao
2623b8da0b33SBreno Leitaoconfig MITIGATION_TAA
2624b8da0b33SBreno Leitao	bool "Mitigate TSX Asynchronous Abort (TAA) hardware bug"
2625b8da0b33SBreno Leitao	depends on CPU_SUP_INTEL
2626b8da0b33SBreno Leitao	default y
2627b8da0b33SBreno Leitao	help
2628b8da0b33SBreno Leitao	  Enable mitigation for TSX Asynchronous Abort (TAA). TAA is a hardware
2629b8da0b33SBreno Leitao	  vulnerability that allows unprivileged speculative access to data
2630b8da0b33SBreno Leitao	  which is available in various CPU internal buffers by using
2631b8da0b33SBreno Leitao	  asynchronous aborts within an Intel TSX transactional region.
2632b8da0b33SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/tsx_async_abort.rst>
2633163f9fe6SBreno Leitao
2634163f9fe6SBreno Leitaoconfig MITIGATION_MMIO_STALE_DATA
2635163f9fe6SBreno Leitao	bool "Mitigate MMIO Stale Data hardware bug"
2636163f9fe6SBreno Leitao	depends on CPU_SUP_INTEL
2637163f9fe6SBreno Leitao	default y
2638163f9fe6SBreno Leitao	help
2639163f9fe6SBreno Leitao	  Enable mitigation for MMIO Stale Data hardware bugs.  Processor MMIO
2640163f9fe6SBreno Leitao	  Stale Data Vulnerabilities are a class of memory-mapped I/O (MMIO)
2641163f9fe6SBreno Leitao	  vulnerabilities that can expose data. The vulnerabilities require the
2642163f9fe6SBreno Leitao	  attacker to have access to MMIO.
2643163f9fe6SBreno Leitao	  See also
2644163f9fe6SBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst>
26453a4ee4ffSBreno Leitao
26463a4ee4ffSBreno Leitaoconfig MITIGATION_L1TF
26473a4ee4ffSBreno Leitao	bool "Mitigate L1 Terminal Fault (L1TF) hardware bug"
26483a4ee4ffSBreno Leitao	depends on CPU_SUP_INTEL
26493a4ee4ffSBreno Leitao	default y
26503a4ee4ffSBreno Leitao	help
26513a4ee4ffSBreno Leitao	  Mitigate L1 Terminal Fault (L1TF) hardware bug. L1 Terminal Fault is a
26523a4ee4ffSBreno Leitao	  hardware vulnerability which allows unprivileged speculative access to data
26533a4ee4ffSBreno Leitao	  available in the Level 1 Data Cache.
26543a4ee4ffSBreno Leitao	  See <file:Documentation/admin-guide/hw-vuln/l1tf.rst
2655894e2885SBreno Leitao
2656894e2885SBreno Leitaoconfig MITIGATION_RETBLEED
2657894e2885SBreno Leitao	bool "Mitigate RETBleed hardware bug"
2658894e2885SBreno Leitao	depends on (CPU_SUP_INTEL && MITIGATION_SPECTRE_V2) || MITIGATION_UNRET_ENTRY || MITIGATION_IBPB_ENTRY
2659894e2885SBreno Leitao	default y
2660894e2885SBreno Leitao	help
2661894e2885SBreno Leitao	  Enable mitigation for RETBleed (Arbitrary Speculative Code Execution
2662894e2885SBreno Leitao	  with Return Instructions) vulnerability.  RETBleed is a speculative
2663894e2885SBreno Leitao	  execution attack which takes advantage of microarchitectural behavior
2664894e2885SBreno Leitao	  in many modern microprocessors, similar to Spectre v2. An
2665894e2885SBreno Leitao	  unprivileged attacker can use these flaws to bypass conventional
2666894e2885SBreno Leitao	  memory security restrictions to gain read access to privileged memory
2667894e2885SBreno Leitao	  that would otherwise be inaccessible.
2668ca01c0d8SBreno Leitao
2669ca01c0d8SBreno Leitaoconfig MITIGATION_SPECTRE_V1
2670ca01c0d8SBreno Leitao	bool "Mitigate SPECTRE V1 hardware bug"
2671ca01c0d8SBreno Leitao	default y
2672ca01c0d8SBreno Leitao	help
2673ca01c0d8SBreno Leitao	  Enable mitigation for Spectre V1 (Bounds Check Bypass). Spectre V1 is a
2674ca01c0d8SBreno Leitao	  class of side channel attacks that takes advantage of speculative
2675ca01c0d8SBreno Leitao	  execution that bypasses conditional branch instructions used for
2676ca01c0d8SBreno Leitao	  memory access bounds check.
2677ca01c0d8SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
2678a0b02e3fSBreno Leitao
267972c70f48SBreno Leitaoconfig MITIGATION_SPECTRE_V2
268072c70f48SBreno Leitao	bool "Mitigate SPECTRE V2 hardware bug"
268172c70f48SBreno Leitao	default y
268272c70f48SBreno Leitao	help
268372c70f48SBreno Leitao	  Enable mitigation for Spectre V2 (Branch Target Injection). Spectre
268472c70f48SBreno Leitao	  V2 is a class of side channel attacks that takes advantage of
268572c70f48SBreno Leitao	  indirect branch predictors inside the processor. In Spectre variant 2
268672c70f48SBreno Leitao	  attacks, the attacker can steer speculative indirect branches in the
268772c70f48SBreno Leitao	  victim to gadget code by poisoning the branch target buffer of a CPU
268872c70f48SBreno Leitao	  used for predicting indirect branch addresses.
268972c70f48SBreno Leitao	  See also <file:Documentation/admin-guide/hw-vuln/spectre.rst>
269072c70f48SBreno Leitao
2691a0b02e3fSBreno Leitaoconfig MITIGATION_SRBDS
2692a0b02e3fSBreno Leitao	bool "Mitigate Special Register Buffer Data Sampling (SRBDS) hardware bug"
2693a0b02e3fSBreno Leitao	depends on CPU_SUP_INTEL
2694a0b02e3fSBreno Leitao	default y
2695a0b02e3fSBreno Leitao	help
2696a0b02e3fSBreno Leitao	  Enable mitigation for Special Register Buffer Data Sampling (SRBDS).
2697a0b02e3fSBreno Leitao	  SRBDS is a hardware vulnerability that allows Microarchitectural Data
2698a0b02e3fSBreno Leitao	  Sampling (MDS) techniques to infer values returned from special
2699a0b02e3fSBreno Leitao	  register accesses. An unprivileged user can extract values returned
2700a0b02e3fSBreno Leitao	  from RDRAND and RDSEED executed on another core or sibling thread
2701a0b02e3fSBreno Leitao	  using MDS techniques.
2702a0b02e3fSBreno Leitao	  See also
2703a0b02e3fSBreno Leitao	  <file:Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst>
2704b908cdabSBreno Leitao
2705b908cdabSBreno Leitaoconfig MITIGATION_SSB
2706b908cdabSBreno Leitao	bool "Mitigate Speculative Store Bypass (SSB) hardware bug"
2707b908cdabSBreno Leitao	default y
2708b908cdabSBreno Leitao	help
2709b908cdabSBreno Leitao	  Enable mitigation for Speculative Store Bypass (SSB). SSB is a
2710b908cdabSBreno Leitao	  hardware security vulnerability and its exploitation takes advantage
2711b908cdabSBreno Leitao	  of speculative execution in a similar way to the Meltdown and Spectre
2712b908cdabSBreno Leitao	  security vulnerabilities.
2713b908cdabSBreno Leitao
2714f43b9876SPeter Zijlstraendif
2715f43b9876SPeter Zijlstra
27163072e413SMichal Hockoconfig ARCH_HAS_ADD_PAGES
27173072e413SMichal Hocko	def_bool y
27185c11f00bSDavid Hildenbrand	depends on ARCH_ENABLE_MEMORY_HOTPLUG
27193072e413SMichal Hocko
2720da85f865SBjorn Helgaasmenu "Power management and ACPI options"
2721e279b6c1SSam Ravnborg
2722e279b6c1SSam Ravnborgconfig ARCH_HIBERNATION_HEADER
27233c2362e6SHarvey Harrison	def_bool y
272444556530SZhimin Gu	depends on HIBERNATION
2725e279b6c1SSam Ravnborg
2726e279b6c1SSam Ravnborgsource "kernel/power/Kconfig"
2727e279b6c1SSam Ravnborg
2728e279b6c1SSam Ravnborgsource "drivers/acpi/Kconfig"
2729e279b6c1SSam Ravnborg
2730a6b68076SAndi Kleenconfig X86_APM_BOOT
27316fc108a0SJan Beulich	def_bool y
2732282e5aabSPaul Bolle	depends on APM
2733a6b68076SAndi Kleen
2734e279b6c1SSam Ravnborgmenuconfig APM
2735e279b6c1SSam Ravnborg	tristate "APM (Advanced Power Management) BIOS support"
2736efefa6f6SIngo Molnar	depends on X86_32 && PM_SLEEP
2737a7f7f624SMasahiro Yamada	help
2738e279b6c1SSam Ravnborg	  APM is a BIOS specification for saving power using several different
2739e279b6c1SSam Ravnborg	  techniques. This is mostly useful for battery powered laptops with
2740e279b6c1SSam Ravnborg	  APM compliant BIOSes. If you say Y here, the system time will be
2741e279b6c1SSam Ravnborg	  reset after a RESUME operation, the /proc/apm device will provide
2742e279b6c1SSam Ravnborg	  battery status information, and user-space programs will receive
2743e279b6c1SSam Ravnborg	  notification of APM "events" (e.g. battery status change).
2744e279b6c1SSam Ravnborg
2745e279b6c1SSam Ravnborg	  If you select "Y" here, you can disable actual use of the APM
2746e279b6c1SSam Ravnborg	  BIOS by passing the "apm=off" option to the kernel at boot time.
2747e279b6c1SSam Ravnborg
2748e279b6c1SSam Ravnborg	  Note that the APM support is almost completely disabled for
2749e279b6c1SSam Ravnborg	  machines with more than one CPU.
2750e279b6c1SSam Ravnborg
2751e279b6c1SSam Ravnborg	  In order to use APM, you will need supporting software. For location
2752151f4e2bSMauro Carvalho Chehab	  and more information, read <file:Documentation/power/apm-acpi.rst>
27532dc98fd3SMichael Witten	  and the Battery Powered Linux mini-HOWTO, available from
2754e279b6c1SSam Ravnborg	  <http://www.tldp.org/docs.html#howto>.
2755e279b6c1SSam Ravnborg
2756e279b6c1SSam Ravnborg	  This driver does not spin down disk drives (see the hdparm(8)
2757e279b6c1SSam Ravnborg	  manpage ("man 8 hdparm") for that), and it doesn't turn off
2758e279b6c1SSam Ravnborg	  VESA-compliant "green" monitors.
2759e279b6c1SSam Ravnborg
2760e279b6c1SSam Ravnborg	  This driver does not support the TI 4000M TravelMate and the ACER
2761e279b6c1SSam Ravnborg	  486/DX4/75 because they don't have compliant BIOSes. Many "green"
2762e279b6c1SSam Ravnborg	  desktop machines also don't have compliant BIOSes, and this driver
2763e279b6c1SSam Ravnborg	  may cause those machines to panic during the boot phase.
2764e279b6c1SSam Ravnborg
2765e279b6c1SSam Ravnborg	  Generally, if you don't have a battery in your machine, there isn't
2766e279b6c1SSam Ravnborg	  much point in using this driver and you should say N. If you get
2767e279b6c1SSam Ravnborg	  random kernel OOPSes or reboots that don't seem to be related to
2768e279b6c1SSam Ravnborg	  anything, try disabling/enabling this option (or disabling/enabling
2769e279b6c1SSam Ravnborg	  APM in your BIOS).
2770e279b6c1SSam Ravnborg
2771e279b6c1SSam Ravnborg	  Some other things you should try when experiencing seemingly random,
2772e279b6c1SSam Ravnborg	  "weird" problems:
2773e279b6c1SSam Ravnborg
2774e279b6c1SSam Ravnborg	  1) make sure that you have enough swap space and that it is
2775e279b6c1SSam Ravnborg	  enabled.
27767987448fSStephen Kitt	  2) pass the "idle=poll" option to the kernel
2777e279b6c1SSam Ravnborg	  3) switch on floating point emulation in the kernel and pass
2778e279b6c1SSam Ravnborg	  the "no387" option to the kernel
2779e279b6c1SSam Ravnborg	  4) pass the "floppy=nodma" option to the kernel
2780e279b6c1SSam Ravnborg	  5) pass the "mem=4M" option to the kernel (thereby disabling
2781e279b6c1SSam Ravnborg	  all but the first 4 MB of RAM)
2782e279b6c1SSam Ravnborg	  6) make sure that the CPU is not over clocked.
2783e279b6c1SSam Ravnborg	  7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/>
2784e279b6c1SSam Ravnborg	  8) disable the cache from your BIOS settings
2785e279b6c1SSam Ravnborg	  9) install a fan for the video card or exchange video RAM
2786e279b6c1SSam Ravnborg	  10) install a better fan for the CPU
2787e279b6c1SSam Ravnborg	  11) exchange RAM chips
2788e279b6c1SSam Ravnborg	  12) exchange the motherboard.
2789e279b6c1SSam Ravnborg
2790e279b6c1SSam Ravnborg	  To compile this driver as a module, choose M here: the
2791e279b6c1SSam Ravnborg	  module will be called apm.
2792e279b6c1SSam Ravnborg
2793e279b6c1SSam Ravnborgif APM
2794e279b6c1SSam Ravnborg
2795e279b6c1SSam Ravnborgconfig APM_IGNORE_USER_SUSPEND
2796e279b6c1SSam Ravnborg	bool "Ignore USER SUSPEND"
2797a7f7f624SMasahiro Yamada	help
2798e279b6c1SSam Ravnborg	  This option will ignore USER SUSPEND requests. On machines with a
2799e279b6c1SSam Ravnborg	  compliant APM BIOS, you want to say N. However, on the NEC Versa M
2800e279b6c1SSam Ravnborg	  series notebooks, it is necessary to say Y because of a BIOS bug.
2801e279b6c1SSam Ravnborg
2802e279b6c1SSam Ravnborgconfig APM_DO_ENABLE
2803e279b6c1SSam Ravnborg	bool "Enable PM at boot time"
2804a7f7f624SMasahiro Yamada	help
2805e279b6c1SSam Ravnborg	  Enable APM features at boot time. From page 36 of the APM BIOS
2806e279b6c1SSam Ravnborg	  specification: "When disabled, the APM BIOS does not automatically
2807e279b6c1SSam Ravnborg	  power manage devices, enter the Standby State, enter the Suspend
2808e279b6c1SSam Ravnborg	  State, or take power saving steps in response to CPU Idle calls."
2809e279b6c1SSam Ravnborg	  This driver will make CPU Idle calls when Linux is idle (unless this
2810e279b6c1SSam Ravnborg	  feature is turned off -- see "Do CPU IDLE calls", below). This
2811e279b6c1SSam Ravnborg	  should always save battery power, but more complicated APM features
2812e279b6c1SSam Ravnborg	  will be dependent on your BIOS implementation. You may need to turn
2813e279b6c1SSam Ravnborg	  this option off if your computer hangs at boot time when using APM
2814e279b6c1SSam Ravnborg	  support, or if it beeps continuously instead of suspending. Turn
2815e279b6c1SSam Ravnborg	  this off if you have a NEC UltraLite Versa 33/C or a Toshiba
2816e279b6c1SSam Ravnborg	  T400CDT. This is off by default since most machines do fine without
2817e279b6c1SSam Ravnborg	  this feature.
2818e279b6c1SSam Ravnborg
2819e279b6c1SSam Ravnborgconfig APM_CPU_IDLE
2820dd8af076SLen Brown	depends on CPU_IDLE
2821e279b6c1SSam Ravnborg	bool "Make CPU Idle calls when idle"
2822a7f7f624SMasahiro Yamada	help
2823e279b6c1SSam Ravnborg	  Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop.
2824e279b6c1SSam Ravnborg	  On some machines, this can activate improved power savings, such as
2825e279b6c1SSam Ravnborg	  a slowed CPU clock rate, when the machine is idle. These idle calls
2826e279b6c1SSam Ravnborg	  are made after the idle loop has run for some length of time (e.g.,
2827e279b6c1SSam Ravnborg	  333 mS). On some machines, this will cause a hang at boot time or
2828e279b6c1SSam Ravnborg	  whenever the CPU becomes idle. (On machines with more than one CPU,
2829e279b6c1SSam Ravnborg	  this option does nothing.)
2830e279b6c1SSam Ravnborg
2831e279b6c1SSam Ravnborgconfig APM_DISPLAY_BLANK
2832e279b6c1SSam Ravnborg	bool "Enable console blanking using APM"
2833a7f7f624SMasahiro Yamada	help
2834e279b6c1SSam Ravnborg	  Enable console blanking using the APM. Some laptops can use this to
2835e279b6c1SSam Ravnborg	  turn off the LCD backlight when the screen blanker of the Linux
2836e279b6c1SSam Ravnborg	  virtual console blanks the screen. Note that this is only used by
2837e279b6c1SSam Ravnborg	  the virtual console screen blanker, and won't turn off the backlight
2838e279b6c1SSam Ravnborg	  when using the X Window system. This also doesn't have anything to
2839e279b6c1SSam Ravnborg	  do with your VESA-compliant power-saving monitor. Further, this
2840e279b6c1SSam Ravnborg	  option doesn't work for all laptops -- it might not turn off your
2841e279b6c1SSam Ravnborg	  backlight at all, or it might print a lot of errors to the console,
2842e279b6c1SSam Ravnborg	  especially if you are using gpm.
2843e279b6c1SSam Ravnborg
2844e279b6c1SSam Ravnborgconfig APM_ALLOW_INTS
2845e279b6c1SSam Ravnborg	bool "Allow interrupts during APM BIOS calls"
2846a7f7f624SMasahiro Yamada	help
2847e279b6c1SSam Ravnborg	  Normally we disable external interrupts while we are making calls to
2848e279b6c1SSam Ravnborg	  the APM BIOS as a measure to lessen the effects of a badly behaving
2849e279b6c1SSam Ravnborg	  BIOS implementation.  The BIOS should reenable interrupts if it
2850e279b6c1SSam Ravnborg	  needs to.  Unfortunately, some BIOSes do not -- especially those in
2851e279b6c1SSam Ravnborg	  many of the newer IBM Thinkpads.  If you experience hangs when you
2852e279b6c1SSam Ravnborg	  suspend, try setting this to Y.  Otherwise, say N.
2853e279b6c1SSam Ravnborg
2854e279b6c1SSam Ravnborgendif # APM
2855e279b6c1SSam Ravnborg
2856bb0a56ecSDave Jonessource "drivers/cpufreq/Kconfig"
2857e279b6c1SSam Ravnborg
2858e279b6c1SSam Ravnborgsource "drivers/cpuidle/Kconfig"
2859e279b6c1SSam Ravnborg
286027471fdbSAndy Henroidsource "drivers/idle/Kconfig"
286127471fdbSAndy Henroid
2862e279b6c1SSam Ravnborgendmenu
2863e279b6c1SSam Ravnborg
2864e279b6c1SSam Ravnborgmenu "Bus options (PCI etc.)"
2865e279b6c1SSam Ravnborg
2866e279b6c1SSam Ravnborgchoice
2867e279b6c1SSam Ravnborg	prompt "PCI access mode"
2868efefa6f6SIngo Molnar	depends on X86_32 && PCI
2869e279b6c1SSam Ravnborg	default PCI_GOANY
2870a7f7f624SMasahiro Yamada	help
2871e279b6c1SSam Ravnborg	  On PCI systems, the BIOS can be used to detect the PCI devices and
2872e279b6c1SSam Ravnborg	  determine their configuration. However, some old PCI motherboards
2873e279b6c1SSam Ravnborg	  have BIOS bugs and may crash if this is done. Also, some embedded
2874e279b6c1SSam Ravnborg	  PCI-based systems don't have any BIOS at all. Linux can also try to
2875e279b6c1SSam Ravnborg	  detect the PCI hardware directly without using the BIOS.
2876e279b6c1SSam Ravnborg
2877e279b6c1SSam Ravnborg	  With this option, you can specify how Linux should detect the
2878e279b6c1SSam Ravnborg	  PCI devices. If you choose "BIOS", the BIOS will be used,
2879e279b6c1SSam Ravnborg	  if you choose "Direct", the BIOS won't be used, and if you
2880e279b6c1SSam Ravnborg	  choose "MMConfig", then PCI Express MMCONFIG will be used.
2881e279b6c1SSam Ravnborg	  If you choose "Any", the kernel will try MMCONFIG, then the
2882e279b6c1SSam Ravnborg	  direct access method and falls back to the BIOS if that doesn't
2883e279b6c1SSam Ravnborg	  work. If unsure, go with the default, which is "Any".
2884e279b6c1SSam Ravnborg
2885e279b6c1SSam Ravnborgconfig PCI_GOBIOS
2886e279b6c1SSam Ravnborg	bool "BIOS"
2887e279b6c1SSam Ravnborg
2888e279b6c1SSam Ravnborgconfig PCI_GOMMCONFIG
2889e279b6c1SSam Ravnborg	bool "MMConfig"
2890e279b6c1SSam Ravnborg
2891e279b6c1SSam Ravnborgconfig PCI_GODIRECT
2892e279b6c1SSam Ravnborg	bool "Direct"
2893e279b6c1SSam Ravnborg
28943ef0e1f8SAndres Salomonconfig PCI_GOOLPC
289576fb6570SDaniel Drake	bool "OLPC XO-1"
28963ef0e1f8SAndres Salomon	depends on OLPC
28973ef0e1f8SAndres Salomon
28982bdd1b03SAndres Salomonconfig PCI_GOANY
28992bdd1b03SAndres Salomon	bool "Any"
29002bdd1b03SAndres Salomon
2901e279b6c1SSam Ravnborgendchoice
2902e279b6c1SSam Ravnborg
2903e279b6c1SSam Ravnborgconfig PCI_BIOS
29043c2362e6SHarvey Harrison	def_bool y
2905efefa6f6SIngo Molnar	depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY)
2906e279b6c1SSam Ravnborg
2907e279b6c1SSam Ravnborg# x86-64 doesn't support PCI BIOS access from long mode so always go direct.
2908e279b6c1SSam Ravnborgconfig PCI_DIRECT
29093c2362e6SHarvey Harrison	def_bool y
29100aba496fSShaohua Li	depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC || PCI_GOMMCONFIG))
2911e279b6c1SSam Ravnborg
2912e279b6c1SSam Ravnborgconfig PCI_MMCONFIG
2913b45c9f36SJan Kiszka	bool "Support mmconfig PCI config space access" if X86_64
2914b45c9f36SJan Kiszka	default y
29154590d98fSAndy Shevchenko	depends on PCI && (ACPI || JAILHOUSE_GUEST)
2916b45c9f36SJan Kiszka	depends on X86_64 || (PCI_GOANY || PCI_GOMMCONFIG)
291721d8fb8dSMateusz Jończyk	help
291821d8fb8dSMateusz Jończyk	  Add support for accessing the PCI configuration space as a memory
291921d8fb8dSMateusz Jończyk	  mapped area. It is the recommended method if the system supports
292021d8fb8dSMateusz Jończyk	  this (it must have PCI Express and ACPI for it to be available).
292121d8fb8dSMateusz Jończyk
292221d8fb8dSMateusz Jończyk	  In the unlikely case that enabling this configuration option causes
292321d8fb8dSMateusz Jończyk	  problems, the mechanism can be switched off with the 'pci=nommconf'
292421d8fb8dSMateusz Jończyk	  command line parameter.
292521d8fb8dSMateusz Jończyk
292621d8fb8dSMateusz Jończyk	  Say N only if you are sure that your platform does not support this
292721d8fb8dSMateusz Jończyk	  access method or you have problems caused by it.
292821d8fb8dSMateusz Jończyk
292921d8fb8dSMateusz Jończyk	  Say Y otherwise.
2930e279b6c1SSam Ravnborg
29313ef0e1f8SAndres Salomonconfig PCI_OLPC
29322bdd1b03SAndres Salomon	def_bool y
29332bdd1b03SAndres Salomon	depends on PCI && OLPC && (PCI_GOOLPC || PCI_GOANY)
29343ef0e1f8SAndres Salomon
2935b5401a96SAlex Nixonconfig PCI_XEN
2936b5401a96SAlex Nixon	def_bool y
2937b5401a96SAlex Nixon	depends on PCI && XEN
2938b5401a96SAlex Nixon
29398364e1f8SJan Kiszkaconfig MMCONF_FAM10H
29408364e1f8SJan Kiszka	def_bool y
29418364e1f8SJan Kiszka	depends on X86_64 && PCI_MMCONFIG && ACPI
2942e279b6c1SSam Ravnborg
29433f6ea84aSIra W. Snyderconfig PCI_CNB20LE_QUIRK
2944d9f87802SMateusz Jończyk	bool "Read PCI host bridge windows from the CNB20LE chipset" if EXPERT
2945d9f87802SMateusz Jończyk	depends on X86_32 && PCI
29463f6ea84aSIra W. Snyder	help
29473f6ea84aSIra W. Snyder	  Read the PCI windows out of the CNB20LE host bridge. This allows
29483f6ea84aSIra W. Snyder	  PCI hotplug to work on systems with the CNB20LE chipset which do
29493f6ea84aSIra W. Snyder	  not have ACPI.
29503f6ea84aSIra W. Snyder
2951d9f87802SMateusz Jończyk	  The ServerWorks (later Broadcom) CNB20LE was a chipset designed
2952d9f87802SMateusz Jończyk	  most probably only for Pentium III.
2953d9f87802SMateusz Jończyk
2954d9f87802SMateusz Jończyk	  To find out if you have such a chipset, search for a PCI device with
2955d9f87802SMateusz Jończyk	  1166:0009 PCI IDs, for example by executing
2956d9f87802SMateusz Jończyk		lspci -nn | grep '1166:0009'
2957d9f87802SMateusz Jończyk	  The code is inactive if there is none.
2958d9f87802SMateusz Jończyk
295964a5fed6SBjorn Helgaas	  There's no public spec for this chipset, and this functionality
296064a5fed6SBjorn Helgaas	  is known to be incomplete.
296164a5fed6SBjorn Helgaas
296264a5fed6SBjorn Helgaas	  You should say N unless you know you need this.
296364a5fed6SBjorn Helgaas
29643a495511SWilliam Breathitt Grayconfig ISA_BUS
296517a2a129SWilliam Breathitt Gray	bool "ISA bus support on modern systems" if EXPERT
29663a495511SWilliam Breathitt Gray	help
296717a2a129SWilliam Breathitt Gray	  Expose ISA bus device drivers and options available for selection and
296817a2a129SWilliam Breathitt Gray	  configuration. Enable this option if your target machine has an ISA
296917a2a129SWilliam Breathitt Gray	  bus. ISA is an older system, displaced by PCI and newer bus
297017a2a129SWilliam Breathitt Gray	  architectures -- if your target machine is modern, it probably does
297117a2a129SWilliam Breathitt Gray	  not have an ISA bus.
29723a495511SWilliam Breathitt Gray
29733a495511SWilliam Breathitt Gray	  If unsure, say N.
29743a495511SWilliam Breathitt Gray
29751c00f016SDavid Rientjes# x86_64 have no ISA slots, but can have ISA-style DMA.
2976e279b6c1SSam Ravnborgconfig ISA_DMA_API
29771c00f016SDavid Rientjes	bool "ISA-style DMA support" if (X86_64 && EXPERT)
29781c00f016SDavid Rientjes	default y
29791c00f016SDavid Rientjes	help
29801c00f016SDavid Rientjes	  Enables ISA-style DMA support for devices requiring such controllers.
29811c00f016SDavid Rientjes	  If unsure, say Y.
2982e279b6c1SSam Ravnborg
298351e68d05SLinus Torvaldsif X86_32
298451e68d05SLinus Torvalds
2985e279b6c1SSam Ravnborgconfig ISA
2986e279b6c1SSam Ravnborg	bool "ISA support"
2987a7f7f624SMasahiro Yamada	help
2988e279b6c1SSam Ravnborg	  Find out whether you have ISA slots on your motherboard.  ISA is the
2989e279b6c1SSam Ravnborg	  name of a bus system, i.e. the way the CPU talks to the other stuff
2990e279b6c1SSam Ravnborg	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
2991e279b6c1SSam Ravnborg	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
2992e279b6c1SSam Ravnborg	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
2993e279b6c1SSam Ravnborg
2994e279b6c1SSam Ravnborgconfig SCx200
2995e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 support"
2996a7f7f624SMasahiro Yamada	help
2997e279b6c1SSam Ravnborg	  This provides basic support for National Semiconductor's
2998e279b6c1SSam Ravnborg	  (now AMD's) Geode processors.  The driver probes for the
2999e279b6c1SSam Ravnborg	  PCI-IDs of several on-chip devices, so its a good dependency
3000e279b6c1SSam Ravnborg	  for other scx200_* drivers.
3001e279b6c1SSam Ravnborg
3002e279b6c1SSam Ravnborg	  If compiled as a module, the driver is named scx200.
3003e279b6c1SSam Ravnborg
3004e279b6c1SSam Ravnborgconfig SCx200HR_TIMER
3005e279b6c1SSam Ravnborg	tristate "NatSemi SCx200 27MHz High-Resolution Timer Support"
3006592913ecSJohn Stultz	depends on SCx200
3007e279b6c1SSam Ravnborg	default y
3008a7f7f624SMasahiro Yamada	help
3009e279b6c1SSam Ravnborg	  This driver provides a clocksource built upon the on-chip
3010e279b6c1SSam Ravnborg	  27MHz high-resolution timer.  Its also a workaround for
3011e279b6c1SSam Ravnborg	  NSC Geode SC-1100's buggy TSC, which loses time when the
3012e279b6c1SSam Ravnborg	  processor goes idle (as is done by the scheduler).  The
3013e279b6c1SSam Ravnborg	  other workaround is idle=poll boot option.
3014e279b6c1SSam Ravnborg
30153ef0e1f8SAndres Salomonconfig OLPC
30163ef0e1f8SAndres Salomon	bool "One Laptop Per Child support"
301754008979SThomas Gleixner	depends on !X86_PAE
30183c554946SAndres Salomon	select GPIOLIB
3019dc3119e7SThomas Gleixner	select OF
302045bb1674SDaniel Drake	select OF_PROMTREE
3021b4e51854SGrant Likely	select IRQ_DOMAIN
30220c3d931bSLubomir Rintel	select OLPC_EC
3023a7f7f624SMasahiro Yamada	help
30243ef0e1f8SAndres Salomon	  Add support for detecting the unique features of the OLPC
30253ef0e1f8SAndres Salomon	  XO hardware.
30263ef0e1f8SAndres Salomon
3027a3128588SDaniel Drakeconfig OLPC_XO1_PM
3028a3128588SDaniel Drake	bool "OLPC XO-1 Power Management"
3029fa112cf1SBorislav Petkov	depends on OLPC && MFD_CS5535=y && PM_SLEEP
3030a7f7f624SMasahiro Yamada	help
303197c4cb71SDaniel Drake	  Add support for poweroff and suspend of the OLPC XO-1 laptop.
3032bf1ebf00SDaniel Drake
3033cfee9597SDaniel Drakeconfig OLPC_XO1_RTC
3034cfee9597SDaniel Drake	bool "OLPC XO-1 Real Time Clock"
3035cfee9597SDaniel Drake	depends on OLPC_XO1_PM && RTC_DRV_CMOS
3036a7f7f624SMasahiro Yamada	help
3037cfee9597SDaniel Drake	  Add support for the XO-1 real time clock, which can be used as a
3038cfee9597SDaniel Drake	  programmable wakeup source.
3039cfee9597SDaniel Drake
30407feda8e9SDaniel Drakeconfig OLPC_XO1_SCI
30417feda8e9SDaniel Drake	bool "OLPC XO-1 SCI extras"
304292e830f2SArnd Bergmann	depends on OLPC && OLPC_XO1_PM && GPIO_CS5535=y
3043ed8e47feSRandy Dunlap	depends on INPUT=y
3044d8d01a63SDaniel Drake	select POWER_SUPPLY
3045a7f7f624SMasahiro Yamada	help
30467feda8e9SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1 laptop:
30477bc74b3dSDaniel Drake	   - EC-driven system wakeups
30487feda8e9SDaniel Drake	   - Power button
30497bc74b3dSDaniel Drake	   - Ebook switch
30502cf2baeaSDaniel Drake	   - Lid switch
3051e1040ac6SDaniel Drake	   - AC adapter status updates
3052e1040ac6SDaniel Drake	   - Battery status updates
30537feda8e9SDaniel Drake
3054a0f30f59SDaniel Drakeconfig OLPC_XO15_SCI
3055a0f30f59SDaniel Drake	bool "OLPC XO-1.5 SCI extras"
3056d8d01a63SDaniel Drake	depends on OLPC && ACPI
3057d8d01a63SDaniel Drake	select POWER_SUPPLY
3058a7f7f624SMasahiro Yamada	help
3059a0f30f59SDaniel Drake	  Add support for SCI-based features of the OLPC XO-1.5 laptop:
3060a0f30f59SDaniel Drake	   - EC-driven system wakeups
3061a0f30f59SDaniel Drake	   - AC adapter status updates
3062a0f30f59SDaniel Drake	   - Battery status updates
3063e279b6c1SSam Ravnborg
3064298c9babSDmitry Torokhovconfig GEODE_COMMON
3065298c9babSDmitry Torokhov	bool
3066298c9babSDmitry Torokhov
3067d4f3e350SEd Wildgooseconfig ALIX
3068d4f3e350SEd Wildgoose	bool "PCEngines ALIX System Support (LED setup)"
3069d4f3e350SEd Wildgoose	select GPIOLIB
3070298c9babSDmitry Torokhov	select GEODE_COMMON
3071a7f7f624SMasahiro Yamada	help
3072d4f3e350SEd Wildgoose	  This option enables system support for the PCEngines ALIX.
3073d4f3e350SEd Wildgoose	  At present this just sets up LEDs for GPIO control on
3074d4f3e350SEd Wildgoose	  ALIX2/3/6 boards.  However, other system specific setup should
3075d4f3e350SEd Wildgoose	  get added here.
3076d4f3e350SEd Wildgoose
3077d4f3e350SEd Wildgoose	  Note: You must still enable the drivers for GPIO and LED support
3078d4f3e350SEd Wildgoose	  (GPIO_CS5535 & LEDS_GPIO) to actually use the LEDs
3079d4f3e350SEd Wildgoose
3080d4f3e350SEd Wildgoose	  Note: You have to set alix.force=1 for boards with Award BIOS.
3081d4f3e350SEd Wildgoose
3082da4e3302SPhilip Prindevilleconfig NET5501
3083da4e3302SPhilip Prindeville	bool "Soekris Engineering net5501 System Support (LEDS, GPIO, etc)"
3084da4e3302SPhilip Prindeville	select GPIOLIB
3085298c9babSDmitry Torokhov	select GEODE_COMMON
3086a7f7f624SMasahiro Yamada	help
3087da4e3302SPhilip Prindeville	  This option enables system support for the Soekris Engineering net5501.
3088da4e3302SPhilip Prindeville
30893197059aSPhilip A. Prindevilleconfig GEOS
30903197059aSPhilip A. Prindeville	bool "Traverse Technologies GEOS System Support (LEDS, GPIO, etc)"
30913197059aSPhilip A. Prindeville	select GPIOLIB
3092298c9babSDmitry Torokhov	select GEODE_COMMON
30933197059aSPhilip A. Prindeville	depends on DMI
3094a7f7f624SMasahiro Yamada	help
30953197059aSPhilip A. Prindeville	  This option enables system support for the Traverse Technologies GEOS.
30963197059aSPhilip A. Prindeville
30977d029125SVivien Didelotconfig TS5500
30987d029125SVivien Didelot	bool "Technologic Systems TS-5500 platform support"
30997d029125SVivien Didelot	depends on MELAN
31007d029125SVivien Didelot	select CHECK_SIGNATURE
31017d029125SVivien Didelot	select NEW_LEDS
31027d029125SVivien Didelot	select LEDS_CLASS
3103a7f7f624SMasahiro Yamada	help
31047d029125SVivien Didelot	  This option enables system support for the Technologic Systems TS-5500.
31057d029125SVivien Didelot
3106e279b6c1SSam Ravnborgendif # X86_32
3107e279b6c1SSam Ravnborg
310823ac4ae8SAndreas Herrmannconfig AMD_NB
3109e279b6c1SSam Ravnborg	def_bool y
3110e6e6e5e8SYazen Ghannam	depends on AMD_NODE
3111e6e6e5e8SYazen Ghannam
3112e6e6e5e8SYazen Ghannamconfig AMD_NODE
3113e6e6e5e8SYazen Ghannam	def_bool y
31140e152cd7SBorislav Petkov	depends on CPU_SUP_AMD && PCI
3115e279b6c1SSam Ravnborg
3116e279b6c1SSam Ravnborgendmenu
3117e279b6c1SSam Ravnborg
31181572497cSChristoph Hellwigmenu "Binary Emulations"
3119e279b6c1SSam Ravnborg
3120e279b6c1SSam Ravnborgconfig IA32_EMULATION
3121e279b6c1SSam Ravnborg	bool "IA32 Emulation"
3122e279b6c1SSam Ravnborg	depends on X86_64
312339f88911SIngo Molnar	select ARCH_WANT_OLD_COMPAT_IPC
3124d1603990SRandy Dunlap	select BINFMT_ELF
312539f88911SIngo Molnar	select COMPAT_OLD_SIGACTION
3126a7f7f624SMasahiro Yamada	help
31275fd92e65SH. J. Lu	  Include code to run legacy 32-bit programs under a
31285fd92e65SH. J. Lu	  64-bit kernel. You should likely turn this on, unless you're
31295fd92e65SH. J. Lu	  100% sure that you don't have any 32-bit programs left.
3130e279b6c1SSam Ravnborg
3131a11e0975SNikolay Borisovconfig IA32_EMULATION_DEFAULT_DISABLED
3132a11e0975SNikolay Borisov	bool "IA32 emulation disabled by default"
3133a11e0975SNikolay Borisov	default n
3134a11e0975SNikolay Borisov	depends on IA32_EMULATION
3135a11e0975SNikolay Borisov	help
3136a11e0975SNikolay Borisov	  Make IA32 emulation disabled by default. This prevents loading 32-bit
3137a11e0975SNikolay Borisov	  processes and access to 32-bit syscalls. If unsure, leave it to its
3138a11e0975SNikolay Borisov	  default value.
3139a11e0975SNikolay Borisov
314083a44a4fSMasahiro Yamadaconfig X86_X32_ABI
31416ea30386SKees Cook	bool "x32 ABI for 64-bit mode"
31429b54050bSBrian Gerst	depends on X86_64
3143aaeed6ecSNathan Chancellor	# llvm-objcopy does not convert x86_64 .note.gnu.property or
3144aaeed6ecSNathan Chancellor	# compressed debug sections to x86_x32 properly:
3145aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/514
3146aaeed6ecSNathan Chancellor	# https://github.com/ClangBuiltLinux/linux/issues/1141
3147aaeed6ecSNathan Chancellor	depends on $(success,$(OBJCOPY) --version | head -n1 | grep -qv llvm)
3148a7f7f624SMasahiro Yamada	help
31495fd92e65SH. J. Lu	  Include code to run binaries for the x32 native 32-bit ABI
31505fd92e65SH. J. Lu	  for 64-bit processors.  An x32 process gets access to the
31515fd92e65SH. J. Lu	  full 64-bit register file and wide data path while leaving
31525fd92e65SH. J. Lu	  pointers at 32 bits for smaller memory footprint.
31535fd92e65SH. J. Lu
3154953fee1dSIngo Molnarconfig COMPAT_32
3155953fee1dSIngo Molnar	def_bool y
3156953fee1dSIngo Molnar	depends on IA32_EMULATION || X86_32
3157953fee1dSIngo Molnar	select HAVE_UID16
3158953fee1dSIngo Molnar	select OLD_SIGSUSPEND3
3159953fee1dSIngo Molnar
3160e279b6c1SSam Ravnborgconfig COMPAT
31613c2362e6SHarvey Harrison	def_bool y
316283a44a4fSMasahiro Yamada	depends on IA32_EMULATION || X86_X32_ABI
3163e279b6c1SSam Ravnborg
3164e279b6c1SSam Ravnborgconfig COMPAT_FOR_U64_ALIGNMENT
31653120e25eSJan Beulich	def_bool y
3166a9251280SLinus Torvalds	depends on COMPAT
3167ee009e4aSDavid Howells
3168e279b6c1SSam Ravnborgendmenu
3169e279b6c1SSam Ravnborg
3170e5beae16SKeith Packardconfig HAVE_ATOMIC_IOMAP
3171e5beae16SKeith Packard	def_bool y
3172e5beae16SKeith Packard	depends on X86_32
3173e5beae16SKeith Packard
3174edf88417SAvi Kivitysource "arch/x86/kvm/Kconfig"
31755e8ebd84SJason A. Donenfeld
31763d37d939SH. Peter Anvin (Intel)source "arch/x86/Kconfig.cpufeatures"
31773d37d939SH. Peter Anvin (Intel)
31785e8ebd84SJason A. Donenfeldsource "arch/x86/Kconfig.assembler"
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