1*3d37d939SH. Peter Anvin (Intel)# SPDX-License-Identifier: GPL-2.0 2*3d37d939SH. Peter Anvin (Intel)# 3*3d37d939SH. Peter Anvin (Intel)# x86 feature bits (see arch/x86/include/asm/cpufeatures.h) that are 4*3d37d939SH. Peter Anvin (Intel)# either REQUIRED to be enabled, or DISABLED (always ignored) for this 5*3d37d939SH. Peter Anvin (Intel)# particular compile-time configuration. The tests for these features 6*3d37d939SH. Peter Anvin (Intel)# are turned into compile-time constants via the generated 7*3d37d939SH. Peter Anvin (Intel)# <asm/cpufeaturemasks.h>. 8*3d37d939SH. Peter Anvin (Intel)# 9*3d37d939SH. Peter Anvin (Intel)# The naming of these variables *must* match asm/cpufeatures.h, e.g., 10*3d37d939SH. Peter Anvin (Intel)# X86_FEATURE_ALWAYS <==> X86_REQUIRED_FEATURE_ALWAYS 11*3d37d939SH. Peter Anvin (Intel)# X86_FEATURE_FRED <==> X86_DISABLED_FEATURE_FRED 12*3d37d939SH. Peter Anvin (Intel)# 13*3d37d939SH. Peter Anvin (Intel)# And these REQUIRED and DISABLED config options are manipulated in an 14*3d37d939SH. Peter Anvin (Intel)# AWK script as the following example: 15*3d37d939SH. Peter Anvin (Intel)# 16*3d37d939SH. Peter Anvin (Intel)# +----------------------+ 17*3d37d939SH. Peter Anvin (Intel)# | X86_FRED = y ? | 18*3d37d939SH. Peter Anvin (Intel)# +----------------------+ 19*3d37d939SH. Peter Anvin (Intel)# / \ 20*3d37d939SH. Peter Anvin (Intel)# Y / \ N 21*3d37d939SH. Peter Anvin (Intel)# +-------------------------------------+ +-------------------------------+ 22*3d37d939SH. Peter Anvin (Intel)# | X86_DISABLED_FEATURE_FRED undefined | | X86_DISABLED_FEATURE_FRED = y | 23*3d37d939SH. Peter Anvin (Intel)# +-------------------------------------+ +-------------------------------+ 24*3d37d939SH. Peter Anvin (Intel)# | 25*3d37d939SH. Peter Anvin (Intel)# | 26*3d37d939SH. Peter Anvin (Intel)# +-------------------------------------------+ | 27*3d37d939SH. Peter Anvin (Intel)# | X86_FEATURE_FRED: feature word 12, bit 17 | ---->| 28*3d37d939SH. Peter Anvin (Intel)# +-------------------------------------------+ | 29*3d37d939SH. Peter Anvin (Intel)# | 30*3d37d939SH. Peter Anvin (Intel)# | 31*3d37d939SH. Peter Anvin (Intel)# +-------------------------------+ 32*3d37d939SH. Peter Anvin (Intel)# | set bit 17 of DISABLED_MASK12 | 33*3d37d939SH. Peter Anvin (Intel)# +-------------------------------+ 34*3d37d939SH. Peter Anvin (Intel)# 35*3d37d939SH. Peter Anvin (Intel) 36*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_ALWAYS 37*3d37d939SH. Peter Anvin (Intel) def_bool y 38*3d37d939SH. Peter Anvin (Intel) 39*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_NOPL 40*3d37d939SH. Peter Anvin (Intel) def_bool y 41*3d37d939SH. Peter Anvin (Intel) depends on X86_64 || X86_P6_NOP 42*3d37d939SH. Peter Anvin (Intel) 43*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_CX8 44*3d37d939SH. Peter Anvin (Intel) def_bool y 45*3d37d939SH. Peter Anvin (Intel) depends on X86_CX8 46*3d37d939SH. Peter Anvin (Intel) 47*3d37d939SH. Peter Anvin (Intel)# this should be set for all -march=.. options where the compiler 48*3d37d939SH. Peter Anvin (Intel)# generates cmov. 49*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_CMOV 50*3d37d939SH. Peter Anvin (Intel) def_bool y 51*3d37d939SH. Peter Anvin (Intel) depends on X86_CMOV 52*3d37d939SH. Peter Anvin (Intel) 53*3d37d939SH. Peter Anvin (Intel)# this should be set for all -march= options where the compiler 54*3d37d939SH. Peter Anvin (Intel)# generates movbe. 55*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_MOVBE 56*3d37d939SH. Peter Anvin (Intel) def_bool y 57*3d37d939SH. Peter Anvin (Intel) depends on MATOM 58*3d37d939SH. Peter Anvin (Intel) 59*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_CPUID 60*3d37d939SH. Peter Anvin (Intel) def_bool y 61*3d37d939SH. Peter Anvin (Intel) depends on X86_64 62*3d37d939SH. Peter Anvin (Intel) 63*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_UP 64*3d37d939SH. Peter Anvin (Intel) def_bool y 65*3d37d939SH. Peter Anvin (Intel) depends on !SMP 66*3d37d939SH. Peter Anvin (Intel) 67*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_FPU 68*3d37d939SH. Peter Anvin (Intel) def_bool y 69*3d37d939SH. Peter Anvin (Intel) depends on !MATH_EMULATION 70*3d37d939SH. Peter Anvin (Intel) 71*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_PAE 72*3d37d939SH. Peter Anvin (Intel) def_bool y 73*3d37d939SH. Peter Anvin (Intel) depends on X86_64 || X86_PAE 74*3d37d939SH. Peter Anvin (Intel) 75*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_PSE 76*3d37d939SH. Peter Anvin (Intel) def_bool y 77*3d37d939SH. Peter Anvin (Intel) depends on X86_64 && !PARAVIRT_XXL 78*3d37d939SH. Peter Anvin (Intel) 79*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_PGE 80*3d37d939SH. Peter Anvin (Intel) def_bool y 81*3d37d939SH. Peter Anvin (Intel) depends on X86_64 && !PARAVIRT_XXL 82*3d37d939SH. Peter Anvin (Intel) 83*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_MSR 84*3d37d939SH. Peter Anvin (Intel) def_bool y 85*3d37d939SH. Peter Anvin (Intel) depends on X86_64 86*3d37d939SH. Peter Anvin (Intel) 87*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_FXSR 88*3d37d939SH. Peter Anvin (Intel) def_bool y 89*3d37d939SH. Peter Anvin (Intel) depends on X86_64 90*3d37d939SH. Peter Anvin (Intel) 91*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_XMM 92*3d37d939SH. Peter Anvin (Intel) def_bool y 93*3d37d939SH. Peter Anvin (Intel) depends on X86_64 94*3d37d939SH. Peter Anvin (Intel) 95*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_XMM2 96*3d37d939SH. Peter Anvin (Intel) def_bool y 97*3d37d939SH. Peter Anvin (Intel) depends on X86_64 98*3d37d939SH. Peter Anvin (Intel) 99*3d37d939SH. Peter Anvin (Intel)config X86_REQUIRED_FEATURE_LM 100*3d37d939SH. Peter Anvin (Intel) def_bool y 101*3d37d939SH. Peter Anvin (Intel) depends on X86_64 102*3d37d939SH. Peter Anvin (Intel) 103*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_UMIP 104*3d37d939SH. Peter Anvin (Intel) def_bool y 105*3d37d939SH. Peter Anvin (Intel) depends on !X86_UMIP 106*3d37d939SH. Peter Anvin (Intel) 107*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_VME 108*3d37d939SH. Peter Anvin (Intel) def_bool y 109*3d37d939SH. Peter Anvin (Intel) depends on X86_64 110*3d37d939SH. Peter Anvin (Intel) 111*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_K6_MTRR 112*3d37d939SH. Peter Anvin (Intel) def_bool y 113*3d37d939SH. Peter Anvin (Intel) depends on X86_64 114*3d37d939SH. Peter Anvin (Intel) 115*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_CYRIX_ARR 116*3d37d939SH. Peter Anvin (Intel) def_bool y 117*3d37d939SH. Peter Anvin (Intel) depends on X86_64 118*3d37d939SH. Peter Anvin (Intel) 119*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_CENTAUR_MCR 120*3d37d939SH. Peter Anvin (Intel) def_bool y 121*3d37d939SH. Peter Anvin (Intel) depends on X86_64 122*3d37d939SH. Peter Anvin (Intel) 123*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_PCID 124*3d37d939SH. Peter Anvin (Intel) def_bool y 125*3d37d939SH. Peter Anvin (Intel) depends on !X86_64 126*3d37d939SH. Peter Anvin (Intel) 127*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_PKU 128*3d37d939SH. Peter Anvin (Intel) def_bool y 129*3d37d939SH. Peter Anvin (Intel) depends on !X86_INTEL_MEMORY_PROTECTION_KEYS 130*3d37d939SH. Peter Anvin (Intel) 131*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_OSPKE 132*3d37d939SH. Peter Anvin (Intel) def_bool y 133*3d37d939SH. Peter Anvin (Intel) depends on !X86_INTEL_MEMORY_PROTECTION_KEYS 134*3d37d939SH. Peter Anvin (Intel) 135*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_LA57 136*3d37d939SH. Peter Anvin (Intel) def_bool y 137*3d37d939SH. Peter Anvin (Intel) depends on !X86_5LEVEL 138*3d37d939SH. Peter Anvin (Intel) 139*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_PTI 140*3d37d939SH. Peter Anvin (Intel) def_bool y 141*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_PAGE_TABLE_ISOLATION 142*3d37d939SH. Peter Anvin (Intel) 143*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_RETPOLINE 144*3d37d939SH. Peter Anvin (Intel) def_bool y 145*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_RETPOLINE 146*3d37d939SH. Peter Anvin (Intel) 147*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_RETPOLINE_LFENCE 148*3d37d939SH. Peter Anvin (Intel) def_bool y 149*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_RETPOLINE 150*3d37d939SH. Peter Anvin (Intel) 151*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_RETHUNK 152*3d37d939SH. Peter Anvin (Intel) def_bool y 153*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_RETHUNK 154*3d37d939SH. Peter Anvin (Intel) 155*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_UNRET 156*3d37d939SH. Peter Anvin (Intel) def_bool y 157*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_UNRET_ENTRY 158*3d37d939SH. Peter Anvin (Intel) 159*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_CALL_DEPTH 160*3d37d939SH. Peter Anvin (Intel) def_bool y 161*3d37d939SH. Peter Anvin (Intel) depends on !MITIGATION_CALL_DEPTH_TRACKING 162*3d37d939SH. Peter Anvin (Intel) 163*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_LAM 164*3d37d939SH. Peter Anvin (Intel) def_bool y 165*3d37d939SH. Peter Anvin (Intel) depends on !ADDRESS_MASKING 166*3d37d939SH. Peter Anvin (Intel) 167*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_ENQCMD 168*3d37d939SH. Peter Anvin (Intel) def_bool y 169*3d37d939SH. Peter Anvin (Intel) depends on !INTEL_IOMMU_SVM 170*3d37d939SH. Peter Anvin (Intel) 171*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_SGX 172*3d37d939SH. Peter Anvin (Intel) def_bool y 173*3d37d939SH. Peter Anvin (Intel) depends on !X86_SGX 174*3d37d939SH. Peter Anvin (Intel) 175*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_XENPV 176*3d37d939SH. Peter Anvin (Intel) def_bool y 177*3d37d939SH. Peter Anvin (Intel) depends on !XEN_PV 178*3d37d939SH. Peter Anvin (Intel) 179*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_TDX_GUEST 180*3d37d939SH. Peter Anvin (Intel) def_bool y 181*3d37d939SH. Peter Anvin (Intel) depends on !INTEL_TDX_GUEST 182*3d37d939SH. Peter Anvin (Intel) 183*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_USER_SHSTK 184*3d37d939SH. Peter Anvin (Intel) def_bool y 185*3d37d939SH. Peter Anvin (Intel) depends on !X86_USER_SHADOW_STACK 186*3d37d939SH. Peter Anvin (Intel) 187*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_IBT 188*3d37d939SH. Peter Anvin (Intel) def_bool y 189*3d37d939SH. Peter Anvin (Intel) depends on !X86_KERNEL_IBT 190*3d37d939SH. Peter Anvin (Intel) 191*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_FRED 192*3d37d939SH. Peter Anvin (Intel) def_bool y 193*3d37d939SH. Peter Anvin (Intel) depends on !X86_FRED 194*3d37d939SH. Peter Anvin (Intel) 195*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_SEV_SNP 196*3d37d939SH. Peter Anvin (Intel) def_bool y 197*3d37d939SH. Peter Anvin (Intel) depends on !KVM_AMD_SEV 198*3d37d939SH. Peter Anvin (Intel) 199*3d37d939SH. Peter Anvin (Intel)config X86_DISABLED_FEATURE_INVLPGB 200*3d37d939SH. Peter Anvin (Intel) def_bool y 201*3d37d939SH. Peter Anvin (Intel) depends on !BROADCAST_TLB_FLUSH 202