1*add5ca2cSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
27d740a06SYoshihiro Shimoda /*
37d740a06SYoshihiro Shimoda * arch/sh/kernel/cpu/sh4a/clock-sh7763.c
47d740a06SYoshihiro Shimoda *
57d740a06SYoshihiro Shimoda * SH7763 support for the clock framework
67d740a06SYoshihiro Shimoda *
77d740a06SYoshihiro Shimoda * Copyright (C) 2005 Paul Mundt
87d740a06SYoshihiro Shimoda * Copyright (C) 2007 Yoshihiro Shimoda
97d740a06SYoshihiro Shimoda */
107d740a06SYoshihiro Shimoda #include <linux/init.h>
117d740a06SYoshihiro Shimoda #include <linux/kernel.h>
12d6a94217SMagnus Damm #include <linux/io.h>
136d803ba7SJean-Christop PLAGNIOL-VILLARD #include <linux/clkdev.h>
147d740a06SYoshihiro Shimoda #include <asm/clock.h>
157d740a06SYoshihiro Shimoda #include <asm/freq.h>
167d740a06SYoshihiro Shimoda #include <asm/io.h>
177d740a06SYoshihiro Shimoda
187d740a06SYoshihiro Shimoda static int bfc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
197d740a06SYoshihiro Shimoda static int p0fc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
207d740a06SYoshihiro Shimoda static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
217d740a06SYoshihiro Shimoda
master_clk_init(struct clk * clk)227d740a06SYoshihiro Shimoda static void master_clk_init(struct clk *clk)
237d740a06SYoshihiro Shimoda {
249d56dd3bSPaul Mundt clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
257d740a06SYoshihiro Shimoda }
267d740a06SYoshihiro Shimoda
2733cb61a4SMagnus Damm static struct sh_clk_ops sh7763_master_clk_ops = {
287d740a06SYoshihiro Shimoda .init = master_clk_init,
297d740a06SYoshihiro Shimoda };
307d740a06SYoshihiro Shimoda
module_clk_recalc(struct clk * clk)31b68d8201SPaul Mundt static unsigned long module_clk_recalc(struct clk *clk)
327d740a06SYoshihiro Shimoda {
339d56dd3bSPaul Mundt int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
34b68d8201SPaul Mundt return clk->parent->rate / p0fc_divisors[idx];
357d740a06SYoshihiro Shimoda }
367d740a06SYoshihiro Shimoda
3733cb61a4SMagnus Damm static struct sh_clk_ops sh7763_module_clk_ops = {
387d740a06SYoshihiro Shimoda .recalc = module_clk_recalc,
397d740a06SYoshihiro Shimoda };
407d740a06SYoshihiro Shimoda
bus_clk_recalc(struct clk * clk)41b68d8201SPaul Mundt static unsigned long bus_clk_recalc(struct clk *clk)
427d740a06SYoshihiro Shimoda {
439d56dd3bSPaul Mundt int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
44b68d8201SPaul Mundt return clk->parent->rate / bfc_divisors[idx];
457d740a06SYoshihiro Shimoda }
467d740a06SYoshihiro Shimoda
4733cb61a4SMagnus Damm static struct sh_clk_ops sh7763_bus_clk_ops = {
487d740a06SYoshihiro Shimoda .recalc = bus_clk_recalc,
497d740a06SYoshihiro Shimoda };
507d740a06SYoshihiro Shimoda
5133cb61a4SMagnus Damm static struct sh_clk_ops sh7763_cpu_clk_ops = {
52a02cb230SPaul Mundt .recalc = followparent_recalc,
537d740a06SYoshihiro Shimoda };
547d740a06SYoshihiro Shimoda
5533cb61a4SMagnus Damm static struct sh_clk_ops *sh7763_clk_ops[] = {
567d740a06SYoshihiro Shimoda &sh7763_master_clk_ops,
577d740a06SYoshihiro Shimoda &sh7763_module_clk_ops,
587d740a06SYoshihiro Shimoda &sh7763_bus_clk_ops,
597d740a06SYoshihiro Shimoda &sh7763_cpu_clk_ops,
607d740a06SYoshihiro Shimoda };
617d740a06SYoshihiro Shimoda
arch_init_clk_ops(struct sh_clk_ops ** ops,int idx)6233cb61a4SMagnus Damm void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
637d740a06SYoshihiro Shimoda {
647d740a06SYoshihiro Shimoda if (idx < ARRAY_SIZE(sh7763_clk_ops))
657d740a06SYoshihiro Shimoda *ops = sh7763_clk_ops[idx];
667d740a06SYoshihiro Shimoda }
677d740a06SYoshihiro Shimoda
shyway_clk_recalc(struct clk * clk)68b68d8201SPaul Mundt static unsigned long shyway_clk_recalc(struct clk *clk)
697d740a06SYoshihiro Shimoda {
709d56dd3bSPaul Mundt int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
71b68d8201SPaul Mundt return clk->parent->rate / cfc_divisors[idx];
727d740a06SYoshihiro Shimoda }
737d740a06SYoshihiro Shimoda
7433cb61a4SMagnus Damm static struct sh_clk_ops sh7763_shyway_clk_ops = {
757d740a06SYoshihiro Shimoda .recalc = shyway_clk_recalc,
767d740a06SYoshihiro Shimoda };
777d740a06SYoshihiro Shimoda
787d740a06SYoshihiro Shimoda static struct clk sh7763_shyway_clk = {
794ff29ff8SPaul Mundt .flags = CLK_ENABLE_ON_INIT,
807d740a06SYoshihiro Shimoda .ops = &sh7763_shyway_clk_ops,
817d740a06SYoshihiro Shimoda };
827d740a06SYoshihiro Shimoda
837d740a06SYoshihiro Shimoda /*
847d740a06SYoshihiro Shimoda * Additional SH7763-specific on-chip clocks that aren't already part of the
857d740a06SYoshihiro Shimoda * clock framework
867d740a06SYoshihiro Shimoda */
877d740a06SYoshihiro Shimoda static struct clk *sh7763_onchip_clocks[] = {
887d740a06SYoshihiro Shimoda &sh7763_shyway_clk,
897d740a06SYoshihiro Shimoda };
907d740a06SYoshihiro Shimoda
91d6a94217SMagnus Damm static struct clk_lookup lookups[] = {
92d6a94217SMagnus Damm /* main clocks */
93d6a94217SMagnus Damm CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
94d6a94217SMagnus Damm };
95d6a94217SMagnus Damm
arch_clk_init(void)969fe5ee0eSPaul Mundt int __init arch_clk_init(void)
977d740a06SYoshihiro Shimoda {
98253b0887SPaul Mundt struct clk *clk;
99f5c84cf5SPaul Mundt int i, ret = 0;
1007d740a06SYoshihiro Shimoda
101253b0887SPaul Mundt cpg_clk_init();
102253b0887SPaul Mundt
103253b0887SPaul Mundt clk = clk_get(NULL, "master_clk");
1047d740a06SYoshihiro Shimoda for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
1057d740a06SYoshihiro Shimoda struct clk *clkp = sh7763_onchip_clocks[i];
1067d740a06SYoshihiro Shimoda
1077d740a06SYoshihiro Shimoda clkp->parent = clk;
108f5c84cf5SPaul Mundt ret |= clk_register(clkp);
1097d740a06SYoshihiro Shimoda }
1107d740a06SYoshihiro Shimoda
1117d740a06SYoshihiro Shimoda clk_put(clk);
1127d740a06SYoshihiro Shimoda
113d6a94217SMagnus Damm clkdev_add_table(lookups, ARRAY_SIZE(lookups));
114d6a94217SMagnus Damm
115f5c84cf5SPaul Mundt return ret;
1167d740a06SYoshihiro Shimoda }
117