xref: /linux/arch/sh/kernel/cpu/sh2a/probe.c (revision c537b994505099b7197e7d3125b942ecbcc51eb6)
1 /*
2  * arch/sh/kernel/cpu/sh2a/probe.c
3  *
4  * CPU Subtype Probing for SH-2A.
5  *
6  * Copyright (C) 2004, 2005 Paul Mundt
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12 
13 #include <linux/init.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 
17 int __init detect_cpu_and_cache_system(void)
18 {
19 	/* Just SH7206 for now .. */
20 	current_cpu_data.type			= CPU_SH7206;
21 
22 	current_cpu_data.dcache.ways		= 4;
23 	current_cpu_data.dcache.way_incr	= (1 << 11);
24 	current_cpu_data.dcache.sets		= 128;
25 	current_cpu_data.dcache.entry_shift	= 4;
26 	current_cpu_data.dcache.linesz		= L1_CACHE_BYTES;
27 	current_cpu_data.dcache.flags		= 0;
28 
29 	/*
30 	 * The icache is the same as the dcache as far as this setup is
31 	 * concerned. The only real difference in hardware is that the icache
32 	 * lacks the U bit that the dcache has, none of this has any bearing
33 	 * on the cache info.
34 	 */
35 	current_cpu_data.icache		= current_cpu_data.dcache;
36 
37 	return 0;
38 }
39 
40