xref: /linux/arch/sh/boards/board-sh7785lcr.c (revision a77b5ac0ea8e47c77008d3a9a9976dcfbc01c42a)
1c8b5d9dcSPaul Mundt /*
2c8b5d9dcSPaul Mundt  * Renesas Technology Corp. R0P7785LC0011RL Support.
3c8b5d9dcSPaul Mundt  *
4c8b5d9dcSPaul Mundt  * Copyright (C) 2008  Yoshihiro Shimoda
5*a77b5ac0SPaul Mundt  * Copyright (C) 2009  Paul Mundt
6c8b5d9dcSPaul Mundt  *
7c8b5d9dcSPaul Mundt  * This file is subject to the terms and conditions of the GNU General Public
8c8b5d9dcSPaul Mundt  * License.  See the file "COPYING" in the main directory of this archive
9c8b5d9dcSPaul Mundt  * for more details.
10c8b5d9dcSPaul Mundt  */
11c8b5d9dcSPaul Mundt #include <linux/init.h>
12c8b5d9dcSPaul Mundt #include <linux/platform_device.h>
13c8b5d9dcSPaul Mundt #include <linux/sm501.h>
14c8b5d9dcSPaul Mundt #include <linux/sm501-regs.h>
15c8b5d9dcSPaul Mundt #include <linux/fb.h>
16c8b5d9dcSPaul Mundt #include <linux/mtd/physmap.h>
17c8b5d9dcSPaul Mundt #include <linux/delay.h>
18c8b5d9dcSPaul Mundt #include <linux/i2c.h>
19c8b5d9dcSPaul Mundt #include <linux/i2c-pca-platform.h>
20c8b5d9dcSPaul Mundt #include <linux/i2c-algo-pca.h>
21604437f0SPaul Mundt #include <linux/irq.h>
22*a77b5ac0SPaul Mundt #include <linux/clk.h>
23*a77b5ac0SPaul Mundt #include <linux/errno.h>
247639a454SPaul Mundt #include <mach/sh7785lcr.h>
25*a77b5ac0SPaul Mundt #include <asm/heartbeat.h>
26*a77b5ac0SPaul Mundt #include <asm/clock.h>
27c8b5d9dcSPaul Mundt 
28c8b5d9dcSPaul Mundt /*
29c8b5d9dcSPaul Mundt  * NOTE: This board has 2 physical memory maps.
30c8b5d9dcSPaul Mundt  *	 Please look at include/asm-sh/sh7785lcr.h or hardware manual.
31c8b5d9dcSPaul Mundt  */
32c8b5d9dcSPaul Mundt static struct resource heartbeat_resources[] = {
33c8b5d9dcSPaul Mundt 	[0] = {
34c8b5d9dcSPaul Mundt 		.start	= PLD_LEDCR,
35c8b5d9dcSPaul Mundt 		.end	= PLD_LEDCR,
36c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM,
37c8b5d9dcSPaul Mundt 	},
38c8b5d9dcSPaul Mundt };
39c8b5d9dcSPaul Mundt 
40c8b5d9dcSPaul Mundt static struct heartbeat_data heartbeat_data = {
41c8b5d9dcSPaul Mundt 	.regsize = 8,
42c8b5d9dcSPaul Mundt };
43c8b5d9dcSPaul Mundt 
44c8b5d9dcSPaul Mundt static struct platform_device heartbeat_device = {
45c8b5d9dcSPaul Mundt 	.name		= "heartbeat",
46c8b5d9dcSPaul Mundt 	.id		= -1,
47c8b5d9dcSPaul Mundt 	.dev	= {
48c8b5d9dcSPaul Mundt 		.platform_data	= &heartbeat_data,
49c8b5d9dcSPaul Mundt 	},
50c8b5d9dcSPaul Mundt 	.num_resources	= ARRAY_SIZE(heartbeat_resources),
51c8b5d9dcSPaul Mundt 	.resource	= heartbeat_resources,
52c8b5d9dcSPaul Mundt };
53c8b5d9dcSPaul Mundt 
54c8b5d9dcSPaul Mundt static struct mtd_partition nor_flash_partitions[] = {
55c8b5d9dcSPaul Mundt 	{
56c8b5d9dcSPaul Mundt 		.name		= "loader",
57c8b5d9dcSPaul Mundt 		.offset		= 0x00000000,
58c8b5d9dcSPaul Mundt 		.size		= 512 * 1024,
59c8b5d9dcSPaul Mundt 	},
60c8b5d9dcSPaul Mundt 	{
61c8b5d9dcSPaul Mundt 		.name		= "bootenv",
62c8b5d9dcSPaul Mundt 		.offset		= MTDPART_OFS_APPEND,
63c8b5d9dcSPaul Mundt 		.size		= 512 * 1024,
64c8b5d9dcSPaul Mundt 	},
65c8b5d9dcSPaul Mundt 	{
66c8b5d9dcSPaul Mundt 		.name		= "kernel",
67c8b5d9dcSPaul Mundt 		.offset		= MTDPART_OFS_APPEND,
68c8b5d9dcSPaul Mundt 		.size		= 4 * 1024 * 1024,
69c8b5d9dcSPaul Mundt 	},
70c8b5d9dcSPaul Mundt 	{
71c8b5d9dcSPaul Mundt 		.name		= "data",
72c8b5d9dcSPaul Mundt 		.offset		= MTDPART_OFS_APPEND,
73c8b5d9dcSPaul Mundt 		.size		= MTDPART_SIZ_FULL,
74c8b5d9dcSPaul Mundt 	},
75c8b5d9dcSPaul Mundt };
76c8b5d9dcSPaul Mundt 
77c8b5d9dcSPaul Mundt static struct physmap_flash_data nor_flash_data = {
78c8b5d9dcSPaul Mundt 	.width		= 4,
79c8b5d9dcSPaul Mundt 	.parts		= nor_flash_partitions,
80c8b5d9dcSPaul Mundt 	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
81c8b5d9dcSPaul Mundt };
82c8b5d9dcSPaul Mundt 
83c8b5d9dcSPaul Mundt static struct resource nor_flash_resources[] = {
84c8b5d9dcSPaul Mundt 	[0]	= {
85c8b5d9dcSPaul Mundt 		.start	= NOR_FLASH_ADDR,
86c8b5d9dcSPaul Mundt 		.end	= NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
87c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM,
88c8b5d9dcSPaul Mundt 	}
89c8b5d9dcSPaul Mundt };
90c8b5d9dcSPaul Mundt 
91c8b5d9dcSPaul Mundt static struct platform_device nor_flash_device = {
92c8b5d9dcSPaul Mundt 	.name		= "physmap-flash",
93c8b5d9dcSPaul Mundt 	.dev		= {
94c8b5d9dcSPaul Mundt 		.platform_data	= &nor_flash_data,
95c8b5d9dcSPaul Mundt 	},
96c8b5d9dcSPaul Mundt 	.num_resources	= ARRAY_SIZE(nor_flash_resources),
97c8b5d9dcSPaul Mundt 	.resource	= nor_flash_resources,
98c8b5d9dcSPaul Mundt };
99c8b5d9dcSPaul Mundt 
100c8b5d9dcSPaul Mundt static struct resource r8a66597_usb_host_resources[] = {
101c8b5d9dcSPaul Mundt 	[0] = {
102c8b5d9dcSPaul Mundt 		.name	= "r8a66597_hcd",
103c8b5d9dcSPaul Mundt 		.start	= R8A66597_ADDR,
104c8b5d9dcSPaul Mundt 		.end	= R8A66597_ADDR + R8A66597_SIZE - 1,
105c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM,
106c8b5d9dcSPaul Mundt 	},
107c8b5d9dcSPaul Mundt 	[1] = {
108c8b5d9dcSPaul Mundt 		.name	= "r8a66597_hcd",
109c8b5d9dcSPaul Mundt 		.start	= 2,
110c8b5d9dcSPaul Mundt 		.end	= 2,
111c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_IRQ,
112c8b5d9dcSPaul Mundt 	},
113c8b5d9dcSPaul Mundt };
114c8b5d9dcSPaul Mundt 
115c8b5d9dcSPaul Mundt static struct platform_device r8a66597_usb_host_device = {
116c8b5d9dcSPaul Mundt 	.name		= "r8a66597_hcd",
117c8b5d9dcSPaul Mundt 	.id		= -1,
118c8b5d9dcSPaul Mundt 	.dev = {
119c8b5d9dcSPaul Mundt 		.dma_mask		= NULL,
120c8b5d9dcSPaul Mundt 		.coherent_dma_mask	= 0xffffffff,
121c8b5d9dcSPaul Mundt 	},
122c8b5d9dcSPaul Mundt 	.num_resources	= ARRAY_SIZE(r8a66597_usb_host_resources),
123c8b5d9dcSPaul Mundt 	.resource	= r8a66597_usb_host_resources,
124c8b5d9dcSPaul Mundt };
125c8b5d9dcSPaul Mundt 
126c8b5d9dcSPaul Mundt static struct resource sm501_resources[] = {
127c8b5d9dcSPaul Mundt 	[0]	= {
128c8b5d9dcSPaul Mundt 		.start	= SM107_MEM_ADDR,
129c8b5d9dcSPaul Mundt 		.end	= SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
130c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM,
131c8b5d9dcSPaul Mundt 	},
132c8b5d9dcSPaul Mundt 	[1]	= {
133c8b5d9dcSPaul Mundt 		.start	= SM107_REG_ADDR,
134c8b5d9dcSPaul Mundt 		.end	= SM107_REG_ADDR + SM107_REG_SIZE - 1,
135c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM,
136c8b5d9dcSPaul Mundt 	},
137c8b5d9dcSPaul Mundt 	[2]	= {
138c8b5d9dcSPaul Mundt 		.start	= 10,
139c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_IRQ,
140c8b5d9dcSPaul Mundt 	},
141c8b5d9dcSPaul Mundt };
142c8b5d9dcSPaul Mundt 
143c8b5d9dcSPaul Mundt static struct fb_videomode sm501_default_mode_crt = {
144c8b5d9dcSPaul Mundt 	.pixclock	= 35714,	/* 28MHz */
145c8b5d9dcSPaul Mundt 	.xres		= 640,
146c8b5d9dcSPaul Mundt 	.yres		= 480,
147c8b5d9dcSPaul Mundt 	.left_margin	= 105,
148c8b5d9dcSPaul Mundt 	.right_margin	= 16,
149c8b5d9dcSPaul Mundt 	.upper_margin	= 33,
150c8b5d9dcSPaul Mundt 	.lower_margin	= 10,
151c8b5d9dcSPaul Mundt 	.hsync_len	= 39,
152c8b5d9dcSPaul Mundt 	.vsync_len	= 2,
153c8b5d9dcSPaul Mundt 	.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
154c8b5d9dcSPaul Mundt };
155c8b5d9dcSPaul Mundt 
156c8b5d9dcSPaul Mundt static struct fb_videomode sm501_default_mode_pnl = {
157c8b5d9dcSPaul Mundt 	.pixclock	= 40000,	/* 25MHz */
158c8b5d9dcSPaul Mundt 	.xres		= 640,
159c8b5d9dcSPaul Mundt 	.yres		= 480,
160c8b5d9dcSPaul Mundt 	.left_margin	= 2,
161c8b5d9dcSPaul Mundt 	.right_margin	= 16,
162c8b5d9dcSPaul Mundt 	.upper_margin	= 33,
163c8b5d9dcSPaul Mundt 	.lower_margin	= 10,
164c8b5d9dcSPaul Mundt 	.hsync_len	= 39,
165c8b5d9dcSPaul Mundt 	.vsync_len	= 2,
166c8b5d9dcSPaul Mundt 	.sync		= 0,
167c8b5d9dcSPaul Mundt };
168c8b5d9dcSPaul Mundt 
169c8b5d9dcSPaul Mundt static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
170c8b5d9dcSPaul Mundt 	.def_bpp	= 16,
171c8b5d9dcSPaul Mundt 	.def_mode	= &sm501_default_mode_pnl,
172c8b5d9dcSPaul Mundt 	.flags		= SM501FB_FLAG_USE_INIT_MODE |
173c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_USE_HWCURSOR |
174c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_USE_HWACCEL |
175c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_DISABLE_AT_EXIT |
176c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_PANEL_NO_VBIASEN,
177c8b5d9dcSPaul Mundt };
178c8b5d9dcSPaul Mundt 
179c8b5d9dcSPaul Mundt static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
180c8b5d9dcSPaul Mundt 	.def_bpp	= 16,
181c8b5d9dcSPaul Mundt 	.def_mode	= &sm501_default_mode_crt,
182c8b5d9dcSPaul Mundt 	.flags		= SM501FB_FLAG_USE_INIT_MODE |
183c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_USE_HWCURSOR |
184c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_USE_HWACCEL |
185c8b5d9dcSPaul Mundt 			  SM501FB_FLAG_DISABLE_AT_EXIT,
186c8b5d9dcSPaul Mundt };
187c8b5d9dcSPaul Mundt 
188c8b5d9dcSPaul Mundt static struct sm501_platdata_fb sm501_fb_pdata = {
189c8b5d9dcSPaul Mundt 	.fb_route	= SM501_FB_OWN,
190c8b5d9dcSPaul Mundt 	.fb_crt		= &sm501_pdata_fbsub_crt,
191c8b5d9dcSPaul Mundt 	.fb_pnl		= &sm501_pdata_fbsub_pnl,
192c8b5d9dcSPaul Mundt };
193c8b5d9dcSPaul Mundt 
194c8b5d9dcSPaul Mundt static struct sm501_initdata sm501_initdata = {
195c8b5d9dcSPaul Mundt 	.gpio_high	= {
196c8b5d9dcSPaul Mundt 		.set	= 0x00001fe0,
197c8b5d9dcSPaul Mundt 		.mask	= 0x0,
198c8b5d9dcSPaul Mundt 	},
199c8b5d9dcSPaul Mundt 	.devices	= 0,
200c8b5d9dcSPaul Mundt 	.mclk		= 84 * 1000000,
201c8b5d9dcSPaul Mundt 	.m1xclk		= 112 * 1000000,
202c8b5d9dcSPaul Mundt };
203c8b5d9dcSPaul Mundt 
204c8b5d9dcSPaul Mundt static struct sm501_platdata sm501_platform_data = {
205c8b5d9dcSPaul Mundt 	.init		= &sm501_initdata,
206c8b5d9dcSPaul Mundt 	.fb		= &sm501_fb_pdata,
207c8b5d9dcSPaul Mundt };
208c8b5d9dcSPaul Mundt 
209c8b5d9dcSPaul Mundt static struct platform_device sm501_device = {
210c8b5d9dcSPaul Mundt 	.name		= "sm501",
211c8b5d9dcSPaul Mundt 	.id		= -1,
212c8b5d9dcSPaul Mundt 	.dev		= {
213c8b5d9dcSPaul Mundt 		.platform_data	= &sm501_platform_data,
214c8b5d9dcSPaul Mundt 	},
215c8b5d9dcSPaul Mundt 	.num_resources	= ARRAY_SIZE(sm501_resources),
216c8b5d9dcSPaul Mundt 	.resource	= sm501_resources,
217c8b5d9dcSPaul Mundt };
218c8b5d9dcSPaul Mundt 
219c8b5d9dcSPaul Mundt static struct resource i2c_resources[] = {
220c8b5d9dcSPaul Mundt 	[0] = {
221c8b5d9dcSPaul Mundt 		.start	= PCA9564_ADDR,
222c8b5d9dcSPaul Mundt 		.end	= PCA9564_ADDR + PCA9564_SIZE - 1,
223c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
224c8b5d9dcSPaul Mundt 	},
225c8b5d9dcSPaul Mundt 	[1] = {
226c8b5d9dcSPaul Mundt 		.start	= 12,
227c8b5d9dcSPaul Mundt 		.end	= 12,
228c8b5d9dcSPaul Mundt 		.flags	= IORESOURCE_IRQ,
229c8b5d9dcSPaul Mundt 	},
230c8b5d9dcSPaul Mundt };
231c8b5d9dcSPaul Mundt 
232c8b5d9dcSPaul Mundt static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
233c8b5d9dcSPaul Mundt 	.gpio			= 0,
234c8b5d9dcSPaul Mundt 	.i2c_clock_speed	= I2C_PCA_CON_330kHz,
2358e99ada8SWolfram Sang 	.timeout		= HZ,
236c8b5d9dcSPaul Mundt };
237c8b5d9dcSPaul Mundt 
238c8b5d9dcSPaul Mundt static struct platform_device i2c_device = {
239c8b5d9dcSPaul Mundt 	.name		= "i2c-pca-platform",
240c8b5d9dcSPaul Mundt 	.id		= -1,
241c8b5d9dcSPaul Mundt 	.dev		= {
242c8b5d9dcSPaul Mundt 		.platform_data	= &i2c_platform_data,
243c8b5d9dcSPaul Mundt 	},
244c8b5d9dcSPaul Mundt 	.num_resources	= ARRAY_SIZE(i2c_resources),
245c8b5d9dcSPaul Mundt 	.resource	= i2c_resources,
246c8b5d9dcSPaul Mundt };
247c8b5d9dcSPaul Mundt 
248c8b5d9dcSPaul Mundt static struct platform_device *sh7785lcr_devices[] __initdata = {
249c8b5d9dcSPaul Mundt 	&heartbeat_device,
250c8b5d9dcSPaul Mundt 	&nor_flash_device,
251c8b5d9dcSPaul Mundt 	&r8a66597_usb_host_device,
252c8b5d9dcSPaul Mundt 	&sm501_device,
253c8b5d9dcSPaul Mundt 	&i2c_device,
254c8b5d9dcSPaul Mundt };
255c8b5d9dcSPaul Mundt 
256c8b5d9dcSPaul Mundt static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
257c8b5d9dcSPaul Mundt 	{
258c8b5d9dcSPaul Mundt 		I2C_BOARD_INFO("r2025sd", 0x32),
259c8b5d9dcSPaul Mundt 	},
260c8b5d9dcSPaul Mundt };
261c8b5d9dcSPaul Mundt 
262c8b5d9dcSPaul Mundt static int __init sh7785lcr_devices_setup(void)
263c8b5d9dcSPaul Mundt {
264c8b5d9dcSPaul Mundt 	i2c_register_board_info(0, sh7785lcr_i2c_devices,
265c8b5d9dcSPaul Mundt 				ARRAY_SIZE(sh7785lcr_i2c_devices));
266c8b5d9dcSPaul Mundt 
267c8b5d9dcSPaul Mundt 	return platform_add_devices(sh7785lcr_devices,
268c8b5d9dcSPaul Mundt 				    ARRAY_SIZE(sh7785lcr_devices));
269c8b5d9dcSPaul Mundt }
270c8b5d9dcSPaul Mundt __initcall(sh7785lcr_devices_setup);
271c8b5d9dcSPaul Mundt 
272c8b5d9dcSPaul Mundt /* Initialize IRQ setting */
273c8b5d9dcSPaul Mundt void __init init_sh7785lcr_IRQ(void)
274c8b5d9dcSPaul Mundt {
275c8b5d9dcSPaul Mundt 	plat_irq_setup_pins(IRQ_MODE_IRQ7654);
276c8b5d9dcSPaul Mundt 	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
277c8b5d9dcSPaul Mundt }
278c8b5d9dcSPaul Mundt 
279*a77b5ac0SPaul Mundt static int sh7785lcr_clk_init(void)
280*a77b5ac0SPaul Mundt {
281*a77b5ac0SPaul Mundt 	struct clk *clk;
282*a77b5ac0SPaul Mundt 	int ret;
283*a77b5ac0SPaul Mundt 
284*a77b5ac0SPaul Mundt 	clk = clk_get(NULL, "extal");
285*a77b5ac0SPaul Mundt 	if (!clk || IS_ERR(clk))
286*a77b5ac0SPaul Mundt 		return PTR_ERR(clk);
287*a77b5ac0SPaul Mundt 	ret = clk_set_rate(clk, 33333333);
288*a77b5ac0SPaul Mundt 	clk_put(clk);
289*a77b5ac0SPaul Mundt 
290*a77b5ac0SPaul Mundt 	return ret;
291*a77b5ac0SPaul Mundt }
292*a77b5ac0SPaul Mundt 
293c8b5d9dcSPaul Mundt static void sh7785lcr_power_off(void)
294c8b5d9dcSPaul Mundt {
295df4d4f1aSYoshihiro Shimoda 	unsigned char *p;
296df4d4f1aSYoshihiro Shimoda 
297df4d4f1aSYoshihiro Shimoda 	p = ioremap(PLD_POFCR, PLD_POFCR + 1);
298df4d4f1aSYoshihiro Shimoda 	if (!p) {
299df4d4f1aSYoshihiro Shimoda 		printk(KERN_ERR "%s: ioremap error.\n", __func__);
300df4d4f1aSYoshihiro Shimoda 		return;
301df4d4f1aSYoshihiro Shimoda 	}
302df4d4f1aSYoshihiro Shimoda 	*p = 0x01;
303df4d4f1aSYoshihiro Shimoda 	iounmap(p);
304600fa578SMagnus Damm 	set_bl_bit();
305600fa578SMagnus Damm 	while (1)
306600fa578SMagnus Damm 		cpu_relax();
307c8b5d9dcSPaul Mundt }
308c8b5d9dcSPaul Mundt 
309c8b5d9dcSPaul Mundt /* Initialize the board */
310c8b5d9dcSPaul Mundt static void __init sh7785lcr_setup(char **cmdline_p)
311c8b5d9dcSPaul Mundt {
312c8b5d9dcSPaul Mundt 	void __iomem *sm501_reg;
313c8b5d9dcSPaul Mundt 
314c8b5d9dcSPaul Mundt 	printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
315c8b5d9dcSPaul Mundt 
316c8b5d9dcSPaul Mundt 	pm_power_off = sh7785lcr_power_off;
317c8b5d9dcSPaul Mundt 
318c8b5d9dcSPaul Mundt 	/* sm501 DRAM configuration */
319c8b5d9dcSPaul Mundt 	sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
320c8b5d9dcSPaul Mundt 	writel(0x000307c2, sm501_reg);
321c8b5d9dcSPaul Mundt }
322c8b5d9dcSPaul Mundt 
323c8b5d9dcSPaul Mundt /*
324c8b5d9dcSPaul Mundt  * The Machine Vector
325c8b5d9dcSPaul Mundt  */
326c8b5d9dcSPaul Mundt static struct sh_machine_vector mv_sh7785lcr __initmv = {
327c8b5d9dcSPaul Mundt 	.mv_name		= "SH7785LCR",
328c8b5d9dcSPaul Mundt 	.mv_setup		= sh7785lcr_setup,
329*a77b5ac0SPaul Mundt 	.mv_clk_init		= sh7785lcr_clk_init,
330c8b5d9dcSPaul Mundt 	.mv_init_irq		= init_sh7785lcr_IRQ,
331c8b5d9dcSPaul Mundt };
332c8b5d9dcSPaul Mundt 
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