1c8b5d9dcSPaul Mundt /* 2c8b5d9dcSPaul Mundt * Renesas Technology Corp. R0P7785LC0011RL Support. 3c8b5d9dcSPaul Mundt * 4c8b5d9dcSPaul Mundt * Copyright (C) 2008 Yoshihiro Shimoda 5a77b5ac0SPaul Mundt * Copyright (C) 2009 Paul Mundt 6c8b5d9dcSPaul Mundt * 7c8b5d9dcSPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 8c8b5d9dcSPaul Mundt * License. See the file "COPYING" in the main directory of this archive 9c8b5d9dcSPaul Mundt * for more details. 10c8b5d9dcSPaul Mundt */ 11c8b5d9dcSPaul Mundt #include <linux/init.h> 12c8b5d9dcSPaul Mundt #include <linux/platform_device.h> 13c8b5d9dcSPaul Mundt #include <linux/sm501.h> 14c8b5d9dcSPaul Mundt #include <linux/sm501-regs.h> 15c8b5d9dcSPaul Mundt #include <linux/fb.h> 16c8b5d9dcSPaul Mundt #include <linux/mtd/physmap.h> 17c8b5d9dcSPaul Mundt #include <linux/delay.h> 185a62a225SYoshihiro Shimoda #include <linux/interrupt.h> 19c8b5d9dcSPaul Mundt #include <linux/i2c.h> 20c8b5d9dcSPaul Mundt #include <linux/i2c-pca-platform.h> 21c8b5d9dcSPaul Mundt #include <linux/i2c-algo-pca.h> 225a62a225SYoshihiro Shimoda #include <linux/usb/r8a66597.h> 23604437f0SPaul Mundt #include <linux/irq.h> 24a77b5ac0SPaul Mundt #include <linux/clk.h> 25a77b5ac0SPaul Mundt #include <linux/errno.h> 267639a454SPaul Mundt #include <mach/sh7785lcr.h> 275a62a225SYoshihiro Shimoda #include <cpu/sh7785.h> 28a77b5ac0SPaul Mundt #include <asm/heartbeat.h> 29a77b5ac0SPaul Mundt #include <asm/clock.h> 30c8b5d9dcSPaul Mundt 31c8b5d9dcSPaul Mundt /* 32c8b5d9dcSPaul Mundt * NOTE: This board has 2 physical memory maps. 33c8b5d9dcSPaul Mundt * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 34c8b5d9dcSPaul Mundt */ 35a09d2831SPaul Mundt static struct resource heartbeat_resource = { 36c8b5d9dcSPaul Mundt .start = PLD_LEDCR, 37c8b5d9dcSPaul Mundt .end = PLD_LEDCR, 38a09d2831SPaul Mundt .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 39c8b5d9dcSPaul Mundt }; 40c8b5d9dcSPaul Mundt 41c8b5d9dcSPaul Mundt static struct platform_device heartbeat_device = { 42c8b5d9dcSPaul Mundt .name = "heartbeat", 43c8b5d9dcSPaul Mundt .id = -1, 44a09d2831SPaul Mundt .num_resources = 1, 45a09d2831SPaul Mundt .resource = &heartbeat_resource, 46c8b5d9dcSPaul Mundt }; 47c8b5d9dcSPaul Mundt 48c8b5d9dcSPaul Mundt static struct mtd_partition nor_flash_partitions[] = { 49c8b5d9dcSPaul Mundt { 50c8b5d9dcSPaul Mundt .name = "loader", 51c8b5d9dcSPaul Mundt .offset = 0x00000000, 52c8b5d9dcSPaul Mundt .size = 512 * 1024, 53c8b5d9dcSPaul Mundt }, 54c8b5d9dcSPaul Mundt { 55c8b5d9dcSPaul Mundt .name = "bootenv", 56c8b5d9dcSPaul Mundt .offset = MTDPART_OFS_APPEND, 57c8b5d9dcSPaul Mundt .size = 512 * 1024, 58c8b5d9dcSPaul Mundt }, 59c8b5d9dcSPaul Mundt { 60c8b5d9dcSPaul Mundt .name = "kernel", 61c8b5d9dcSPaul Mundt .offset = MTDPART_OFS_APPEND, 62c8b5d9dcSPaul Mundt .size = 4 * 1024 * 1024, 63c8b5d9dcSPaul Mundt }, 64c8b5d9dcSPaul Mundt { 65c8b5d9dcSPaul Mundt .name = "data", 66c8b5d9dcSPaul Mundt .offset = MTDPART_OFS_APPEND, 67c8b5d9dcSPaul Mundt .size = MTDPART_SIZ_FULL, 68c8b5d9dcSPaul Mundt }, 69c8b5d9dcSPaul Mundt }; 70c8b5d9dcSPaul Mundt 71c8b5d9dcSPaul Mundt static struct physmap_flash_data nor_flash_data = { 72c8b5d9dcSPaul Mundt .width = 4, 73c8b5d9dcSPaul Mundt .parts = nor_flash_partitions, 74c8b5d9dcSPaul Mundt .nr_parts = ARRAY_SIZE(nor_flash_partitions), 75c8b5d9dcSPaul Mundt }; 76c8b5d9dcSPaul Mundt 77c8b5d9dcSPaul Mundt static struct resource nor_flash_resources[] = { 78c8b5d9dcSPaul Mundt [0] = { 79c8b5d9dcSPaul Mundt .start = NOR_FLASH_ADDR, 80c8b5d9dcSPaul Mundt .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1, 81c8b5d9dcSPaul Mundt .flags = IORESOURCE_MEM, 82c8b5d9dcSPaul Mundt } 83c8b5d9dcSPaul Mundt }; 84c8b5d9dcSPaul Mundt 85c8b5d9dcSPaul Mundt static struct platform_device nor_flash_device = { 86c8b5d9dcSPaul Mundt .name = "physmap-flash", 87c8b5d9dcSPaul Mundt .dev = { 88c8b5d9dcSPaul Mundt .platform_data = &nor_flash_data, 89c8b5d9dcSPaul Mundt }, 90c8b5d9dcSPaul Mundt .num_resources = ARRAY_SIZE(nor_flash_resources), 91c8b5d9dcSPaul Mundt .resource = nor_flash_resources, 92c8b5d9dcSPaul Mundt }; 93c8b5d9dcSPaul Mundt 945a62a225SYoshihiro Shimoda static struct r8a66597_platdata r8a66597_data = { 955a62a225SYoshihiro Shimoda .xtal = R8A66597_PLATDATA_XTAL_12MHZ, 965a62a225SYoshihiro Shimoda .vif = 1, 975a62a225SYoshihiro Shimoda }; 985a62a225SYoshihiro Shimoda 99c8b5d9dcSPaul Mundt static struct resource r8a66597_usb_host_resources[] = { 100c8b5d9dcSPaul Mundt [0] = { 101c8b5d9dcSPaul Mundt .start = R8A66597_ADDR, 102c8b5d9dcSPaul Mundt .end = R8A66597_ADDR + R8A66597_SIZE - 1, 103c8b5d9dcSPaul Mundt .flags = IORESOURCE_MEM, 104c8b5d9dcSPaul Mundt }, 105c8b5d9dcSPaul Mundt [1] = { 106c8b5d9dcSPaul Mundt .start = 2, 107c8b5d9dcSPaul Mundt .end = 2, 1085a62a225SYoshihiro Shimoda .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 109c8b5d9dcSPaul Mundt }, 110c8b5d9dcSPaul Mundt }; 111c8b5d9dcSPaul Mundt 112c8b5d9dcSPaul Mundt static struct platform_device r8a66597_usb_host_device = { 113c8b5d9dcSPaul Mundt .name = "r8a66597_hcd", 114c8b5d9dcSPaul Mundt .id = -1, 115c8b5d9dcSPaul Mundt .dev = { 116c8b5d9dcSPaul Mundt .dma_mask = NULL, 117c8b5d9dcSPaul Mundt .coherent_dma_mask = 0xffffffff, 1185a62a225SYoshihiro Shimoda .platform_data = &r8a66597_data, 119c8b5d9dcSPaul Mundt }, 120c8b5d9dcSPaul Mundt .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), 121c8b5d9dcSPaul Mundt .resource = r8a66597_usb_host_resources, 122c8b5d9dcSPaul Mundt }; 123c8b5d9dcSPaul Mundt 124c8b5d9dcSPaul Mundt static struct resource sm501_resources[] = { 125c8b5d9dcSPaul Mundt [0] = { 126c8b5d9dcSPaul Mundt .start = SM107_MEM_ADDR, 127c8b5d9dcSPaul Mundt .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1, 128c8b5d9dcSPaul Mundt .flags = IORESOURCE_MEM, 129c8b5d9dcSPaul Mundt }, 130c8b5d9dcSPaul Mundt [1] = { 131c8b5d9dcSPaul Mundt .start = SM107_REG_ADDR, 132c8b5d9dcSPaul Mundt .end = SM107_REG_ADDR + SM107_REG_SIZE - 1, 133c8b5d9dcSPaul Mundt .flags = IORESOURCE_MEM, 134c8b5d9dcSPaul Mundt }, 135c8b5d9dcSPaul Mundt [2] = { 136c8b5d9dcSPaul Mundt .start = 10, 137c8b5d9dcSPaul Mundt .flags = IORESOURCE_IRQ, 138c8b5d9dcSPaul Mundt }, 139c8b5d9dcSPaul Mundt }; 140c8b5d9dcSPaul Mundt 141c8b5d9dcSPaul Mundt static struct fb_videomode sm501_default_mode_crt = { 142c8b5d9dcSPaul Mundt .pixclock = 35714, /* 28MHz */ 143c8b5d9dcSPaul Mundt .xres = 640, 144c8b5d9dcSPaul Mundt .yres = 480, 145c8b5d9dcSPaul Mundt .left_margin = 105, 146c8b5d9dcSPaul Mundt .right_margin = 16, 147c8b5d9dcSPaul Mundt .upper_margin = 33, 148c8b5d9dcSPaul Mundt .lower_margin = 10, 149c8b5d9dcSPaul Mundt .hsync_len = 39, 150c8b5d9dcSPaul Mundt .vsync_len = 2, 151c8b5d9dcSPaul Mundt .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 152c8b5d9dcSPaul Mundt }; 153c8b5d9dcSPaul Mundt 154c8b5d9dcSPaul Mundt static struct fb_videomode sm501_default_mode_pnl = { 155c8b5d9dcSPaul Mundt .pixclock = 40000, /* 25MHz */ 156c8b5d9dcSPaul Mundt .xres = 640, 157c8b5d9dcSPaul Mundt .yres = 480, 158c8b5d9dcSPaul Mundt .left_margin = 2, 159c8b5d9dcSPaul Mundt .right_margin = 16, 160c8b5d9dcSPaul Mundt .upper_margin = 33, 161c8b5d9dcSPaul Mundt .lower_margin = 10, 162c8b5d9dcSPaul Mundt .hsync_len = 39, 163c8b5d9dcSPaul Mundt .vsync_len = 2, 164c8b5d9dcSPaul Mundt .sync = 0, 165c8b5d9dcSPaul Mundt }; 166c8b5d9dcSPaul Mundt 167c8b5d9dcSPaul Mundt static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { 168c8b5d9dcSPaul Mundt .def_bpp = 16, 169c8b5d9dcSPaul Mundt .def_mode = &sm501_default_mode_pnl, 170c8b5d9dcSPaul Mundt .flags = SM501FB_FLAG_USE_INIT_MODE | 171c8b5d9dcSPaul Mundt SM501FB_FLAG_USE_HWCURSOR | 172c8b5d9dcSPaul Mundt SM501FB_FLAG_USE_HWACCEL | 173c8b5d9dcSPaul Mundt SM501FB_FLAG_DISABLE_AT_EXIT | 174c8b5d9dcSPaul Mundt SM501FB_FLAG_PANEL_NO_VBIASEN, 175c8b5d9dcSPaul Mundt }; 176c8b5d9dcSPaul Mundt 177c8b5d9dcSPaul Mundt static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { 178c8b5d9dcSPaul Mundt .def_bpp = 16, 179c8b5d9dcSPaul Mundt .def_mode = &sm501_default_mode_crt, 180c8b5d9dcSPaul Mundt .flags = SM501FB_FLAG_USE_INIT_MODE | 181c8b5d9dcSPaul Mundt SM501FB_FLAG_USE_HWCURSOR | 182c8b5d9dcSPaul Mundt SM501FB_FLAG_USE_HWACCEL | 183c8b5d9dcSPaul Mundt SM501FB_FLAG_DISABLE_AT_EXIT, 184c8b5d9dcSPaul Mundt }; 185c8b5d9dcSPaul Mundt 186c8b5d9dcSPaul Mundt static struct sm501_platdata_fb sm501_fb_pdata = { 187c8b5d9dcSPaul Mundt .fb_route = SM501_FB_OWN, 188c8b5d9dcSPaul Mundt .fb_crt = &sm501_pdata_fbsub_crt, 189c8b5d9dcSPaul Mundt .fb_pnl = &sm501_pdata_fbsub_pnl, 190c8b5d9dcSPaul Mundt }; 191c8b5d9dcSPaul Mundt 192c8b5d9dcSPaul Mundt static struct sm501_initdata sm501_initdata = { 193c8b5d9dcSPaul Mundt .gpio_high = { 194c8b5d9dcSPaul Mundt .set = 0x00001fe0, 195c8b5d9dcSPaul Mundt .mask = 0x0, 196c8b5d9dcSPaul Mundt }, 197c8b5d9dcSPaul Mundt .devices = 0, 198c8b5d9dcSPaul Mundt .mclk = 84 * 1000000, 199c8b5d9dcSPaul Mundt .m1xclk = 112 * 1000000, 200c8b5d9dcSPaul Mundt }; 201c8b5d9dcSPaul Mundt 202c8b5d9dcSPaul Mundt static struct sm501_platdata sm501_platform_data = { 203c8b5d9dcSPaul Mundt .init = &sm501_initdata, 204c8b5d9dcSPaul Mundt .fb = &sm501_fb_pdata, 205c8b5d9dcSPaul Mundt }; 206c8b5d9dcSPaul Mundt 207c8b5d9dcSPaul Mundt static struct platform_device sm501_device = { 208c8b5d9dcSPaul Mundt .name = "sm501", 209c8b5d9dcSPaul Mundt .id = -1, 210c8b5d9dcSPaul Mundt .dev = { 211c8b5d9dcSPaul Mundt .platform_data = &sm501_platform_data, 212c8b5d9dcSPaul Mundt }, 213c8b5d9dcSPaul Mundt .num_resources = ARRAY_SIZE(sm501_resources), 214c8b5d9dcSPaul Mundt .resource = sm501_resources, 215c8b5d9dcSPaul Mundt }; 216c8b5d9dcSPaul Mundt 217e79d5747SYoshihiro Shimoda static struct resource i2c_proto_resources[] = { 218e79d5747SYoshihiro Shimoda [0] = { 219e79d5747SYoshihiro Shimoda .start = PCA9564_PROTO_32BIT_ADDR, 220e79d5747SYoshihiro Shimoda .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1, 221e79d5747SYoshihiro Shimoda .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 222e79d5747SYoshihiro Shimoda }, 223e79d5747SYoshihiro Shimoda [1] = { 224e79d5747SYoshihiro Shimoda .start = 12, 225e79d5747SYoshihiro Shimoda .end = 12, 226e79d5747SYoshihiro Shimoda .flags = IORESOURCE_IRQ, 227e79d5747SYoshihiro Shimoda }, 228e79d5747SYoshihiro Shimoda }; 229e79d5747SYoshihiro Shimoda 230c8b5d9dcSPaul Mundt static struct resource i2c_resources[] = { 231c8b5d9dcSPaul Mundt [0] = { 232c8b5d9dcSPaul Mundt .start = PCA9564_ADDR, 233c8b5d9dcSPaul Mundt .end = PCA9564_ADDR + PCA9564_SIZE - 1, 234c8b5d9dcSPaul Mundt .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 235c8b5d9dcSPaul Mundt }, 236c8b5d9dcSPaul Mundt [1] = { 237c8b5d9dcSPaul Mundt .start = 12, 238c8b5d9dcSPaul Mundt .end = 12, 239c8b5d9dcSPaul Mundt .flags = IORESOURCE_IRQ, 240c8b5d9dcSPaul Mundt }, 241c8b5d9dcSPaul Mundt }; 242c8b5d9dcSPaul Mundt 243c8b5d9dcSPaul Mundt static struct i2c_pca9564_pf_platform_data i2c_platform_data = { 244c8b5d9dcSPaul Mundt .gpio = 0, 245c8b5d9dcSPaul Mundt .i2c_clock_speed = I2C_PCA_CON_330kHz, 2468e99ada8SWolfram Sang .timeout = HZ, 247c8b5d9dcSPaul Mundt }; 248c8b5d9dcSPaul Mundt 249c8b5d9dcSPaul Mundt static struct platform_device i2c_device = { 250c8b5d9dcSPaul Mundt .name = "i2c-pca-platform", 251c8b5d9dcSPaul Mundt .id = -1, 252c8b5d9dcSPaul Mundt .dev = { 253c8b5d9dcSPaul Mundt .platform_data = &i2c_platform_data, 254c8b5d9dcSPaul Mundt }, 255c8b5d9dcSPaul Mundt .num_resources = ARRAY_SIZE(i2c_resources), 256c8b5d9dcSPaul Mundt .resource = i2c_resources, 257c8b5d9dcSPaul Mundt }; 258c8b5d9dcSPaul Mundt 259c8b5d9dcSPaul Mundt static struct platform_device *sh7785lcr_devices[] __initdata = { 260c8b5d9dcSPaul Mundt &heartbeat_device, 261c8b5d9dcSPaul Mundt &nor_flash_device, 262c8b5d9dcSPaul Mundt &r8a66597_usb_host_device, 263c8b5d9dcSPaul Mundt &sm501_device, 264c8b5d9dcSPaul Mundt &i2c_device, 265c8b5d9dcSPaul Mundt }; 266c8b5d9dcSPaul Mundt 267c8b5d9dcSPaul Mundt static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = { 268c8b5d9dcSPaul Mundt { 269c8b5d9dcSPaul Mundt I2C_BOARD_INFO("r2025sd", 0x32), 270c8b5d9dcSPaul Mundt }, 271c8b5d9dcSPaul Mundt }; 272c8b5d9dcSPaul Mundt 273c8b5d9dcSPaul Mundt static int __init sh7785lcr_devices_setup(void) 274c8b5d9dcSPaul Mundt { 275c8b5d9dcSPaul Mundt i2c_register_board_info(0, sh7785lcr_i2c_devices, 276c8b5d9dcSPaul Mundt ARRAY_SIZE(sh7785lcr_i2c_devices)); 277c8b5d9dcSPaul Mundt 278e79d5747SYoshihiro Shimoda if (mach_is_sh7785lcr_pt()) { 279d1af119aSPaul Mundt i2c_device.resource = i2c_proto_resources; 280e79d5747SYoshihiro Shimoda i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources); 281e79d5747SYoshihiro Shimoda } 282e79d5747SYoshihiro Shimoda 283c8b5d9dcSPaul Mundt return platform_add_devices(sh7785lcr_devices, 284c8b5d9dcSPaul Mundt ARRAY_SIZE(sh7785lcr_devices)); 285c8b5d9dcSPaul Mundt } 286c8b5d9dcSPaul Mundt __initcall(sh7785lcr_devices_setup); 287c8b5d9dcSPaul Mundt 288c8b5d9dcSPaul Mundt /* Initialize IRQ setting */ 289c8b5d9dcSPaul Mundt void __init init_sh7785lcr_IRQ(void) 290c8b5d9dcSPaul Mundt { 291c8b5d9dcSPaul Mundt plat_irq_setup_pins(IRQ_MODE_IRQ7654); 292c8b5d9dcSPaul Mundt plat_irq_setup_pins(IRQ_MODE_IRQ3210); 293c8b5d9dcSPaul Mundt } 294c8b5d9dcSPaul Mundt 295a77b5ac0SPaul Mundt static int sh7785lcr_clk_init(void) 296a77b5ac0SPaul Mundt { 297a77b5ac0SPaul Mundt struct clk *clk; 298a77b5ac0SPaul Mundt int ret; 299a77b5ac0SPaul Mundt 300a77b5ac0SPaul Mundt clk = clk_get(NULL, "extal"); 301a77b5ac0SPaul Mundt if (!clk || IS_ERR(clk)) 302a77b5ac0SPaul Mundt return PTR_ERR(clk); 303a77b5ac0SPaul Mundt ret = clk_set_rate(clk, 33333333); 304a77b5ac0SPaul Mundt clk_put(clk); 305a77b5ac0SPaul Mundt 306a77b5ac0SPaul Mundt return ret; 307a77b5ac0SPaul Mundt } 308a77b5ac0SPaul Mundt 309c8b5d9dcSPaul Mundt static void sh7785lcr_power_off(void) 310c8b5d9dcSPaul Mundt { 311df4d4f1aSYoshihiro Shimoda unsigned char *p; 312df4d4f1aSYoshihiro Shimoda 313df4d4f1aSYoshihiro Shimoda p = ioremap(PLD_POFCR, PLD_POFCR + 1); 314df4d4f1aSYoshihiro Shimoda if (!p) { 315df4d4f1aSYoshihiro Shimoda printk(KERN_ERR "%s: ioremap error.\n", __func__); 316df4d4f1aSYoshihiro Shimoda return; 317df4d4f1aSYoshihiro Shimoda } 318df4d4f1aSYoshihiro Shimoda *p = 0x01; 319df4d4f1aSYoshihiro Shimoda iounmap(p); 320600fa578SMagnus Damm set_bl_bit(); 321600fa578SMagnus Damm while (1) 322600fa578SMagnus Damm cpu_relax(); 323c8b5d9dcSPaul Mundt } 324c8b5d9dcSPaul Mundt 325c8b5d9dcSPaul Mundt /* Initialize the board */ 326c8b5d9dcSPaul Mundt static void __init sh7785lcr_setup(char **cmdline_p) 327c8b5d9dcSPaul Mundt { 328c8b5d9dcSPaul Mundt void __iomem *sm501_reg; 329c8b5d9dcSPaul Mundt 330c8b5d9dcSPaul Mundt printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n"); 331c8b5d9dcSPaul Mundt 332c8b5d9dcSPaul Mundt pm_power_off = sh7785lcr_power_off; 333c8b5d9dcSPaul Mundt 334c8b5d9dcSPaul Mundt /* sm501 DRAM configuration */ 335*6f82b6ebSMatt Fleming sm501_reg = ioremap_fixed(SM107_REG_ADDR, SM501_DRAM_CONTROL, 336*6f82b6ebSMatt Fleming PAGE_KERNEL); 337*6f82b6ebSMatt Fleming if (!sm501_reg) { 338*6f82b6ebSMatt Fleming printk(KERN_ERR "%s: ioremap error.\n", __func__); 339*6f82b6ebSMatt Fleming return; 340*6f82b6ebSMatt Fleming } 341*6f82b6ebSMatt Fleming 342*6f82b6ebSMatt Fleming writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL); 343*6f82b6ebSMatt Fleming iounmap_fixed(sm501_reg); 344c8b5d9dcSPaul Mundt } 345c8b5d9dcSPaul Mundt 34663d12e23SMagnus Damm /* Return the board specific boot mode pin configuration */ 34763d12e23SMagnus Damm static int sh7785lcr_mode_pins(void) 34863d12e23SMagnus Damm { 34963d12e23SMagnus Damm int value = 0; 35063d12e23SMagnus Damm 35163d12e23SMagnus Damm /* These are the factory default settings of S1 and S2. 35263d12e23SMagnus Damm * If you change these dip switches then you will need to 35363d12e23SMagnus Damm * adjust the values below as well. 35463d12e23SMagnus Damm */ 3550d4fdbb6SMagnus Damm value |= MODE_PIN4; /* Clock Mode 16 */ 3560d4fdbb6SMagnus Damm value |= MODE_PIN5; /* 32-bit Area0 bus width */ 3570d4fdbb6SMagnus Damm value |= MODE_PIN6; /* 32-bit Area0 bus width */ 3580d4fdbb6SMagnus Damm value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */ 3590d4fdbb6SMagnus Damm value |= MODE_PIN8; /* Little Endian */ 3600d4fdbb6SMagnus Damm value |= MODE_PIN9; /* Master Mode */ 3610d4fdbb6SMagnus Damm value |= MODE_PIN14; /* No PLL step-up */ 36263d12e23SMagnus Damm 36363d12e23SMagnus Damm return value; 36463d12e23SMagnus Damm } 36563d12e23SMagnus Damm 366c8b5d9dcSPaul Mundt /* 367c8b5d9dcSPaul Mundt * The Machine Vector 368c8b5d9dcSPaul Mundt */ 369c8b5d9dcSPaul Mundt static struct sh_machine_vector mv_sh7785lcr __initmv = { 370c8b5d9dcSPaul Mundt .mv_name = "SH7785LCR", 371c8b5d9dcSPaul Mundt .mv_setup = sh7785lcr_setup, 372a77b5ac0SPaul Mundt .mv_clk_init = sh7785lcr_clk_init, 373c8b5d9dcSPaul Mundt .mv_init_irq = init_sh7785lcr_IRQ, 37463d12e23SMagnus Damm .mv_mode_pins = sh7785lcr_mode_pins, 375c8b5d9dcSPaul Mundt }; 376c8b5d9dcSPaul Mundt 377