1 /* 2 * Copyright IBM Corp. 2012 3 * 4 * Author(s): 5 * Jan Glauber <jang@linux.vnet.ibm.com> 6 */ 7 8 #define KMSG_COMPONENT "zpci" 9 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 10 11 #include <linux/compat.h> 12 #include <linux/kernel.h> 13 #include <linux/miscdevice.h> 14 #include <linux/slab.h> 15 #include <linux/err.h> 16 #include <linux/delay.h> 17 #include <linux/pci.h> 18 #include <linux/uaccess.h> 19 #include <asm/pci_debug.h> 20 #include <asm/pci_clp.h> 21 #include <asm/compat.h> 22 #include <asm/clp.h> 23 #include <uapi/asm/clp.h> 24 25 bool zpci_unique_uid; 26 27 static inline void zpci_err_clp(unsigned int rsp, int rc) 28 { 29 struct { 30 unsigned int rsp; 31 int rc; 32 } __packed data = {rsp, rc}; 33 34 zpci_err_hex(&data, sizeof(data)); 35 } 36 37 /* 38 * Call Logical Processor with c=1, lps=0 and command 1 39 * to get the bit mask of installed logical processors 40 */ 41 static inline int clp_get_ilp(unsigned long *ilp) 42 { 43 unsigned long mask; 44 int cc = 3; 45 46 asm volatile ( 47 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n" 48 "0: ipm %[cc]\n" 49 " srl %[cc],28\n" 50 "1:\n" 51 EX_TABLE(0b, 1b) 52 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1) 53 : "cc"); 54 *ilp = mask; 55 return cc; 56 } 57 58 /* 59 * Call Logical Processor with c=0, the give constant lps and an lpcb request. 60 */ 61 static inline int clp_req(void *data, unsigned int lps) 62 { 63 struct { u8 _[CLP_BLK_SIZE]; } *req = data; 64 u64 ignored; 65 int cc = 3; 66 67 asm volatile ( 68 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n" 69 "0: ipm %[cc]\n" 70 " srl %[cc],28\n" 71 "1:\n" 72 EX_TABLE(0b, 1b) 73 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req) 74 : [req] "a" (req), [lps] "i" (lps) 75 : "cc"); 76 return cc; 77 } 78 79 static void *clp_alloc_block(gfp_t gfp_mask) 80 { 81 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE)); 82 } 83 84 static void clp_free_block(void *ptr) 85 { 86 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE)); 87 } 88 89 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev, 90 struct clp_rsp_query_pci_grp *response) 91 { 92 zdev->tlb_refresh = response->refresh; 93 zdev->dma_mask = response->dasm; 94 zdev->msi_addr = response->msia; 95 zdev->max_msi = response->noi; 96 zdev->fmb_update = response->mui; 97 98 switch (response->version) { 99 case 1: 100 zdev->max_bus_speed = PCIE_SPEED_5_0GT; 101 break; 102 default: 103 zdev->max_bus_speed = PCI_SPEED_UNKNOWN; 104 break; 105 } 106 } 107 108 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid) 109 { 110 struct clp_req_rsp_query_pci_grp *rrb; 111 int rc; 112 113 rrb = clp_alloc_block(GFP_KERNEL); 114 if (!rrb) 115 return -ENOMEM; 116 117 memset(rrb, 0, sizeof(*rrb)); 118 rrb->request.hdr.len = sizeof(rrb->request); 119 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP; 120 rrb->response.hdr.len = sizeof(rrb->response); 121 rrb->request.pfgid = pfgid; 122 123 rc = clp_req(rrb, CLP_LPS_PCI); 124 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) 125 clp_store_query_pci_fngrp(zdev, &rrb->response); 126 else { 127 zpci_err("Q PCI FGRP:\n"); 128 zpci_err_clp(rrb->response.hdr.rsp, rc); 129 rc = -EIO; 130 } 131 clp_free_block(rrb); 132 return rc; 133 } 134 135 static int clp_store_query_pci_fn(struct zpci_dev *zdev, 136 struct clp_rsp_query_pci *response) 137 { 138 int i; 139 140 for (i = 0; i < PCI_BAR_COUNT; i++) { 141 zdev->bars[i].val = le32_to_cpu(response->bar[i]); 142 zdev->bars[i].size = response->bar_size[i]; 143 } 144 zdev->start_dma = response->sdma; 145 zdev->end_dma = response->edma; 146 zdev->pchid = response->pchid; 147 zdev->pfgid = response->pfgid; 148 zdev->pft = response->pft; 149 zdev->vfn = response->vfn; 150 zdev->uid = response->uid; 151 152 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip)); 153 if (response->util_str_avail) { 154 memcpy(zdev->util_str, response->util_str, 155 sizeof(zdev->util_str)); 156 } 157 158 return 0; 159 } 160 161 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh) 162 { 163 struct clp_req_rsp_query_pci *rrb; 164 int rc; 165 166 rrb = clp_alloc_block(GFP_KERNEL); 167 if (!rrb) 168 return -ENOMEM; 169 170 memset(rrb, 0, sizeof(*rrb)); 171 rrb->request.hdr.len = sizeof(rrb->request); 172 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN; 173 rrb->response.hdr.len = sizeof(rrb->response); 174 rrb->request.fh = fh; 175 176 rc = clp_req(rrb, CLP_LPS_PCI); 177 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) { 178 rc = clp_store_query_pci_fn(zdev, &rrb->response); 179 if (rc) 180 goto out; 181 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid); 182 } else { 183 zpci_err("Q PCI FN:\n"); 184 zpci_err_clp(rrb->response.hdr.rsp, rc); 185 rc = -EIO; 186 } 187 out: 188 clp_free_block(rrb); 189 return rc; 190 } 191 192 int clp_add_pci_device(u32 fid, u32 fh, int configured) 193 { 194 struct zpci_dev *zdev; 195 int rc; 196 197 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured); 198 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL); 199 if (!zdev) 200 return -ENOMEM; 201 202 zdev->fh = fh; 203 zdev->fid = fid; 204 205 /* Query function properties and update zdev */ 206 rc = clp_query_pci_fn(zdev, fh); 207 if (rc) 208 goto error; 209 210 if (configured) 211 zdev->state = ZPCI_FN_STATE_CONFIGURED; 212 else 213 zdev->state = ZPCI_FN_STATE_STANDBY; 214 215 rc = zpci_create_device(zdev); 216 if (rc) 217 goto error; 218 return 0; 219 220 error: 221 kfree(zdev); 222 return rc; 223 } 224 225 /* 226 * Enable/Disable a given PCI function defined by its function handle. 227 */ 228 static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command) 229 { 230 struct clp_req_rsp_set_pci *rrb; 231 int rc, retries = 100; 232 233 rrb = clp_alloc_block(GFP_KERNEL); 234 if (!rrb) 235 return -ENOMEM; 236 237 do { 238 memset(rrb, 0, sizeof(*rrb)); 239 rrb->request.hdr.len = sizeof(rrb->request); 240 rrb->request.hdr.cmd = CLP_SET_PCI_FN; 241 rrb->response.hdr.len = sizeof(rrb->response); 242 rrb->request.fh = *fh; 243 rrb->request.oc = command; 244 rrb->request.ndas = nr_dma_as; 245 246 rc = clp_req(rrb, CLP_LPS_PCI); 247 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) { 248 retries--; 249 if (retries < 0) 250 break; 251 msleep(20); 252 } 253 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY); 254 255 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) 256 *fh = rrb->response.fh; 257 else { 258 zpci_err("Set PCI FN:\n"); 259 zpci_err_clp(rrb->response.hdr.rsp, rc); 260 rc = -EIO; 261 } 262 clp_free_block(rrb); 263 return rc; 264 } 265 266 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as) 267 { 268 u32 fh = zdev->fh; 269 int rc; 270 271 rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN); 272 if (!rc) 273 /* Success -> store enabled handle in zdev */ 274 zdev->fh = fh; 275 276 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc); 277 return rc; 278 } 279 280 int clp_disable_fh(struct zpci_dev *zdev) 281 { 282 u32 fh = zdev->fh; 283 int rc; 284 285 if (!zdev_enabled(zdev)) 286 return 0; 287 288 rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN); 289 if (!rc) 290 /* Success -> store disabled handle in zdev */ 291 zdev->fh = fh; 292 293 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc); 294 return rc; 295 } 296 297 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, 298 void (*cb)(struct clp_fh_list_entry *entry)) 299 { 300 u64 resume_token = 0; 301 int entries, i, rc; 302 303 do { 304 memset(rrb, 0, sizeof(*rrb)); 305 rrb->request.hdr.len = sizeof(rrb->request); 306 rrb->request.hdr.cmd = CLP_LIST_PCI; 307 /* store as many entries as possible */ 308 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN; 309 rrb->request.resume_token = resume_token; 310 311 /* Get PCI function handle list */ 312 rc = clp_req(rrb, CLP_LPS_PCI); 313 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) { 314 zpci_err("List PCI FN:\n"); 315 zpci_err_clp(rrb->response.hdr.rsp, rc); 316 rc = -EIO; 317 goto out; 318 } 319 320 zpci_unique_uid = rrb->response.uid_checking; 321 WARN_ON_ONCE(rrb->response.entry_size != 322 sizeof(struct clp_fh_list_entry)); 323 324 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) / 325 rrb->response.entry_size; 326 327 resume_token = rrb->response.resume_token; 328 for (i = 0; i < entries; i++) 329 cb(&rrb->response.fh_list[i]); 330 } while (resume_token); 331 out: 332 return rc; 333 } 334 335 static void __clp_add(struct clp_fh_list_entry *entry) 336 { 337 if (!entry->vendor_id) 338 return; 339 340 clp_add_pci_device(entry->fid, entry->fh, entry->config_state); 341 } 342 343 static void __clp_rescan(struct clp_fh_list_entry *entry) 344 { 345 struct zpci_dev *zdev; 346 347 if (!entry->vendor_id) 348 return; 349 350 zdev = get_zdev_by_fid(entry->fid); 351 if (!zdev) { 352 clp_add_pci_device(entry->fid, entry->fh, entry->config_state); 353 return; 354 } 355 356 if (!entry->config_state) { 357 /* 358 * The handle is already disabled, that means no iota/irq freeing via 359 * the firmware interfaces anymore. Need to free resources manually 360 * (DMA memory, debug, sysfs)... 361 */ 362 zpci_stop_device(zdev); 363 } 364 } 365 366 static void __clp_update(struct clp_fh_list_entry *entry) 367 { 368 struct zpci_dev *zdev; 369 370 if (!entry->vendor_id) 371 return; 372 373 zdev = get_zdev_by_fid(entry->fid); 374 if (!zdev) 375 return; 376 377 zdev->fh = entry->fh; 378 } 379 380 int clp_scan_pci_devices(void) 381 { 382 struct clp_req_rsp_list_pci *rrb; 383 int rc; 384 385 rrb = clp_alloc_block(GFP_KERNEL); 386 if (!rrb) 387 return -ENOMEM; 388 389 rc = clp_list_pci(rrb, __clp_add); 390 391 clp_free_block(rrb); 392 return rc; 393 } 394 395 int clp_rescan_pci_devices(void) 396 { 397 struct clp_req_rsp_list_pci *rrb; 398 int rc; 399 400 rrb = clp_alloc_block(GFP_KERNEL); 401 if (!rrb) 402 return -ENOMEM; 403 404 rc = clp_list_pci(rrb, __clp_rescan); 405 406 clp_free_block(rrb); 407 return rc; 408 } 409 410 int clp_rescan_pci_devices_simple(void) 411 { 412 struct clp_req_rsp_list_pci *rrb; 413 int rc; 414 415 rrb = clp_alloc_block(GFP_NOWAIT); 416 if (!rrb) 417 return -ENOMEM; 418 419 rc = clp_list_pci(rrb, __clp_update); 420 421 clp_free_block(rrb); 422 return rc; 423 } 424 425 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 426 { 427 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 428 429 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 430 lpcb->response.hdr.len > limit) 431 return -EINVAL; 432 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0; 433 } 434 435 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb) 436 { 437 switch (lpcb->cmd) { 438 case 0x0001: /* store logical-processor characteristics */ 439 return clp_base_slpc(req, (void *) lpcb); 440 default: 441 return -EINVAL; 442 } 443 } 444 445 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb) 446 { 447 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 448 449 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 450 lpcb->response.hdr.len > limit) 451 return -EINVAL; 452 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 453 } 454 455 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb) 456 { 457 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 458 459 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 460 lpcb->response.hdr.len > limit) 461 return -EINVAL; 462 if (lpcb->request.reserved2 != 0) 463 return -EINVAL; 464 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 465 } 466 467 static int clp_pci_query(struct clp_req *req, 468 struct clp_req_rsp_query_pci *lpcb) 469 { 470 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 471 472 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 473 lpcb->response.hdr.len > limit) 474 return -EINVAL; 475 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0) 476 return -EINVAL; 477 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 478 } 479 480 static int clp_pci_query_grp(struct clp_req *req, 481 struct clp_req_rsp_query_pci_grp *lpcb) 482 { 483 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request); 484 485 if (lpcb->request.hdr.len != sizeof(lpcb->request) || 486 lpcb->response.hdr.len > limit) 487 return -EINVAL; 488 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 || 489 lpcb->request.reserved4 != 0) 490 return -EINVAL; 491 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0; 492 } 493 494 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb) 495 { 496 switch (lpcb->cmd) { 497 case 0x0001: /* store logical-processor characteristics */ 498 return clp_pci_slpc(req, (void *) lpcb); 499 case 0x0002: /* list PCI functions */ 500 return clp_pci_list(req, (void *) lpcb); 501 case 0x0003: /* query PCI function */ 502 return clp_pci_query(req, (void *) lpcb); 503 case 0x0004: /* query PCI function group */ 504 return clp_pci_query_grp(req, (void *) lpcb); 505 default: 506 return -EINVAL; 507 } 508 } 509 510 static int clp_normal_command(struct clp_req *req) 511 { 512 struct clp_req_hdr *lpcb; 513 void __user *uptr; 514 int rc; 515 516 rc = -EINVAL; 517 if (req->lps != 0 && req->lps != 2) 518 goto out; 519 520 rc = -ENOMEM; 521 lpcb = clp_alloc_block(GFP_KERNEL); 522 if (!lpcb) 523 goto out; 524 525 rc = -EFAULT; 526 uptr = (void __force __user *)(unsigned long) req->data_p; 527 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0) 528 goto out_free; 529 530 rc = -EINVAL; 531 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0) 532 goto out_free; 533 534 switch (req->lps) { 535 case 0: 536 rc = clp_base_command(req, lpcb); 537 break; 538 case 2: 539 rc = clp_pci_command(req, lpcb); 540 break; 541 } 542 if (rc) 543 goto out_free; 544 545 rc = -EFAULT; 546 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0) 547 goto out_free; 548 549 rc = 0; 550 551 out_free: 552 clp_free_block(lpcb); 553 out: 554 return rc; 555 } 556 557 static int clp_immediate_command(struct clp_req *req) 558 { 559 void __user *uptr; 560 unsigned long ilp; 561 int exists; 562 563 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0) 564 return -EINVAL; 565 566 uptr = (void __force __user *)(unsigned long) req->data_p; 567 if (req->cmd == 0) { 568 /* Command code 0: test for a specific processor */ 569 exists = test_bit_inv(req->lps, &ilp); 570 return put_user(exists, (int __user *) uptr); 571 } 572 /* Command code 1: return bit mask of installed processors */ 573 return put_user(ilp, (unsigned long __user *) uptr); 574 } 575 576 static long clp_misc_ioctl(struct file *filp, unsigned int cmd, 577 unsigned long arg) 578 { 579 struct clp_req req; 580 void __user *argp; 581 582 if (cmd != CLP_SYNC) 583 return -EINVAL; 584 585 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg; 586 if (copy_from_user(&req, argp, sizeof(req))) 587 return -EFAULT; 588 if (req.r != 0) 589 return -EINVAL; 590 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req); 591 } 592 593 static int clp_misc_release(struct inode *inode, struct file *filp) 594 { 595 return 0; 596 } 597 598 static const struct file_operations clp_misc_fops = { 599 .owner = THIS_MODULE, 600 .open = nonseekable_open, 601 .release = clp_misc_release, 602 .unlocked_ioctl = clp_misc_ioctl, 603 .compat_ioctl = clp_misc_ioctl, 604 .llseek = no_llseek, 605 }; 606 607 static struct miscdevice clp_misc_device = { 608 .minor = MISC_DYNAMIC_MINOR, 609 .name = "clp", 610 .fops = &clp_misc_fops, 611 }; 612 613 static int __init clp_misc_init(void) 614 { 615 return misc_register(&clp_misc_device); 616 } 617 618 device_initcall(clp_misc_init); 619