1/* 2 * arch/s390/kernel/head.S 3 * 4 * S390 version 5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com), 8 * Rob van der Heij (rvdhei@iae.nl) 9 * 10 * There are 5 different IPL methods 11 * 1) load the image directly into ram at address 0 and do an PSW restart 12 * 2) linload will load the image from address 0x10000 to memory 0x10000 13 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated) 14 * 3) generate the tape ipl header, store the generated image on a tape 15 * and ipl from it 16 * In case of SL tape you need to IPL 5 times to get past VOL1 etc 17 * 4) generate the vm reader ipl header, move the generated image to the 18 * VM reader (use option NOH!) and do a ipl from reader (VM only) 19 * 5) direct call of start by the SALIPL loader 20 * We use the cpuid to distinguish between VM and native ipl 21 * params for kernel are pushed to 0x10400 (see setup.h) 22 23 Changes: 24 Okt 25 2000 <rvdheij@iae.nl> 25 added code to skip HDR and EOF to allow SL tape IPL (5 retries) 26 changed first CCW from rewind to backspace block 27 28 */ 29 30#include <linux/config.h> 31#include <asm/setup.h> 32#include <asm/lowcore.h> 33#include <asm/asm-offsets.h> 34#include <asm/thread_info.h> 35#include <asm/page.h> 36 37#ifndef CONFIG_IPL 38 .org 0 39 .long 0x00080000,0x80000000+startup # Just a restart PSW 40#else 41#ifdef CONFIG_IPL_TAPE 42#define IPL_BS 1024 43 .org 0 44 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded 45 .long 0x27000000,0x60000001 # by ipl to addresses 0-23. 46 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs). 47 .long 0x00000000,0x00000000 # external old psw 48 .long 0x00000000,0x00000000 # svc old psw 49 .long 0x00000000,0x00000000 # program check old psw 50 .long 0x00000000,0x00000000 # machine check old psw 51 .long 0x00000000,0x00000000 # io old psw 52 .long 0x00000000,0x00000000 53 .long 0x00000000,0x00000000 54 .long 0x00000000,0x00000000 55 .long 0x000a0000,0x00000058 # external new psw 56 .long 0x000a0000,0x00000060 # svc new psw 57 .long 0x000a0000,0x00000068 # program check new psw 58 .long 0x000a0000,0x00000070 # machine check new psw 59 .long 0x00080000,0x80000000+.Lioint # io new psw 60 61 .org 0x100 62# 63# subroutine for loading from tape 64# Paramters: 65# R1 = device number 66# R2 = load address 67.Lloader: 68 st %r14,.Lldret 69 la %r3,.Lorbread # r3 = address of orb 70 la %r5,.Lirb # r5 = address of irb 71 st %r2,.Lccwread+4 # initialize CCW data addresses 72 lctl %c6,%c6,.Lcr6 73 slr %r2,%r2 74.Lldlp: 75 la %r6,3 # 3 retries 76.Lssch: 77 ssch 0(%r3) # load chunk of IPL_BS bytes 78 bnz .Llderr 79.Lw4end: 80 bas %r14,.Lwait4io 81 tm 8(%r5),0x82 # do we have a problem ? 82 bnz .Lrecov 83 slr %r7,%r7 84 icm %r7,3,10(%r5) # get residual count 85 lcr %r7,%r7 86 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read 87 ar %r2,%r7 # add to total size 88 tm 8(%r5),0x01 # found a tape mark ? 89 bnz .Ldone 90 l %r0,.Lccwread+4 # update CCW data addresses 91 ar %r0,%r7 92 st %r0,.Lccwread+4 93 b .Lldlp 94.Ldone: 95 l %r14,.Lldret 96 br %r14 # r2 contains the total size 97.Lrecov: 98 bas %r14,.Lsense # do the sensing 99 bct %r6,.Lssch # dec. retry count & branch 100 b .Llderr 101# 102# Sense subroutine 103# 104.Lsense: 105 st %r14,.Lsnsret 106 la %r7,.Lorbsense 107 ssch 0(%r7) # start sense command 108 bnz .Llderr 109 bas %r14,.Lwait4io 110 l %r14,.Lsnsret 111 tm 8(%r5),0x82 # do we have a problem ? 112 bnz .Llderr 113 br %r14 114# 115# Wait for interrupt subroutine 116# 117.Lwait4io: 118 lpsw .Lwaitpsw 119.Lioint: 120 c %r1,0xb8 # compare subchannel number 121 bne .Lwait4io 122 tsch 0(%r5) 123 slr %r0,%r0 124 tm 8(%r5),0x82 # do we have a problem ? 125 bnz .Lwtexit 126 tm 8(%r5),0x04 # got device end ? 127 bz .Lwait4io 128.Lwtexit: 129 br %r14 130.Llderr: 131 lpsw .Lcrash 132 133 .align 8 134.Lorbread: 135 .long 0x00000000,0x0080ff00,.Lccwread 136 .align 8 137.Lorbsense: 138 .long 0x00000000,0x0080ff00,.Lccwsense 139 .align 8 140.Lccwread: 141 .long 0x02200000+IPL_BS,0x00000000 142.Lccwsense: 143 .long 0x04200001,0x00000000 144.Lwaitpsw: 145 .long 0x020a0000,0x80000000+.Lioint 146 147.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 148.Lcr6: .long 0xff000000 149 .align 8 150.Lcrash:.long 0x000a0000,0x00000000 151.Lldret:.long 0 152.Lsnsret: .long 0 153#endif /* CONFIG_IPL_TAPE */ 154 155#ifdef CONFIG_IPL_VM 156#define IPL_BS 0x730 157 .org 0 158 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded 159 .long 0x02000018,0x60000050 # by ipl to addresses 0-23. 160 .long 0x02000068,0x60000050 # (a PSW and two CCWs). 161 .fill 80-24,1,0x40 # bytes 24-79 are discarded !! 162 .long 0x020000f0,0x60000050 # The next 160 byte are loaded 163 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7 164 .long 0x02000190,0x60000050 # They form the continuation 165 .long 0x020001e0,0x60000050 # of the CCW program started 166 .long 0x02000230,0x60000050 # by ipl and load the range 167 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image 168 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730 169 .long 0x02000320,0x60000050 # in memory. At the end of 170 .long 0x02000370,0x60000050 # the channel program the PSW 171 .long 0x020003c0,0x60000050 # at location 0 is loaded. 172 .long 0x02000410,0x60000050 # Initial processing starts 173 .long 0x02000460,0x60000050 # at 0xf0 = iplstart. 174 .long 0x020004b0,0x60000050 175 .long 0x02000500,0x60000050 176 .long 0x02000550,0x60000050 177 .long 0x020005a0,0x60000050 178 .long 0x020005f0,0x60000050 179 .long 0x02000640,0x60000050 180 .long 0x02000690,0x60000050 181 .long 0x020006e0,0x20000050 182 183 .org 0xf0 184# 185# subroutine for loading cards from the reader 186# 187.Lloader: 188 la %r3,.Lorb # r2 = address of orb into r2 189 la %r5,.Lirb # r4 = address of irb 190 la %r6,.Lccws 191 la %r7,20 192.Linit: 193 st %r2,4(%r6) # initialize CCW data addresses 194 la %r2,0x50(%r2) 195 la %r6,8(%r6) 196 bct 7,.Linit 197 198 lctl %c6,%c6,.Lcr6 # set IO subclass mask 199 slr %r2,%r2 200.Lldlp: 201 ssch 0(%r3) # load chunk of 1600 bytes 202 bnz .Llderr 203.Lwait4irq: 204 mvc 0x78(8),.Lnewpsw # set up IO interrupt psw 205 lpsw .Lwaitpsw 206.Lioint: 207 c %r1,0xb8 # compare subchannel number 208 bne .Lwait4irq 209 tsch 0(%r5) 210 211 slr %r0,%r0 212 ic %r0,8(%r5) # get device status 213 chi %r0,8 # channel end ? 214 be .Lcont 215 chi %r0,12 # channel end + device end ? 216 be .Lcont 217 218 l %r0,4(%r5) 219 s %r0,8(%r3) # r0/8 = number of ccws executed 220 mhi %r0,10 # *10 = number of bytes in ccws 221 lh %r3,10(%r5) # get residual count 222 sr %r0,%r3 # #ccws*80-residual=#bytes read 223 ar %r2,%r0 224 225 br %r14 # r2 contains the total size 226 227.Lcont: 228 ahi %r2,0x640 # add 0x640 to total size 229 la %r6,.Lccws 230 la %r7,20 231.Lincr: 232 l %r0,4(%r6) # update CCW data addresses 233 ahi %r0,0x640 234 st %r0,4(%r6) 235 ahi %r6,8 236 bct 7,.Lincr 237 238 b .Lldlp 239.Llderr: 240 lpsw .Lcrash 241 242 .align 8 243.Lorb: .long 0x00000000,0x0080ff00,.Lccws 244.Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 245.Lcr6: .long 0xff000000 246.Lloadp:.long 0,0 247 .align 8 248.Lcrash:.long 0x000a0000,0x00000000 249.Lnewpsw: 250 .long 0x00080000,0x80000000+.Lioint 251.Lwaitpsw: 252 .long 0x020a0000,0x80000000+.Lioint 253 254 .align 8 255.Lccws: .rept 19 256 .long 0x02600050,0x00000000 257 .endr 258 .long 0x02200050,0x00000000 259#endif /* CONFIG_IPL_VM */ 260 261iplstart: 262 lh %r1,0xb8 # test if subchannel number 263 bct %r1,.Lnoload # is valid 264 l %r1,0xb8 # load ipl subchannel number 265 la %r2,IPL_BS # load start address 266 bas %r14,.Lloader # load rest of ipl image 267 larl %r12,_pstart # pointer to parameter area 268 st %r1,IPL_DEVICE+4-PARMAREA(%r12) # store ipl device number 269 270# 271# load parameter file from ipl device 272# 273.Lagain1: 274 l %r2,INITRD_START+4-PARMAREA(%r12)# use ramdisk location as temp 275 bas %r14,.Lloader # load parameter file 276 ltr %r2,%r2 # got anything ? 277 bz .Lnopf 278 chi %r2,895 279 bnh .Lnotrunc 280 la %r2,895 281.Lnotrunc: 282 l %r4,INITRD_START+4-PARMAREA(%r12) 283 clc 0(3,%r4),.L_hdr # if it is HDRx 284 bz .Lagain1 # skip dataset header 285 clc 0(3,%r4),.L_eof # if it is EOFx 286 bz .Lagain1 # skip dateset trailer 287 la %r5,0(%r4,%r2) 288 lr %r3,%r2 289.Lidebc: 290 tm 0(%r5),0x80 # high order bit set ? 291 bo .Ldocv # yes -> convert from EBCDIC 292 ahi %r5,-1 293 bct %r3,.Lidebc 294 b .Lnocv 295.Ldocv: 296 l %r3,.Lcvtab 297 tr 0(256,%r4),0(%r3) # convert parameters to ascii 298 tr 256(256,%r4),0(%r3) 299 tr 512(256,%r4),0(%r3) 300 tr 768(122,%r4),0(%r3) 301.Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line 302 mvc 0(256,%r3),0(%r4) 303 mvc 256(256,%r3),256(%r4) 304 mvc 512(256,%r3),512(%r4) 305 mvc 768(122,%r3),768(%r4) 306 slr %r0,%r0 307 b .Lcntlp 308.Ldelspc: 309 ic %r0,0(%r2,%r3) 310 chi %r0,0x20 # is it a space ? 311 be .Lcntlp 312 ahi %r2,1 313 b .Leolp 314.Lcntlp: 315 brct %r2,.Ldelspc 316.Leolp: 317 slr %r0,%r0 318 stc %r0,0(%r2,%r3) # terminate buffer 319.Lnopf: 320 321# 322# load ramdisk from ipl device 323# 324.Lagain2: 325 l %r2,INITRD_START+4-PARMAREA(%r12)# load adr. of ramdisk 326 bas %r14,.Lloader # load ramdisk 327 st %r2,INITRD_SIZE+4-PARMAREA(%r12) # store size of ramdisk 328 ltr %r2,%r2 329 bnz .Lrdcont 330 st %r2,INITRD_START+4-PARMAREA(%r12)# no ramdisk found, null it 331.Lrdcont: 332 l %r2,INITRD_START+4-PARMAREA(%r12) 333 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx 334 bz .Lagain2 335 clc 0(3,%r2),.L_eof 336 bz .Lagain2 337 338#ifdef CONFIG_IPL_VM 339# 340# reset files in VM reader 341# 342 stidp __LC_CPUID # store cpuid 343 tm __LC_CPUID,0xff # running VM ? 344 bno .Lnoreset 345 la %r2,.Lreset 346 lhi %r3,26 347 diag %r2,%r3,8 348 la %r5,.Lirb 349 stsch 0(%r5) # check if irq is pending 350 tm 30(%r5),0x0f # by verifying if any of the 351 bnz .Lwaitforirq # activity or status control 352 tm 31(%r5),0xff # bits is set in the schib 353 bz .Lnoreset 354.Lwaitforirq: 355 mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw 356.Lwaitrdrirq: 357 lpsw .Lrdrwaitpsw 358.Lrdrint: 359 c %r1,0xb8 # compare subchannel number 360 bne .Lwaitrdrirq 361 la %r5,.Lirb 362 tsch 0(%r5) 363.Lnoreset: 364 b .Lnoload 365 366 .align 8 367.Lrdrnewpsw: 368 .long 0x00080000,0x80000000+.Lrdrint 369.Lrdrwaitpsw: 370 .long 0x020a0000,0x80000000+.Lrdrint 371#endif 372 373# 374# everything loaded, go for it 375# 376.Lnoload: 377 l %r1,.Lstartup 378 br %r1 379 380.Lstartup: .long startup 381.Lcvtab:.long _ebcasc # ebcdic to ascii table 382.Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40 383 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6 384 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold" 385.L_eof: .long 0xc5d6c600 /* C'EOF' */ 386.L_hdr: .long 0xc8c4d900 /* C'HDR' */ 387#endif /* CONFIG_IPL */ 388 389# 390# SALIPL loader support. Based on a patch by Rob van der Heij. 391# This entry point is called directly from the SALIPL loader and 392# doesn't need a builtin ipl record. 393# 394 .org 0x800 395 .globl start 396start: 397 stm %r0,%r15,0x07b0 # store registers 398 basr %r12,%r0 399.base: 400 l %r11,.parm 401 l %r8,.cmd # pointer to command buffer 402 403 ltr %r9,%r9 # do we have SALIPL parameters? 404 bp .sk8x8 405 406 mvc 0(64,%r8),0x00b0 # copy saved registers 407 xc 64(240-64,%r8),0(%r8) # remainder of buffer 408 tr 0(64,%r8),.lowcase 409 b .gotr 410.sk8x8: 411 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer 412.gotr: 413 l %r10,.tbl # EBCDIC to ASCII table 414 tr 0(240,%r8),0(%r10) 415 stidp __LC_CPUID # Are we running on VM maybe 416 cli __LC_CPUID,0xff 417 bnz .test 418 .long 0x83300060 # diag 3,0,x'0060' - storage size 419 b .done 420.test: 421 mvc 0x68(8),.pgmnw # set up pgm check handler 422 l %r2,.fourmeg 423 lr %r3,%r2 424 bctr %r3,%r0 # 4M-1 425.loop: iske %r0,%r3 426 ar %r3,%r2 427.pgmx: 428 sr %r3,%r2 429 la %r3,1(%r3) 430.done: 431 l %r1,.memsize 432 st %r3,4(%r1) 433 slr %r0,%r0 434 st %r0,INITRD_SIZE+4-PARMAREA(%r11) 435 st %r0,INITRD_START+4-PARMAREA(%r11) 436 j startup # continue with startup 437.tbl: .long _ebcasc # translate table 438.cmd: .long COMMAND_LINE # address of command line buffer 439.parm: .long PARMAREA 440.fourmeg: .long 0x00400000 # 4M 441.pgmnw: .long 0x00080000,.pgmx 442.memsize: .long memory_size 443.lowcase: 444 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07 445 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f 446 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17 447 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f 448 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27 449 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f 450 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37 451 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f 452 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47 453 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f 454 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57 455 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f 456 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67 457 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f 458 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77 459 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f 460 461 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87 462 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f 463 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97 464 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f 465 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 466 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf 467 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7 468 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf 469 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg 470 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi 471 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop 472 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr 473 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx 474 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz 475 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7 476 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff 477 478# 479# startup-code at 0x10000, running in real mode 480# this is called either by the ipl loader or directly by PSW restart 481# or linload or SALIPL 482# 483 .org 0x10000 484startup:basr %r13,0 # get base 485.LPG1: sll %r13,1 # remove high order bit 486 srl %r13,1 487 l %r1,.Lget_ipl_device_addr-.LPG1(%r13) 488 basr %r14,%r1 489 lhi %r1,1 # mode 1 = esame 490 slr %r0,%r0 # set cpuid to zero 491 sigp %r1,%r0,0x12 # switch to esame mode 492 sam64 # switch to 64 bit mode 493 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers 494 larl %r12,_pstart # pointer to parameter area 495 # move IPL device to lowcore 496 mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12) 497 498# 499# clear bss memory 500# 501 larl %r2,__bss_start # start of bss segment 502 larl %r3,_end # end of bss segment 503 sgr %r3,%r2 # length of bss 504 sgr %r4,%r4 # 505 sgr %r5,%r5 # set src,length and pad to zero 506 mvcle %r2,%r4,0 # clear mem 507 jo .-4 # branch back, if not finish 508 509 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word 510.Lservicecall: 511 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts 512 513 stctg %r0,%r0,.Lcr-.LPG1(%r13) # get cr0 514 la %r1,0x200 # set bit 22 515 og %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1 516 stg %r1,.Lcr-.LPG1(%r13) 517 lctlg %r0,%r0,.Lcr-.LPG1(%r13) # load modified cr0 518 519 mvc __LC_EXT_NEW_PSW(8),.Lpcmsk-.LPG1(%r13) # set postcall psw 520 larl %r1,.Lsclph 521 stg %r1,__LC_EXT_NEW_PSW+8 # set handler 522 523 larl %r4,_pstart # %r4 is our index for sccb stuff 524 la %r1,.Lsccb-PARMAREA(%r4) # our sccb 525 .insn rre,0xb2200000,%r2,%r1 # service call 526 ipm %r1 527 srl %r1,28 # get cc code 528 xr %r3,%r3 529 chi %r1,3 530 be .Lfchunk-.LPG1(%r13) # leave 531 chi %r1,2 532 be .Lservicecall-.LPG1(%r13) 533 lpsw .Lwaitsclp-.LPG1(%r13) 534.Lsclph: 535 lh %r1,.Lsccbr-PARMAREA(%r4) 536 chi %r1,0x10 # 0x0010 is the sucess code 537 je .Lprocsccb # let's process the sccb 538 chi %r1,0x1f0 539 bne .Lfchunk-.LPG1(%r13) # unhandled error code 540 c %r2,.Lrcp-.LPG1(%r13) # Did we try Read SCP forced 541 bne .Lfchunk-.LPG1(%r13) # if no, give up 542 l %r2,.Lrcp2-.LPG1(%r13) # try with Read SCP 543 b .Lservicecall-.LPG1(%r13) 544.Lprocsccb: 545 lghi %r1,0 546 icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0 547 jnz .Lscnd 548 lg %r1,.Lscpincr2-PARMAREA(%r4) # otherwise use this one 549.Lscnd: 550 xr %r3,%r3 # same logic 551 ic %r3,.Lscpa1-PARMAREA(%r4) 552 chi %r3,0x00 553 jne .Lcompmem 554 l %r3,.Lscpa2-PARMAREA(%r13) 555.Lcompmem: 556 mlgr %r2,%r1 # mem in MB on 128-bit 557 l %r1,.Lonemb-.LPG1(%r13) 558 mlgr %r2,%r1 # mem size in bytes in %r3 559 b .Lfchunk-.LPG1(%r13) 560 561 .align 4 562.Lget_ipl_device_addr: 563 .long .Lget_ipl_device 564.Lpmask: 565 .byte 0 566 .align 8 567.Lcr: 568 .quad 0x00 # place holder for cr0 569.Lwaitsclp: 570 .long 0x020A0000 571 .quad .Lsclph 572.Lrcp: 573 .int 0x00120001 # Read SCP forced code 574.Lrcp2: 575 .int 0x00020001 # Read SCP code 576.Lonemb: 577 .int 0x100000 578 579.Lfchunk: 580 # set program check new psw mask 581 mvc __LC_PGM_NEW_PSW(8),.Lpcmsk-.LPG1(%r13) 582 583# 584# find memory chunks. 585# 586 lgr %r9,%r3 # end of mem 587 larl %r1,.Lchkmem # set program check address 588 stg %r1,__LC_PGM_NEW_PSW+8 589 la %r1,1 # test in increments of 128KB 590 sllg %r1,%r1,17 591 larl %r3,memory_chunk 592 slgr %r4,%r4 # set start of chunk to zero 593 slgr %r5,%r5 # set end of chunk to zero 594 slr %r6,%r6 # set access code to zero 595 la %r10,MEMORY_CHUNKS # number of chunks 596.Lloop: 597 tprot 0(%r5),0 # test protection of first byte 598 ipm %r7 599 srl %r7,28 600 clr %r6,%r7 # compare cc with last access code 601 je .Lsame 602 j .Lchkmem 603.Lsame: 604 algr %r5,%r1 # add 128KB to end of chunk 605 # no need to check here, 606 brc 12,.Lloop # this is the same chunk 607.Lchkmem: # > 16EB or tprot got a program check 608 clgr %r4,%r5 # chunk size > 0? 609 je .Lchkloop 610 stg %r4,0(%r3) # store start address of chunk 611 lgr %r0,%r5 612 slgr %r0,%r4 613 stg %r0,8(%r3) # store size of chunk 614 st %r6,20(%r3) # store type of chunk 615 la %r3,24(%r3) 616 larl %r8,memory_size 617 stg %r5,0(%r8) # store memory size 618 ahi %r10,-1 # update chunk number 619.Lchkloop: 620 lr %r6,%r7 # set access code to last cc 621 # we got an exception or we're starting a new 622 # chunk , we must check if we should 623 # still try to find valid memory (if we detected 624 # the amount of available storage), and if we 625 # have chunks left 626 lghi %r4,1 627 sllg %r4,%r4,31 628 clgr %r5,%r4 629 je .Lhsaskip 630 xr %r0, %r0 631 clgr %r0, %r9 # did we detect memory? 632 je .Ldonemem # if not, leave 633 chi %r10, 0 # do we have chunks left? 634 je .Ldonemem 635.Lhsaskip: 636 algr %r5,%r1 # add 128KB to end of chunk 637 lgr %r4,%r5 # potential new chunk 638 clgr %r5,%r9 # should we go on? 639 jl .Lloop 640.Ldonemem: 641 642 larl %r12,machine_flags 643# 644# find out if we are running under VM 645# 646 stidp __LC_CPUID # store cpuid 647 tm __LC_CPUID,0xff # running under VM ? 648 bno 0f-.LPG1(%r13) 649 oi 7(%r12),1 # set VM flag 6500: lh %r0,__LC_CPUID+4 # get cpu version 651 chi %r0,0x7490 # running on a P/390 ? 652 bne 1f-.LPG1(%r13) 653 oi 7(%r12),4 # set P/390 flag 6541: 655 656# 657# find out if we have the MVPG instruction 658# 659 la %r1,0f-.LPG1(%r13) # set program check address 660 stg %r1,__LC_PGM_NEW_PSW+8 661 sgr %r0,%r0 662 lghi %r1,0 663 lghi %r2,0 664 mvpg %r1,%r2 # test MVPG instruction 665 oi 7(%r12),16 # set MVPG flag 6660: 667 668# 669# find out if the diag 0x44 works in 64 bit mode 670# 671 la %r1,0f-.LPG1(%r13) # set program check address 672 stg %r1,__LC_PGM_NEW_PSW+8 673 diag 0,0,0x44 # test diag 0x44 674 oi 7(%r12),32 # set diag44 flag 6750: 676 677# 678# find out if we have the IDTE instruction 679# 680 la %r1,0f-.LPG1(%r13) # set program check address 681 stg %r1,__LC_PGM_NEW_PSW+8 682 .long 0xb2b10000 # store facility list 683 tm 0xc8,0x08 # check bit for clearing-by-ASCE 684 bno 0f-.LPG1(%r13) 685 lhi %r1,2094 686 lhi %r2,0 687 .long 0xb98e2001 688 oi 7(%r12),0x80 # set IDTE flag 6890: 690 691 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space, 692 # virtual and never return ... 693 .align 16 694.Lentry:.quad 0x0000000180000000,_stext 695.Lctl: .quad 0x04b50002 # cr0: various things 696 .quad 0 # cr1: primary space segment table 697 .quad .Lduct # cr2: dispatchable unit control table 698 .quad 0 # cr3: instruction authorization 699 .quad 0 # cr4: instruction authorization 700 .quad 0xffffffffffffffff # cr5: primary-aste origin 701 .quad 0 # cr6: I/O interrupts 702 .quad 0 # cr7: secondary space segment table 703 .quad 0 # cr8: access registers translation 704 .quad 0 # cr9: tracing off 705 .quad 0 # cr10: tracing off 706 .quad 0 # cr11: tracing off 707 .quad 0 # cr12: tracing off 708 .quad 0 # cr13: home space segment table 709 .quad 0xc0000000 # cr14: machine check handling off 710 .quad 0 # cr15: linkage stack operations 711.Lpcmsk:.quad 0x0000000180000000 712.L4malign:.quad 0xffffffffffc00000 713.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 714.Lnop: .long 0x07000700 715 716 .org PARMAREA-64 717.Lduct: .long 0,0,0,0,0,0,0,0 718 .long 0,0,0,0,0,0,0,0 719 720# 721# params at 10400 (setup.h) 722# 723 .org PARMAREA 724 .global _pstart 725_pstart: 726 .quad 0 # IPL_DEVICE 727 .quad RAMDISK_ORIGIN # INITRD_START 728 .quad RAMDISK_SIZE # INITRD_SIZE 729 730 .org COMMAND_LINE 731 .byte "root=/dev/ram0 ro" 732 .byte 0 733 .org 0x11000 734.Lsccb: 735 .hword 0x1000 # length, one page 736 .byte 0x00,0x00,0x00 737 .byte 0x80 # variable response bit set 738.Lsccbr: 739 .hword 0x00 # response code 740.Lscpincr1: 741 .hword 0x00 742.Lscpa1: 743 .byte 0x00 744 .fill 89,1,0 745.Lscpa2: 746 .int 0x00 747.Lscpincr2: 748 .quad 0x00 749 .fill 3984,1,0 750 .org 0x12000 751 .global _pend 752_pend: 753 754.Lget_ipl_device: 755 basr %r12,0 756.LPG2: l %r1,0xb8 # get sid 757 sll %r1,15 # test if subchannel is enabled 758 srl %r1,31 759 ltr %r1,%r1 760 bz 0(%r14) # subchannel disabled 761 l %r1,0xb8 762 la %r5,.Lipl_schib-.LPG2(%r12) 763 stsch 0(%r5) # get schib of subchannel 764 bnz 0(%r14) # schib not available 765 tm 5(%r5),0x01 # devno valid? 766 bno 0(%r14) 767 la %r6,ipl_parameter_flags-.LPG2(%r12) 768 oi 3(%r6),0x01 # set flag 769 la %r2,ipl_devno-.LPG2(%r12) 770 mvc 0(2,%r2),6(%r5) # store devno 771 tm 4(%r5),0x80 # qdio capable device? 772 bno 0(%r14) 773 oi 3(%r6),0x02 # set flag 774 775 # copy ipl parameters 776 777 lhi %r0,4096 778 l %r2,20(%r0) # get address of parameter list 779 lhi %r3,IPL_PARMBLOCK_ORIGIN 780 st %r3,20(%r0) 781 lhi %r4,1 782 cr %r2,%r3 # start parameters < destination ? 783 jl 0f 784 lhi %r1,1 # copy direction is upwards 785 j 1f 7860: lhi %r1,-1 # copy direction is downwards 787 ar %r2,%r0 788 ar %r3,%r0 789 ar %r2,%r1 790 ar %r3,%r1 7911: mvc 0(1,%r3),0(%r2) # finally copy ipl parameters 792 ar %r3,%r1 793 ar %r2,%r1 794 sr %r0,%r4 795 jne 1b 796 b 0(%r14) 797 798 .align 4 799.Lipl_schib: 800 .rept 13 801 .long 0 802 .endr 803 804 .globl ipl_parameter_flags 805ipl_parameter_flags: 806 .long 0 807 .globl ipl_devno 808ipl_devno: 809 .word 0 810 811#ifdef CONFIG_SHARED_KERNEL 812 .org 0x100000 813#endif 814 815# 816# startup-code, running in virtual mode 817# 818 .globl _stext 819_stext: basr %r13,0 # get base 820.LPG3: 821# 822# Setup stack 823# 824 larl %r15,init_thread_union 825 lg %r14,__TI_task(%r15) # cache current in lowcore 826 stg %r14,__LC_CURRENT 827 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE 828 stg %r15,__LC_KERNEL_STACK # set end of kernel stack 829 aghi %r15,-160 830 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain 831 832# check control registers 833 stctg %c0,%c15,0(%r15) 834 oi 6(%r15),0x40 # enable sigp emergency signal 835 oi 4(%r15),0x10 # switch on low address proctection 836 lctlg %c0,%c15,0(%r15) 837 838# 839 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess 840 brasl %r14,start_kernel # go to C code 841# 842# We returned from start_kernel ?!? PANIK 843# 844 basr %r13,0 845 lpswe .Ldw-.(%r13) # load disabled wait psw 846# 847 .align 8 848.Ldw: .quad 0x0002000180000000,0x0000000000000000 849.Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 850 851