1/* 2 * arch/s390/kernel/entry.S 3 * S390 low-level entry points. 4 * 5 * Copyright (C) IBM Corp. 1999,2006 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), 7 * Hartmut Penner (hp@de.ibm.com), 8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), 9 * Heiko Carstens <heiko.carstens@de.ibm.com> 10 */ 11 12#include <linux/sys.h> 13#include <linux/linkage.h> 14#include <asm/cache.h> 15#include <asm/lowcore.h> 16#include <asm/errno.h> 17#include <asm/ptrace.h> 18#include <asm/thread_info.h> 19#include <asm/asm-offsets.h> 20#include <asm/unistd.h> 21#include <asm/page.h> 22 23/* 24 * Stack layout for the system_call stack entry. 25 * The first few entries are identical to the user_regs_struct. 26 */ 27SP_PTREGS = STACK_FRAME_OVERHEAD 28SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS 29SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW 30SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS 31SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4 32SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8 33SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12 34SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16 35SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20 36SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24 37SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28 38SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32 39SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36 40SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40 41SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44 42SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48 43SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52 44SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56 45SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60 46SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2 47SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC 48SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP 49SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE 50 51_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 52 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP ) 53_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \ 54 _TIF_MCCK_PENDING) 55 56STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER 57STACK_SIZE = 1 << STACK_SHIFT 58 59#define BASED(name) name-system_call(%r13) 60 61#ifdef CONFIG_TRACE_IRQFLAGS 62 .macro TRACE_IRQS_ON 63 l %r1,BASED(.Ltrace_irq_on) 64 basr %r14,%r1 65 .endm 66 67 .macro TRACE_IRQS_OFF 68 l %r1,BASED(.Ltrace_irq_off) 69 basr %r14,%r1 70 .endm 71#else 72#define TRACE_IRQS_ON 73#define TRACE_IRQS_OFF 74#endif 75 76/* 77 * Register usage in interrupt handlers: 78 * R9 - pointer to current task structure 79 * R13 - pointer to literal pool 80 * R14 - return register for function calls 81 * R15 - kernel stack pointer 82 */ 83 84 .macro STORE_TIMER lc_offset 85#ifdef CONFIG_VIRT_CPU_ACCOUNTING 86 stpt \lc_offset 87#endif 88 .endm 89 90#ifdef CONFIG_VIRT_CPU_ACCOUNTING 91 .macro UPDATE_VTIME lc_from,lc_to,lc_sum 92 lm %r10,%r11,\lc_from 93 sl %r10,\lc_to 94 sl %r11,\lc_to+4 95 bc 3,BASED(0f) 96 sl %r10,BASED(.Lc_1) 970: al %r10,\lc_sum 98 al %r11,\lc_sum+4 99 bc 12,BASED(1f) 100 al %r10,BASED(.Lc_1) 1011: stm %r10,%r11,\lc_sum 102 .endm 103#endif 104 105 .macro SAVE_ALL_BASE savearea 106 stm %r12,%r15,\savearea 107 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13 108 .endm 109 110 .macro SAVE_ALL_SYNC psworg,savearea 111 la %r12,\psworg 112 tm \psworg+1,0x01 # test problem state bit 113 bz BASED(2f) # skip stack setup save 114 l %r15,__LC_KERNEL_STACK # problem state -> load ksp 115#ifdef CONFIG_CHECK_STACK 116 b BASED(3f) 1172: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 118 bz BASED(stack_overflow) 1193: 120#endif 1212: 122 .endm 123 124 .macro SAVE_ALL_ASYNC psworg,savearea 125 la %r12,\psworg 126 tm \psworg+1,0x01 # test problem state bit 127 bnz BASED(1f) # from user -> load async stack 128 clc \psworg+4(4),BASED(.Lcritical_end) 129 bhe BASED(0f) 130 clc \psworg+4(4),BASED(.Lcritical_start) 131 bl BASED(0f) 132 l %r14,BASED(.Lcleanup_critical) 133 basr %r14,%r14 134 tm 1(%r12),0x01 # retest problem state after cleanup 135 bnz BASED(1f) 1360: l %r14,__LC_ASYNC_STACK # are we already on the async stack ? 137 slr %r14,%r15 138 sra %r14,STACK_SHIFT 139 be BASED(2f) 1401: l %r15,__LC_ASYNC_STACK 141#ifdef CONFIG_CHECK_STACK 142 b BASED(3f) 1432: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD 144 bz BASED(stack_overflow) 1453: 146#endif 1472: 148 .endm 149 150 .macro CREATE_STACK_FRAME psworg,savearea 151 s %r15,BASED(.Lc_spsize) # make room for registers & psw 152 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 153 la %r12,\psworg 154 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2 155 icm %r12,12,__LC_SVC_ILC 156 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 157 st %r12,SP_ILC(%r15) 158 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack 159 la %r12,0 160 st %r12,__SF_BACKCHAIN(%r15) # clear back chain 161 .endm 162 163 .macro RESTORE_ALL psworg,sync 164 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore 165 .if !\sync 166 ni \psworg+1,0xfd # clear wait state bit 167 .endif 168 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user 169 STORE_TIMER __LC_EXIT_TIMER 170 lpsw \psworg # back to caller 171 .endm 172 173/* 174 * Scheduler resume function, called by switch_to 175 * gpr2 = (task_struct *) prev 176 * gpr3 = (task_struct *) next 177 * Returns: 178 * gpr2 = prev 179 */ 180 .globl __switch_to 181__switch_to: 182 basr %r1,0 183__switch_to_base: 184 tm __THREAD_per(%r3),0xe8 # new process is using per ? 185 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine 186 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff 187 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15) 188 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's 189 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't 190__switch_to_noper: 191 l %r4,__THREAD_info(%r2) # get thread_info of prev 192 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending? 193 bz __switch_to_no_mcck-__switch_to_base(%r1) 194 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev 195 l %r4,__THREAD_info(%r3) # get thread_info of next 196 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next 197__switch_to_no_mcck: 198 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task 199 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp 200 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp 201 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task 202 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct 203 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4 204 l %r3,__THREAD_info(%r3) # load thread_info from task struct 205 st %r3,__LC_THREAD_INFO 206 ahi %r3,STACK_SIZE 207 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack 208 br %r14 209 210__critical_start: 211/* 212 * SVC interrupt handler routine. System calls are synchronous events and 213 * are executed with interrupts enabled. 214 */ 215 216 .globl system_call 217system_call: 218 STORE_TIMER __LC_SYNC_ENTER_TIMER 219sysc_saveall: 220 SAVE_ALL_BASE __LC_SAVE_AREA 221 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 222 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 223 lh %r7,0x8a # get svc number from lowcore 224#ifdef CONFIG_VIRT_CPU_ACCOUNTING 225sysc_vtime: 226 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 227 bz BASED(sysc_do_svc) 228 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 229sysc_stime: 230 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 231sysc_update: 232 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 233#endif 234sysc_do_svc: 235 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 236 sla %r7,2 # *4 and test for svc 0 237 bnz BASED(sysc_nr_ok) # svc number > 0 238 # svc 0: system call number in %r1 239 cl %r1,BASED(.Lnr_syscalls) 240 bnl BASED(sysc_nr_ok) 241 lr %r7,%r1 # copy svc number to %r7 242 sla %r7,2 # *4 243sysc_nr_ok: 244 mvc SP_ARGS(4,%r15),SP_R7(%r15) 245sysc_do_restart: 246 l %r8,BASED(.Lsysc_table) 247 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 248 l %r8,0(%r7,%r8) # get system call addr. 249 bnz BASED(sysc_tracesys) 250 basr %r14,%r8 # call sys_xxxx 251 st %r2,SP_R2(%r15) # store return value (change R2 on stack) 252 # ATTENTION: check sys_execve_glue before 253 # changing anything here !! 254 255sysc_return: 256 tm SP_PSW+1(%r15),0x01 # returning to user ? 257 bno BASED(sysc_leave) 258 tm __TI_flags+3(%r9),_TIF_WORK_SVC 259 bnz BASED(sysc_work) # there is work to do (signals etc.) 260sysc_leave: 261 RESTORE_ALL __LC_RETURN_PSW,1 262 263# 264# recheck if there is more work to do 265# 266sysc_work_loop: 267 tm __TI_flags+3(%r9),_TIF_WORK_SVC 268 bz BASED(sysc_leave) # there is no work to do 269# 270# One of the work bits is on. Find out which one. 271# 272sysc_work: 273 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 274 bo BASED(sysc_mcck_pending) 275 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 276 bo BASED(sysc_reschedule) 277 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 278 bnz BASED(sysc_sigpending) 279 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 280 bo BASED(sysc_restart) 281 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 282 bo BASED(sysc_singlestep) 283 b BASED(sysc_leave) 284 285# 286# _TIF_NEED_RESCHED is set, call schedule 287# 288sysc_reschedule: 289 l %r1,BASED(.Lschedule) 290 la %r14,BASED(sysc_work_loop) 291 br %r1 # call scheduler 292 293# 294# _TIF_MCCK_PENDING is set, call handler 295# 296sysc_mcck_pending: 297 l %r1,BASED(.Ls390_handle_mcck) 298 la %r14,BASED(sysc_work_loop) 299 br %r1 # TIF bit will be cleared by handler 300 301# 302# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 303# 304sysc_sigpending: 305 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 306 la %r2,SP_PTREGS(%r15) # load pt_regs 307 l %r1,BASED(.Ldo_signal) 308 basr %r14,%r1 # call do_signal 309 tm __TI_flags+3(%r9),_TIF_RESTART_SVC 310 bo BASED(sysc_restart) 311 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP 312 bo BASED(sysc_singlestep) 313 b BASED(sysc_work_loop) 314 315# 316# _TIF_RESTART_SVC is set, set up registers and restart svc 317# 318sysc_restart: 319 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC 320 l %r7,SP_R2(%r15) # load new svc number 321 sla %r7,2 322 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument 323 lm %r2,%r6,SP_R2(%r15) # load svc arguments 324 b BASED(sysc_do_restart) # restart svc 325 326# 327# _TIF_SINGLE_STEP is set, call do_single_step 328# 329sysc_singlestep: 330 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP 331 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check 332 la %r2,SP_PTREGS(%r15) # address of register-save area 333 l %r1,BASED(.Lhandle_per) # load adr. of per handler 334 la %r14,BASED(sysc_return) # load adr. of system return 335 br %r1 # branch to do_single_step 336 337# 338# call trace before and after sys_call 339# 340sysc_tracesys: 341 l %r1,BASED(.Ltrace) 342 la %r2,SP_PTREGS(%r15) # load pt_regs 343 la %r3,0 344 srl %r7,2 345 st %r7,SP_R2(%r15) 346 basr %r14,%r1 347 clc SP_R2(4,%r15),BASED(.Lnr_syscalls) 348 bnl BASED(sysc_tracenogo) 349 l %r8,BASED(.Lsysc_table) 350 l %r7,SP_R2(%r15) # strace might have changed the 351 sll %r7,2 # system call 352 l %r8,0(%r7,%r8) 353sysc_tracego: 354 lm %r3,%r6,SP_R3(%r15) 355 l %r2,SP_ORIG_R2(%r15) 356 basr %r14,%r8 # call sys_xxx 357 st %r2,SP_R2(%r15) # store return value 358sysc_tracenogo: 359 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT) 360 bz BASED(sysc_return) 361 l %r1,BASED(.Ltrace) 362 la %r2,SP_PTREGS(%r15) # load pt_regs 363 la %r3,1 364 la %r14,BASED(sysc_return) 365 br %r1 366 367# 368# a new process exits the kernel with ret_from_fork 369# 370 .globl ret_from_fork 371ret_from_fork: 372 l %r13,__LC_SVC_NEW_PSW+4 373 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 374 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ? 375 bo BASED(0f) 376 st %r15,SP_R15(%r15) # store stack pointer for new kthread 3770: l %r1,BASED(.Lschedtail) 378 basr %r14,%r1 379 TRACE_IRQS_ON 380 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 381 b BASED(sysc_return) 382 383# 384# clone, fork, vfork, exec and sigreturn need glue, 385# because they all expect pt_regs as parameter, 386# but are called with different parameter. 387# return-address is set up above 388# 389sys_clone_glue: 390 la %r2,SP_PTREGS(%r15) # load pt_regs 391 l %r1,BASED(.Lclone) 392 br %r1 # branch to sys_clone 393 394sys_fork_glue: 395 la %r2,SP_PTREGS(%r15) # load pt_regs 396 l %r1,BASED(.Lfork) 397 br %r1 # branch to sys_fork 398 399sys_vfork_glue: 400 la %r2,SP_PTREGS(%r15) # load pt_regs 401 l %r1,BASED(.Lvfork) 402 br %r1 # branch to sys_vfork 403 404sys_execve_glue: 405 la %r2,SP_PTREGS(%r15) # load pt_regs 406 l %r1,BASED(.Lexecve) 407 lr %r12,%r14 # save return address 408 basr %r14,%r1 # call sys_execve 409 ltr %r2,%r2 # check if execve failed 410 bnz 0(%r12) # it did fail -> store result in gpr2 411 b 4(%r12) # SKIP ST 2,SP_R2(15) after BASR 14,8 412 # in system_call/sysc_tracesys 413 414sys_sigreturn_glue: 415 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter 416 l %r1,BASED(.Lsigreturn) 417 br %r1 # branch to sys_sigreturn 418 419sys_rt_sigreturn_glue: 420 la %r2,SP_PTREGS(%r15) # load pt_regs as parameter 421 l %r1,BASED(.Lrt_sigreturn) 422 br %r1 # branch to sys_sigreturn 423 424sys_sigaltstack_glue: 425 la %r4,SP_PTREGS(%r15) # load pt_regs as parameter 426 l %r1,BASED(.Lsigaltstack) 427 br %r1 # branch to sys_sigreturn 428 429/* 430 * Program check handler routine 431 */ 432 433 .globl pgm_check_handler 434pgm_check_handler: 435/* 436 * First we need to check for a special case: 437 * Single stepping an instruction that disables the PER event mask will 438 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW. 439 * For a single stepped SVC the program check handler gets control after 440 * the SVC new PSW has been loaded. But we want to execute the SVC first and 441 * then handle the PER event. Therefore we update the SVC old PSW to point 442 * to the pgm_check_handler and branch to the SVC handler after we checked 443 * if we have to load the kernel stack register. 444 * For every other possible cause for PER event without the PER mask set 445 * we just ignore the PER event (FIXME: is there anything we have to do 446 * for LPSW?). 447 */ 448 STORE_TIMER __LC_SYNC_ENTER_TIMER 449 SAVE_ALL_BASE __LC_SAVE_AREA 450 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception 451 bnz BASED(pgm_per) # got per exception -> special case 452 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 453 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 454#ifdef CONFIG_VIRT_CPU_ACCOUNTING 455 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 456 bz BASED(pgm_no_vtime) 457 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 458 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 459 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 460pgm_no_vtime: 461#endif 462 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 463 l %r3,__LC_PGM_ILC # load program interruption code 464 la %r8,0x7f 465 nr %r8,%r3 466pgm_do_call: 467 l %r7,BASED(.Ljump_table) 468 sll %r8,2 469 l %r7,0(%r8,%r7) # load address of handler routine 470 la %r2,SP_PTREGS(%r15) # address of register-save area 471 la %r14,BASED(sysc_return) 472 br %r7 # branch to interrupt-handler 473 474# 475# handle per exception 476# 477pgm_per: 478 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on 479 bnz BASED(pgm_per_std) # ok, normal per event from user space 480# ok its one of the special cases, now we need to find out which one 481 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW 482 be BASED(pgm_svcper) 483# no interesting special case, ignore PER event 484 lm %r12,%r15,__LC_SAVE_AREA 485 lpsw 0x28 486 487# 488# Normal per exception 489# 490pgm_per_std: 491 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA 492 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA 493#ifdef CONFIG_VIRT_CPU_ACCOUNTING 494 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 495 bz BASED(pgm_no_vtime2) 496 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 497 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 498 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 499pgm_no_vtime2: 500#endif 501 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 502 l %r1,__TI_task(%r9) 503 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 504 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 505 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 506 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 507 tm SP_PSW+1(%r15),0x01 # kernel per event ? 508 bz BASED(kernel_per) 509 l %r3,__LC_PGM_ILC # load program interruption code 510 la %r8,0x7f 511 nr %r8,%r3 # clear per-event-bit and ilc 512 be BASED(sysc_return) # only per or per+check ? 513 b BASED(pgm_do_call) 514 515# 516# it was a single stepped SVC that is causing all the trouble 517# 518pgm_svcper: 519 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 520 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 521#ifdef CONFIG_VIRT_CPU_ACCOUNTING 522 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 523 bz BASED(pgm_no_vtime3) 524 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 525 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 526 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 527pgm_no_vtime3: 528#endif 529 lh %r7,0x8a # get svc number from lowcore 530 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 531 l %r1,__TI_task(%r9) 532 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID 533 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS 534 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID 535 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP 536 TRACE_IRQS_ON 537 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 538 b BASED(sysc_do_svc) 539 540# 541# per was called from kernel, must be kprobes 542# 543kernel_per: 544 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check 545 la %r2,SP_PTREGS(%r15) # address of register-save area 546 l %r1,BASED(.Lhandle_per) # load adr. of per handler 547 la %r14,BASED(sysc_leave) # load adr. of system return 548 br %r1 # branch to do_single_step 549 550/* 551 * IO interrupt handler routine 552 */ 553 554 .globl io_int_handler 555io_int_handler: 556 STORE_TIMER __LC_ASYNC_ENTER_TIMER 557 stck __LC_INT_CLOCK 558 SAVE_ALL_BASE __LC_SAVE_AREA+16 559 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 560 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16 561#ifdef CONFIG_VIRT_CPU_ACCOUNTING 562 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 563 bz BASED(io_no_vtime) 564 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 565 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 566 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 567io_no_vtime: 568#endif 569 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 570 TRACE_IRQS_OFF 571 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ 572 la %r2,SP_PTREGS(%r15) # address of register-save area 573 basr %r14,%r1 # branch to standard irq handler 574 TRACE_IRQS_ON 575 576io_return: 577 tm SP_PSW+1(%r15),0x01 # returning to user ? 578#ifdef CONFIG_PREEMPT 579 bno BASED(io_preempt) # no -> check for preemptive scheduling 580#else 581 bno BASED(io_leave) # no-> skip resched & signal 582#endif 583 tm __TI_flags+3(%r9),_TIF_WORK_INT 584 bnz BASED(io_work) # there is work to do (signals etc.) 585io_leave: 586 RESTORE_ALL __LC_RETURN_PSW,0 587io_done: 588 589#ifdef CONFIG_PREEMPT 590io_preempt: 591 icm %r0,15,__TI_precount(%r9) 592 bnz BASED(io_leave) 593 l %r1,SP_R15(%r15) 594 s %r1,BASED(.Lc_spsize) 595 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 596 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 597 lr %r15,%r1 598io_resume_loop: 599 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 600 bno BASED(io_leave) 601 mvc __TI_precount(4,%r9),BASED(.Lc_pactive) 602 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 603 l %r1,BASED(.Lschedule) 604 basr %r14,%r1 # call schedule 605 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 606 xc __TI_precount(4,%r9),__TI_precount(%r9) 607 b BASED(io_resume_loop) 608#endif 609 610# 611# switch to kernel stack, then check the TIF bits 612# 613io_work: 614 l %r1,__LC_KERNEL_STACK 615 s %r1,BASED(.Lc_spsize) 616 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 617 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 618 lr %r15,%r1 619# 620# One of the work bits is on. Find out which one. 621# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGMASK, _TIF_NEED_RESCHED 622# and _TIF_MCCK_PENDING 623# 624io_work_loop: 625 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 626 bo BASED(io_mcck_pending) 627 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED 628 bo BASED(io_reschedule) 629 tm __TI_flags+3(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK) 630 bnz BASED(io_sigpending) 631 b BASED(io_leave) 632 633# 634# _TIF_MCCK_PENDING is set, call handler 635# 636io_mcck_pending: 637 l %r1,BASED(.Ls390_handle_mcck) 638 la %r14,BASED(io_work_loop) 639 br %r1 # TIF bit will be cleared by handler 640 641# 642# _TIF_NEED_RESCHED is set, call schedule 643# 644io_reschedule: 645 l %r1,BASED(.Lschedule) 646 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 647 basr %r14,%r1 # call scheduler 648 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 649 tm __TI_flags+3(%r9),_TIF_WORK_INT 650 bz BASED(io_leave) # there is no work to do 651 b BASED(io_work_loop) 652 653# 654# _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal 655# 656io_sigpending: 657 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts 658 la %r2,SP_PTREGS(%r15) # load pt_regs 659 l %r1,BASED(.Ldo_signal) 660 basr %r14,%r1 # call do_signal 661 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts 662 b BASED(io_work_loop) 663 664/* 665 * External interrupt handler routine 666 */ 667 668 .globl ext_int_handler 669ext_int_handler: 670 STORE_TIMER __LC_ASYNC_ENTER_TIMER 671 stck __LC_INT_CLOCK 672 SAVE_ALL_BASE __LC_SAVE_AREA+16 673 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 674 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16 675#ifdef CONFIG_VIRT_CPU_ACCOUNTING 676 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 677 bz BASED(ext_no_vtime) 678 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 679 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 680 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 681ext_no_vtime: 682#endif 683 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 684 TRACE_IRQS_OFF 685 la %r2,SP_PTREGS(%r15) # address of register-save area 686 lh %r3,__LC_EXT_INT_CODE # get interruption code 687 l %r1,BASED(.Ldo_extint) 688 basr %r14,%r1 689 TRACE_IRQS_ON 690 b BASED(io_return) 691 692__critical_end: 693 694/* 695 * Machine check handler routines 696 */ 697 698 .globl mcck_int_handler 699mcck_int_handler: 700 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer 701 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs 702 SAVE_ALL_BASE __LC_SAVE_AREA+32 703 la %r12,__LC_MCK_OLD_PSW 704 tm __LC_MCCK_CODE,0x80 # system damage? 705 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid 706#ifdef CONFIG_VIRT_CPU_ACCOUNTING 707 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER 708 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA 709 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid? 710 bo BASED(1f) 711 la %r14,__LC_SYNC_ENTER_TIMER 712 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER 713 bl BASED(0f) 714 la %r14,__LC_ASYNC_ENTER_TIMER 7150: clc 0(8,%r14),__LC_EXIT_TIMER 716 bl BASED(0f) 717 la %r14,__LC_EXIT_TIMER 7180: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER 719 bl BASED(0f) 720 la %r14,__LC_LAST_UPDATE_TIMER 7210: spt 0(%r14) 722 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14) 7231: 724#endif 725 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid? 726 bno BASED(mcck_int_main) # no -> skip cleanup critical 727 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit 728 bnz BASED(mcck_int_main) # from user -> load async stack 729 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end) 730 bhe BASED(mcck_int_main) 731 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start) 732 bl BASED(mcck_int_main) 733 l %r14,BASED(.Lcleanup_critical) 734 basr %r14,%r14 735mcck_int_main: 736 l %r14,__LC_PANIC_STACK # are we already on the panic stack? 737 slr %r14,%r15 738 sra %r14,PAGE_SHIFT 739 be BASED(0f) 740 l %r15,__LC_PANIC_STACK # load panic stack 7410: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32 742#ifdef CONFIG_VIRT_CPU_ACCOUNTING 743 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid? 744 bno BASED(mcck_no_vtime) # no -> skip cleanup critical 745 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 746 bz BASED(mcck_no_vtime) 747 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER 748 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 749 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER 750mcck_no_vtime: 751#endif 752 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct 753 la %r2,SP_PTREGS(%r15) # load pt_regs 754 l %r1,BASED(.Ls390_mcck) 755 basr %r14,%r1 # call machine check handler 756 tm SP_PSW+1(%r15),0x01 # returning to user ? 757 bno BASED(mcck_return) 758 l %r1,__LC_KERNEL_STACK # switch to kernel stack 759 s %r1,BASED(.Lc_spsize) 760 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15) 761 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain 762 lr %r15,%r1 763 stosm __SF_EMPTY(%r15),0x04 # turn dat on 764 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING 765 bno BASED(mcck_return) 766 TRACE_IRQS_OFF 767 l %r1,BASED(.Ls390_handle_mcck) 768 basr %r14,%r1 # call machine check handler 769 TRACE_IRQS_ON 770mcck_return: 771 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW 772 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit 773#ifdef CONFIG_VIRT_CPU_ACCOUNTING 774 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52 775 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ? 776 bno BASED(0f) 777 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 778 stpt __LC_EXIT_TIMER 779 lpsw __LC_RETURN_MCCK_PSW # back to caller 7800: 781#endif 782 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 783 lpsw __LC_RETURN_MCCK_PSW # back to caller 784 785 RESTORE_ALL __LC_RETURN_MCCK_PSW,0 786 787#ifdef CONFIG_SMP 788/* 789 * Restart interruption handler, kick starter for additional CPUs 790 */ 791 .globl restart_int_handler 792restart_int_handler: 793 l %r15,__LC_SAVE_AREA+60 # load ksp 794 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs 795 lam %a0,%a15,__LC_AREGS_SAVE_AREA 796 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone 797 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on 798 basr %r14,0 799 l %r14,restart_addr-.(%r14) 800 br %r14 # branch to start_secondary 801restart_addr: 802 .long start_secondary 803#else 804/* 805 * If we do not run with SMP enabled, let the new CPU crash ... 806 */ 807 .globl restart_int_handler 808restart_int_handler: 809 basr %r1,0 810restart_base: 811 lpsw restart_crash-restart_base(%r1) 812 .align 8 813restart_crash: 814 .long 0x000a0000,0x00000000 815restart_go: 816#endif 817 818#ifdef CONFIG_CHECK_STACK 819/* 820 * The synchronous or the asynchronous stack overflowed. We are dead. 821 * No need to properly save the registers, we are going to panic anyway. 822 * Setup a pt_regs so that show_trace can provide a good call trace. 823 */ 824stack_overflow: 825 l %r15,__LC_PANIC_STACK # change to panic stack 826 sl %r15,BASED(.Lc_spsize) 827 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack 828 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack 829 la %r1,__LC_SAVE_AREA 830 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ? 831 be BASED(0f) 832 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ? 833 be BASED(0f) 834 la %r1,__LC_SAVE_AREA+16 8350: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack 836 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain 837 l %r1,BASED(1f) # branch to kernel_stack_overflow 838 la %r2,SP_PTREGS(%r15) # load pt_regs 839 br %r1 8401: .long kernel_stack_overflow 841#endif 842 843cleanup_table_system_call: 844 .long system_call + 0x80000000, sysc_do_svc + 0x80000000 845cleanup_table_sysc_return: 846 .long sysc_return + 0x80000000, sysc_leave + 0x80000000 847cleanup_table_sysc_leave: 848 .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000 849cleanup_table_sysc_work_loop: 850 .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000 851cleanup_table_io_return: 852 .long io_return + 0x80000000, io_leave + 0x80000000 853cleanup_table_io_leave: 854 .long io_leave + 0x80000000, io_done + 0x80000000 855cleanup_table_io_work_loop: 856 .long io_work_loop + 0x80000000, io_mcck_pending + 0x80000000 857 858cleanup_critical: 859 clc 4(4,%r12),BASED(cleanup_table_system_call) 860 bl BASED(0f) 861 clc 4(4,%r12),BASED(cleanup_table_system_call+4) 862 bl BASED(cleanup_system_call) 8630: 864 clc 4(4,%r12),BASED(cleanup_table_sysc_return) 865 bl BASED(0f) 866 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4) 867 bl BASED(cleanup_sysc_return) 8680: 869 clc 4(4,%r12),BASED(cleanup_table_sysc_leave) 870 bl BASED(0f) 871 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4) 872 bl BASED(cleanup_sysc_leave) 8730: 874 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop) 875 bl BASED(0f) 876 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4) 877 bl BASED(cleanup_sysc_return) 8780: 879 clc 4(4,%r12),BASED(cleanup_table_io_return) 880 bl BASED(0f) 881 clc 4(4,%r12),BASED(cleanup_table_io_return+4) 882 bl BASED(cleanup_io_return) 8830: 884 clc 4(4,%r12),BASED(cleanup_table_io_leave) 885 bl BASED(0f) 886 clc 4(4,%r12),BASED(cleanup_table_io_leave+4) 887 bl BASED(cleanup_io_leave) 8880: 889 clc 4(4,%r12),BASED(cleanup_table_io_work_loop) 890 bl BASED(0f) 891 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4) 892 bl BASED(cleanup_io_return) 8930: 894 br %r14 895 896cleanup_system_call: 897 mvc __LC_RETURN_PSW(8),0(%r12) 898 c %r12,BASED(.Lmck_old_psw) 899 be BASED(0f) 900 la %r12,__LC_SAVE_AREA+16 901 b BASED(1f) 9020: la %r12,__LC_SAVE_AREA+32 9031: 904#ifdef CONFIG_VIRT_CPU_ACCOUNTING 905 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4) 906 bh BASED(0f) 907 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER 9080: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8) 909 bhe BASED(cleanup_vtime) 910#endif 911 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn) 912 bh BASED(0f) 913 mvc __LC_SAVE_AREA(16),0(%r12) 9140: st %r13,4(%r12) 915 st %r12,__LC_SAVE_AREA+48 # argh 916 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA 917 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA 918 l %r12,__LC_SAVE_AREA+48 # argh 919 st %r15,12(%r12) 920 lh %r7,0x8a 921#ifdef CONFIG_VIRT_CPU_ACCOUNTING 922cleanup_vtime: 923 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12) 924 bhe BASED(cleanup_stime) 925 tm SP_PSW+1(%r15),0x01 # interrupting from user ? 926 bz BASED(cleanup_novtime) 927 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER 928cleanup_stime: 929 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16) 930 bh BASED(cleanup_update) 931 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER 932cleanup_update: 933 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER 934cleanup_novtime: 935#endif 936 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4) 937 la %r12,__LC_RETURN_PSW 938 br %r14 939cleanup_system_call_insn: 940 .long sysc_saveall + 0x80000000 941#ifdef CONFIG_VIRT_CPU_ACCOUNTING 942 .long system_call + 0x80000000 943 .long sysc_vtime + 0x80000000 944 .long sysc_stime + 0x80000000 945 .long sysc_update + 0x80000000 946#endif 947 948cleanup_sysc_return: 949 mvc __LC_RETURN_PSW(4),0(%r12) 950 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return) 951 la %r12,__LC_RETURN_PSW 952 br %r14 953 954cleanup_sysc_leave: 955 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn) 956 be BASED(2f) 957#ifdef CONFIG_VIRT_CPU_ACCOUNTING 958 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 959 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4) 960 be BASED(2f) 961#endif 962 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 963 c %r12,BASED(.Lmck_old_psw) 964 bne BASED(0f) 965 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 966 b BASED(1f) 9670: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 9681: lm %r0,%r11,SP_R0(%r15) 969 l %r15,SP_R15(%r15) 9702: la %r12,__LC_RETURN_PSW 971 br %r14 972cleanup_sysc_leave_insn: 973#ifdef CONFIG_VIRT_CPU_ACCOUNTING 974 .long sysc_leave + 14 + 0x80000000 975#endif 976 .long sysc_leave + 10 + 0x80000000 977 978cleanup_io_return: 979 mvc __LC_RETURN_PSW(4),0(%r12) 980 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop) 981 la %r12,__LC_RETURN_PSW 982 br %r14 983 984cleanup_io_leave: 985 clc 4(4,%r12),BASED(cleanup_io_leave_insn) 986 be BASED(2f) 987#ifdef CONFIG_VIRT_CPU_ACCOUNTING 988 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER 989 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4) 990 be BASED(2f) 991#endif 992 mvc __LC_RETURN_PSW(8),SP_PSW(%r15) 993 c %r12,BASED(.Lmck_old_psw) 994 bne BASED(0f) 995 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15) 996 b BASED(1f) 9970: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15) 9981: lm %r0,%r11,SP_R0(%r15) 999 l %r15,SP_R15(%r15) 10002: la %r12,__LC_RETURN_PSW 1001 br %r14 1002cleanup_io_leave_insn: 1003#ifdef CONFIG_VIRT_CPU_ACCOUNTING 1004 .long io_leave + 18 + 0x80000000 1005#endif 1006 .long io_leave + 14 + 0x80000000 1007 1008/* 1009 * Integer constants 1010 */ 1011 .align 4 1012.Lc_spsize: .long SP_SIZE 1013.Lc_overhead: .long STACK_FRAME_OVERHEAD 1014.Lc_pactive: .long PREEMPT_ACTIVE 1015.Lnr_syscalls: .long NR_syscalls 1016.L0x018: .short 0x018 1017.L0x020: .short 0x020 1018.L0x028: .short 0x028 1019.L0x030: .short 0x030 1020.L0x038: .short 0x038 1021.Lc_1: .long 1 1022 1023/* 1024 * Symbol constants 1025 */ 1026.Ls390_mcck: .long s390_do_machine_check 1027.Ls390_handle_mcck: 1028 .long s390_handle_mcck 1029.Lmck_old_psw: .long __LC_MCK_OLD_PSW 1030.Ldo_IRQ: .long do_IRQ 1031.Ldo_extint: .long do_extint 1032.Ldo_signal: .long do_signal 1033.Lhandle_per: .long do_single_step 1034.Ljump_table: .long pgm_check_table 1035.Lschedule: .long schedule 1036.Lclone: .long sys_clone 1037.Lexecve: .long sys_execve 1038.Lfork: .long sys_fork 1039.Lrt_sigreturn: .long sys_rt_sigreturn 1040.Lrt_sigsuspend: 1041 .long sys_rt_sigsuspend 1042.Lsigreturn: .long sys_sigreturn 1043.Lsigsuspend: .long sys_sigsuspend 1044.Lsigaltstack: .long sys_sigaltstack 1045.Ltrace: .long syscall_trace 1046.Lvfork: .long sys_vfork 1047.Lschedtail: .long schedule_tail 1048.Lsysc_table: .long sys_call_table 1049#ifdef CONFIG_TRACE_IRQFLAGS 1050.Ltrace_irq_on: .long trace_hardirqs_on 1051.Ltrace_irq_off: 1052 .long trace_hardirqs_off 1053#endif 1054.Lcritical_start: 1055 .long __critical_start + 0x80000000 1056.Lcritical_end: 1057 .long __critical_end + 0x80000000 1058.Lcleanup_critical: 1059 .long cleanup_critical 1060 1061 .section .rodata, "a" 1062#define SYSCALL(esa,esame,emu) .long esa 1063sys_call_table: 1064#include "syscalls.S" 1065#undef SYSCALL 1066