1 /* 2 * Low-level SPU handling 3 * 4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 5 * 6 * Author: Arnd Bergmann <arndb@de.ibm.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2, or (at your option) 11 * any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #undef DEBUG 24 25 #include <linux/interrupt.h> 26 #include <linux/list.h> 27 #include <linux/module.h> 28 #include <linux/poll.h> 29 #include <linux/ptrace.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 33 #include <asm/io.h> 34 #include <asm/prom.h> 35 #include <linux/mutex.h> 36 #include <asm/spu.h> 37 #include <asm/mmu_context.h> 38 39 #include "interrupt.h" 40 41 static int __spu_trap_invalid_dma(struct spu *spu) 42 { 43 pr_debug("%s\n", __FUNCTION__); 44 force_sig(SIGBUS, /* info, */ current); 45 return 0; 46 } 47 48 static int __spu_trap_dma_align(struct spu *spu) 49 { 50 pr_debug("%s\n", __FUNCTION__); 51 force_sig(SIGBUS, /* info, */ current); 52 return 0; 53 } 54 55 static int __spu_trap_error(struct spu *spu) 56 { 57 pr_debug("%s\n", __FUNCTION__); 58 force_sig(SIGILL, /* info, */ current); 59 return 0; 60 } 61 62 static void spu_restart_dma(struct spu *spu) 63 { 64 struct spu_priv2 __iomem *priv2 = spu->priv2; 65 66 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags)) 67 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND); 68 } 69 70 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea) 71 { 72 struct spu_priv2 __iomem *priv2 = spu->priv2; 73 struct mm_struct *mm = spu->mm; 74 u64 esid, vsid; 75 76 pr_debug("%s\n", __FUNCTION__); 77 78 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) { 79 /* SLBs are pre-loaded for context switch, so 80 * we should never get here! 81 */ 82 printk("%s: invalid access during switch!\n", __func__); 83 return 1; 84 } 85 if (!mm || (REGION_ID(ea) != USER_REGION_ID)) { 86 /* Future: support kernel segments so that drivers 87 * can use SPUs. 88 */ 89 pr_debug("invalid region access at %016lx\n", ea); 90 return 1; 91 } 92 93 esid = (ea & ESID_MASK) | SLB_ESID_V; 94 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) | SLB_VSID_USER; 95 if (in_hugepage_area(mm->context, ea)) 96 vsid |= SLB_VSID_L; 97 98 out_be64(&priv2->slb_index_W, spu->slb_replace); 99 out_be64(&priv2->slb_vsid_RW, vsid); 100 out_be64(&priv2->slb_esid_RW, esid); 101 102 spu->slb_replace++; 103 if (spu->slb_replace >= 8) 104 spu->slb_replace = 0; 105 106 spu_restart_dma(spu); 107 108 return 0; 109 } 110 111 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX 112 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr) 113 { 114 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea); 115 116 /* Handle kernel space hash faults immediately. 117 User hash faults need to be deferred to process context. */ 118 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) 119 && REGION_ID(ea) != USER_REGION_ID 120 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) { 121 spu_restart_dma(spu); 122 return 0; 123 } 124 125 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) { 126 printk("%s: invalid access during switch!\n", __func__); 127 return 1; 128 } 129 130 spu->dar = ea; 131 spu->dsisr = dsisr; 132 mb(); 133 if (spu->stop_callback) 134 spu->stop_callback(spu); 135 return 0; 136 } 137 138 static int __spu_trap_mailbox(struct spu *spu) 139 { 140 if (spu->ibox_callback) 141 spu->ibox_callback(spu); 142 143 /* atomically disable SPU mailbox interrupts */ 144 spin_lock(&spu->register_lock); 145 spu_int_mask_and(spu, 2, ~0x1); 146 spin_unlock(&spu->register_lock); 147 return 0; 148 } 149 150 static int __spu_trap_stop(struct spu *spu) 151 { 152 pr_debug("%s\n", __FUNCTION__); 153 spu->stop_code = in_be32(&spu->problem->spu_status_R); 154 if (spu->stop_callback) 155 spu->stop_callback(spu); 156 return 0; 157 } 158 159 static int __spu_trap_halt(struct spu *spu) 160 { 161 pr_debug("%s\n", __FUNCTION__); 162 spu->stop_code = in_be32(&spu->problem->spu_status_R); 163 if (spu->stop_callback) 164 spu->stop_callback(spu); 165 return 0; 166 } 167 168 static int __spu_trap_tag_group(struct spu *spu) 169 { 170 pr_debug("%s\n", __FUNCTION__); 171 spu->mfc_callback(spu); 172 return 0; 173 } 174 175 static int __spu_trap_spubox(struct spu *spu) 176 { 177 if (spu->wbox_callback) 178 spu->wbox_callback(spu); 179 180 /* atomically disable SPU mailbox interrupts */ 181 spin_lock(&spu->register_lock); 182 spu_int_mask_and(spu, 2, ~0x10); 183 spin_unlock(&spu->register_lock); 184 return 0; 185 } 186 187 static irqreturn_t 188 spu_irq_class_0(int irq, void *data, struct pt_regs *regs) 189 { 190 struct spu *spu; 191 192 spu = data; 193 spu->class_0_pending = 1; 194 if (spu->stop_callback) 195 spu->stop_callback(spu); 196 197 return IRQ_HANDLED; 198 } 199 200 int 201 spu_irq_class_0_bottom(struct spu *spu) 202 { 203 unsigned long stat, mask; 204 205 spu->class_0_pending = 0; 206 207 mask = spu_int_mask_get(spu, 0); 208 stat = spu_int_stat_get(spu, 0); 209 210 stat &= mask; 211 212 if (stat & 1) /* invalid MFC DMA */ 213 __spu_trap_invalid_dma(spu); 214 215 if (stat & 2) /* invalid DMA alignment */ 216 __spu_trap_dma_align(spu); 217 218 if (stat & 4) /* error on SPU */ 219 __spu_trap_error(spu); 220 221 spu_int_stat_clear(spu, 0, stat); 222 223 return (stat & 0x7) ? -EIO : 0; 224 } 225 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom); 226 227 static irqreturn_t 228 spu_irq_class_1(int irq, void *data, struct pt_regs *regs) 229 { 230 struct spu *spu; 231 unsigned long stat, mask, dar, dsisr; 232 233 spu = data; 234 235 /* atomically read & clear class1 status. */ 236 spin_lock(&spu->register_lock); 237 mask = spu_int_mask_get(spu, 1); 238 stat = spu_int_stat_get(spu, 1) & mask; 239 dar = spu_mfc_dar_get(spu); 240 dsisr = spu_mfc_dsisr_get(spu); 241 if (stat & 2) /* mapping fault */ 242 spu_mfc_dsisr_set(spu, 0ul); 243 spu_int_stat_clear(spu, 1, stat); 244 spin_unlock(&spu->register_lock); 245 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat, 246 dar, dsisr); 247 248 if (stat & 1) /* segment fault */ 249 __spu_trap_data_seg(spu, dar); 250 251 if (stat & 2) { /* mapping fault */ 252 __spu_trap_data_map(spu, dar, dsisr); 253 } 254 255 if (stat & 4) /* ls compare & suspend on get */ 256 ; 257 258 if (stat & 8) /* ls compare & suspend on put */ 259 ; 260 261 return stat ? IRQ_HANDLED : IRQ_NONE; 262 } 263 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom); 264 265 static irqreturn_t 266 spu_irq_class_2(int irq, void *data, struct pt_regs *regs) 267 { 268 struct spu *spu; 269 unsigned long stat; 270 unsigned long mask; 271 272 spu = data; 273 stat = spu_int_stat_get(spu, 2); 274 mask = spu_int_mask_get(spu, 2); 275 276 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask); 277 278 stat &= mask; 279 280 if (stat & 1) /* PPC core mailbox */ 281 __spu_trap_mailbox(spu); 282 283 if (stat & 2) /* SPU stop-and-signal */ 284 __spu_trap_stop(spu); 285 286 if (stat & 4) /* SPU halted */ 287 __spu_trap_halt(spu); 288 289 if (stat & 8) /* DMA tag group complete */ 290 __spu_trap_tag_group(spu); 291 292 if (stat & 0x10) /* SPU mailbox threshold */ 293 __spu_trap_spubox(spu); 294 295 spu_int_stat_clear(spu, 2, stat); 296 return stat ? IRQ_HANDLED : IRQ_NONE; 297 } 298 299 static int 300 spu_request_irqs(struct spu *spu) 301 { 302 int ret; 303 int irq_base; 304 305 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET; 306 307 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number); 308 ret = request_irq(irq_base + spu->isrc, 309 spu_irq_class_0, 0, spu->irq_c0, spu); 310 if (ret) 311 goto out; 312 313 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number); 314 ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, 315 spu_irq_class_1, 0, spu->irq_c1, spu); 316 if (ret) 317 goto out1; 318 319 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number); 320 ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, 321 spu_irq_class_2, 0, spu->irq_c2, spu); 322 if (ret) 323 goto out2; 324 goto out; 325 326 out2: 327 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); 328 out1: 329 free_irq(irq_base + spu->isrc, spu); 330 out: 331 return ret; 332 } 333 334 static void 335 spu_free_irqs(struct spu *spu) 336 { 337 int irq_base; 338 339 irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET; 340 341 free_irq(irq_base + spu->isrc, spu); 342 free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu); 343 free_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, spu); 344 } 345 346 static LIST_HEAD(spu_list); 347 static DEFINE_MUTEX(spu_mutex); 348 349 static void spu_init_channels(struct spu *spu) 350 { 351 static const struct { 352 unsigned channel; 353 unsigned count; 354 } zero_list[] = { 355 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, }, 356 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, }, 357 }, count_list[] = { 358 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, }, 359 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, }, 360 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, }, 361 }; 362 struct spu_priv2 __iomem *priv2; 363 int i; 364 365 priv2 = spu->priv2; 366 367 /* initialize all channel data to zero */ 368 for (i = 0; i < ARRAY_SIZE(zero_list); i++) { 369 int count; 370 371 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel); 372 for (count = 0; count < zero_list[i].count; count++) 373 out_be64(&priv2->spu_chnldata_RW, 0); 374 } 375 376 /* initialize channel counts to meaningful values */ 377 for (i = 0; i < ARRAY_SIZE(count_list); i++) { 378 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel); 379 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count); 380 } 381 } 382 383 struct spu *spu_alloc(void) 384 { 385 struct spu *spu; 386 387 mutex_lock(&spu_mutex); 388 if (!list_empty(&spu_list)) { 389 spu = list_entry(spu_list.next, struct spu, list); 390 list_del_init(&spu->list); 391 pr_debug("Got SPU %x %d\n", spu->isrc, spu->number); 392 } else { 393 pr_debug("No SPU left\n"); 394 spu = NULL; 395 } 396 mutex_unlock(&spu_mutex); 397 398 if (spu) 399 spu_init_channels(spu); 400 401 return spu; 402 } 403 EXPORT_SYMBOL_GPL(spu_alloc); 404 405 void spu_free(struct spu *spu) 406 { 407 mutex_lock(&spu_mutex); 408 list_add_tail(&spu->list, &spu_list); 409 mutex_unlock(&spu_mutex); 410 } 411 EXPORT_SYMBOL_GPL(spu_free); 412 413 static int spu_handle_mm_fault(struct spu *spu) 414 { 415 struct mm_struct *mm = spu->mm; 416 struct vm_area_struct *vma; 417 u64 ea, dsisr, is_write; 418 int ret; 419 420 ea = spu->dar; 421 dsisr = spu->dsisr; 422 #if 0 423 if (!IS_VALID_EA(ea)) { 424 return -EFAULT; 425 } 426 #endif /* XXX */ 427 if (mm == NULL) { 428 return -EFAULT; 429 } 430 if (mm->pgd == NULL) { 431 return -EFAULT; 432 } 433 434 down_read(&mm->mmap_sem); 435 vma = find_vma(mm, ea); 436 if (!vma) 437 goto bad_area; 438 if (vma->vm_start <= ea) 439 goto good_area; 440 if (!(vma->vm_flags & VM_GROWSDOWN)) 441 goto bad_area; 442 #if 0 443 if (expand_stack(vma, ea)) 444 goto bad_area; 445 #endif /* XXX */ 446 good_area: 447 is_write = dsisr & MFC_DSISR_ACCESS_PUT; 448 if (is_write) { 449 if (!(vma->vm_flags & VM_WRITE)) 450 goto bad_area; 451 } else { 452 if (dsisr & MFC_DSISR_ACCESS_DENIED) 453 goto bad_area; 454 if (!(vma->vm_flags & (VM_READ | VM_EXEC))) 455 goto bad_area; 456 } 457 ret = 0; 458 switch (handle_mm_fault(mm, vma, ea, is_write)) { 459 case VM_FAULT_MINOR: 460 current->min_flt++; 461 break; 462 case VM_FAULT_MAJOR: 463 current->maj_flt++; 464 break; 465 case VM_FAULT_SIGBUS: 466 ret = -EFAULT; 467 goto bad_area; 468 case VM_FAULT_OOM: 469 ret = -ENOMEM; 470 goto bad_area; 471 default: 472 BUG(); 473 } 474 up_read(&mm->mmap_sem); 475 return ret; 476 477 bad_area: 478 up_read(&mm->mmap_sem); 479 return -EFAULT; 480 } 481 482 int spu_irq_class_1_bottom(struct spu *spu) 483 { 484 u64 ea, dsisr, access, error = 0UL; 485 int ret = 0; 486 487 ea = spu->dar; 488 dsisr = spu->dsisr; 489 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) { 490 access = (_PAGE_PRESENT | _PAGE_USER); 491 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL; 492 if (hash_page(ea, access, 0x300) != 0) 493 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR; 494 } 495 if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) { 496 if ((ret = spu_handle_mm_fault(spu)) != 0) 497 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR; 498 else 499 error &= ~CLASS1_ENABLE_STORAGE_FAULT_INTR; 500 } 501 spu->dar = 0UL; 502 spu->dsisr = 0UL; 503 if (!error) { 504 spu_restart_dma(spu); 505 } else { 506 __spu_trap_invalid_dma(spu); 507 } 508 return ret; 509 } 510 511 void spu_irq_setaffinity(struct spu *spu, int cpu) 512 { 513 u64 target = iic_get_target_id(cpu); 514 u64 route = target << 48 | target << 32 | target << 16; 515 spu_int_route_set(spu, route); 516 } 517 EXPORT_SYMBOL_GPL(spu_irq_setaffinity); 518 519 static void __iomem * __init map_spe_prop(struct device_node *n, 520 const char *name) 521 { 522 struct address_prop { 523 unsigned long address; 524 unsigned int len; 525 } __attribute__((packed)) *prop; 526 527 void *p; 528 int proplen; 529 530 p = get_property(n, name, &proplen); 531 if (proplen != sizeof (struct address_prop)) 532 return NULL; 533 534 prop = p; 535 536 return ioremap(prop->address, prop->len); 537 } 538 539 static void spu_unmap(struct spu *spu) 540 { 541 iounmap(spu->priv2); 542 iounmap(spu->priv1); 543 iounmap(spu->problem); 544 iounmap((u8 __iomem *)spu->local_store); 545 } 546 547 static int __init spu_map_device(struct spu *spu, struct device_node *spe) 548 { 549 char *prop; 550 int ret; 551 552 ret = -ENODEV; 553 prop = get_property(spe, "isrc", NULL); 554 if (!prop) 555 goto out; 556 spu->isrc = *(unsigned int *)prop; 557 558 spu->name = get_property(spe, "name", NULL); 559 if (!spu->name) 560 goto out; 561 562 prop = get_property(spe, "local-store", NULL); 563 if (!prop) 564 goto out; 565 spu->local_store_phys = *(unsigned long *)prop; 566 567 /* we use local store as ram, not io memory */ 568 spu->local_store = (void __force *)map_spe_prop(spe, "local-store"); 569 if (!spu->local_store) 570 goto out; 571 572 prop = get_property(spe, "problem", NULL); 573 if (!prop) 574 goto out_unmap; 575 spu->problem_phys = *(unsigned long *)prop; 576 577 spu->problem= map_spe_prop(spe, "problem"); 578 if (!spu->problem) 579 goto out_unmap; 580 581 spu->priv1= map_spe_prop(spe, "priv1"); 582 /* priv1 is not available on a hypervisor */ 583 584 spu->priv2= map_spe_prop(spe, "priv2"); 585 if (!spu->priv2) 586 goto out_unmap; 587 ret = 0; 588 goto out; 589 590 out_unmap: 591 spu_unmap(spu); 592 out: 593 return ret; 594 } 595 596 static int __init find_spu_node_id(struct device_node *spe) 597 { 598 unsigned int *id; 599 struct device_node *cpu; 600 601 cpu = spe->parent->parent; 602 id = (unsigned int *)get_property(cpu, "node-id", NULL); 603 604 return id ? *id : 0; 605 } 606 607 static int __init create_spu(struct device_node *spe) 608 { 609 struct spu *spu; 610 int ret; 611 static int number; 612 613 ret = -ENOMEM; 614 spu = kmalloc(sizeof (*spu), GFP_KERNEL); 615 if (!spu) 616 goto out; 617 618 ret = spu_map_device(spu, spe); 619 if (ret) 620 goto out_free; 621 622 spu->node = find_spu_node_id(spe); 623 spu->stop_code = 0; 624 spu->slb_replace = 0; 625 spu->mm = NULL; 626 spu->ctx = NULL; 627 spu->rq = NULL; 628 spu->pid = 0; 629 spu->class_0_pending = 0; 630 spu->flags = 0UL; 631 spu->dar = 0UL; 632 spu->dsisr = 0UL; 633 spin_lock_init(&spu->register_lock); 634 635 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1)); 636 spu_mfc_sr1_set(spu, 0x33); 637 638 spu->ibox_callback = NULL; 639 spu->wbox_callback = NULL; 640 spu->stop_callback = NULL; 641 spu->mfc_callback = NULL; 642 643 mutex_lock(&spu_mutex); 644 spu->number = number++; 645 ret = spu_request_irqs(spu); 646 if (ret) 647 goto out_unmap; 648 649 list_add(&spu->list, &spu_list); 650 mutex_unlock(&spu_mutex); 651 652 pr_debug(KERN_DEBUG "Using SPE %s %02x %p %p %p %p %d\n", 653 spu->name, spu->isrc, spu->local_store, 654 spu->problem, spu->priv1, spu->priv2, spu->number); 655 goto out; 656 657 out_unmap: 658 mutex_unlock(&spu_mutex); 659 spu_unmap(spu); 660 out_free: 661 kfree(spu); 662 out: 663 return ret; 664 } 665 666 static void destroy_spu(struct spu *spu) 667 { 668 list_del_init(&spu->list); 669 670 spu_free_irqs(spu); 671 spu_unmap(spu); 672 kfree(spu); 673 } 674 675 static void cleanup_spu_base(void) 676 { 677 struct spu *spu, *tmp; 678 mutex_lock(&spu_mutex); 679 list_for_each_entry_safe(spu, tmp, &spu_list, list) 680 destroy_spu(spu); 681 mutex_unlock(&spu_mutex); 682 } 683 module_exit(cleanup_spu_base); 684 685 static int __init init_spu_base(void) 686 { 687 struct device_node *node; 688 int ret; 689 690 ret = -ENODEV; 691 for (node = of_find_node_by_type(NULL, "spe"); 692 node; node = of_find_node_by_type(node, "spe")) { 693 ret = create_spu(node); 694 if (ret) { 695 printk(KERN_WARNING "%s: Error initializing %s\n", 696 __FUNCTION__, node->name); 697 cleanup_spu_base(); 698 break; 699 } 700 } 701 /* in some old firmware versions, the spe is called 'spc', so we 702 look for that as well */ 703 for (node = of_find_node_by_type(NULL, "spc"); 704 node; node = of_find_node_by_type(node, "spc")) { 705 ret = create_spu(node); 706 if (ret) { 707 printk(KERN_WARNING "%s: Error initializing %s\n", 708 __FUNCTION__, node->name); 709 cleanup_spu_base(); 710 break; 711 } 712 } 713 return ret; 714 } 715 module_init(init_spu_base); 716 717 MODULE_LICENSE("GPL"); 718 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>"); 719