1 /* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #undef DEBUG 14 15 #include <linux/config.h> 16 #include <linux/module.h> 17 #include <linux/string.h> 18 #include <linux/sched.h> 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/reboot.h> 22 #include <linux/delay.h> 23 #include <linux/initrd.h> 24 #include <linux/ide.h> 25 #include <linux/seq_file.h> 26 #include <linux/ioport.h> 27 #include <linux/console.h> 28 #include <linux/utsname.h> 29 #include <linux/tty.h> 30 #include <linux/root_dev.h> 31 #include <linux/notifier.h> 32 #include <linux/cpu.h> 33 #include <linux/unistd.h> 34 #include <linux/serial.h> 35 #include <linux/serial_8250.h> 36 #include <linux/bootmem.h> 37 #include <asm/io.h> 38 #include <asm/kdump.h> 39 #include <asm/prom.h> 40 #include <asm/processor.h> 41 #include <asm/pgtable.h> 42 #include <asm/smp.h> 43 #include <asm/elf.h> 44 #include <asm/machdep.h> 45 #include <asm/paca.h> 46 #include <asm/time.h> 47 #include <asm/cputable.h> 48 #include <asm/sections.h> 49 #include <asm/btext.h> 50 #include <asm/nvram.h> 51 #include <asm/setup.h> 52 #include <asm/system.h> 53 #include <asm/rtas.h> 54 #include <asm/iommu.h> 55 #include <asm/serial.h> 56 #include <asm/cache.h> 57 #include <asm/page.h> 58 #include <asm/mmu.h> 59 #include <asm/lmb.h> 60 #include <asm/iseries/it_lp_naca.h> 61 #include <asm/firmware.h> 62 #include <asm/xmon.h> 63 #include <asm/udbg.h> 64 #include <asm/kexec.h> 65 66 #include "setup.h" 67 68 #ifdef DEBUG 69 #define DBG(fmt...) udbg_printf(fmt) 70 #else 71 #define DBG(fmt...) 72 #endif 73 74 int have_of = 1; 75 int boot_cpuid = 0; 76 dev_t boot_dev; 77 u64 ppc64_pft_size; 78 79 /* Pick defaults since we might want to patch instructions 80 * before we've read this from the device tree. 81 */ 82 struct ppc64_caches ppc64_caches = { 83 .dline_size = 0x80, 84 .log_dline_size = 7, 85 .iline_size = 0x80, 86 .log_iline_size = 7 87 }; 88 EXPORT_SYMBOL_GPL(ppc64_caches); 89 90 /* 91 * These are used in binfmt_elf.c to put aux entries on the stack 92 * for each elf executable being started. 93 */ 94 int dcache_bsize; 95 int icache_bsize; 96 int ucache_bsize; 97 98 #ifdef CONFIG_MAGIC_SYSRQ 99 unsigned long SYSRQ_KEY; 100 #endif /* CONFIG_MAGIC_SYSRQ */ 101 102 103 static int ppc64_panic_event(struct notifier_block *, unsigned long, void *); 104 static struct notifier_block ppc64_panic_block = { 105 .notifier_call = ppc64_panic_event, 106 .priority = INT_MIN /* may not return; must be done last */ 107 }; 108 109 #ifdef CONFIG_SMP 110 111 static int smt_enabled_cmdline; 112 113 /* Look for ibm,smt-enabled OF option */ 114 static void check_smt_enabled(void) 115 { 116 struct device_node *dn; 117 char *smt_option; 118 119 /* Allow the command line to overrule the OF option */ 120 if (smt_enabled_cmdline) 121 return; 122 123 dn = of_find_node_by_path("/options"); 124 125 if (dn) { 126 smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL); 127 128 if (smt_option) { 129 if (!strcmp(smt_option, "on")) 130 smt_enabled_at_boot = 1; 131 else if (!strcmp(smt_option, "off")) 132 smt_enabled_at_boot = 0; 133 } 134 } 135 } 136 137 /* Look for smt-enabled= cmdline option */ 138 static int __init early_smt_enabled(char *p) 139 { 140 smt_enabled_cmdline = 1; 141 142 if (!p) 143 return 0; 144 145 if (!strcmp(p, "on") || !strcmp(p, "1")) 146 smt_enabled_at_boot = 1; 147 else if (!strcmp(p, "off") || !strcmp(p, "0")) 148 smt_enabled_at_boot = 0; 149 150 return 0; 151 } 152 early_param("smt-enabled", early_smt_enabled); 153 154 #else 155 #define check_smt_enabled() 156 #endif /* CONFIG_SMP */ 157 158 /* 159 * Early initialization entry point. This is called by head.S 160 * with MMU translation disabled. We rely on the "feature" of 161 * the CPU that ignores the top 2 bits of the address in real 162 * mode so we can access kernel globals normally provided we 163 * only toy with things in the RMO region. From here, we do 164 * some early parsing of the device-tree to setup out LMB 165 * data structures, and allocate & initialize the hash table 166 * and segment tables so we can start running with translation 167 * enabled. 168 * 169 * It is this function which will call the probe() callback of 170 * the various platform types and copy the matching one to the 171 * global ppc_md structure. Your platform can eventually do 172 * some very early initializations from the probe() routine, but 173 * this is not recommended, be very careful as, for example, the 174 * device-tree is not accessible via normal means at this point. 175 */ 176 177 void __init early_setup(unsigned long dt_ptr) 178 { 179 /* Enable early debugging if any specified (see udbg.h) */ 180 udbg_early_init(); 181 182 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 183 184 /* 185 * Do early initializations using the flattened device 186 * tree, like retreiving the physical memory map or 187 * calculating/retreiving the hash table size 188 */ 189 early_init_devtree(__va(dt_ptr)); 190 191 /* Now we know the logical id of our boot cpu, setup the paca. */ 192 setup_boot_paca(); 193 194 /* Fix up paca fields required for the boot cpu */ 195 get_paca()->cpu_start = 1; 196 get_paca()->stab_real = __pa((u64)&initial_stab); 197 get_paca()->stab_addr = (u64)&initial_stab; 198 199 /* Probe the machine type */ 200 probe_machine(); 201 202 #ifdef CONFIG_CRASH_DUMP 203 kdump_setup(); 204 #endif 205 206 DBG("Found, Initializing memory management...\n"); 207 208 /* 209 * Initialize the MMU Hash table and create the linear mapping 210 * of memory. Has to be done before stab/slb initialization as 211 * this is currently where the page size encoding is obtained 212 */ 213 htab_initialize(); 214 215 /* 216 * Initialize stab / SLB management except on iSeries 217 */ 218 if (!firmware_has_feature(FW_FEATURE_ISERIES)) { 219 if (cpu_has_feature(CPU_FTR_SLB)) 220 slb_initialize(); 221 else 222 stab_initialize(get_paca()->stab_real); 223 } 224 225 DBG(" <- early_setup()\n"); 226 } 227 228 #ifdef CONFIG_SMP 229 void early_setup_secondary(void) 230 { 231 struct paca_struct *lpaca = get_paca(); 232 233 /* Mark enabled in PACA */ 234 lpaca->proc_enabled = 0; 235 236 /* Initialize hash table for that CPU */ 237 htab_initialize_secondary(); 238 239 /* Initialize STAB/SLB. We use a virtual address as it works 240 * in real mode on pSeries and we want a virutal address on 241 * iSeries anyway 242 */ 243 if (cpu_has_feature(CPU_FTR_SLB)) 244 slb_initialize(); 245 else 246 stab_initialize(lpaca->stab_addr); 247 } 248 249 #endif /* CONFIG_SMP */ 250 251 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 252 void smp_release_cpus(void) 253 { 254 extern unsigned long __secondary_hold_spinloop; 255 unsigned long *ptr; 256 257 DBG(" -> smp_release_cpus()\n"); 258 259 /* All secondary cpus are spinning on a common spinloop, release them 260 * all now so they can start to spin on their individual paca 261 * spinloops. For non SMP kernels, the secondary cpus never get out 262 * of the common spinloop. 263 * This is useless but harmless on iSeries, secondaries are already 264 * waiting on their paca spinloops. */ 265 266 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 267 - PHYSICAL_START); 268 *ptr = 1; 269 mb(); 270 271 DBG(" <- smp_release_cpus()\n"); 272 } 273 #endif /* CONFIG_SMP || CONFIG_KEXEC */ 274 275 /* 276 * Initialize some remaining members of the ppc64_caches and systemcfg 277 * structures 278 * (at least until we get rid of them completely). This is mostly some 279 * cache informations about the CPU that will be used by cache flush 280 * routines and/or provided to userland 281 */ 282 static void __init initialize_cache_info(void) 283 { 284 struct device_node *np; 285 unsigned long num_cpus = 0; 286 287 DBG(" -> initialize_cache_info()\n"); 288 289 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 290 num_cpus += 1; 291 292 /* We're assuming *all* of the CPUs have the same 293 * d-cache and i-cache sizes... -Peter 294 */ 295 296 if ( num_cpus == 1 ) { 297 u32 *sizep, *lsizep; 298 u32 size, lsize; 299 const char *dc, *ic; 300 301 /* Then read cache informations */ 302 if (machine_is(powermac)) { 303 dc = "d-cache-block-size"; 304 ic = "i-cache-block-size"; 305 } else { 306 dc = "d-cache-line-size"; 307 ic = "i-cache-line-size"; 308 } 309 310 size = 0; 311 lsize = cur_cpu_spec->dcache_bsize; 312 sizep = (u32 *)get_property(np, "d-cache-size", NULL); 313 if (sizep != NULL) 314 size = *sizep; 315 lsizep = (u32 *) get_property(np, dc, NULL); 316 if (lsizep != NULL) 317 lsize = *lsizep; 318 if (sizep == 0 || lsizep == 0) 319 DBG("Argh, can't find dcache properties ! " 320 "sizep: %p, lsizep: %p\n", sizep, lsizep); 321 322 ppc64_caches.dsize = size; 323 ppc64_caches.dline_size = lsize; 324 ppc64_caches.log_dline_size = __ilog2(lsize); 325 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 326 327 size = 0; 328 lsize = cur_cpu_spec->icache_bsize; 329 sizep = (u32 *)get_property(np, "i-cache-size", NULL); 330 if (sizep != NULL) 331 size = *sizep; 332 lsizep = (u32 *)get_property(np, ic, NULL); 333 if (lsizep != NULL) 334 lsize = *lsizep; 335 if (sizep == 0 || lsizep == 0) 336 DBG("Argh, can't find icache properties ! " 337 "sizep: %p, lsizep: %p\n", sizep, lsizep); 338 339 ppc64_caches.isize = size; 340 ppc64_caches.iline_size = lsize; 341 ppc64_caches.log_iline_size = __ilog2(lsize); 342 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 343 } 344 } 345 346 DBG(" <- initialize_cache_info()\n"); 347 } 348 349 350 /* 351 * Do some initial setup of the system. The parameters are those which 352 * were passed in from the bootloader. 353 */ 354 void __init setup_system(void) 355 { 356 DBG(" -> setup_system()\n"); 357 358 #ifdef CONFIG_KEXEC 359 kdump_move_device_tree(); 360 #endif 361 /* 362 * Unflatten the device-tree passed by prom_init or kexec 363 */ 364 unflatten_device_tree(); 365 366 #ifdef CONFIG_KEXEC 367 kexec_setup(); /* requires unflattened device tree. */ 368 #endif 369 370 /* 371 * Fill the ppc64_caches & systemcfg structures with informations 372 * retrieved from the device-tree. Need to be called before 373 * finish_device_tree() since the later requires some of the 374 * informations filled up here to properly parse the interrupt 375 * tree. 376 * It also sets up the cache line sizes which allows to call 377 * routines like flush_icache_range (used by the hash init 378 * later on). 379 */ 380 initialize_cache_info(); 381 382 #ifdef CONFIG_PPC_RTAS 383 /* 384 * Initialize RTAS if available 385 */ 386 rtas_initialize(); 387 #endif /* CONFIG_PPC_RTAS */ 388 389 /* 390 * Check if we have an initrd provided via the device-tree 391 */ 392 check_for_initrd(); 393 394 /* 395 * Do some platform specific early initializations, that includes 396 * setting up the hash table pointers. It also sets up some interrupt-mapping 397 * related options that will be used by finish_device_tree() 398 */ 399 ppc_md.init_early(); 400 401 /* 402 * We can discover serial ports now since the above did setup the 403 * hash table management for us, thus ioremap works. We do that early 404 * so that further code can be debugged 405 */ 406 find_legacy_serial_ports(); 407 408 /* 409 * "Finish" the device-tree, that is do the actual parsing of 410 * some of the properties like the interrupt map 411 */ 412 finish_device_tree(); 413 414 /* 415 * Initialize xmon 416 */ 417 #ifdef CONFIG_XMON_DEFAULT 418 xmon_init(1); 419 #endif 420 /* 421 * Register early console 422 */ 423 register_early_udbg_console(); 424 425 /* Save unparsed command line copy for /proc/cmdline */ 426 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); 427 428 parse_early_param(); 429 430 check_smt_enabled(); 431 smp_setup_cpu_maps(); 432 433 #ifdef CONFIG_SMP 434 /* Release secondary cpus out of their spinloops at 0x60 now that 435 * we can map physical -> logical CPU ids 436 */ 437 smp_release_cpus(); 438 #endif 439 440 printk("Starting Linux PPC64 %s\n", system_utsname.version); 441 442 printk("-----------------------------------------------------\n"); 443 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 444 printk("ppc64_interrupt_controller = 0x%ld\n", 445 ppc64_interrupt_controller); 446 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); 447 printk("ppc64_caches.dcache_line_size = 0x%x\n", 448 ppc64_caches.dline_size); 449 printk("ppc64_caches.icache_line_size = 0x%x\n", 450 ppc64_caches.iline_size); 451 printk("htab_address = 0x%p\n", htab_address); 452 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 453 #if PHYSICAL_START > 0 454 printk("physical_start = 0x%x\n", PHYSICAL_START); 455 #endif 456 printk("-----------------------------------------------------\n"); 457 458 DBG(" <- setup_system()\n"); 459 } 460 461 static int ppc64_panic_event(struct notifier_block *this, 462 unsigned long event, void *ptr) 463 { 464 ppc_md.panic((char *)ptr); /* May not return */ 465 return NOTIFY_DONE; 466 } 467 468 #ifdef CONFIG_IRQSTACKS 469 static void __init irqstack_early_init(void) 470 { 471 unsigned int i; 472 473 /* 474 * interrupt stacks must be under 256MB, we cannot afford to take 475 * SLB misses on them. 476 */ 477 for_each_possible_cpu(i) { 478 softirq_ctx[i] = (struct thread_info *) 479 __va(lmb_alloc_base(THREAD_SIZE, 480 THREAD_SIZE, 0x10000000)); 481 hardirq_ctx[i] = (struct thread_info *) 482 __va(lmb_alloc_base(THREAD_SIZE, 483 THREAD_SIZE, 0x10000000)); 484 } 485 } 486 #else 487 #define irqstack_early_init() 488 #endif 489 490 /* 491 * Stack space used when we detect a bad kernel stack pointer, and 492 * early in SMP boots before relocation is enabled. 493 */ 494 static void __init emergency_stack_init(void) 495 { 496 unsigned long limit; 497 unsigned int i; 498 499 /* 500 * Emergency stacks must be under 256MB, we cannot afford to take 501 * SLB misses on them. The ABI also requires them to be 128-byte 502 * aligned. 503 * 504 * Since we use these as temporary stacks during secondary CPU 505 * bringup, we need to get at them in real mode. This means they 506 * must also be within the RMO region. 507 */ 508 limit = min(0x10000000UL, lmb.rmo_size); 509 510 for_each_possible_cpu(i) 511 paca[i].emergency_sp = 512 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE; 513 } 514 515 /* 516 * Called into from start_kernel, after lock_kernel has been called. 517 * Initializes bootmem, which is unsed to manage page allocation until 518 * mem_init is called. 519 */ 520 void __init setup_arch(char **cmdline_p) 521 { 522 extern void do_init_bootmem(void); 523 524 ppc64_boot_msg(0x12, "Setup Arch"); 525 526 *cmdline_p = cmd_line; 527 528 /* 529 * Set cache line size based on type of cpu as a default. 530 * Systems with OF can look in the properties on the cpu node(s) 531 * for a possibly more accurate value. 532 */ 533 dcache_bsize = ppc64_caches.dline_size; 534 icache_bsize = ppc64_caches.iline_size; 535 536 /* reboot on panic */ 537 panic_timeout = 180; 538 539 if (ppc_md.panic) 540 atomic_notifier_chain_register(&panic_notifier_list, 541 &ppc64_panic_block); 542 543 init_mm.start_code = PAGE_OFFSET; 544 init_mm.end_code = (unsigned long) _etext; 545 init_mm.end_data = (unsigned long) _edata; 546 init_mm.brk = klimit; 547 548 irqstack_early_init(); 549 emergency_stack_init(); 550 551 stabs_alloc(); 552 553 /* set up the bootmem stuff with available memory */ 554 do_init_bootmem(); 555 sparse_init(); 556 557 #ifdef CONFIG_DUMMY_CONSOLE 558 conswitchp = &dummy_con; 559 #endif 560 561 ppc_md.setup_arch(); 562 563 paging_init(); 564 ppc64_boot_msg(0x15, "Setup Done"); 565 } 566 567 568 /* ToDo: do something useful if ppc_md is not yet setup. */ 569 #define PPC64_LINUX_FUNCTION 0x0f000000 570 #define PPC64_IPL_MESSAGE 0xc0000000 571 #define PPC64_TERM_MESSAGE 0xb0000000 572 573 static void ppc64_do_msg(unsigned int src, const char *msg) 574 { 575 if (ppc_md.progress) { 576 char buf[128]; 577 578 sprintf(buf, "%08X\n", src); 579 ppc_md.progress(buf, 0); 580 snprintf(buf, 128, "%s", msg); 581 ppc_md.progress(buf, 0); 582 } 583 } 584 585 /* Print a boot progress message. */ 586 void ppc64_boot_msg(unsigned int src, const char *msg) 587 { 588 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 589 printk("[boot]%04x %s\n", src, msg); 590 } 591 592 /* Print a termination message (print only -- does not stop the kernel) */ 593 void ppc64_terminate_msg(unsigned int src, const char *msg) 594 { 595 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); 596 printk("[terminate]%04x %s\n", src, msg); 597 } 598 599 int check_legacy_ioport(unsigned long base_port) 600 { 601 if (ppc_md.check_legacy_ioport == NULL) 602 return 0; 603 return ppc_md.check_legacy_ioport(base_port); 604 } 605 EXPORT_SYMBOL(check_legacy_ioport); 606 607 void cpu_die(void) 608 { 609 if (ppc_md.cpu_die) 610 ppc_md.cpu_die(); 611 } 612 613 #ifdef CONFIG_SMP 614 void __init setup_per_cpu_areas(void) 615 { 616 int i; 617 unsigned long size; 618 char *ptr; 619 620 /* Copy section for each CPU (we discard the original) */ 621 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES); 622 #ifdef CONFIG_MODULES 623 if (size < PERCPU_ENOUGH_ROOM) 624 size = PERCPU_ENOUGH_ROOM; 625 #endif 626 627 for_each_possible_cpu(i) { 628 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size); 629 if (!ptr) 630 panic("Cannot allocate cpu data for CPU %d\n", i); 631 632 paca[i].data_offset = ptr - __per_cpu_start; 633 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); 634 } 635 } 636 #endif 637