xref: /linux/arch/powerpc/kernel/rtas_pci.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84)
1 /*
2  * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
3  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
4  *
5  * RTAS specific routines for PCI.
6  *
7  * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
22  */
23 
24 #include <linux/kernel.h>
25 #include <linux/threads.h>
26 #include <linux/pci.h>
27 #include <linux/string.h>
28 #include <linux/init.h>
29 #include <linux/bootmem.h>
30 
31 #include <asm/io.h>
32 #include <asm/pgtable.h>
33 #include <asm/irq.h>
34 #include <asm/prom.h>
35 #include <asm/machdep.h>
36 #include <asm/pci-bridge.h>
37 #include <asm/iommu.h>
38 #include <asm/rtas.h>
39 #include <asm/mpic.h>
40 #include <asm/ppc-pci.h>
41 
42 /* RTAS tokens */
43 static int read_pci_config;
44 static int write_pci_config;
45 static int ibm_read_pci_config;
46 static int ibm_write_pci_config;
47 
48 static inline int config_access_valid(struct pci_dn *dn, int where)
49 {
50 	if (where < 256)
51 		return 1;
52 	if (where < 4096 && dn->pci_ext_config_space)
53 		return 1;
54 
55 	return 0;
56 }
57 
58 static int of_device_available(struct device_node * dn)
59 {
60         char * status;
61 
62         status = get_property(dn, "status", NULL);
63 
64         if (!status)
65                 return 1;
66 
67         if (!strcmp(status, "okay"))
68                 return 1;
69 
70         return 0;
71 }
72 
73 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
74 {
75 	int returnval = -1;
76 	unsigned long buid, addr;
77 	int ret;
78 
79 	if (!pdn)
80 		return PCIBIOS_DEVICE_NOT_FOUND;
81 	if (!config_access_valid(pdn, where))
82 		return PCIBIOS_BAD_REGISTER_NUMBER;
83 
84 	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
85 		(pdn->devfn << 8) | (where & 0xff);
86 	buid = pdn->phb->buid;
87 	if (buid) {
88 		ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
89 				addr, BUID_HI(buid), BUID_LO(buid), size);
90 	} else {
91 		ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
92 	}
93 	*val = returnval;
94 
95 	if (ret)
96 		return PCIBIOS_DEVICE_NOT_FOUND;
97 
98 	if (returnval == EEH_IO_ERROR_VALUE(size) &&
99 	    eeh_dn_check_failure (pdn->node, NULL))
100 		return PCIBIOS_DEVICE_NOT_FOUND;
101 
102 	return PCIBIOS_SUCCESSFUL;
103 }
104 
105 static int rtas_pci_read_config(struct pci_bus *bus,
106 				unsigned int devfn,
107 				int where, int size, u32 *val)
108 {
109 	struct device_node *busdn, *dn;
110 
111 	if (bus->self)
112 		busdn = pci_device_to_OF_node(bus->self);
113 	else
114 		busdn = bus->sysdata;	/* must be a phb */
115 
116 	/* Search only direct children of the bus */
117 	for (dn = busdn->child; dn; dn = dn->sibling) {
118 		struct pci_dn *pdn = PCI_DN(dn);
119 		if (pdn && pdn->devfn == devfn
120 		    && of_device_available(dn))
121 			return rtas_read_config(pdn, where, size, val);
122 	}
123 
124 	return PCIBIOS_DEVICE_NOT_FOUND;
125 }
126 
127 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
128 {
129 	unsigned long buid, addr;
130 	int ret;
131 
132 	if (!pdn)
133 		return PCIBIOS_DEVICE_NOT_FOUND;
134 	if (!config_access_valid(pdn, where))
135 		return PCIBIOS_BAD_REGISTER_NUMBER;
136 
137 	addr = ((where & 0xf00) << 20) | (pdn->busno << 16) |
138 		(pdn->devfn << 8) | (where & 0xff);
139 	buid = pdn->phb->buid;
140 	if (buid) {
141 		ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
142 			BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
143 	} else {
144 		ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
145 	}
146 
147 	if (ret)
148 		return PCIBIOS_DEVICE_NOT_FOUND;
149 
150 	return PCIBIOS_SUCCESSFUL;
151 }
152 
153 static int rtas_pci_write_config(struct pci_bus *bus,
154 				 unsigned int devfn,
155 				 int where, int size, u32 val)
156 {
157 	struct device_node *busdn, *dn;
158 
159 	if (bus->self)
160 		busdn = pci_device_to_OF_node(bus->self);
161 	else
162 		busdn = bus->sysdata;	/* must be a phb */
163 
164 	/* Search only direct children of the bus */
165 	for (dn = busdn->child; dn; dn = dn->sibling) {
166 		struct pci_dn *pdn = PCI_DN(dn);
167 		if (pdn && pdn->devfn == devfn
168 		    && of_device_available(dn))
169 			return rtas_write_config(pdn, where, size, val);
170 	}
171 	return PCIBIOS_DEVICE_NOT_FOUND;
172 }
173 
174 struct pci_ops rtas_pci_ops = {
175 	rtas_pci_read_config,
176 	rtas_pci_write_config
177 };
178 
179 int is_python(struct device_node *dev)
180 {
181 	char *model = (char *)get_property(dev, "model", NULL);
182 
183 	if (model && strstr(model, "Python"))
184 		return 1;
185 
186 	return 0;
187 }
188 
189 static void python_countermeasures(struct device_node *dev)
190 {
191 	struct resource registers;
192 	void __iomem *chip_regs;
193 	volatile u32 val;
194 
195 	if (of_address_to_resource(dev, 0, &registers)) {
196 		printk(KERN_ERR "Can't get address for Python workarounds !\n");
197 		return;
198 	}
199 
200 	/* Python's register file is 1 MB in size. */
201 	chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
202 
203 	/*
204 	 * Firmware doesn't always clear this bit which is critical
205 	 * for good performance - Anton
206 	 */
207 
208 #define PRG_CL_RESET_VALID 0x00010000
209 
210 	val = in_be32(chip_regs + 0xf6030);
211 	if (val & PRG_CL_RESET_VALID) {
212 		printk(KERN_INFO "Python workaround: ");
213 		val &= ~PRG_CL_RESET_VALID;
214 		out_be32(chip_regs + 0xf6030, val);
215 		/*
216 		 * We must read it back for changes to
217 		 * take effect
218 		 */
219 		val = in_be32(chip_regs + 0xf6030);
220 		printk("reg0: %x\n", val);
221 	}
222 
223 	iounmap(chip_regs);
224 }
225 
226 void __init init_pci_config_tokens (void)
227 {
228 	read_pci_config = rtas_token("read-pci-config");
229 	write_pci_config = rtas_token("write-pci-config");
230 	ibm_read_pci_config = rtas_token("ibm,read-pci-config");
231 	ibm_write_pci_config = rtas_token("ibm,write-pci-config");
232 }
233 
234 unsigned long __devinit get_phb_buid (struct device_node *phb)
235 {
236 	int addr_cells;
237 	unsigned int *buid_vals;
238 	unsigned int len;
239 	unsigned long buid;
240 
241 	if (ibm_read_pci_config == -1) return 0;
242 
243 	/* PHB's will always be children of the root node,
244 	 * or so it is promised by the current firmware. */
245 	if (phb->parent == NULL)
246 		return 0;
247 	if (phb->parent->parent)
248 		return 0;
249 
250 	buid_vals = (unsigned int *) get_property(phb, "reg", &len);
251 	if (buid_vals == NULL)
252 		return 0;
253 
254 	addr_cells = prom_n_addr_cells(phb);
255 	if (addr_cells == 1) {
256 		buid = (unsigned long) buid_vals[0];
257 	} else {
258 		buid = (((unsigned long)buid_vals[0]) << 32UL) |
259 			(((unsigned long)buid_vals[1]) & 0xffffffff);
260 	}
261 	return buid;
262 }
263 
264 static int phb_set_bus_ranges(struct device_node *dev,
265 			      struct pci_controller *phb)
266 {
267 	int *bus_range;
268 	unsigned int len;
269 
270 	bus_range = (int *) get_property(dev, "bus-range", &len);
271 	if (bus_range == NULL || len < 2 * sizeof(int)) {
272 		return 1;
273  	}
274 
275 	phb->first_busno =  bus_range[0];
276 	phb->last_busno  =  bus_range[1];
277 
278 	return 0;
279 }
280 
281 int __devinit setup_phb(struct device_node *dev, struct pci_controller *phb)
282 {
283 	if (is_python(dev))
284 		python_countermeasures(dev);
285 
286 	if (phb_set_bus_ranges(dev, phb))
287 		return 1;
288 
289 	phb->ops = &rtas_pci_ops;
290 	phb->buid = get_phb_buid(dev);
291 
292 	return 0;
293 }
294 
295 unsigned long __init find_and_init_phbs(void)
296 {
297 	struct device_node *node;
298 	struct pci_controller *phb;
299 	unsigned int index;
300 	unsigned int root_size_cells = 0;
301 	unsigned int *opprop = NULL;
302 	struct device_node *root = of_find_node_by_path("/");
303 
304 	if (ppc64_interrupt_controller == IC_OPEN_PIC) {
305 		opprop = (unsigned int *)get_property(root,
306 				"platform-open-pic", NULL);
307 	}
308 
309 	root_size_cells = prom_n_size_cells(root);
310 
311 	index = 0;
312 
313 	for (node = of_get_next_child(root, NULL);
314 	     node != NULL;
315 	     node = of_get_next_child(root, node)) {
316 
317 		if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
318 					   strcmp(node->type, "pciex") != 0))
319 			continue;
320 
321 		phb = pcibios_alloc_controller(node);
322 		if (!phb)
323 			continue;
324 		setup_phb(node, phb);
325 		pci_process_bridge_OF_ranges(phb, node, 0);
326 		pci_setup_phb_io(phb, index == 0);
327 #ifdef CONFIG_PPC_PSERIES
328 		/* XXX This code need serious fixing ... --BenH */
329 		if (ppc64_interrupt_controller == IC_OPEN_PIC && pSeries_mpic) {
330 			int addr = root_size_cells * (index + 2) - 1;
331 			mpic_assign_isu(pSeries_mpic, index, opprop[addr]);
332 		}
333 #endif
334 		index++;
335 	}
336 
337 	of_node_put(root);
338 	pci_devs_phb_init();
339 
340 	/*
341 	 * pci_probe_only and pci_assign_all_buses can be set via properties
342 	 * in chosen.
343 	 */
344 	if (of_chosen) {
345 		int *prop;
346 
347 		prop = (int *)get_property(of_chosen, "linux,pci-probe-only",
348 					   NULL);
349 		if (prop)
350 			pci_probe_only = *prop;
351 
352 		prop = (int *)get_property(of_chosen,
353 					   "linux,pci-assign-all-buses", NULL);
354 		if (prop)
355 			pci_assign_all_buses = *prop;
356 	}
357 
358 	return 0;
359 }
360 
361 /* RPA-specific bits for removing PHBs */
362 int pcibios_remove_root_bus(struct pci_controller *phb)
363 {
364 	struct pci_bus *b = phb->bus;
365 	struct resource *res;
366 	int rc, i;
367 
368 	res = b->resource[0];
369 	if (!res->flags) {
370 		printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
371 				b->name);
372 		return 1;
373 	}
374 
375 	rc = unmap_bus_range(b);
376 	if (rc) {
377 		printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
378 			__FUNCTION__, b->name);
379 		return 1;
380 	}
381 
382 	if (release_resource(res)) {
383 		printk(KERN_ERR "%s: failed to release IO on bus %s\n",
384 				__FUNCTION__, b->name);
385 		return 1;
386 	}
387 
388 	for (i = 1; i < 3; ++i) {
389 		res = b->resource[i];
390 		if (!res->flags && i == 0) {
391 			printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
392 				__FUNCTION__, b->name);
393 			return 1;
394 		}
395 		if (res->flags && release_resource(res)) {
396 			printk(KERN_ERR
397 			       "%s: failed to release IO %d on bus %s\n",
398 				__FUNCTION__, i, b->name);
399 			return 1;
400 		}
401 	}
402 
403 	list_del(&phb->list_node);
404 	pcibios_free_controller(phb);
405 
406 	return 0;
407 }
408 EXPORT_SYMBOL(pcibios_remove_root_bus);
409