1*2874c5fdSThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 20052bc5dSKumar Gala/* 30052bc5dSKumar Gala * TQM 8540 Device Tree Source 40052bc5dSKumar Gala * 50052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 60052bc5dSKumar Gala */ 70052bc5dSKumar Gala 80052bc5dSKumar Gala/dts-v1/; 90052bc5dSKumar Gala 100052bc5dSKumar Gala/ { 114fb035f6SWolfgang Grandegger model = "tqc,tqm8540"; 124fb035f6SWolfgang Grandegger compatible = "tqc,tqm8540"; 130052bc5dSKumar Gala #address-cells = <1>; 140052bc5dSKumar Gala #size-cells = <1>; 150052bc5dSKumar Gala 160052bc5dSKumar Gala aliases { 170052bc5dSKumar Gala ethernet0 = &enet0; 180052bc5dSKumar Gala ethernet1 = &enet1; 190052bc5dSKumar Gala ethernet2 = &enet2; 200052bc5dSKumar Gala serial0 = &serial0; 210052bc5dSKumar Gala serial1 = &serial1; 220052bc5dSKumar Gala pci0 = &pci0; 230052bc5dSKumar Gala }; 240052bc5dSKumar Gala 250052bc5dSKumar Gala cpus { 260052bc5dSKumar Gala #address-cells = <1>; 270052bc5dSKumar Gala #size-cells = <0>; 280052bc5dSKumar Gala 290052bc5dSKumar Gala PowerPC,8540@0 { 300052bc5dSKumar Gala device_type = "cpu"; 310052bc5dSKumar Gala reg = <0>; 320052bc5dSKumar Gala d-cache-line-size = <32>; 330052bc5dSKumar Gala i-cache-line-size = <32>; 340052bc5dSKumar Gala d-cache-size = <32768>; 350052bc5dSKumar Gala i-cache-size = <32768>; 360052bc5dSKumar Gala timebase-frequency = <0>; 370052bc5dSKumar Gala bus-frequency = <0>; 380052bc5dSKumar Gala clock-frequency = <0>; 39c054065bSKumar Gala next-level-cache = <&L2>; 400052bc5dSKumar Gala }; 410052bc5dSKumar Gala }; 420052bc5dSKumar Gala 430052bc5dSKumar Gala memory { 440052bc5dSKumar Gala device_type = "memory"; 450052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 460052bc5dSKumar Gala }; 470052bc5dSKumar Gala 48f67be814SKumar Gala soc@e0000000 { 490052bc5dSKumar Gala #address-cells = <1>; 500052bc5dSKumar Gala #size-cells = <1>; 510052bc5dSKumar Gala device_type = "soc"; 520052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 530052bc5dSKumar Gala bus-frequency = <0>; 540052bc5dSKumar Gala compatible = "fsl,mpc8540-immr", "simple-bus"; 550052bc5dSKumar Gala 56e1a22897SKumar Gala ecm-law@0 { 57e1a22897SKumar Gala compatible = "fsl,ecm-law"; 58e1a22897SKumar Gala reg = <0x0 0x1000>; 59e1a22897SKumar Gala fsl,num-laws = <8>; 60e1a22897SKumar Gala }; 61e1a22897SKumar Gala 62e1a22897SKumar Gala ecm@1000 { 63e1a22897SKumar Gala compatible = "fsl,mpc8540-ecm", "fsl,ecm"; 64e1a22897SKumar Gala reg = <0x1000 0x1000>; 65e1a22897SKumar Gala interrupts = <17 2>; 66e1a22897SKumar Gala interrupt-parent = <&mpic>; 67e1a22897SKumar Gala }; 68e1a22897SKumar Gala 690052bc5dSKumar Gala memory-controller@2000 { 70fe671772SKumar Gala compatible = "fsl,mpc8540-memory-controller"; 710052bc5dSKumar Gala reg = <0x2000 0x1000>; 720052bc5dSKumar Gala interrupt-parent = <&mpic>; 730052bc5dSKumar Gala interrupts = <18 2>; 740052bc5dSKumar Gala }; 750052bc5dSKumar Gala 76c054065bSKumar Gala L2: l2-cache-controller@20000 { 77fe671772SKumar Gala compatible = "fsl,mpc8540-l2-cache-controller"; 780052bc5dSKumar Gala reg = <0x20000 0x1000>; 790052bc5dSKumar Gala cache-line-size = <32>; 800052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 810052bc5dSKumar Gala interrupt-parent = <&mpic>; 820052bc5dSKumar Gala interrupts = <16 2>; 830052bc5dSKumar Gala }; 840052bc5dSKumar Gala 850052bc5dSKumar Gala i2c@3000 { 860052bc5dSKumar Gala #address-cells = <1>; 870052bc5dSKumar Gala #size-cells = <0>; 880052bc5dSKumar Gala cell-index = <0>; 890052bc5dSKumar Gala compatible = "fsl-i2c"; 900052bc5dSKumar Gala reg = <0x3000 0x100>; 910052bc5dSKumar Gala interrupts = <43 2>; 920052bc5dSKumar Gala interrupt-parent = <&mpic>; 930052bc5dSKumar Gala dfsrr; 940052bc5dSKumar Gala 956467cae3SWolfgang Grandegger dtt@48 { 960f73a449SWolfgang Grandegger compatible = "national,lm75"; 976467cae3SWolfgang Grandegger reg = <0x48>; 980f73a449SWolfgang Grandegger }; 990f73a449SWolfgang Grandegger 1000052bc5dSKumar Gala rtc@68 { 1010052bc5dSKumar Gala compatible = "dallas,ds1337"; 1020052bc5dSKumar Gala reg = <0x68>; 1030052bc5dSKumar Gala }; 1040052bc5dSKumar Gala }; 1050052bc5dSKumar Gala 106dee80553SKumar Gala dma@21300 { 107dee80553SKumar Gala #address-cells = <1>; 108dee80553SKumar Gala #size-cells = <1>; 109dee80553SKumar Gala compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; 110dee80553SKumar Gala reg = <0x21300 0x4>; 111dee80553SKumar Gala ranges = <0x0 0x21100 0x200>; 112dee80553SKumar Gala cell-index = <0>; 113dee80553SKumar Gala dma-channel@0 { 114dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 115dee80553SKumar Gala "fsl,eloplus-dma-channel"; 116dee80553SKumar Gala reg = <0x0 0x80>; 117dee80553SKumar Gala cell-index = <0>; 118dee80553SKumar Gala interrupt-parent = <&mpic>; 119dee80553SKumar Gala interrupts = <20 2>; 120dee80553SKumar Gala }; 121dee80553SKumar Gala dma-channel@80 { 122dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 123dee80553SKumar Gala "fsl,eloplus-dma-channel"; 124dee80553SKumar Gala reg = <0x80 0x80>; 125dee80553SKumar Gala cell-index = <1>; 126dee80553SKumar Gala interrupt-parent = <&mpic>; 127dee80553SKumar Gala interrupts = <21 2>; 128dee80553SKumar Gala }; 129dee80553SKumar Gala dma-channel@100 { 130dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 131dee80553SKumar Gala "fsl,eloplus-dma-channel"; 132dee80553SKumar Gala reg = <0x100 0x80>; 133dee80553SKumar Gala cell-index = <2>; 134dee80553SKumar Gala interrupt-parent = <&mpic>; 135dee80553SKumar Gala interrupts = <22 2>; 136dee80553SKumar Gala }; 137dee80553SKumar Gala dma-channel@180 { 138dee80553SKumar Gala compatible = "fsl,mpc8540-dma-channel", 139dee80553SKumar Gala "fsl,eloplus-dma-channel"; 140dee80553SKumar Gala reg = <0x180 0x80>; 141dee80553SKumar Gala cell-index = <3>; 142dee80553SKumar Gala interrupt-parent = <&mpic>; 143dee80553SKumar Gala interrupts = <23 2>; 144dee80553SKumar Gala }; 145dee80553SKumar Gala }; 146dee80553SKumar Gala 14784ba4a58SAnton Vorontsov enet0: ethernet@24000 { 14884ba4a58SAnton Vorontsov #address-cells = <1>; 14984ba4a58SAnton Vorontsov #size-cells = <1>; 15084ba4a58SAnton Vorontsov cell-index = <0>; 15184ba4a58SAnton Vorontsov device_type = "network"; 15284ba4a58SAnton Vorontsov model = "TSEC"; 15384ba4a58SAnton Vorontsov compatible = "gianfar"; 15484ba4a58SAnton Vorontsov reg = <0x24000 0x1000>; 15584ba4a58SAnton Vorontsov ranges = <0x0 0x24000 0x1000>; 15684ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 15784ba4a58SAnton Vorontsov interrupts = <29 2 30 2 34 2>; 15884ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 15984ba4a58SAnton Vorontsov phy-handle = <&phy2>; 16084ba4a58SAnton Vorontsov 16184ba4a58SAnton Vorontsov mdio@520 { 1620052bc5dSKumar Gala #address-cells = <1>; 1630052bc5dSKumar Gala #size-cells = <0>; 1640052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 16584ba4a58SAnton Vorontsov reg = <0x520 0x20>; 1660052bc5dSKumar Gala 1670052bc5dSKumar Gala phy1: ethernet-phy@1 { 1680052bc5dSKumar Gala interrupt-parent = <&mpic>; 1690052bc5dSKumar Gala interrupts = <8 1>; 1700052bc5dSKumar Gala reg = <1>; 1710052bc5dSKumar Gala }; 1720052bc5dSKumar Gala phy2: ethernet-phy@2 { 1730052bc5dSKumar Gala interrupt-parent = <&mpic>; 1740052bc5dSKumar Gala interrupts = <8 1>; 1750052bc5dSKumar Gala reg = <2>; 1760052bc5dSKumar Gala }; 1770052bc5dSKumar Gala phy3: ethernet-phy@3 { 1780052bc5dSKumar Gala interrupt-parent = <&mpic>; 1790052bc5dSKumar Gala interrupts = <8 1>; 1800052bc5dSKumar Gala reg = <3>; 1810052bc5dSKumar Gala }; 182b31a1d8bSAndy Fleming tbi0: tbi-phy@11 { 183b31a1d8bSAndy Fleming reg = <0x11>; 184b31a1d8bSAndy Fleming device_type = "tbi-phy"; 185b31a1d8bSAndy Fleming }; 186b31a1d8bSAndy Fleming }; 18784ba4a58SAnton Vorontsov }; 188b31a1d8bSAndy Fleming 18984ba4a58SAnton Vorontsov enet1: ethernet@25000 { 19084ba4a58SAnton Vorontsov #address-cells = <1>; 19184ba4a58SAnton Vorontsov #size-cells = <1>; 19284ba4a58SAnton Vorontsov cell-index = <1>; 19384ba4a58SAnton Vorontsov device_type = "network"; 19484ba4a58SAnton Vorontsov model = "TSEC"; 19584ba4a58SAnton Vorontsov compatible = "gianfar"; 19684ba4a58SAnton Vorontsov reg = <0x25000 0x1000>; 19784ba4a58SAnton Vorontsov ranges = <0x0 0x25000 0x1000>; 19884ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 19984ba4a58SAnton Vorontsov interrupts = <35 2 36 2 40 2>; 20084ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 20184ba4a58SAnton Vorontsov phy-handle = <&phy1>; 20284ba4a58SAnton Vorontsov 20384ba4a58SAnton Vorontsov mdio@520 { 204b31a1d8bSAndy Fleming #address-cells = <1>; 205b31a1d8bSAndy Fleming #size-cells = <0>; 206b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 20784ba4a58SAnton Vorontsov reg = <0x520 0x20>; 208b31a1d8bSAndy Fleming 209b31a1d8bSAndy Fleming tbi1: tbi-phy@11 { 210b31a1d8bSAndy Fleming reg = <0x11>; 211b31a1d8bSAndy Fleming device_type = "tbi-phy"; 212b31a1d8bSAndy Fleming }; 213b31a1d8bSAndy Fleming }; 21484ba4a58SAnton Vorontsov }; 215b31a1d8bSAndy Fleming 21684ba4a58SAnton Vorontsov enet2: ethernet@26000 { 21784ba4a58SAnton Vorontsov #address-cells = <1>; 21884ba4a58SAnton Vorontsov #size-cells = <1>; 21984ba4a58SAnton Vorontsov cell-index = <2>; 22084ba4a58SAnton Vorontsov device_type = "network"; 22184ba4a58SAnton Vorontsov model = "FEC"; 22284ba4a58SAnton Vorontsov compatible = "gianfar"; 22384ba4a58SAnton Vorontsov reg = <0x26000 0x1000>; 22484ba4a58SAnton Vorontsov ranges = <0x0 0x26000 0x1000>; 22584ba4a58SAnton Vorontsov local-mac-address = [ 00 00 00 00 00 00 ]; 22684ba4a58SAnton Vorontsov interrupts = <41 2>; 22784ba4a58SAnton Vorontsov interrupt-parent = <&mpic>; 22884ba4a58SAnton Vorontsov phy-handle = <&phy3>; 22984ba4a58SAnton Vorontsov 23084ba4a58SAnton Vorontsov mdio@520 { 231b31a1d8bSAndy Fleming #address-cells = <1>; 232b31a1d8bSAndy Fleming #size-cells = <0>; 233b31a1d8bSAndy Fleming compatible = "fsl,gianfar-tbi"; 23484ba4a58SAnton Vorontsov reg = <0x520 0x20>; 235b31a1d8bSAndy Fleming 236b31a1d8bSAndy Fleming tbi2: tbi-phy@11 { 237b31a1d8bSAndy Fleming reg = <0x11>; 238b31a1d8bSAndy Fleming device_type = "tbi-phy"; 239b31a1d8bSAndy Fleming }; 2400052bc5dSKumar Gala }; 2410052bc5dSKumar Gala }; 2420052bc5dSKumar Gala 2430052bc5dSKumar Gala serial0: serial@4500 { 2440052bc5dSKumar Gala cell-index = <0>; 2450052bc5dSKumar Gala device_type = "serial"; 246f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 2470052bc5dSKumar Gala reg = <0x4500 0x100>; // reg base, size 2480052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 2490052bc5dSKumar Gala interrupts = <42 2>; 2500052bc5dSKumar Gala interrupt-parent = <&mpic>; 2510052bc5dSKumar Gala }; 2520052bc5dSKumar Gala 2530052bc5dSKumar Gala serial1: serial@4600 { 2540052bc5dSKumar Gala cell-index = <1>; 2550052bc5dSKumar Gala device_type = "serial"; 256f706bed1SKumar Gala compatible = "fsl,ns16550", "ns16550"; 2570052bc5dSKumar Gala reg = <0x4600 0x100>; // reg base, size 2580052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 2590052bc5dSKumar Gala interrupts = <42 2>; 2600052bc5dSKumar Gala interrupt-parent = <&mpic>; 2610052bc5dSKumar Gala }; 2620052bc5dSKumar Gala 2630052bc5dSKumar Gala mpic: pic@40000 { 2640052bc5dSKumar Gala interrupt-controller; 2650052bc5dSKumar Gala #address-cells = <0>; 2660052bc5dSKumar Gala #interrupt-cells = <2>; 2670052bc5dSKumar Gala reg = <0x40000 0x40000>; 2680052bc5dSKumar Gala device_type = "open-pic"; 269acd4b715SKumar Gala compatible = "chrp,open-pic"; 2700052bc5dSKumar Gala }; 2710052bc5dSKumar Gala }; 2720052bc5dSKumar Gala 27367e64f4aSDmitry Eremin-Solenikov localbus@e0005000 { 27467e64f4aSDmitry Eremin-Solenikov #address-cells = <2>; 27567e64f4aSDmitry Eremin-Solenikov #size-cells = <1>; 27667e64f4aSDmitry Eremin-Solenikov compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus", 27767e64f4aSDmitry Eremin-Solenikov "simple-bus"; 27867e64f4aSDmitry Eremin-Solenikov reg = <0xe0005000 0x1000>; 279c0f58950SDmitry Eremin-Solenikov interrupt-parent = <&mpic>; 280c0f58950SDmitry Eremin-Solenikov interrupts = <19 2>; 28167e64f4aSDmitry Eremin-Solenikov 28267e64f4aSDmitry Eremin-Solenikov ranges = <0x0 0x0 0xfe000000 0x02000000>; 28367e64f4aSDmitry Eremin-Solenikov 28467e64f4aSDmitry Eremin-Solenikov nor@0,0 { 28567e64f4aSDmitry Eremin-Solenikov #address-cells = <1>; 28667e64f4aSDmitry Eremin-Solenikov #size-cells = <1>; 28767e64f4aSDmitry Eremin-Solenikov compatible = "cfi-flash"; 28867e64f4aSDmitry Eremin-Solenikov reg = <0x0 0x0 0x02000000>; 28967e64f4aSDmitry Eremin-Solenikov bank-width = <4>; 29067e64f4aSDmitry Eremin-Solenikov device-width = <2>; 29167e64f4aSDmitry Eremin-Solenikov partition@0 { 29267e64f4aSDmitry Eremin-Solenikov label = "kernel"; 29367e64f4aSDmitry Eremin-Solenikov reg = <0x00000000 0x00180000>; 29467e64f4aSDmitry Eremin-Solenikov }; 29567e64f4aSDmitry Eremin-Solenikov partition@180000 { 29667e64f4aSDmitry Eremin-Solenikov label = "root"; 29767e64f4aSDmitry Eremin-Solenikov reg = <0x00180000 0x01dc0000>; 29867e64f4aSDmitry Eremin-Solenikov }; 29967e64f4aSDmitry Eremin-Solenikov partition@1f40000 { 30067e64f4aSDmitry Eremin-Solenikov label = "env1"; 30167e64f4aSDmitry Eremin-Solenikov reg = <0x01f40000 0x00040000>; 30267e64f4aSDmitry Eremin-Solenikov }; 30367e64f4aSDmitry Eremin-Solenikov partition@1f80000 { 30467e64f4aSDmitry Eremin-Solenikov label = "env2"; 30567e64f4aSDmitry Eremin-Solenikov reg = <0x01f80000 0x00040000>; 30667e64f4aSDmitry Eremin-Solenikov }; 30767e64f4aSDmitry Eremin-Solenikov partition@1fc0000 { 30867e64f4aSDmitry Eremin-Solenikov label = "u-boot"; 30967e64f4aSDmitry Eremin-Solenikov reg = <0x01fc0000 0x00040000>; 31067e64f4aSDmitry Eremin-Solenikov read-only; 31167e64f4aSDmitry Eremin-Solenikov }; 31267e64f4aSDmitry Eremin-Solenikov }; 31367e64f4aSDmitry Eremin-Solenikov }; 31467e64f4aSDmitry Eremin-Solenikov 3150052bc5dSKumar Gala pci0: pci@e0008000 { 3160052bc5dSKumar Gala #interrupt-cells = <1>; 3170052bc5dSKumar Gala #size-cells = <2>; 3180052bc5dSKumar Gala #address-cells = <3>; 3190052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 3200052bc5dSKumar Gala device_type = "pci"; 3210052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 3220052bc5dSKumar Gala clock-frequency = <66666666>; 3230052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 3240052bc5dSKumar Gala interrupt-map = < 3250052bc5dSKumar Gala /* IDSEL 28 */ 3260052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 32707c63839SDmitry Eremin-Solenikov 0xe000 0 0 2 &mpic 3 1 32807c63839SDmitry Eremin-Solenikov 0xe000 0 0 3 &mpic 6 1 32907c63839SDmitry Eremin-Solenikov 0xe000 0 0 4 &mpic 5 1 33007c63839SDmitry Eremin-Solenikov 33107c63839SDmitry Eremin-Solenikov /* IDSEL 11 */ 33207c63839SDmitry Eremin-Solenikov 0x5800 0 0 1 &mpic 6 1 33307c63839SDmitry Eremin-Solenikov 0x5800 0 0 2 &mpic 5 1 33407c63839SDmitry Eremin-Solenikov >; 3350052bc5dSKumar Gala 3360052bc5dSKumar Gala interrupt-parent = <&mpic>; 3370052bc5dSKumar Gala interrupts = <24 2>; 3380052bc5dSKumar Gala bus-range = <0 0>; 3390052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 3400052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 3410052bc5dSKumar Gala }; 3420052bc5dSKumar Gala}; 343