1*0052bc5dSKumar Gala/* 2*0052bc5dSKumar Gala * TQM 8540 Device Tree Source 3*0052bc5dSKumar Gala * 4*0052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc. 5*0052bc5dSKumar Gala * 6*0052bc5dSKumar Gala * This program is free software; you can redistribute it and/or modify it 7*0052bc5dSKumar Gala * under the terms of the GNU General Public License as published by the 8*0052bc5dSKumar Gala * Free Software Foundation; either version 2 of the License, or (at your 9*0052bc5dSKumar Gala * option) any later version. 10*0052bc5dSKumar Gala */ 11*0052bc5dSKumar Gala 12*0052bc5dSKumar Gala/dts-v1/; 13*0052bc5dSKumar Gala 14*0052bc5dSKumar Gala/ { 15*0052bc5dSKumar Gala model = "tqm,8540"; 16*0052bc5dSKumar Gala compatible = "tqm,8540", "tqm,85xx"; 17*0052bc5dSKumar Gala #address-cells = <1>; 18*0052bc5dSKumar Gala #size-cells = <1>; 19*0052bc5dSKumar Gala 20*0052bc5dSKumar Gala aliases { 21*0052bc5dSKumar Gala ethernet0 = &enet0; 22*0052bc5dSKumar Gala ethernet1 = &enet1; 23*0052bc5dSKumar Gala ethernet2 = &enet2; 24*0052bc5dSKumar Gala serial0 = &serial0; 25*0052bc5dSKumar Gala serial1 = &serial1; 26*0052bc5dSKumar Gala pci0 = &pci0; 27*0052bc5dSKumar Gala }; 28*0052bc5dSKumar Gala 29*0052bc5dSKumar Gala cpus { 30*0052bc5dSKumar Gala #address-cells = <1>; 31*0052bc5dSKumar Gala #size-cells = <0>; 32*0052bc5dSKumar Gala 33*0052bc5dSKumar Gala PowerPC,8540@0 { 34*0052bc5dSKumar Gala device_type = "cpu"; 35*0052bc5dSKumar Gala reg = <0>; 36*0052bc5dSKumar Gala d-cache-line-size = <32>; 37*0052bc5dSKumar Gala i-cache-line-size = <32>; 38*0052bc5dSKumar Gala d-cache-size = <32768>; 39*0052bc5dSKumar Gala i-cache-size = <32768>; 40*0052bc5dSKumar Gala timebase-frequency = <0>; 41*0052bc5dSKumar Gala bus-frequency = <0>; 42*0052bc5dSKumar Gala clock-frequency = <0>; 43*0052bc5dSKumar Gala }; 44*0052bc5dSKumar Gala }; 45*0052bc5dSKumar Gala 46*0052bc5dSKumar Gala memory { 47*0052bc5dSKumar Gala device_type = "memory"; 48*0052bc5dSKumar Gala reg = <0x00000000 0x10000000>; 49*0052bc5dSKumar Gala }; 50*0052bc5dSKumar Gala 51*0052bc5dSKumar Gala soc8540@e0000000 { 52*0052bc5dSKumar Gala #address-cells = <1>; 53*0052bc5dSKumar Gala #size-cells = <1>; 54*0052bc5dSKumar Gala device_type = "soc"; 55*0052bc5dSKumar Gala ranges = <0x0 0xe0000000 0x100000>; 56*0052bc5dSKumar Gala reg = <0xe0000000 0x200>; 57*0052bc5dSKumar Gala bus-frequency = <0>; 58*0052bc5dSKumar Gala compatible = "fsl,mpc8540-immr", "simple-bus"; 59*0052bc5dSKumar Gala 60*0052bc5dSKumar Gala memory-controller@2000 { 61*0052bc5dSKumar Gala compatible = "fsl,8540-memory-controller"; 62*0052bc5dSKumar Gala reg = <0x2000 0x1000>; 63*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 64*0052bc5dSKumar Gala interrupts = <18 2>; 65*0052bc5dSKumar Gala }; 66*0052bc5dSKumar Gala 67*0052bc5dSKumar Gala l2-cache-controller@20000 { 68*0052bc5dSKumar Gala compatible = "fsl,8540-l2-cache-controller"; 69*0052bc5dSKumar Gala reg = <0x20000 0x1000>; 70*0052bc5dSKumar Gala cache-line-size = <32>; 71*0052bc5dSKumar Gala cache-size = <0x40000>; // L2, 256K 72*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 73*0052bc5dSKumar Gala interrupts = <16 2>; 74*0052bc5dSKumar Gala }; 75*0052bc5dSKumar Gala 76*0052bc5dSKumar Gala i2c@3000 { 77*0052bc5dSKumar Gala #address-cells = <1>; 78*0052bc5dSKumar Gala #size-cells = <0>; 79*0052bc5dSKumar Gala cell-index = <0>; 80*0052bc5dSKumar Gala compatible = "fsl-i2c"; 81*0052bc5dSKumar Gala reg = <0x3000 0x100>; 82*0052bc5dSKumar Gala interrupts = <43 2>; 83*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 84*0052bc5dSKumar Gala dfsrr; 85*0052bc5dSKumar Gala 86*0052bc5dSKumar Gala rtc@68 { 87*0052bc5dSKumar Gala compatible = "dallas,ds1337"; 88*0052bc5dSKumar Gala reg = <0x68>; 89*0052bc5dSKumar Gala }; 90*0052bc5dSKumar Gala }; 91*0052bc5dSKumar Gala 92*0052bc5dSKumar Gala mdio@24520 { 93*0052bc5dSKumar Gala #address-cells = <1>; 94*0052bc5dSKumar Gala #size-cells = <0>; 95*0052bc5dSKumar Gala compatible = "fsl,gianfar-mdio"; 96*0052bc5dSKumar Gala reg = <0x24520 0x20>; 97*0052bc5dSKumar Gala 98*0052bc5dSKumar Gala phy1: ethernet-phy@1 { 99*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 100*0052bc5dSKumar Gala interrupts = <8 1>; 101*0052bc5dSKumar Gala reg = <1>; 102*0052bc5dSKumar Gala device_type = "ethernet-phy"; 103*0052bc5dSKumar Gala }; 104*0052bc5dSKumar Gala phy2: ethernet-phy@2 { 105*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 106*0052bc5dSKumar Gala interrupts = <8 1>; 107*0052bc5dSKumar Gala reg = <2>; 108*0052bc5dSKumar Gala device_type = "ethernet-phy"; 109*0052bc5dSKumar Gala }; 110*0052bc5dSKumar Gala phy3: ethernet-phy@3 { 111*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 112*0052bc5dSKumar Gala interrupts = <8 1>; 113*0052bc5dSKumar Gala reg = <3>; 114*0052bc5dSKumar Gala device_type = "ethernet-phy"; 115*0052bc5dSKumar Gala }; 116*0052bc5dSKumar Gala }; 117*0052bc5dSKumar Gala 118*0052bc5dSKumar Gala enet0: ethernet@24000 { 119*0052bc5dSKumar Gala cell-index = <0>; 120*0052bc5dSKumar Gala device_type = "network"; 121*0052bc5dSKumar Gala model = "TSEC"; 122*0052bc5dSKumar Gala compatible = "gianfar"; 123*0052bc5dSKumar Gala reg = <0x24000 0x1000>; 124*0052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 125*0052bc5dSKumar Gala interrupts = <29 2 30 2 34 2>; 126*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 127*0052bc5dSKumar Gala phy-handle = <&phy2>; 128*0052bc5dSKumar Gala }; 129*0052bc5dSKumar Gala 130*0052bc5dSKumar Gala enet1: ethernet@25000 { 131*0052bc5dSKumar Gala cell-index = <1>; 132*0052bc5dSKumar Gala device_type = "network"; 133*0052bc5dSKumar Gala model = "TSEC"; 134*0052bc5dSKumar Gala compatible = "gianfar"; 135*0052bc5dSKumar Gala reg = <0x25000 0x1000>; 136*0052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 137*0052bc5dSKumar Gala interrupts = <35 2 36 2 40 2>; 138*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 139*0052bc5dSKumar Gala phy-handle = <&phy1>; 140*0052bc5dSKumar Gala }; 141*0052bc5dSKumar Gala 142*0052bc5dSKumar Gala enet2: ethernet@26000 { 143*0052bc5dSKumar Gala cell-index = <2>; 144*0052bc5dSKumar Gala device_type = "network"; 145*0052bc5dSKumar Gala model = "FEC"; 146*0052bc5dSKumar Gala compatible = "gianfar"; 147*0052bc5dSKumar Gala reg = <0x26000 0x1000>; 148*0052bc5dSKumar Gala local-mac-address = [ 00 00 00 00 00 00 ]; 149*0052bc5dSKumar Gala interrupts = <41 2>; 150*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 151*0052bc5dSKumar Gala phy-handle = <&phy3>; 152*0052bc5dSKumar Gala }; 153*0052bc5dSKumar Gala 154*0052bc5dSKumar Gala serial0: serial@4500 { 155*0052bc5dSKumar Gala cell-index = <0>; 156*0052bc5dSKumar Gala device_type = "serial"; 157*0052bc5dSKumar Gala compatible = "ns16550"; 158*0052bc5dSKumar Gala reg = <0x4500 0x100>; // reg base, size 159*0052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 160*0052bc5dSKumar Gala interrupts = <42 2>; 161*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 162*0052bc5dSKumar Gala }; 163*0052bc5dSKumar Gala 164*0052bc5dSKumar Gala serial1: serial@4600 { 165*0052bc5dSKumar Gala cell-index = <1>; 166*0052bc5dSKumar Gala device_type = "serial"; 167*0052bc5dSKumar Gala compatible = "ns16550"; 168*0052bc5dSKumar Gala reg = <0x4600 0x100>; // reg base, size 169*0052bc5dSKumar Gala clock-frequency = <0>; // should we fill in in uboot? 170*0052bc5dSKumar Gala interrupts = <42 2>; 171*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 172*0052bc5dSKumar Gala }; 173*0052bc5dSKumar Gala 174*0052bc5dSKumar Gala mpic: pic@40000 { 175*0052bc5dSKumar Gala interrupt-controller; 176*0052bc5dSKumar Gala #address-cells = <0>; 177*0052bc5dSKumar Gala #interrupt-cells = <2>; 178*0052bc5dSKumar Gala reg = <0x40000 0x40000>; 179*0052bc5dSKumar Gala device_type = "open-pic"; 180*0052bc5dSKumar Gala }; 181*0052bc5dSKumar Gala }; 182*0052bc5dSKumar Gala 183*0052bc5dSKumar Gala pci0: pci@e0008000 { 184*0052bc5dSKumar Gala cell-index = <0>; 185*0052bc5dSKumar Gala #interrupt-cells = <1>; 186*0052bc5dSKumar Gala #size-cells = <2>; 187*0052bc5dSKumar Gala #address-cells = <3>; 188*0052bc5dSKumar Gala compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 189*0052bc5dSKumar Gala device_type = "pci"; 190*0052bc5dSKumar Gala reg = <0xe0008000 0x1000>; 191*0052bc5dSKumar Gala clock-frequency = <66666666>; 192*0052bc5dSKumar Gala interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 193*0052bc5dSKumar Gala interrupt-map = < 194*0052bc5dSKumar Gala /* IDSEL 28 */ 195*0052bc5dSKumar Gala 0xe000 0 0 1 &mpic 2 1 196*0052bc5dSKumar Gala 0xe000 0 0 2 &mpic 3 1>; 197*0052bc5dSKumar Gala 198*0052bc5dSKumar Gala interrupt-parent = <&mpic>; 199*0052bc5dSKumar Gala interrupts = <24 2>; 200*0052bc5dSKumar Gala bus-range = <0 0>; 201*0052bc5dSKumar Gala ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 202*0052bc5dSKumar Gala 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; 203*0052bc5dSKumar Gala }; 204*0052bc5dSKumar Gala}; 205