1660662f8SThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-or-later */ 21da177e4SLinus Torvalds/* 31da177e4SLinus Torvalds * PARISC TLB and cache flushing support 41da177e4SLinus Torvalds * Copyright (C) 2000-2001 Hewlett-Packard (John Marvin) 51da177e4SLinus Torvalds * Copyright (C) 2001 Matthew Wilcox (willy at parisc-linux.org) 61da177e4SLinus Torvalds * Copyright (C) 2002 Richard Hirst (rhirst with parisc-linux.org) 71da177e4SLinus Torvalds */ 81da177e4SLinus Torvalds 91da177e4SLinus Torvalds/* 101da177e4SLinus Torvalds * NOTE: fdc,fic, and pdc instructions that use base register modification 111da177e4SLinus Torvalds * should only use index and base registers that are not shadowed, 121da177e4SLinus Torvalds * so that the fast path emulation in the non access miss handler 131da177e4SLinus Torvalds * can be used. 141da177e4SLinus Torvalds */ 151da177e4SLinus Torvalds 16413059f2SGrant Grundler#ifdef CONFIG_64BIT 171da177e4SLinus Torvalds .level 2.0w 181da177e4SLinus Torvalds#else 191da177e4SLinus Torvalds .level 2.0 201da177e4SLinus Torvalds#endif 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds#include <asm/psw.h> 23896a3756SGrant Grundler#include <asm/assembly.h> 241da177e4SLinus Torvalds#include <asm/pgtable.h> 251da177e4SLinus Torvalds#include <asm/cache.h> 2688776c0eSHelge Deller#include <asm/ldcw.h> 273847dab7SHelge Deller#include <asm/alternative.h> 288e9e9844SHelge Deller#include <linux/linkage.h> 292a03bb9eSHelge Deller#include <linux/init.h> 301da177e4SLinus Torvalds 312a03bb9eSHelge Deller .section .text.hot 322a03bb9eSHelge Deller .align 16 331da177e4SLinus Torvalds 34f39cce65SHelge DellerENTRY_CFI(flush_tlb_all_local) 351da177e4SLinus Torvalds /* 361da177e4SLinus Torvalds * The pitlbe and pdtlbe instructions should only be used to 371da177e4SLinus Torvalds * flush the entire tlb. Also, there needs to be no intervening 381da177e4SLinus Torvalds * tlb operations, e.g. tlb misses, so the operation needs 391da177e4SLinus Torvalds * to happen in real mode with all interruptions disabled. 401da177e4SLinus Torvalds */ 411da177e4SLinus Torvalds 42896a3756SGrant Grundler /* pcxt_ssm_bug - relied upon translation! PA 2.0 Arch. F-4 and F-5 */ 43896a3756SGrant Grundler rsm PSW_SM_I, %r19 /* save I-bit state */ 44896a3756SGrant Grundler load32 PA(1f), %r1 451da177e4SLinus Torvalds nop 461da177e4SLinus Torvalds nop 471da177e4SLinus Torvalds nop 481da177e4SLinus Torvalds nop 491da177e4SLinus Torvalds nop 501da177e4SLinus Torvalds 51896a3756SGrant Grundler rsm PSW_SM_Q, %r0 /* prep to load iia queue */ 521da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ tail */ 531da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ head */ 541da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ head */ 551da177e4SLinus Torvalds ldo 4(%r1), %r1 561da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ tail */ 57896a3756SGrant Grundler load32 REAL_MODE_PSW, %r1 58896a3756SGrant Grundler mtctl %r1, %ipsw 591da177e4SLinus Torvalds rfi 601da177e4SLinus Torvalds nop 611da177e4SLinus Torvalds 622fd83038SHelge Deller1: load32 PA(cache_info), %r1 631da177e4SLinus Torvalds 641da177e4SLinus Torvalds /* Flush Instruction Tlb */ 651da177e4SLinus Torvalds 66*69245c97SHelge Deller88: LDREG ITLB_SID_BASE(%r1), %r20 671da177e4SLinus Torvalds LDREG ITLB_SID_STRIDE(%r1), %r21 681da177e4SLinus Torvalds LDREG ITLB_SID_COUNT(%r1), %r22 691da177e4SLinus Torvalds LDREG ITLB_OFF_BASE(%r1), %arg0 701da177e4SLinus Torvalds LDREG ITLB_OFF_STRIDE(%r1), %arg1 711da177e4SLinus Torvalds LDREG ITLB_OFF_COUNT(%r1), %arg2 721da177e4SLinus Torvalds LDREG ITLB_LOOP(%r1), %arg3 731da177e4SLinus Torvalds 74872f6debSKyle McMartin addib,COND(=) -1, %arg3, fitoneloop /* Preadjust and test */ 751da177e4SLinus Torvalds movb,<,n %arg3, %r31, fitdone /* If loop < 0, skip */ 761da177e4SLinus Torvalds copy %arg0, %r28 /* Init base addr */ 771da177e4SLinus Torvalds 781da177e4SLinus Torvaldsfitmanyloop: /* Loop if LOOP >= 2 */ 791da177e4SLinus Torvalds mtsp %r20, %sr1 801da177e4SLinus Torvalds add %r21, %r20, %r20 /* increment space */ 811da177e4SLinus Torvalds copy %arg2, %r29 /* Init middle loop count */ 821da177e4SLinus Torvalds 831da177e4SLinus Torvaldsfitmanymiddle: /* Loop if LOOP >= 2 */ 84872f6debSKyle McMartin addib,COND(>) -1, %r31, fitmanymiddle /* Adjusted inner loop decr */ 855035b230SJohn David Anglin pitlbe %r0(%sr1, %r28) 861da177e4SLinus Torvalds pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */ 87872f6debSKyle McMartin addib,COND(>) -1, %r29, fitmanymiddle /* Middle loop decr */ 881da177e4SLinus Torvalds copy %arg3, %r31 /* Re-init inner loop count */ 891da177e4SLinus Torvalds 901da177e4SLinus Torvalds movb,tr %arg0, %r28, fitmanyloop /* Re-init base addr */ 91872f6debSKyle McMartin addib,COND(<=),n -1, %r22, fitdone /* Outer loop count decr */ 921da177e4SLinus Torvalds 931da177e4SLinus Torvaldsfitoneloop: /* Loop if LOOP = 1 */ 941da177e4SLinus Torvalds mtsp %r20, %sr1 951da177e4SLinus Torvalds copy %arg0, %r28 /* init base addr */ 961da177e4SLinus Torvalds copy %arg2, %r29 /* init middle loop count */ 971da177e4SLinus Torvalds 981da177e4SLinus Torvaldsfitonemiddle: /* Loop if LOOP = 1 */ 99872f6debSKyle McMartin addib,COND(>) -1, %r29, fitonemiddle /* Middle loop count decr */ 1001da177e4SLinus Torvalds pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */ 1011da177e4SLinus Torvalds 102872f6debSKyle McMartin addib,COND(>) -1, %r22, fitoneloop /* Outer loop count decr */ 1031da177e4SLinus Torvalds add %r21, %r20, %r20 /* increment space */ 1041da177e4SLinus Torvalds 1051da177e4SLinus Torvaldsfitdone: 106*69245c97SHelge Deller ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP) 1071da177e4SLinus Torvalds 1081da177e4SLinus Torvalds /* Flush Data Tlb */ 1091da177e4SLinus Torvalds 1101da177e4SLinus Torvalds LDREG DTLB_SID_BASE(%r1), %r20 1111da177e4SLinus Torvalds LDREG DTLB_SID_STRIDE(%r1), %r21 1121da177e4SLinus Torvalds LDREG DTLB_SID_COUNT(%r1), %r22 1131da177e4SLinus Torvalds LDREG DTLB_OFF_BASE(%r1), %arg0 1141da177e4SLinus Torvalds LDREG DTLB_OFF_STRIDE(%r1), %arg1 1151da177e4SLinus Torvalds LDREG DTLB_OFF_COUNT(%r1), %arg2 1161da177e4SLinus Torvalds LDREG DTLB_LOOP(%r1), %arg3 1171da177e4SLinus Torvalds 118872f6debSKyle McMartin addib,COND(=) -1, %arg3, fdtoneloop /* Preadjust and test */ 1191da177e4SLinus Torvalds movb,<,n %arg3, %r31, fdtdone /* If loop < 0, skip */ 1201da177e4SLinus Torvalds copy %arg0, %r28 /* Init base addr */ 1211da177e4SLinus Torvalds 1221da177e4SLinus Torvaldsfdtmanyloop: /* Loop if LOOP >= 2 */ 1231da177e4SLinus Torvalds mtsp %r20, %sr1 1241da177e4SLinus Torvalds add %r21, %r20, %r20 /* increment space */ 1251da177e4SLinus Torvalds copy %arg2, %r29 /* Init middle loop count */ 1261da177e4SLinus Torvalds 1271da177e4SLinus Torvaldsfdtmanymiddle: /* Loop if LOOP >= 2 */ 128872f6debSKyle McMartin addib,COND(>) -1, %r31, fdtmanymiddle /* Adjusted inner loop decr */ 1295035b230SJohn David Anglin pdtlbe %r0(%sr1, %r28) 1301da177e4SLinus Torvalds pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */ 131872f6debSKyle McMartin addib,COND(>) -1, %r29, fdtmanymiddle /* Middle loop decr */ 1321da177e4SLinus Torvalds copy %arg3, %r31 /* Re-init inner loop count */ 1331da177e4SLinus Torvalds 1341da177e4SLinus Torvalds movb,tr %arg0, %r28, fdtmanyloop /* Re-init base addr */ 135872f6debSKyle McMartin addib,COND(<=),n -1, %r22,fdtdone /* Outer loop count decr */ 1361da177e4SLinus Torvalds 1371da177e4SLinus Torvaldsfdtoneloop: /* Loop if LOOP = 1 */ 1381da177e4SLinus Torvalds mtsp %r20, %sr1 1391da177e4SLinus Torvalds copy %arg0, %r28 /* init base addr */ 1401da177e4SLinus Torvalds copy %arg2, %r29 /* init middle loop count */ 1411da177e4SLinus Torvalds 1421da177e4SLinus Torvaldsfdtonemiddle: /* Loop if LOOP = 1 */ 143872f6debSKyle McMartin addib,COND(>) -1, %r29, fdtonemiddle /* Middle loop count decr */ 1441da177e4SLinus Torvalds pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */ 1451da177e4SLinus Torvalds 146872f6debSKyle McMartin addib,COND(>) -1, %r22, fdtoneloop /* Outer loop count decr */ 1471da177e4SLinus Torvalds add %r21, %r20, %r20 /* increment space */ 1481da177e4SLinus Torvalds 149896a3756SGrant Grundler 1501da177e4SLinus Torvaldsfdtdone: 151896a3756SGrant Grundler /* 152896a3756SGrant Grundler * Switch back to virtual mode 153896a3756SGrant Grundler */ 154896a3756SGrant Grundler /* pcxt_ssm_bug */ 155896a3756SGrant Grundler rsm PSW_SM_I, %r0 156896a3756SGrant Grundler load32 2f, %r1 157896a3756SGrant Grundler nop 158896a3756SGrant Grundler nop 159896a3756SGrant Grundler nop 160896a3756SGrant Grundler nop 161896a3756SGrant Grundler nop 1621da177e4SLinus Torvalds 163896a3756SGrant Grundler rsm PSW_SM_Q, %r0 /* prep to load iia queue */ 1641da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ tail */ 1651da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ head */ 1661da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ head */ 1671da177e4SLinus Torvalds ldo 4(%r1), %r1 1681da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ tail */ 169896a3756SGrant Grundler load32 KERNEL_PSW, %r1 170896a3756SGrant Grundler or %r1, %r19, %r1 /* I-bit to state on entry */ 171896a3756SGrant Grundler mtctl %r1, %ipsw /* restore I-bit (entire PSW) */ 1721da177e4SLinus Torvalds rfi 1731da177e4SLinus Torvalds nop 1741da177e4SLinus Torvalds 1751da177e4SLinus Torvalds2: bv %r0(%r2) 1761da177e4SLinus Torvalds nop 177f39cce65SHelge DellerENDPROC_CFI(flush_tlb_all_local) 1781da177e4SLinus Torvalds 1791da177e4SLinus Torvalds .import cache_info,data 1801da177e4SLinus Torvalds 181f39cce65SHelge DellerENTRY_CFI(flush_instruction_cache_local) 1823847dab7SHelge Deller88: load32 cache_info, %r1 1831da177e4SLinus Torvalds 1841da177e4SLinus Torvalds /* Flush Instruction Cache */ 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds LDREG ICACHE_BASE(%r1), %arg0 1871da177e4SLinus Torvalds LDREG ICACHE_STRIDE(%r1), %arg1 1881da177e4SLinus Torvalds LDREG ICACHE_COUNT(%r1), %arg2 1891da177e4SLinus Torvalds LDREG ICACHE_LOOP(%r1), %arg3 1901da177e4SLinus Torvalds rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/ 1916d2ddc2fSJohn David Anglin mtsp %r0, %sr1 192872f6debSKyle McMartin addib,COND(=) -1, %arg3, fioneloop /* Preadjust and test */ 1931da177e4SLinus Torvalds movb,<,n %arg3, %r31, fisync /* If loop < 0, do sync */ 1941da177e4SLinus Torvalds 1951da177e4SLinus Torvaldsfimanyloop: /* Loop if LOOP >= 2 */ 196872f6debSKyle McMartin addib,COND(>) -1, %r31, fimanyloop /* Adjusted inner loop decr */ 1979b3b331dSGrant Grundler fice %r0(%sr1, %arg0) 1981da177e4SLinus Torvalds fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */ 1991da177e4SLinus Torvalds movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */ 200872f6debSKyle McMartin addib,COND(<=),n -1, %arg2, fisync /* Outer loop decr */ 2011da177e4SLinus Torvalds 2021da177e4SLinus Torvaldsfioneloop: /* Loop if LOOP = 1 */ 2036d2ddc2fSJohn David Anglin /* Some implementations may flush with a single fice instruction */ 2046d2ddc2fSJohn David Anglin cmpib,COND(>>=),n 15, %arg2, fioneloop2 2056d2ddc2fSJohn David Anglin 2066d2ddc2fSJohn David Anglinfioneloop1: 2076d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2086d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2096d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2106d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2116d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2126d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2136d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2146d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2156d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2166d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2176d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2186d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2196d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2206d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2216d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2226d2ddc2fSJohn David Anglin addib,COND(>) -16, %arg2, fioneloop1 2236d2ddc2fSJohn David Anglin fice,m %arg1(%sr1, %arg0) 2246d2ddc2fSJohn David Anglin 2256d2ddc2fSJohn David Anglin /* Check if done */ 2266d2ddc2fSJohn David Anglin cmpb,COND(=),n %arg2, %r0, fisync /* Predict branch taken */ 2276d2ddc2fSJohn David Anglin 2286d2ddc2fSJohn David Anglinfioneloop2: 2296d2ddc2fSJohn David Anglin addib,COND(>) -1, %arg2, fioneloop2 /* Outer loop count decr */ 2301da177e4SLinus Torvalds fice,m %arg1(%sr1, %arg0) /* Fice for one loop */ 2311da177e4SLinus Torvalds 2321da177e4SLinus Torvaldsfisync: 2331da177e4SLinus Torvalds sync 234896a3756SGrant Grundler mtsm %r22 /* restore I-bit */ 2353847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP) 2361da177e4SLinus Torvalds bv %r0(%r2) 2371da177e4SLinus Torvalds nop 238f39cce65SHelge DellerENDPROC_CFI(flush_instruction_cache_local) 2391da177e4SLinus Torvalds 2408e9e9844SHelge Deller 2411da177e4SLinus Torvalds .import cache_info, data 242f39cce65SHelge DellerENTRY_CFI(flush_data_cache_local) 2433847dab7SHelge Deller88: load32 cache_info, %r1 2441da177e4SLinus Torvalds 2451da177e4SLinus Torvalds /* Flush Data Cache */ 2461da177e4SLinus Torvalds 2471da177e4SLinus Torvalds LDREG DCACHE_BASE(%r1), %arg0 2481da177e4SLinus Torvalds LDREG DCACHE_STRIDE(%r1), %arg1 2491da177e4SLinus Torvalds LDREG DCACHE_COUNT(%r1), %arg2 2501da177e4SLinus Torvalds LDREG DCACHE_LOOP(%r1), %arg3 2516d2ddc2fSJohn David Anglin rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/ 2526d2ddc2fSJohn David Anglin mtsp %r0, %sr1 253872f6debSKyle McMartin addib,COND(=) -1, %arg3, fdoneloop /* Preadjust and test */ 2541da177e4SLinus Torvalds movb,<,n %arg3, %r31, fdsync /* If loop < 0, do sync */ 2551da177e4SLinus Torvalds 2561da177e4SLinus Torvaldsfdmanyloop: /* Loop if LOOP >= 2 */ 257872f6debSKyle McMartin addib,COND(>) -1, %r31, fdmanyloop /* Adjusted inner loop decr */ 2589b3b331dSGrant Grundler fdce %r0(%sr1, %arg0) 2591da177e4SLinus Torvalds fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */ 2601da177e4SLinus Torvalds movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */ 261872f6debSKyle McMartin addib,COND(<=),n -1, %arg2, fdsync /* Outer loop decr */ 2621da177e4SLinus Torvalds 2631da177e4SLinus Torvaldsfdoneloop: /* Loop if LOOP = 1 */ 2646d2ddc2fSJohn David Anglin /* Some implementations may flush with a single fdce instruction */ 2656d2ddc2fSJohn David Anglin cmpib,COND(>>=),n 15, %arg2, fdoneloop2 2666d2ddc2fSJohn David Anglin 2676d2ddc2fSJohn David Anglinfdoneloop1: 2686d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2696d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2706d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2716d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2726d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2736d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2746d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2756d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2766d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2776d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2786d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2796d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2806d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2816d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2826d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2836d2ddc2fSJohn David Anglin addib,COND(>) -16, %arg2, fdoneloop1 2846d2ddc2fSJohn David Anglin fdce,m %arg1(%sr1, %arg0) 2856d2ddc2fSJohn David Anglin 2866d2ddc2fSJohn David Anglin /* Check if done */ 2876d2ddc2fSJohn David Anglin cmpb,COND(=),n %arg2, %r0, fdsync /* Predict branch taken */ 2886d2ddc2fSJohn David Anglin 2896d2ddc2fSJohn David Anglinfdoneloop2: 2906d2ddc2fSJohn David Anglin addib,COND(>) -1, %arg2, fdoneloop2 /* Outer loop count decr */ 2911da177e4SLinus Torvalds fdce,m %arg1(%sr1, %arg0) /* Fdce for one loop */ 2921da177e4SLinus Torvalds 2931da177e4SLinus Torvaldsfdsync: 2941da177e4SLinus Torvalds syncdma 2951da177e4SLinus Torvalds sync 296896a3756SGrant Grundler mtsm %r22 /* restore I-bit */ 2973847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 2981da177e4SLinus Torvalds bv %r0(%r2) 2991da177e4SLinus Torvalds nop 300f39cce65SHelge DellerENDPROC_CFI(flush_data_cache_local) 3011da177e4SLinus Torvalds 3026d2ddc2fSJohn David Anglin/* Clear page using kernel mapping. */ 3036d2ddc2fSJohn David Anglin 304f39cce65SHelge DellerENTRY_CFI(clear_page_asm) 3056d2ddc2fSJohn David Anglin#ifdef CONFIG_64BIT 3066d2ddc2fSJohn David Anglin 3076d2ddc2fSJohn David Anglin /* Unroll the loop. */ 3086d2ddc2fSJohn David Anglin ldi (PAGE_SIZE / 128), %r1 3096d2ddc2fSJohn David Anglin 3106d2ddc2fSJohn David Anglin1: 3116d2ddc2fSJohn David Anglin std %r0, 0(%r26) 3126d2ddc2fSJohn David Anglin std %r0, 8(%r26) 3136d2ddc2fSJohn David Anglin std %r0, 16(%r26) 3146d2ddc2fSJohn David Anglin std %r0, 24(%r26) 3156d2ddc2fSJohn David Anglin std %r0, 32(%r26) 3166d2ddc2fSJohn David Anglin std %r0, 40(%r26) 3176d2ddc2fSJohn David Anglin std %r0, 48(%r26) 3186d2ddc2fSJohn David Anglin std %r0, 56(%r26) 3196d2ddc2fSJohn David Anglin std %r0, 64(%r26) 3206d2ddc2fSJohn David Anglin std %r0, 72(%r26) 3216d2ddc2fSJohn David Anglin std %r0, 80(%r26) 3226d2ddc2fSJohn David Anglin std %r0, 88(%r26) 3236d2ddc2fSJohn David Anglin std %r0, 96(%r26) 3246d2ddc2fSJohn David Anglin std %r0, 104(%r26) 3256d2ddc2fSJohn David Anglin std %r0, 112(%r26) 3266d2ddc2fSJohn David Anglin std %r0, 120(%r26) 3276d2ddc2fSJohn David Anglin 3286d2ddc2fSJohn David Anglin /* Note reverse branch hint for addib is taken. */ 3296d2ddc2fSJohn David Anglin addib,COND(>),n -1, %r1, 1b 3306d2ddc2fSJohn David Anglin ldo 128(%r26), %r26 3316d2ddc2fSJohn David Anglin 3326d2ddc2fSJohn David Anglin#else 3336d2ddc2fSJohn David Anglin 3346d2ddc2fSJohn David Anglin /* 3356d2ddc2fSJohn David Anglin * Note that until (if) we start saving the full 64-bit register 3366d2ddc2fSJohn David Anglin * values on interrupt, we can't use std on a 32 bit kernel. 3376d2ddc2fSJohn David Anglin */ 3386d2ddc2fSJohn David Anglin ldi (PAGE_SIZE / 64), %r1 3396d2ddc2fSJohn David Anglin 3406d2ddc2fSJohn David Anglin1: 3416d2ddc2fSJohn David Anglin stw %r0, 0(%r26) 3426d2ddc2fSJohn David Anglin stw %r0, 4(%r26) 3436d2ddc2fSJohn David Anglin stw %r0, 8(%r26) 3446d2ddc2fSJohn David Anglin stw %r0, 12(%r26) 3456d2ddc2fSJohn David Anglin stw %r0, 16(%r26) 3466d2ddc2fSJohn David Anglin stw %r0, 20(%r26) 3476d2ddc2fSJohn David Anglin stw %r0, 24(%r26) 3486d2ddc2fSJohn David Anglin stw %r0, 28(%r26) 3496d2ddc2fSJohn David Anglin stw %r0, 32(%r26) 3506d2ddc2fSJohn David Anglin stw %r0, 36(%r26) 3516d2ddc2fSJohn David Anglin stw %r0, 40(%r26) 3526d2ddc2fSJohn David Anglin stw %r0, 44(%r26) 3536d2ddc2fSJohn David Anglin stw %r0, 48(%r26) 3546d2ddc2fSJohn David Anglin stw %r0, 52(%r26) 3556d2ddc2fSJohn David Anglin stw %r0, 56(%r26) 3566d2ddc2fSJohn David Anglin stw %r0, 60(%r26) 3576d2ddc2fSJohn David Anglin 3586d2ddc2fSJohn David Anglin addib,COND(>),n -1, %r1, 1b 3596d2ddc2fSJohn David Anglin ldo 64(%r26), %r26 3606d2ddc2fSJohn David Anglin#endif 3616d2ddc2fSJohn David Anglin bv %r0(%r2) 3626d2ddc2fSJohn David Anglin nop 363f39cce65SHelge DellerENDPROC_CFI(clear_page_asm) 3646d2ddc2fSJohn David Anglin 3656d2ddc2fSJohn David Anglin/* Copy page using kernel mapping. */ 3666d2ddc2fSJohn David Anglin 367f39cce65SHelge DellerENTRY_CFI(copy_page_asm) 368413059f2SGrant Grundler#ifdef CONFIG_64BIT 3691da177e4SLinus Torvalds /* PA8x00 CPUs can consume 2 loads or 1 store per cycle. 3701da177e4SLinus Torvalds * Unroll the loop by hand and arrange insn appropriately. 3716d2ddc2fSJohn David Anglin * Prefetch doesn't improve performance on rp3440. 3726d2ddc2fSJohn David Anglin * GCC probably can do this just as well... 3731da177e4SLinus Torvalds */ 3741da177e4SLinus Torvalds 3756ebeafffSKyle McMartin ldi (PAGE_SIZE / 128), %r1 3762fd83038SHelge Deller 3776d2ddc2fSJohn David Anglin1: ldd 0(%r25), %r19 3786d2ddc2fSJohn David Anglin ldd 8(%r25), %r20 3791da177e4SLinus Torvalds 3801da177e4SLinus Torvalds ldd 16(%r25), %r21 3811da177e4SLinus Torvalds ldd 24(%r25), %r22 3821da177e4SLinus Torvalds std %r19, 0(%r26) 3831da177e4SLinus Torvalds std %r20, 8(%r26) 3841da177e4SLinus Torvalds 3851da177e4SLinus Torvalds ldd 32(%r25), %r19 3861da177e4SLinus Torvalds ldd 40(%r25), %r20 3871da177e4SLinus Torvalds std %r21, 16(%r26) 3881da177e4SLinus Torvalds std %r22, 24(%r26) 3891da177e4SLinus Torvalds 3901da177e4SLinus Torvalds ldd 48(%r25), %r21 3911da177e4SLinus Torvalds ldd 56(%r25), %r22 3921da177e4SLinus Torvalds std %r19, 32(%r26) 3931da177e4SLinus Torvalds std %r20, 40(%r26) 3941da177e4SLinus Torvalds 3951da177e4SLinus Torvalds ldd 64(%r25), %r19 3961da177e4SLinus Torvalds ldd 72(%r25), %r20 3971da177e4SLinus Torvalds std %r21, 48(%r26) 3981da177e4SLinus Torvalds std %r22, 56(%r26) 3991da177e4SLinus Torvalds 4001da177e4SLinus Torvalds ldd 80(%r25), %r21 4011da177e4SLinus Torvalds ldd 88(%r25), %r22 4021da177e4SLinus Torvalds std %r19, 64(%r26) 4031da177e4SLinus Torvalds std %r20, 72(%r26) 4041da177e4SLinus Torvalds 4051da177e4SLinus Torvalds ldd 96(%r25), %r19 4061da177e4SLinus Torvalds ldd 104(%r25), %r20 4071da177e4SLinus Torvalds std %r21, 80(%r26) 4081da177e4SLinus Torvalds std %r22, 88(%r26) 4091da177e4SLinus Torvalds 4101da177e4SLinus Torvalds ldd 112(%r25), %r21 4111da177e4SLinus Torvalds ldd 120(%r25), %r22 4126d2ddc2fSJohn David Anglin ldo 128(%r25), %r25 4131da177e4SLinus Torvalds std %r19, 96(%r26) 4141da177e4SLinus Torvalds std %r20, 104(%r26) 4151da177e4SLinus Torvalds 4161da177e4SLinus Torvalds std %r21, 112(%r26) 4171da177e4SLinus Torvalds std %r22, 120(%r26) 4181da177e4SLinus Torvalds 4196d2ddc2fSJohn David Anglin /* Note reverse branch hint for addib is taken. */ 4206d2ddc2fSJohn David Anglin addib,COND(>),n -1, %r1, 1b 4216d2ddc2fSJohn David Anglin ldo 128(%r26), %r26 4221da177e4SLinus Torvalds 4231da177e4SLinus Torvalds#else 4241da177e4SLinus Torvalds 4251da177e4SLinus Torvalds /* 4261da177e4SLinus Torvalds * This loop is optimized for PCXL/PCXL2 ldw/ldw and stw/stw 4271da177e4SLinus Torvalds * bundles (very restricted rules for bundling). 4281da177e4SLinus Torvalds * Note that until (if) we start saving 4291da177e4SLinus Torvalds * the full 64 bit register values on interrupt, we can't 4301da177e4SLinus Torvalds * use ldd/std on a 32 bit kernel. 4311da177e4SLinus Torvalds */ 43237318a3cSGrant Grundler ldw 0(%r25), %r19 4336ebeafffSKyle McMartin ldi (PAGE_SIZE / 64), %r1 4341da177e4SLinus Torvalds 4351da177e4SLinus Torvalds1: 4361da177e4SLinus Torvalds ldw 4(%r25), %r20 4371da177e4SLinus Torvalds ldw 8(%r25), %r21 4381da177e4SLinus Torvalds ldw 12(%r25), %r22 4391da177e4SLinus Torvalds stw %r19, 0(%r26) 4401da177e4SLinus Torvalds stw %r20, 4(%r26) 4411da177e4SLinus Torvalds stw %r21, 8(%r26) 4421da177e4SLinus Torvalds stw %r22, 12(%r26) 4431da177e4SLinus Torvalds ldw 16(%r25), %r19 4441da177e4SLinus Torvalds ldw 20(%r25), %r20 4451da177e4SLinus Torvalds ldw 24(%r25), %r21 4461da177e4SLinus Torvalds ldw 28(%r25), %r22 4471da177e4SLinus Torvalds stw %r19, 16(%r26) 4481da177e4SLinus Torvalds stw %r20, 20(%r26) 4491da177e4SLinus Torvalds stw %r21, 24(%r26) 4501da177e4SLinus Torvalds stw %r22, 28(%r26) 4511da177e4SLinus Torvalds ldw 32(%r25), %r19 4521da177e4SLinus Torvalds ldw 36(%r25), %r20 4531da177e4SLinus Torvalds ldw 40(%r25), %r21 4541da177e4SLinus Torvalds ldw 44(%r25), %r22 4551da177e4SLinus Torvalds stw %r19, 32(%r26) 4561da177e4SLinus Torvalds stw %r20, 36(%r26) 4571da177e4SLinus Torvalds stw %r21, 40(%r26) 4581da177e4SLinus Torvalds stw %r22, 44(%r26) 4591da177e4SLinus Torvalds ldw 48(%r25), %r19 4601da177e4SLinus Torvalds ldw 52(%r25), %r20 4611da177e4SLinus Torvalds ldw 56(%r25), %r21 4621da177e4SLinus Torvalds ldw 60(%r25), %r22 4631da177e4SLinus Torvalds stw %r19, 48(%r26) 4641da177e4SLinus Torvalds stw %r20, 52(%r26) 46537318a3cSGrant Grundler ldo 64(%r25), %r25 4661da177e4SLinus Torvalds stw %r21, 56(%r26) 4671da177e4SLinus Torvalds stw %r22, 60(%r26) 4681da177e4SLinus Torvalds ldo 64(%r26), %r26 469872f6debSKyle McMartin addib,COND(>),n -1, %r1, 1b 47037318a3cSGrant Grundler ldw 0(%r25), %r19 4711da177e4SLinus Torvalds#endif 4721da177e4SLinus Torvalds bv %r0(%r2) 4731da177e4SLinus Torvalds nop 474f39cce65SHelge DellerENDPROC_CFI(copy_page_asm) 4751da177e4SLinus Torvalds 4761da177e4SLinus Torvalds/* 4771da177e4SLinus Torvalds * NOTE: Code in clear_user_page has a hard coded dependency on the 4781da177e4SLinus Torvalds * maximum alias boundary being 4 Mb. We've been assured by the 4791da177e4SLinus Torvalds * parisc chip designers that there will not ever be a parisc 4801da177e4SLinus Torvalds * chip with a larger alias boundary (Never say never :-) ). 4811da177e4SLinus Torvalds * 4821da177e4SLinus Torvalds * Subtle: the dtlb miss handlers support the temp alias region by 4831da177e4SLinus Torvalds * "knowing" that if a dtlb miss happens within the temp alias 4841da177e4SLinus Torvalds * region it must have occurred while in clear_user_page. Since 4851da177e4SLinus Torvalds * this routine makes use of processor local translations, we 4861da177e4SLinus Torvalds * don't want to insert them into the kernel page table. Instead, 4871da177e4SLinus Torvalds * we load up some general registers (they need to be registers 4881da177e4SLinus Torvalds * which aren't shadowed) with the physical page numbers (preshifted 4891da177e4SLinus Torvalds * for tlb insertion) needed to insert the translations. When we 4901da177e4SLinus Torvalds * miss on the translation, the dtlb miss handler inserts the 4911da177e4SLinus Torvalds * translation into the tlb using these values: 4921da177e4SLinus Torvalds * 4931da177e4SLinus Torvalds * %r26 physical page (shifted for tlb insert) of "to" translation 4941da177e4SLinus Torvalds * %r23 physical page (shifted for tlb insert) of "from" translation 4951da177e4SLinus Torvalds */ 4961da177e4SLinus Torvalds 4976a45716aSHelge Deller /* Drop prot bits and convert to page addr for iitlbt and idtlbt */ 4986a45716aSHelge Deller #define PAGE_ADD_SHIFT (PAGE_SHIFT-12) 4996a45716aSHelge Deller .macro convert_phys_for_tlb_insert20 phys 5006a45716aSHelge Deller extrd,u \phys, 56-PAGE_ADD_SHIFT, 32-PAGE_ADD_SHIFT, \phys 5016a45716aSHelge Deller#if _PAGE_SIZE_ENCODING_DEFAULT 5026a45716aSHelge Deller depdi _PAGE_SIZE_ENCODING_DEFAULT, 63, (63-58), \phys 5036a45716aSHelge Deller#endif 5046a45716aSHelge Deller .endm 5056a45716aSHelge Deller 5061da177e4SLinus Torvalds /* 507910a8643SJohn David Anglin * copy_user_page_asm() performs a page copy using mappings 508910a8643SJohn David Anglin * equivalent to the user page mappings. It can be used to 509910a8643SJohn David Anglin * implement copy_user_page() but unfortunately both the `from' 510910a8643SJohn David Anglin * and `to' pages need to be flushed through mappings equivalent 511910a8643SJohn David Anglin * to the user mappings after the copy because the kernel accesses 512910a8643SJohn David Anglin * the `from' page through the kmap kernel mapping and the `to' 513910a8643SJohn David Anglin * page needs to be flushed since code can be copied. As a 514910a8643SJohn David Anglin * result, this implementation is less efficient than the simpler 515910a8643SJohn David Anglin * copy using the kernel mapping. It only needs the `from' page 516910a8643SJohn David Anglin * to flushed via the user mapping. The kunmap routines handle 517910a8643SJohn David Anglin * the flushes needed for the kernel mapping. 5181da177e4SLinus Torvalds * 5191da177e4SLinus Torvalds * I'm still keeping this around because it may be possible to 5201da177e4SLinus Torvalds * use it if more information is passed into copy_user_page(). 5211da177e4SLinus Torvalds * Have to do some measurements to see if it is worthwhile to 5221da177e4SLinus Torvalds * lobby for such a change. 5236d2ddc2fSJohn David Anglin * 5241da177e4SLinus Torvalds */ 5251da177e4SLinus Torvalds 526f39cce65SHelge DellerENTRY_CFI(copy_user_page_asm) 5276d2ddc2fSJohn David Anglin /* Convert virtual `to' and `from' addresses to physical addresses. 5286d2ddc2fSJohn David Anglin Move `from' physical address to non shadowed register. */ 5291da177e4SLinus Torvalds ldil L%(__PAGE_OFFSET), %r1 5301da177e4SLinus Torvalds sub %r26, %r1, %r26 5316d2ddc2fSJohn David Anglin sub %r25, %r1, %r23 5321da177e4SLinus Torvalds 5331da177e4SLinus Torvalds ldil L%(TMPALIAS_MAP_START), %r28 534413059f2SGrant Grundler#ifdef CONFIG_64BIT 5356d2ddc2fSJohn David Anglin#if (TMPALIAS_MAP_START >= 0x80000000) 5366d2ddc2fSJohn David Anglin depdi 0, 31,32, %r28 /* clear any sign extension */ 5376d2ddc2fSJohn David Anglin#endif 5386a45716aSHelge Deller convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 5396a45716aSHelge Deller convert_phys_for_tlb_insert20 %r23 /* convert phys addr to tlb insert format */ 5401da177e4SLinus Torvalds depd %r24,63,22, %r28 /* Form aliased virtual address 'to' */ 5416a45716aSHelge Deller depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 5421da177e4SLinus Torvalds copy %r28, %r29 5431da177e4SLinus Torvalds depdi 1, 41,1, %r29 /* Form aliased virtual address 'from' */ 5441da177e4SLinus Torvalds#else 5451da177e4SLinus Torvalds extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 5461da177e4SLinus Torvalds extrw,u %r23, 24,25, %r23 /* convert phys addr to tlb insert format */ 5471da177e4SLinus Torvalds depw %r24, 31,22, %r28 /* Form aliased virtual address 'to' */ 548d845b5fbSHelge Deller depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */ 5491da177e4SLinus Torvalds copy %r28, %r29 5501da177e4SLinus Torvalds depwi 1, 9,1, %r29 /* Form aliased virtual address 'from' */ 5511da177e4SLinus Torvalds#endif 5521da177e4SLinus Torvalds 5531da177e4SLinus Torvalds /* Purge any old translations */ 5541da177e4SLinus Torvalds 5556d2ddc2fSJohn David Anglin#ifdef CONFIG_PA20 5565035b230SJohn David Anglin pdtlb,l %r0(%r28) 5575035b230SJohn David Anglin pdtlb,l %r0(%r29) 5586d2ddc2fSJohn David Anglin#else 5593847dab7SHelge Deller0: pdtlb %r0(%r28) 5603847dab7SHelge Deller1: pdtlb %r0(%r29) 5613847dab7SHelge Deller ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB) 5623847dab7SHelge Deller ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB) 5636d2ddc2fSJohn David Anglin#endif 5641da177e4SLinus Torvalds 5656d2ddc2fSJohn David Anglin#ifdef CONFIG_64BIT 5666d2ddc2fSJohn David Anglin /* PA8x00 CPUs can consume 2 loads or 1 store per cycle. 5676d2ddc2fSJohn David Anglin * Unroll the loop by hand and arrange insn appropriately. 5686d2ddc2fSJohn David Anglin * GCC probably can do this just as well. 5696d2ddc2fSJohn David Anglin */ 5706d2ddc2fSJohn David Anglin 5716d2ddc2fSJohn David Anglin ldd 0(%r29), %r19 5726d2ddc2fSJohn David Anglin ldi (PAGE_SIZE / 128), %r1 5736d2ddc2fSJohn David Anglin 5746d2ddc2fSJohn David Anglin1: ldd 8(%r29), %r20 5756d2ddc2fSJohn David Anglin 5766d2ddc2fSJohn David Anglin ldd 16(%r29), %r21 5776d2ddc2fSJohn David Anglin ldd 24(%r29), %r22 5786d2ddc2fSJohn David Anglin std %r19, 0(%r28) 5796d2ddc2fSJohn David Anglin std %r20, 8(%r28) 5806d2ddc2fSJohn David Anglin 5816d2ddc2fSJohn David Anglin ldd 32(%r29), %r19 5826d2ddc2fSJohn David Anglin ldd 40(%r29), %r20 5836d2ddc2fSJohn David Anglin std %r21, 16(%r28) 5846d2ddc2fSJohn David Anglin std %r22, 24(%r28) 5856d2ddc2fSJohn David Anglin 5866d2ddc2fSJohn David Anglin ldd 48(%r29), %r21 5876d2ddc2fSJohn David Anglin ldd 56(%r29), %r22 5886d2ddc2fSJohn David Anglin std %r19, 32(%r28) 5896d2ddc2fSJohn David Anglin std %r20, 40(%r28) 5906d2ddc2fSJohn David Anglin 5916d2ddc2fSJohn David Anglin ldd 64(%r29), %r19 5926d2ddc2fSJohn David Anglin ldd 72(%r29), %r20 5936d2ddc2fSJohn David Anglin std %r21, 48(%r28) 5946d2ddc2fSJohn David Anglin std %r22, 56(%r28) 5956d2ddc2fSJohn David Anglin 5966d2ddc2fSJohn David Anglin ldd 80(%r29), %r21 5976d2ddc2fSJohn David Anglin ldd 88(%r29), %r22 5986d2ddc2fSJohn David Anglin std %r19, 64(%r28) 5996d2ddc2fSJohn David Anglin std %r20, 72(%r28) 6006d2ddc2fSJohn David Anglin 6016d2ddc2fSJohn David Anglin ldd 96(%r29), %r19 6026d2ddc2fSJohn David Anglin ldd 104(%r29), %r20 6036d2ddc2fSJohn David Anglin std %r21, 80(%r28) 6046d2ddc2fSJohn David Anglin std %r22, 88(%r28) 6056d2ddc2fSJohn David Anglin 6066d2ddc2fSJohn David Anglin ldd 112(%r29), %r21 6076d2ddc2fSJohn David Anglin ldd 120(%r29), %r22 6086d2ddc2fSJohn David Anglin std %r19, 96(%r28) 6096d2ddc2fSJohn David Anglin std %r20, 104(%r28) 6106d2ddc2fSJohn David Anglin 6116d2ddc2fSJohn David Anglin ldo 128(%r29), %r29 6126d2ddc2fSJohn David Anglin std %r21, 112(%r28) 6136d2ddc2fSJohn David Anglin std %r22, 120(%r28) 6146d2ddc2fSJohn David Anglin ldo 128(%r28), %r28 6156d2ddc2fSJohn David Anglin 6166d2ddc2fSJohn David Anglin /* conditional branches nullify on forward taken branch, and on 6176d2ddc2fSJohn David Anglin * non-taken backward branch. Note that .+4 is a backwards branch. 6186d2ddc2fSJohn David Anglin * The ldd should only get executed if the branch is taken. 6196d2ddc2fSJohn David Anglin */ 6206d2ddc2fSJohn David Anglin addib,COND(>),n -1, %r1, 1b /* bundle 10 */ 6216d2ddc2fSJohn David Anglin ldd 0(%r29), %r19 /* start next loads */ 6226d2ddc2fSJohn David Anglin 6236d2ddc2fSJohn David Anglin#else 6246d2ddc2fSJohn David Anglin ldi (PAGE_SIZE / 64), %r1 6251da177e4SLinus Torvalds 6261da177e4SLinus Torvalds /* 6271da177e4SLinus Torvalds * This loop is optimized for PCXL/PCXL2 ldw/ldw and stw/stw 6281da177e4SLinus Torvalds * bundles (very restricted rules for bundling). It probably 6291da177e4SLinus Torvalds * does OK on PCXU and better, but we could do better with 6301da177e4SLinus Torvalds * ldd/std instructions. Note that until (if) we start saving 6311da177e4SLinus Torvalds * the full 64 bit register values on interrupt, we can't 6321da177e4SLinus Torvalds * use ldd/std on a 32 bit kernel. 6331da177e4SLinus Torvalds */ 6341da177e4SLinus Torvalds 6356d2ddc2fSJohn David Anglin1: ldw 0(%r29), %r19 6361da177e4SLinus Torvalds ldw 4(%r29), %r20 6371da177e4SLinus Torvalds ldw 8(%r29), %r21 6381da177e4SLinus Torvalds ldw 12(%r29), %r22 6391da177e4SLinus Torvalds stw %r19, 0(%r28) 6401da177e4SLinus Torvalds stw %r20, 4(%r28) 6411da177e4SLinus Torvalds stw %r21, 8(%r28) 6421da177e4SLinus Torvalds stw %r22, 12(%r28) 6431da177e4SLinus Torvalds ldw 16(%r29), %r19 6441da177e4SLinus Torvalds ldw 20(%r29), %r20 6451da177e4SLinus Torvalds ldw 24(%r29), %r21 6461da177e4SLinus Torvalds ldw 28(%r29), %r22 6471da177e4SLinus Torvalds stw %r19, 16(%r28) 6481da177e4SLinus Torvalds stw %r20, 20(%r28) 6491da177e4SLinus Torvalds stw %r21, 24(%r28) 6501da177e4SLinus Torvalds stw %r22, 28(%r28) 6511da177e4SLinus Torvalds ldw 32(%r29), %r19 6521da177e4SLinus Torvalds ldw 36(%r29), %r20 6531da177e4SLinus Torvalds ldw 40(%r29), %r21 6541da177e4SLinus Torvalds ldw 44(%r29), %r22 6551da177e4SLinus Torvalds stw %r19, 32(%r28) 6561da177e4SLinus Torvalds stw %r20, 36(%r28) 6571da177e4SLinus Torvalds stw %r21, 40(%r28) 6581da177e4SLinus Torvalds stw %r22, 44(%r28) 6591da177e4SLinus Torvalds ldw 48(%r29), %r19 6601da177e4SLinus Torvalds ldw 52(%r29), %r20 6611da177e4SLinus Torvalds ldw 56(%r29), %r21 6621da177e4SLinus Torvalds ldw 60(%r29), %r22 6631da177e4SLinus Torvalds stw %r19, 48(%r28) 6641da177e4SLinus Torvalds stw %r20, 52(%r28) 6651da177e4SLinus Torvalds stw %r21, 56(%r28) 6661da177e4SLinus Torvalds stw %r22, 60(%r28) 6671da177e4SLinus Torvalds ldo 64(%r28), %r28 6686d2ddc2fSJohn David Anglin 669872f6debSKyle McMartin addib,COND(>) -1, %r1,1b 6701da177e4SLinus Torvalds ldo 64(%r29), %r29 6716d2ddc2fSJohn David Anglin#endif 6721da177e4SLinus Torvalds 6731da177e4SLinus Torvalds bv %r0(%r2) 6741da177e4SLinus Torvalds nop 675f39cce65SHelge DellerENDPROC_CFI(copy_user_page_asm) 6761da177e4SLinus Torvalds 677f39cce65SHelge DellerENTRY_CFI(clear_user_page_asm) 6781da177e4SLinus Torvalds tophys_r1 %r26 6791da177e4SLinus Torvalds 6801da177e4SLinus Torvalds ldil L%(TMPALIAS_MAP_START), %r28 681413059f2SGrant Grundler#ifdef CONFIG_64BIT 6821da177e4SLinus Torvalds#if (TMPALIAS_MAP_START >= 0x80000000) 6831da177e4SLinus Torvalds depdi 0, 31,32, %r28 /* clear any sign extension */ 6841da177e4SLinus Torvalds#endif 6856a45716aSHelge Deller convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 6861da177e4SLinus Torvalds depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 6876a45716aSHelge Deller depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 6881da177e4SLinus Torvalds#else 6891da177e4SLinus Torvalds extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 6901da177e4SLinus Torvalds depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 691d845b5fbSHelge Deller depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */ 6921da177e4SLinus Torvalds#endif 6931da177e4SLinus Torvalds 6941da177e4SLinus Torvalds /* Purge any old translation */ 6951da177e4SLinus Torvalds 6966d2ddc2fSJohn David Anglin#ifdef CONFIG_PA20 6975035b230SJohn David Anglin pdtlb,l %r0(%r28) 6986d2ddc2fSJohn David Anglin#else 6993847dab7SHelge Deller0: pdtlb %r0(%r28) 7003847dab7SHelge Deller ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB) 7016d2ddc2fSJohn David Anglin#endif 7021da177e4SLinus Torvalds 703413059f2SGrant Grundler#ifdef CONFIG_64BIT 7046ebeafffSKyle McMartin ldi (PAGE_SIZE / 128), %r1 7051da177e4SLinus Torvalds 7061da177e4SLinus Torvalds /* PREFETCH (Write) has not (yet) been proven to help here */ 7071da177e4SLinus Torvalds /* #define PREFETCHW_OP ldd 256(%0), %r0 */ 7081da177e4SLinus Torvalds 7091da177e4SLinus Torvalds1: std %r0, 0(%r28) 7101da177e4SLinus Torvalds std %r0, 8(%r28) 7111da177e4SLinus Torvalds std %r0, 16(%r28) 7121da177e4SLinus Torvalds std %r0, 24(%r28) 7131da177e4SLinus Torvalds std %r0, 32(%r28) 7141da177e4SLinus Torvalds std %r0, 40(%r28) 7151da177e4SLinus Torvalds std %r0, 48(%r28) 7161da177e4SLinus Torvalds std %r0, 56(%r28) 7171da177e4SLinus Torvalds std %r0, 64(%r28) 7181da177e4SLinus Torvalds std %r0, 72(%r28) 7191da177e4SLinus Torvalds std %r0, 80(%r28) 7201da177e4SLinus Torvalds std %r0, 88(%r28) 7211da177e4SLinus Torvalds std %r0, 96(%r28) 7221da177e4SLinus Torvalds std %r0, 104(%r28) 7231da177e4SLinus Torvalds std %r0, 112(%r28) 7241da177e4SLinus Torvalds std %r0, 120(%r28) 725872f6debSKyle McMartin addib,COND(>) -1, %r1, 1b 7261da177e4SLinus Torvalds ldo 128(%r28), %r28 7271da177e4SLinus Torvalds 728413059f2SGrant Grundler#else /* ! CONFIG_64BIT */ 7296ebeafffSKyle McMartin ldi (PAGE_SIZE / 64), %r1 7301da177e4SLinus Torvalds 7316d2ddc2fSJohn David Anglin1: stw %r0, 0(%r28) 7321da177e4SLinus Torvalds stw %r0, 4(%r28) 7331da177e4SLinus Torvalds stw %r0, 8(%r28) 7341da177e4SLinus Torvalds stw %r0, 12(%r28) 7351da177e4SLinus Torvalds stw %r0, 16(%r28) 7361da177e4SLinus Torvalds stw %r0, 20(%r28) 7371da177e4SLinus Torvalds stw %r0, 24(%r28) 7381da177e4SLinus Torvalds stw %r0, 28(%r28) 7391da177e4SLinus Torvalds stw %r0, 32(%r28) 7401da177e4SLinus Torvalds stw %r0, 36(%r28) 7411da177e4SLinus Torvalds stw %r0, 40(%r28) 7421da177e4SLinus Torvalds stw %r0, 44(%r28) 7431da177e4SLinus Torvalds stw %r0, 48(%r28) 7441da177e4SLinus Torvalds stw %r0, 52(%r28) 7451da177e4SLinus Torvalds stw %r0, 56(%r28) 7461da177e4SLinus Torvalds stw %r0, 60(%r28) 747872f6debSKyle McMartin addib,COND(>) -1, %r1, 1b 7481da177e4SLinus Torvalds ldo 64(%r28), %r28 749413059f2SGrant Grundler#endif /* CONFIG_64BIT */ 7501da177e4SLinus Torvalds 7511da177e4SLinus Torvalds bv %r0(%r2) 7521da177e4SLinus Torvalds nop 753f39cce65SHelge DellerENDPROC_CFI(clear_user_page_asm) 7541da177e4SLinus Torvalds 755f39cce65SHelge DellerENTRY_CFI(flush_dcache_page_asm) 756f311847cSJames Bottomley ldil L%(TMPALIAS_MAP_START), %r28 757f311847cSJames Bottomley#ifdef CONFIG_64BIT 758f311847cSJames Bottomley#if (TMPALIAS_MAP_START >= 0x80000000) 759f311847cSJames Bottomley depdi 0, 31,32, %r28 /* clear any sign extension */ 760f311847cSJames Bottomley#endif 7616a45716aSHelge Deller convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 762f311847cSJames Bottomley depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 7636a45716aSHelge Deller depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 764f311847cSJames Bottomley#else 765f311847cSJames Bottomley extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 766f311847cSJames Bottomley depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 767d845b5fbSHelge Deller depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */ 768f311847cSJames Bottomley#endif 769f311847cSJames Bottomley 770f311847cSJames Bottomley /* Purge any old translation */ 771f311847cSJames Bottomley 7726d2ddc2fSJohn David Anglin#ifdef CONFIG_PA20 7735035b230SJohn David Anglin pdtlb,l %r0(%r28) 7746d2ddc2fSJohn David Anglin#else 7753847dab7SHelge Deller0: pdtlb %r0(%r28) 7763847dab7SHelge Deller ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB) 7776d2ddc2fSJohn David Anglin#endif 778f311847cSJames Bottomley 7793847dab7SHelge Deller88: ldil L%dcache_stride, %r1 780d65ea48dSJohn David Anglin ldw R%dcache_stride(%r1), r31 781f311847cSJames Bottomley 782f311847cSJames Bottomley#ifdef CONFIG_64BIT 783f311847cSJames Bottomley depdi,z 1, 63-PAGE_SHIFT,1, %r25 784f311847cSJames Bottomley#else 785f311847cSJames Bottomley depwi,z 1, 31-PAGE_SHIFT,1, %r25 786f311847cSJames Bottomley#endif 787f311847cSJames Bottomley add %r28, %r25, %r25 788d65ea48dSJohn David Anglin sub %r25, r31, %r25 789f311847cSJames Bottomley 790d65ea48dSJohn David Anglin1: fdc,m r31(%r28) 791d65ea48dSJohn David Anglin fdc,m r31(%r28) 792d65ea48dSJohn David Anglin fdc,m r31(%r28) 793d65ea48dSJohn David Anglin fdc,m r31(%r28) 794d65ea48dSJohn David Anglin fdc,m r31(%r28) 795d65ea48dSJohn David Anglin fdc,m r31(%r28) 796d65ea48dSJohn David Anglin fdc,m r31(%r28) 797d65ea48dSJohn David Anglin fdc,m r31(%r28) 798d65ea48dSJohn David Anglin fdc,m r31(%r28) 799d65ea48dSJohn David Anglin fdc,m r31(%r28) 800d65ea48dSJohn David Anglin fdc,m r31(%r28) 801d65ea48dSJohn David Anglin fdc,m r31(%r28) 802d65ea48dSJohn David Anglin fdc,m r31(%r28) 803d65ea48dSJohn David Anglin fdc,m r31(%r28) 804d65ea48dSJohn David Anglin fdc,m r31(%r28) 8054c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r28, 1b /* predict taken */ 806d65ea48dSJohn David Anglin fdc,m r31(%r28) 807f311847cSJames Bottomley 8083847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 809f311847cSJames Bottomley sync 810f311847cSJames Bottomley bv %r0(%r2) 8116d2ddc2fSJohn David Anglin nop 812f39cce65SHelge DellerENDPROC_CFI(flush_dcache_page_asm) 813f311847cSJames Bottomley 8144c5fe5dbSJohn David AnglinENTRY_CFI(purge_dcache_page_asm) 8154c5fe5dbSJohn David Anglin ldil L%(TMPALIAS_MAP_START), %r28 8164c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 8174c5fe5dbSJohn David Anglin#if (TMPALIAS_MAP_START >= 0x80000000) 8184c5fe5dbSJohn David Anglin depdi 0, 31,32, %r28 /* clear any sign extension */ 8194c5fe5dbSJohn David Anglin#endif 8204c5fe5dbSJohn David Anglin convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 8214c5fe5dbSJohn David Anglin depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 8224c5fe5dbSJohn David Anglin depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 8234c5fe5dbSJohn David Anglin#else 8244c5fe5dbSJohn David Anglin extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 8254c5fe5dbSJohn David Anglin depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 8264c5fe5dbSJohn David Anglin depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */ 8274c5fe5dbSJohn David Anglin#endif 8284c5fe5dbSJohn David Anglin 8294c5fe5dbSJohn David Anglin /* Purge any old translation */ 8304c5fe5dbSJohn David Anglin 8314c5fe5dbSJohn David Anglin#ifdef CONFIG_PA20 8324c5fe5dbSJohn David Anglin pdtlb,l %r0(%r28) 8334c5fe5dbSJohn David Anglin#else 8344c5fe5dbSJohn David Anglin0: pdtlb %r0(%r28) 8354c5fe5dbSJohn David Anglin ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB) 8364c5fe5dbSJohn David Anglin#endif 8374c5fe5dbSJohn David Anglin 8384c5fe5dbSJohn David Anglin88: ldil L%dcache_stride, %r1 8394c5fe5dbSJohn David Anglin ldw R%dcache_stride(%r1), r31 8404c5fe5dbSJohn David Anglin 8414c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 8424c5fe5dbSJohn David Anglin depdi,z 1, 63-PAGE_SHIFT,1, %r25 8434c5fe5dbSJohn David Anglin#else 8444c5fe5dbSJohn David Anglin depwi,z 1, 31-PAGE_SHIFT,1, %r25 8454c5fe5dbSJohn David Anglin#endif 8464c5fe5dbSJohn David Anglin add %r28, %r25, %r25 8474c5fe5dbSJohn David Anglin sub %r25, r31, %r25 8484c5fe5dbSJohn David Anglin 8494c5fe5dbSJohn David Anglin1: pdc,m r31(%r28) 8504c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8514c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8524c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8534c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8544c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8554c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8564c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8574c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8584c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8594c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8604c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8614c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8624c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8634c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8644c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r28, 1b /* predict taken */ 8654c5fe5dbSJohn David Anglin pdc,m r31(%r28) 8664c5fe5dbSJohn David Anglin 8674c5fe5dbSJohn David Anglin89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 8684c5fe5dbSJohn David Anglin sync 8694c5fe5dbSJohn David Anglin bv %r0(%r2) 8704c5fe5dbSJohn David Anglin nop 8714c5fe5dbSJohn David AnglinENDPROC_CFI(purge_dcache_page_asm) 8724c5fe5dbSJohn David Anglin 873f39cce65SHelge DellerENTRY_CFI(flush_icache_page_asm) 874f311847cSJames Bottomley ldil L%(TMPALIAS_MAP_START), %r28 875f311847cSJames Bottomley#ifdef CONFIG_64BIT 876f311847cSJames Bottomley#if (TMPALIAS_MAP_START >= 0x80000000) 877f311847cSJames Bottomley depdi 0, 31,32, %r28 /* clear any sign extension */ 878f311847cSJames Bottomley#endif 8796a45716aSHelge Deller convert_phys_for_tlb_insert20 %r26 /* convert phys addr to tlb insert format */ 880f311847cSJames Bottomley depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ 8816a45716aSHelge Deller depdi 0, 63,PAGE_SHIFT, %r28 /* Clear any offset bits */ 882f311847cSJames Bottomley#else 883f311847cSJames Bottomley extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ 884f311847cSJames Bottomley depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ 885d845b5fbSHelge Deller depwi 0, 31,PAGE_SHIFT, %r28 /* Clear any offset bits */ 886f311847cSJames Bottomley#endif 887f311847cSJames Bottomley 8885035b230SJohn David Anglin /* Purge any old translation. Note that the FIC instruction 8895035b230SJohn David Anglin * may use either the instruction or data TLB. Given that we 8905035b230SJohn David Anglin * have a flat address space, it's not clear which TLB will be 8915035b230SJohn David Anglin * used. So, we purge both entries. */ 892f311847cSJames Bottomley 8936d2ddc2fSJohn David Anglin#ifdef CONFIG_PA20 8945035b230SJohn David Anglin pdtlb,l %r0(%r28) 8953847dab7SHelge Deller1: pitlb,l %r0(%sr4,%r28) 8963847dab7SHelge Deller ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP) 8976d2ddc2fSJohn David Anglin#else 8983847dab7SHelge Deller0: pdtlb %r0(%r28) 8993847dab7SHelge Deller1: pitlb %r0(%sr4,%r28) 9003847dab7SHelge Deller ALTERNATIVE(0b, 0b+4, ALT_COND_NO_SMP, INSN_PxTLB) 9013847dab7SHelge Deller ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SMP, INSN_PxTLB) 9023847dab7SHelge Deller ALTERNATIVE(1b, 1b+4, ALT_COND_NO_SPLIT_TLB, INSN_NOP) 9036d2ddc2fSJohn David Anglin#endif 904f311847cSJames Bottomley 9053847dab7SHelge Deller88: ldil L%icache_stride, %r1 906d65ea48dSJohn David Anglin ldw R%icache_stride(%r1), %r31 907f311847cSJames Bottomley 908f311847cSJames Bottomley#ifdef CONFIG_64BIT 909f311847cSJames Bottomley depdi,z 1, 63-PAGE_SHIFT,1, %r25 910f311847cSJames Bottomley#else 911f311847cSJames Bottomley depwi,z 1, 31-PAGE_SHIFT,1, %r25 912f311847cSJames Bottomley#endif 913f311847cSJames Bottomley add %r28, %r25, %r25 914d65ea48dSJohn David Anglin sub %r25, %r31, %r25 915f311847cSJames Bottomley 916207f583dSJohn David Anglin /* fic only has the type 26 form on PA1.1, requiring an 917207f583dSJohn David Anglin * explicit space specification, so use %sr4 */ 918d65ea48dSJohn David Anglin1: fic,m %r31(%sr4,%r28) 919d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 920d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 921d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 922d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 923d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 924d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 925d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 926d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 927d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 928d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 929d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 930d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 931d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 932d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 9334c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r28, 1b /* predict taken */ 934d65ea48dSJohn David Anglin fic,m %r31(%sr4,%r28) 935f311847cSJames Bottomley 9363847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP) 937f311847cSJames Bottomley sync 9386d2ddc2fSJohn David Anglin bv %r0(%r2) 9396d2ddc2fSJohn David Anglin nop 940f39cce65SHelge DellerENDPROC_CFI(flush_icache_page_asm) 941f311847cSJames Bottomley 942f39cce65SHelge DellerENTRY_CFI(flush_kernel_dcache_page_asm) 9433847dab7SHelge Deller88: ldil L%dcache_stride, %r1 9441da177e4SLinus Torvalds ldw R%dcache_stride(%r1), %r23 9451da177e4SLinus Torvalds 946413059f2SGrant Grundler#ifdef CONFIG_64BIT 9471da177e4SLinus Torvalds depdi,z 1, 63-PAGE_SHIFT,1, %r25 9481da177e4SLinus Torvalds#else 9491da177e4SLinus Torvalds depwi,z 1, 31-PAGE_SHIFT,1, %r25 9501da177e4SLinus Torvalds#endif 9511da177e4SLinus Torvalds add %r26, %r25, %r25 9521da177e4SLinus Torvalds sub %r25, %r23, %r25 9531da177e4SLinus Torvalds 9541da177e4SLinus Torvalds1: fdc,m %r23(%r26) 9551da177e4SLinus Torvalds fdc,m %r23(%r26) 9561da177e4SLinus Torvalds fdc,m %r23(%r26) 9571da177e4SLinus Torvalds fdc,m %r23(%r26) 9581da177e4SLinus Torvalds fdc,m %r23(%r26) 9591da177e4SLinus Torvalds fdc,m %r23(%r26) 9601da177e4SLinus Torvalds fdc,m %r23(%r26) 9611da177e4SLinus Torvalds fdc,m %r23(%r26) 9621da177e4SLinus Torvalds fdc,m %r23(%r26) 9631da177e4SLinus Torvalds fdc,m %r23(%r26) 9641da177e4SLinus Torvalds fdc,m %r23(%r26) 9651da177e4SLinus Torvalds fdc,m %r23(%r26) 9661da177e4SLinus Torvalds fdc,m %r23(%r26) 9671da177e4SLinus Torvalds fdc,m %r23(%r26) 9681da177e4SLinus Torvalds fdc,m %r23(%r26) 9694c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r26, 1b /* predict taken */ 9701da177e4SLinus Torvalds fdc,m %r23(%r26) 9711da177e4SLinus Torvalds 9723847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 9731da177e4SLinus Torvalds sync 9741da177e4SLinus Torvalds bv %r0(%r2) 9751da177e4SLinus Torvalds nop 976f39cce65SHelge DellerENDPROC_CFI(flush_kernel_dcache_page_asm) 9771da177e4SLinus Torvalds 978f39cce65SHelge DellerENTRY_CFI(purge_kernel_dcache_page_asm) 9793847dab7SHelge Deller88: ldil L%dcache_stride, %r1 9801da177e4SLinus Torvalds ldw R%dcache_stride(%r1), %r23 9811da177e4SLinus Torvalds 982413059f2SGrant Grundler#ifdef CONFIG_64BIT 9831da177e4SLinus Torvalds depdi,z 1, 63-PAGE_SHIFT,1, %r25 9841da177e4SLinus Torvalds#else 9851da177e4SLinus Torvalds depwi,z 1, 31-PAGE_SHIFT,1, %r25 9861da177e4SLinus Torvalds#endif 9871da177e4SLinus Torvalds add %r26, %r25, %r25 9881da177e4SLinus Torvalds sub %r25, %r23, %r25 9891da177e4SLinus Torvalds 9901da177e4SLinus Torvalds1: pdc,m %r23(%r26) 9911da177e4SLinus Torvalds pdc,m %r23(%r26) 9921da177e4SLinus Torvalds pdc,m %r23(%r26) 9931da177e4SLinus Torvalds pdc,m %r23(%r26) 9941da177e4SLinus Torvalds pdc,m %r23(%r26) 9951da177e4SLinus Torvalds pdc,m %r23(%r26) 9961da177e4SLinus Torvalds pdc,m %r23(%r26) 9971da177e4SLinus Torvalds pdc,m %r23(%r26) 9981da177e4SLinus Torvalds pdc,m %r23(%r26) 9991da177e4SLinus Torvalds pdc,m %r23(%r26) 10001da177e4SLinus Torvalds pdc,m %r23(%r26) 10011da177e4SLinus Torvalds pdc,m %r23(%r26) 10021da177e4SLinus Torvalds pdc,m %r23(%r26) 10031da177e4SLinus Torvalds pdc,m %r23(%r26) 10041da177e4SLinus Torvalds pdc,m %r23(%r26) 10054c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r26, 1b /* predict taken */ 10061da177e4SLinus Torvalds pdc,m %r23(%r26) 10071da177e4SLinus Torvalds 10083847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 10091da177e4SLinus Torvalds sync 10101da177e4SLinus Torvalds bv %r0(%r2) 10111da177e4SLinus Torvalds nop 1012f39cce65SHelge DellerENDPROC_CFI(purge_kernel_dcache_page_asm) 10131da177e4SLinus Torvalds 1014f39cce65SHelge DellerENTRY_CFI(flush_user_dcache_range_asm) 10153847dab7SHelge Deller88: ldil L%dcache_stride, %r1 10161da177e4SLinus Torvalds ldw R%dcache_stride(%r1), %r23 10171da177e4SLinus Torvalds ldo -1(%r23), %r21 10181da177e4SLinus Torvalds ANDCM %r26, %r21, %r26 10191da177e4SLinus Torvalds 10204c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 10214c5fe5dbSJohn David Anglin depd,z %r23, 59, 60, %r21 10224c5fe5dbSJohn David Anglin#else 10234c5fe5dbSJohn David Anglin depw,z %r23, 27, 28, %r21 10244c5fe5dbSJohn David Anglin#endif 10254c5fe5dbSJohn David Anglin add %r26, %r21, %r22 10264c5fe5dbSJohn David Anglin cmpb,COND(>>),n %r22, %r25, 2f /* predict not taken */ 10274c5fe5dbSJohn David Anglin1: add %r22, %r21, %r22 10284c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10294c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10304c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10314c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10324c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10334c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10344c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10354c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10364c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10374c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10384c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10394c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10404c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10414c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10424c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10434c5fe5dbSJohn David Anglin cmpb,COND(<<=) %r22, %r25, 1b /* predict taken */ 10444c5fe5dbSJohn David Anglin fdc,m %r23(%sr3, %r26) 10454c5fe5dbSJohn David Anglin 10464c5fe5dbSJohn David Anglin2: cmpb,COND(>>),n %r25, %r26, 2b 10471da177e4SLinus Torvalds fdc,m %r23(%sr3, %r26) 10481da177e4SLinus Torvalds 10493847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 10501da177e4SLinus Torvalds sync 10511da177e4SLinus Torvalds bv %r0(%r2) 10521da177e4SLinus Torvalds nop 1053f39cce65SHelge DellerENDPROC_CFI(flush_user_dcache_range_asm) 10541da177e4SLinus Torvalds 1055f39cce65SHelge DellerENTRY_CFI(flush_kernel_dcache_range_asm) 10563847dab7SHelge Deller88: ldil L%dcache_stride, %r1 10571da177e4SLinus Torvalds ldw R%dcache_stride(%r1), %r23 10581da177e4SLinus Torvalds ldo -1(%r23), %r21 10591da177e4SLinus Torvalds ANDCM %r26, %r21, %r26 10601da177e4SLinus Torvalds 10614c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 10624c5fe5dbSJohn David Anglin depd,z %r23, 59, 60, %r21 10634c5fe5dbSJohn David Anglin#else 10644c5fe5dbSJohn David Anglin depw,z %r23, 27, 28, %r21 10654c5fe5dbSJohn David Anglin#endif 10664c5fe5dbSJohn David Anglin add %r26, %r21, %r22 10674c5fe5dbSJohn David Anglin cmpb,COND(>>),n %r22, %r25, 2f /* predict not taken */ 10684c5fe5dbSJohn David Anglin1: add %r22, %r21, %r22 10694c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10704c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10714c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10724c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10734c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10744c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10754c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10764c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10774c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10784c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10794c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10804c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10814c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10824c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10834c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10844c5fe5dbSJohn David Anglin cmpb,COND(<<=) %r22, %r25, 1b /* predict taken */ 10854c5fe5dbSJohn David Anglin fdc,m %r23(%r26) 10864c5fe5dbSJohn David Anglin 10874c5fe5dbSJohn David Anglin2: cmpb,COND(>>),n %r25, %r26, 2b /* predict taken */ 10881da177e4SLinus Torvalds fdc,m %r23(%r26) 10891da177e4SLinus Torvalds 10901da177e4SLinus Torvalds sync 10913847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 10921da177e4SLinus Torvalds syncdma 10931da177e4SLinus Torvalds bv %r0(%r2) 10941da177e4SLinus Torvalds nop 1095f39cce65SHelge DellerENDPROC_CFI(flush_kernel_dcache_range_asm) 10961da177e4SLinus Torvalds 10970adb24e0SJohn David AnglinENTRY_CFI(purge_kernel_dcache_range_asm) 10983847dab7SHelge Deller88: ldil L%dcache_stride, %r1 10990adb24e0SJohn David Anglin ldw R%dcache_stride(%r1), %r23 11000adb24e0SJohn David Anglin ldo -1(%r23), %r21 11010adb24e0SJohn David Anglin ANDCM %r26, %r21, %r26 11020adb24e0SJohn David Anglin 11034c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 11044c5fe5dbSJohn David Anglin depd,z %r23, 59, 60, %r21 11054c5fe5dbSJohn David Anglin#else 11064c5fe5dbSJohn David Anglin depw,z %r23, 27, 28, %r21 11074c5fe5dbSJohn David Anglin#endif 11084c5fe5dbSJohn David Anglin add %r26, %r21, %r22 11094c5fe5dbSJohn David Anglin cmpb,COND(>>),n %r22, %r25, 2f /* predict not taken */ 11104c5fe5dbSJohn David Anglin1: add %r22, %r21, %r22 11114c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11124c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11134c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11144c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11154c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11164c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11174c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11184c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11194c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11204c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11214c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11224c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11234c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11244c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11254c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11264c5fe5dbSJohn David Anglin cmpb,COND(<<=) %r22, %r25, 1b /* predict taken */ 11274c5fe5dbSJohn David Anglin pdc,m %r23(%r26) 11284c5fe5dbSJohn David Anglin 11294c5fe5dbSJohn David Anglin2: cmpb,COND(>>),n %r25, %r26, 2b /* predict taken */ 11300adb24e0SJohn David Anglin pdc,m %r23(%r26) 11310adb24e0SJohn David Anglin 11320adb24e0SJohn David Anglin sync 11333847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_DCACHE, INSN_NOP) 11340adb24e0SJohn David Anglin syncdma 11350adb24e0SJohn David Anglin bv %r0(%r2) 11360adb24e0SJohn David Anglin nop 11370adb24e0SJohn David AnglinENDPROC_CFI(purge_kernel_dcache_range_asm) 11380adb24e0SJohn David Anglin 1139f39cce65SHelge DellerENTRY_CFI(flush_user_icache_range_asm) 11403847dab7SHelge Deller88: ldil L%icache_stride, %r1 11411da177e4SLinus Torvalds ldw R%icache_stride(%r1), %r23 11421da177e4SLinus Torvalds ldo -1(%r23), %r21 11431da177e4SLinus Torvalds ANDCM %r26, %r21, %r26 11441da177e4SLinus Torvalds 11454c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 11464c5fe5dbSJohn David Anglin depd,z %r23, 59, 60, %r21 11474c5fe5dbSJohn David Anglin#else 11484c5fe5dbSJohn David Anglin depw,z %r23, 27, 28, %r21 11494c5fe5dbSJohn David Anglin#endif 11504c5fe5dbSJohn David Anglin add %r26, %r21, %r22 11514c5fe5dbSJohn David Anglin cmpb,COND(>>),n %r22, %r25, 2f /* predict not taken */ 11524c5fe5dbSJohn David Anglin1: add %r22, %r21, %r22 11534c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11544c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11554c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11564c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11574c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11584c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11594c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11604c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11614c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11624c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11634c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11644c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11654c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11664c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11674c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11684c5fe5dbSJohn David Anglin cmpb,COND(<<=) %r22, %r25, 1b /* predict taken */ 11694c5fe5dbSJohn David Anglin fic,m %r23(%sr3, %r26) 11704c5fe5dbSJohn David Anglin 11714c5fe5dbSJohn David Anglin2: cmpb,COND(>>),n %r25, %r26, 2b 11721da177e4SLinus Torvalds fic,m %r23(%sr3, %r26) 11731da177e4SLinus Torvalds 11743847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP) 11751da177e4SLinus Torvalds sync 11761da177e4SLinus Torvalds bv %r0(%r2) 11771da177e4SLinus Torvalds nop 1178f39cce65SHelge DellerENDPROC_CFI(flush_user_icache_range_asm) 11791da177e4SLinus Torvalds 1180f39cce65SHelge DellerENTRY_CFI(flush_kernel_icache_page) 11813847dab7SHelge Deller88: ldil L%icache_stride, %r1 11821da177e4SLinus Torvalds ldw R%icache_stride(%r1), %r23 11831da177e4SLinus Torvalds 1184413059f2SGrant Grundler#ifdef CONFIG_64BIT 11851da177e4SLinus Torvalds depdi,z 1, 63-PAGE_SHIFT,1, %r25 11861da177e4SLinus Torvalds#else 11871da177e4SLinus Torvalds depwi,z 1, 31-PAGE_SHIFT,1, %r25 11881da177e4SLinus Torvalds#endif 11891da177e4SLinus Torvalds add %r26, %r25, %r25 11901da177e4SLinus Torvalds sub %r25, %r23, %r25 11911da177e4SLinus Torvalds 11921da177e4SLinus Torvalds 1193e635c96eSMatthew Wilcox1: fic,m %r23(%sr4, %r26) 1194e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1195e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1196e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1197e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1198e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1199e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1200e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1201e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1202e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1203e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1204e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1205e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1206e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 1207e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 12084c5fe5dbSJohn David Anglin cmpb,COND(>>) %r25, %r26, 1b /* predict taken */ 1209e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 12101da177e4SLinus Torvalds 12113847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP) 12121da177e4SLinus Torvalds sync 12131da177e4SLinus Torvalds bv %r0(%r2) 12141da177e4SLinus Torvalds nop 1215f39cce65SHelge DellerENDPROC_CFI(flush_kernel_icache_page) 12161da177e4SLinus Torvalds 1217f39cce65SHelge DellerENTRY_CFI(flush_kernel_icache_range_asm) 12183847dab7SHelge Deller88: ldil L%icache_stride, %r1 12191da177e4SLinus Torvalds ldw R%icache_stride(%r1), %r23 12201da177e4SLinus Torvalds ldo -1(%r23), %r21 12211da177e4SLinus Torvalds ANDCM %r26, %r21, %r26 12221da177e4SLinus Torvalds 12234c5fe5dbSJohn David Anglin#ifdef CONFIG_64BIT 12244c5fe5dbSJohn David Anglin depd,z %r23, 59, 60, %r21 12254c5fe5dbSJohn David Anglin#else 12264c5fe5dbSJohn David Anglin depw,z %r23, 27, 28, %r21 12274c5fe5dbSJohn David Anglin#endif 12284c5fe5dbSJohn David Anglin add %r26, %r21, %r22 12294c5fe5dbSJohn David Anglin cmpb,COND(>>),n %r22, %r25, 2f /* predict not taken */ 12304c5fe5dbSJohn David Anglin1: add %r22, %r21, %r22 12314c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12324c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12334c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12344c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12354c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12364c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12374c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12384c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12394c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12404c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12414c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12424c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12434c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12444c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12454c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12464c5fe5dbSJohn David Anglin cmpb,COND(<<=) %r22, %r25, 1b /* predict taken */ 12474c5fe5dbSJohn David Anglin fic,m %r23(%sr4, %r26) 12484c5fe5dbSJohn David Anglin 12494c5fe5dbSJohn David Anglin2: cmpb,COND(>>),n %r25, %r26, 2b /* predict taken */ 1250e635c96eSMatthew Wilcox fic,m %r23(%sr4, %r26) 12511da177e4SLinus Torvalds 12523847dab7SHelge Deller89: ALTERNATIVE(88b, 89b, ALT_COND_NO_ICACHE, INSN_NOP) 12531da177e4SLinus Torvalds sync 12541da177e4SLinus Torvalds bv %r0(%r2) 12551da177e4SLinus Torvalds nop 1256f39cce65SHelge DellerENDPROC_CFI(flush_kernel_icache_range_asm) 12571da177e4SLinus Torvalds 12582a03bb9eSHelge Deller __INIT 12592a03bb9eSHelge Deller 1260896a3756SGrant Grundler /* align should cover use of rfi in disable_sr_hashing_asm and 1261896a3756SGrant Grundler * srdis_done. 1262896a3756SGrant Grundler */ 1263896a3756SGrant Grundler .align 256 1264f39cce65SHelge DellerENTRY_CFI(disable_sr_hashing_asm) 1265896a3756SGrant Grundler /* 1266896a3756SGrant Grundler * Switch to real mode 1267896a3756SGrant Grundler */ 1268896a3756SGrant Grundler /* pcxt_ssm_bug */ 1269896a3756SGrant Grundler rsm PSW_SM_I, %r0 1270896a3756SGrant Grundler load32 PA(1f), %r1 12711da177e4SLinus Torvalds nop 12721da177e4SLinus Torvalds nop 12731da177e4SLinus Torvalds nop 12741da177e4SLinus Torvalds nop 12751da177e4SLinus Torvalds nop 12761da177e4SLinus Torvalds 1277896a3756SGrant Grundler rsm PSW_SM_Q, %r0 /* prep to load iia queue */ 12781da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ tail */ 12791da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ head */ 12801da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ head */ 12811da177e4SLinus Torvalds ldo 4(%r1), %r1 12821da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ tail */ 1283896a3756SGrant Grundler load32 REAL_MODE_PSW, %r1 1284896a3756SGrant Grundler mtctl %r1, %ipsw 12851da177e4SLinus Torvalds rfi 12861da177e4SLinus Torvalds nop 12871da177e4SLinus Torvalds 12881da177e4SLinus Torvalds1: cmpib,=,n SRHASH_PCXST, %r26,srdis_pcxs 12891da177e4SLinus Torvalds cmpib,=,n SRHASH_PCXL, %r26,srdis_pcxl 12901da177e4SLinus Torvalds cmpib,=,n SRHASH_PA20, %r26,srdis_pa20 12911da177e4SLinus Torvalds b,n srdis_done 12921da177e4SLinus Torvalds 12931da177e4SLinus Torvaldssrdis_pcxs: 12941da177e4SLinus Torvalds 12951da177e4SLinus Torvalds /* Disable Space Register Hashing for PCXS,PCXT,PCXT' */ 12961da177e4SLinus Torvalds 12971da177e4SLinus Torvalds .word 0x141c1a00 /* mfdiag %dr0, %r28 */ 12981da177e4SLinus Torvalds .word 0x141c1a00 /* must issue twice */ 12991da177e4SLinus Torvalds depwi 0,18,1, %r28 /* Clear DHE (dcache hash enable) */ 13001da177e4SLinus Torvalds depwi 0,20,1, %r28 /* Clear IHE (icache hash enable) */ 13011da177e4SLinus Torvalds .word 0x141c1600 /* mtdiag %r28, %dr0 */ 13021da177e4SLinus Torvalds .word 0x141c1600 /* must issue twice */ 13031da177e4SLinus Torvalds b,n srdis_done 13041da177e4SLinus Torvalds 13051da177e4SLinus Torvaldssrdis_pcxl: 13061da177e4SLinus Torvalds 13071da177e4SLinus Torvalds /* Disable Space Register Hashing for PCXL */ 13081da177e4SLinus Torvalds 13091da177e4SLinus Torvalds .word 0x141c0600 /* mfdiag %dr0, %r28 */ 13101da177e4SLinus Torvalds depwi 0,28,2, %r28 /* Clear DHASH_EN & IHASH_EN */ 13111da177e4SLinus Torvalds .word 0x141c0240 /* mtdiag %r28, %dr0 */ 13121da177e4SLinus Torvalds b,n srdis_done 13131da177e4SLinus Torvalds 13141da177e4SLinus Torvaldssrdis_pa20: 13151da177e4SLinus Torvalds 1316896a3756SGrant Grundler /* Disable Space Register Hashing for PCXU,PCXU+,PCXW,PCXW+,PCXW2 */ 13171da177e4SLinus Torvalds 13181da177e4SLinus Torvalds .word 0x144008bc /* mfdiag %dr2, %r28 */ 13191da177e4SLinus Torvalds depdi 0, 54,1, %r28 /* clear DIAG_SPHASH_ENAB (bit 54) */ 13201da177e4SLinus Torvalds .word 0x145c1840 /* mtdiag %r28, %dr2 */ 13211da177e4SLinus Torvalds 1322896a3756SGrant Grundler 13231da177e4SLinus Torvaldssrdis_done: 13241da177e4SLinus Torvalds /* Switch back to virtual mode */ 1325896a3756SGrant Grundler rsm PSW_SM_I, %r0 /* prep to load iia queue */ 1326896a3756SGrant Grundler load32 2f, %r1 1327896a3756SGrant Grundler nop 1328896a3756SGrant Grundler nop 1329896a3756SGrant Grundler nop 1330896a3756SGrant Grundler nop 1331896a3756SGrant Grundler nop 13321da177e4SLinus Torvalds 1333896a3756SGrant Grundler rsm PSW_SM_Q, %r0 /* prep to load iia queue */ 13341da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ tail */ 13351da177e4SLinus Torvalds mtctl %r0, %cr17 /* Clear IIASQ head */ 13361da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ head */ 13371da177e4SLinus Torvalds ldo 4(%r1), %r1 13381da177e4SLinus Torvalds mtctl %r1, %cr18 /* IIAOQ tail */ 1339896a3756SGrant Grundler load32 KERNEL_PSW, %r1 1340896a3756SGrant Grundler mtctl %r1, %ipsw 13411da177e4SLinus Torvalds rfi 13421da177e4SLinus Torvalds nop 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvalds2: bv %r0(%r2) 13451da177e4SLinus Torvalds nop 1346f39cce65SHelge DellerENDPROC_CFI(disable_sr_hashing_asm) 13471da177e4SLinus Torvalds 13481da177e4SLinus Torvalds .end 1349