1 /* 2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * as published by the Free Software Foundation; either version 2 7 * of the License, or (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 */ 18 #include <linux/config.h> 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/reboot.h> 22 #include <linux/string.h> 23 24 #include <asm/bootinfo.h> 25 #include <asm/mipsregs.h> 26 #include <asm/io.h> 27 #include <asm/sibyte/sb1250.h> 28 #include <asm/sibyte/sb1250_regs.h> 29 #include <asm/sibyte/sb1250_scd.h> 30 31 unsigned int sb1_pass; 32 unsigned int soc_pass; 33 unsigned int soc_type; 34 unsigned int periph_rev; 35 unsigned int zbbus_mhz; 36 37 static char *soc_str; 38 static char *pass_str; 39 static unsigned int war_pass; /* XXXKW don't overload PASS defines? */ 40 41 static inline int setup_bcm1250(void); 42 static inline int setup_bcm112x(void); 43 44 /* Setup code likely to be common to all SiByte platforms */ 45 46 static int __init sys_rev_decode(void) 47 { 48 int ret = 0; 49 50 war_pass = soc_pass; 51 switch (soc_type) { 52 case K_SYS_SOC_TYPE_BCM1250: 53 case K_SYS_SOC_TYPE_BCM1250_ALT: 54 case K_SYS_SOC_TYPE_BCM1250_ALT2: 55 soc_str = "BCM1250"; 56 ret = setup_bcm1250(); 57 break; 58 case K_SYS_SOC_TYPE_BCM1120: 59 soc_str = "BCM1120"; 60 ret = setup_bcm112x(); 61 break; 62 case K_SYS_SOC_TYPE_BCM1125: 63 soc_str = "BCM1125"; 64 ret = setup_bcm112x(); 65 break; 66 case K_SYS_SOC_TYPE_BCM1125H: 67 soc_str = "BCM1125H"; 68 ret = setup_bcm112x(); 69 break; 70 default: 71 prom_printf("Unknown SOC type %x\n", soc_type); 72 ret = 1; 73 break; 74 } 75 return ret; 76 } 77 78 static int __init setup_bcm1250(void) 79 { 80 int ret = 0; 81 82 switch (soc_pass) { 83 case K_SYS_REVISION_BCM1250_PASS1: 84 periph_rev = 1; 85 pass_str = "Pass 1"; 86 break; 87 case K_SYS_REVISION_BCM1250_A10: 88 periph_rev = 2; 89 pass_str = "A8/A10"; 90 /* XXXKW different war_pass? */ 91 war_pass = K_SYS_REVISION_BCM1250_PASS2; 92 break; 93 case K_SYS_REVISION_BCM1250_PASS2_2: 94 periph_rev = 2; 95 pass_str = "B1"; 96 break; 97 case K_SYS_REVISION_BCM1250_B2: 98 periph_rev = 2; 99 pass_str = "B2"; 100 war_pass = K_SYS_REVISION_BCM1250_PASS2_2; 101 break; 102 case K_SYS_REVISION_BCM1250_PASS3: 103 periph_rev = 3; 104 pass_str = "C0"; 105 break; 106 case K_SYS_REVISION_BCM1250_C1: 107 periph_rev = 3; 108 pass_str = "C1"; 109 break; 110 default: 111 if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) { 112 periph_rev = 2; 113 pass_str = "A0-A6"; 114 war_pass = K_SYS_REVISION_BCM1250_PASS2; 115 } else { 116 prom_printf("Unknown BCM1250 rev %x\n", soc_pass); 117 ret = 1; 118 } 119 break; 120 } 121 return ret; 122 } 123 124 static int __init setup_bcm112x(void) 125 { 126 int ret = 0; 127 128 switch (soc_pass) { 129 case 0: 130 /* Early build didn't have revid set */ 131 periph_rev = 3; 132 pass_str = "A1"; 133 war_pass = K_SYS_REVISION_BCM112x_A1; 134 break; 135 case K_SYS_REVISION_BCM112x_A1: 136 periph_rev = 3; 137 pass_str = "A1"; 138 break; 139 case K_SYS_REVISION_BCM112x_A2: 140 periph_rev = 3; 141 pass_str = "A2"; 142 break; 143 default: 144 prom_printf("Unknown %s rev %x\n", soc_str, soc_pass); 145 ret = 1; 146 } 147 return ret; 148 } 149 150 void __init sb1250_setup(void) 151 { 152 uint64_t sys_rev; 153 int plldiv; 154 int bad_config = 0; 155 156 sb1_pass = read_c0_prid() & 0xff; 157 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION)); 158 soc_type = SYS_SOC_TYPE(sys_rev); 159 soc_pass = G_SYS_REVISION(sys_rev); 160 161 if (sys_rev_decode()) { 162 prom_printf("Restart after failure to identify SiByte chip\n"); 163 machine_restart(NULL); 164 } 165 166 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG))); 167 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25); 168 169 prom_printf("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n", 170 soc_str, pass_str, zbbus_mhz * 2, sb1_pass); 171 prom_printf("Board type: %s\n", get_system_type()); 172 173 switch (war_pass) { 174 case K_SYS_REVISION_BCM1250_PASS1: 175 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS 176 prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " 177 "and the kernel doesn't have the proper " 178 "workarounds compiled in. @@@@\n"); 179 bad_config = 1; 180 #endif 181 break; 182 case K_SYS_REVISION_BCM1250_PASS2: 183 /* Pass 2 - easiest as default for now - so many numbers */ 184 #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \ 185 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) 186 prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the " 187 "kernel doesn't have the proper workarounds " 188 "compiled in. @@@@\n"); 189 bad_config = 1; 190 #endif 191 #ifdef CONFIG_CPU_HAS_PREFETCH 192 prom_printf("@@@@ Prefetches may be enabled in this kernel, " 193 "but are buggy on this board. @@@@\n"); 194 bad_config = 1; 195 #endif 196 break; 197 case K_SYS_REVISION_BCM1250_PASS2_2: 198 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS 199 prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the " 200 "kernel doesn't have the proper workarounds " 201 "compiled in. @@@@\n"); 202 bad_config = 1; 203 #endif 204 #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \ 205 !defined(CONFIG_CPU_HAS_PREFETCH) 206 prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is " 207 "conservatively configured for an 'A' stepping. " 208 "@@@@\n"); 209 #endif 210 break; 211 default: 212 break; 213 } 214 if (bad_config) { 215 prom_printf("Invalid configuration for this chip.\n"); 216 machine_restart(NULL); 217 } 218 } 219