141173abcSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2315806cbSRalf Baechle /*
3315806cbSRalf Baechle * Carsten Langgaard, carstenl@mips.com
4315806cbSRalf Baechle * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
5315806cbSRalf Baechle * Copyright (C) 2008 Dmitri Vorobiev
6315806cbSRalf Baechle */
7315806cbSRalf Baechle #include <linux/cpu.h>
8315806cbSRalf Baechle #include <linux/init.h>
9315806cbSRalf Baechle #include <linux/sched.h>
10315806cbSRalf Baechle #include <linux/ioport.h>
11315806cbSRalf Baechle #include <linux/irq.h>
12e8823d26SPaul Burton #include <linux/of_fdt.h>
13315806cbSRalf Baechle #include <linux/pci.h>
14315806cbSRalf Baechle #include <linux/screen_info.h>
15315806cbSRalf Baechle #include <linux/time.h>
166d4e9a8eSChristoph Hellwig #include <linux/dma-map-ops.h> /* for dma_default_coherent */
17315806cbSRalf Baechle
18b431f09dSSteven J. Hill #include <asm/fw/fw.h>
19e83f7e02SPaul Burton #include <asm/mips-cps.h>
20315806cbSRalf Baechle #include <asm/mips-boards/generic.h>
21315806cbSRalf Baechle #include <asm/mips-boards/malta.h>
22315806cbSRalf Baechle #include <asm/mips-boards/maltaint.h>
23315806cbSRalf Baechle #include <asm/dma.h>
24e8823d26SPaul Burton #include <asm/prom.h>
25315806cbSRalf Baechle #include <asm/traps.h>
26315806cbSRalf Baechle #ifdef CONFIG_VT
27315806cbSRalf Baechle #include <linux/console.h>
28315806cbSRalf Baechle #endif
29315806cbSRalf Baechle
30305723abSPaul Burton #define ROCIT_CONFIG_GEN0 0x1f403000
31305723abSPaul Burton #define ROCIT_CONFIG_GEN0_PCI_IOCU BIT(7)
32305723abSPaul Burton
33315806cbSRalf Baechle static struct resource standard_io_resources[] = {
34315806cbSRalf Baechle {
35315806cbSRalf Baechle .name = "dma1",
36315806cbSRalf Baechle .start = 0x00,
37315806cbSRalf Baechle .end = 0x1f,
38ead1505aSBjorn Helgaas .flags = IORESOURCE_IO | IORESOURCE_BUSY
39315806cbSRalf Baechle },
40315806cbSRalf Baechle {
41315806cbSRalf Baechle .name = "timer",
42315806cbSRalf Baechle .start = 0x40,
43315806cbSRalf Baechle .end = 0x5f,
44ead1505aSBjorn Helgaas .flags = IORESOURCE_IO | IORESOURCE_BUSY
45315806cbSRalf Baechle },
46315806cbSRalf Baechle {
47315806cbSRalf Baechle .name = "keyboard",
48315806cbSRalf Baechle .start = 0x60,
49315806cbSRalf Baechle .end = 0x6f,
50ead1505aSBjorn Helgaas .flags = IORESOURCE_IO | IORESOURCE_BUSY
51315806cbSRalf Baechle },
52315806cbSRalf Baechle {
53315806cbSRalf Baechle .name = "dma page reg",
54315806cbSRalf Baechle .start = 0x80,
55315806cbSRalf Baechle .end = 0x8f,
56ead1505aSBjorn Helgaas .flags = IORESOURCE_IO | IORESOURCE_BUSY
57315806cbSRalf Baechle },
58315806cbSRalf Baechle {
59315806cbSRalf Baechle .name = "dma2",
60315806cbSRalf Baechle .start = 0xc0,
61315806cbSRalf Baechle .end = 0xdf,
62ead1505aSBjorn Helgaas .flags = IORESOURCE_IO | IORESOURCE_BUSY
63315806cbSRalf Baechle },
64315806cbSRalf Baechle };
65315806cbSRalf Baechle
get_system_type(void)66315806cbSRalf Baechle const char *get_system_type(void)
67315806cbSRalf Baechle {
68315806cbSRalf Baechle return "MIPS Malta";
69315806cbSRalf Baechle }
70315806cbSRalf Baechle
71315806cbSRalf Baechle #ifdef CONFIG_BLK_DEV_FD
fd_activate(void)72315806cbSRalf Baechle static void __init fd_activate(void)
73315806cbSRalf Baechle {
74315806cbSRalf Baechle /*
75315806cbSRalf Baechle * Activate Floppy Controller in the SMSC FDC37M817 Super I/O
76315806cbSRalf Baechle * Controller.
77315806cbSRalf Baechle * Done by YAMON 2.00 onwards
78315806cbSRalf Baechle */
79315806cbSRalf Baechle /* Entering config state. */
80315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_ENTER, SMSC_CONFIG_REG);
81315806cbSRalf Baechle
82315806cbSRalf Baechle /* Activate floppy controller. */
83315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_DEVNUM, SMSC_CONFIG_REG);
84315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_DEVNUM_FLOPPY, SMSC_DATA_REG);
85315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_ACTIVATE, SMSC_CONFIG_REG);
86315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_ACTIVATE_ENABLE, SMSC_DATA_REG);
87315806cbSRalf Baechle
88315806cbSRalf Baechle /* Exit config state. */
89315806cbSRalf Baechle SMSC_WRITE(SMSC_CONFIG_EXIT, SMSC_CONFIG_REG);
90315806cbSRalf Baechle }
91315806cbSRalf Baechle #endif
92315806cbSRalf Baechle
plat_setup_iocoherency(void)9304e4783fSChristoph Hellwig static void __init plat_setup_iocoherency(void)
94b6d92b4aSSteven J. Hill {
95305723abSPaul Burton u32 cfg;
96305723abSPaul Burton
97b6d92b4aSSteven J. Hill if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) {
98b6d92b4aSSteven J. Hill if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) {
99b6d92b4aSSteven J. Hill BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN;
100b6d92b4aSSteven J. Hill pr_info("Enabled Bonito CPU coherency\n");
10114ac09a6SChristoph Hellwig dma_default_coherent = true;
102b6d92b4aSSteven J. Hill }
103b6d92b4aSSteven J. Hill if (strstr(fw_getcmdline(), "iobcuncached")) {
104b6d92b4aSSteven J. Hill BONITO_PCICACHECTRL &= ~BONITO_PCICACHECTRL_IOBCCOH_EN;
105b6d92b4aSSteven J. Hill BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
106b6d92b4aSSteven J. Hill ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
107b6d92b4aSSteven J. Hill BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
108b6d92b4aSSteven J. Hill pr_info("Disabled Bonito IOBC coherency\n");
109b6d92b4aSSteven J. Hill } else {
110b6d92b4aSSteven J. Hill BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_IOBCCOH_EN;
111b6d92b4aSSteven J. Hill BONITO_PCIMEMBASECFG |=
112b6d92b4aSSteven J. Hill (BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
113b6d92b4aSSteven J. Hill BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
114b6d92b4aSSteven J. Hill pr_info("Enabled Bonito IOBC coherency\n");
115b6d92b4aSSteven J. Hill }
1163c9b4166SPaul Burton } else if (mips_cps_numiocu(0) != 0) {
117b6d92b4aSSteven J. Hill /* Nothing special needs to be done to enable coherency */
118b6d92b4aSSteven J. Hill pr_info("CMP IOCU detected\n");
119305723abSPaul Burton cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0));
12004e4783fSChristoph Hellwig if (cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)
12114ac09a6SChristoph Hellwig dma_default_coherent = true;
12204e4783fSChristoph Hellwig else
123b6d92b4aSSteven J. Hill pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n");
124b6d92b4aSSteven J. Hill }
125b6d92b4aSSteven J. Hill
12614ac09a6SChristoph Hellwig if (dma_default_coherent)
127b6d92b4aSSteven J. Hill pr_info("Hardware DMA cache coherency enabled\n");
128b6d92b4aSSteven J. Hill else
129b6d92b4aSSteven J. Hill pr_info("Software DMA cache coherency enabled\n");
130b6d92b4aSSteven J. Hill }
131b6d92b4aSSteven J. Hill
pci_clock_check(void)132315806cbSRalf Baechle static void __init pci_clock_check(void)
133315806cbSRalf Baechle {
134315806cbSRalf Baechle unsigned int __iomem *jmpr_p =
135315806cbSRalf Baechle (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
136315806cbSRalf Baechle int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
1374a043d79SUwe Kleine-König static const int pciclocks[] __initconst = {
138315806cbSRalf Baechle 33, 20, 25, 30, 12, 16, 37, 10
139315806cbSRalf Baechle };
140315806cbSRalf Baechle int pciclock = pciclocks[jmpr];
141a9dde288SRalf Baechle char *optptr, *argptr = fw_getcmdline();
142315806cbSRalf Baechle
143a9dde288SRalf Baechle /*
144a9dde288SRalf Baechle * If user passed a pci_clock= option, don't tack on another one
145a9dde288SRalf Baechle */
146a9dde288SRalf Baechle optptr = strstr(argptr, "pci_clock=");
147a9dde288SRalf Baechle if (optptr && (optptr == argptr || optptr[-1] == ' '))
148a9dde288SRalf Baechle return;
149a9dde288SRalf Baechle
150a9dde288SRalf Baechle if (pciclock != 33) {
151a9dde288SRalf Baechle pr_warn("WARNING: PCI clock is %dMHz, setting pci_clock\n",
15249bffbdcSSteven J. Hill pciclock);
153315806cbSRalf Baechle argptr += strlen(argptr);
154a9dde288SRalf Baechle sprintf(argptr, " pci_clock=%d", pciclock);
155315806cbSRalf Baechle if (pciclock < 20 || pciclock > 66)
156a9dde288SRalf Baechle pr_warn("WARNING: IDE timing calculations will be "
157a9dde288SRalf Baechle "incorrect\n");
158315806cbSRalf Baechle }
159315806cbSRalf Baechle }
160315806cbSRalf Baechle
161315806cbSRalf Baechle #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
screen_info_setup(void)162315806cbSRalf Baechle static void __init screen_info_setup(void)
163315806cbSRalf Baechle {
164*555624c0SArnd Bergmann static struct screen_info si = {
165315806cbSRalf Baechle .orig_x = 0,
166315806cbSRalf Baechle .orig_y = 25,
167315806cbSRalf Baechle .ext_mem_k = 0,
168315806cbSRalf Baechle .orig_video_page = 0,
169315806cbSRalf Baechle .orig_video_mode = 0,
170315806cbSRalf Baechle .orig_video_cols = 80,
171315806cbSRalf Baechle .unused2 = 0,
172315806cbSRalf Baechle .orig_video_ega_bx = 0,
173315806cbSRalf Baechle .unused3 = 0,
174315806cbSRalf Baechle .orig_video_lines = 25,
175315806cbSRalf Baechle .orig_video_isVGA = VIDEO_TYPE_VGAC,
176315806cbSRalf Baechle .orig_video_points = 16
177315806cbSRalf Baechle };
178*555624c0SArnd Bergmann
179*555624c0SArnd Bergmann vgacon_register_screen(&si);
180315806cbSRalf Baechle }
181315806cbSRalf Baechle #endif
182315806cbSRalf Baechle
bonito_quirks_setup(void)183315806cbSRalf Baechle static void __init bonito_quirks_setup(void)
184315806cbSRalf Baechle {
185315806cbSRalf Baechle char *argptr;
186315806cbSRalf Baechle
187b431f09dSSteven J. Hill argptr = fw_getcmdline();
188315806cbSRalf Baechle if (strstr(argptr, "debug")) {
189315806cbSRalf Baechle BONITO_BONGENCFG |= BONITO_BONGENCFG_DEBUGMODE;
19049bffbdcSSteven J. Hill pr_info("Enabled Bonito debug mode\n");
191315806cbSRalf Baechle } else
192315806cbSRalf Baechle BONITO_BONGENCFG &= ~BONITO_BONGENCFG_DEBUGMODE;
193315806cbSRalf Baechle }
194315806cbSRalf Baechle
plat_get_fdt(void)1955e7c1c91SMatt Redfearn void __init *plat_get_fdt(void)
1965e7c1c91SMatt Redfearn {
1975e7c1c91SMatt Redfearn return (void *)__dtb_start;
1985e7c1c91SMatt Redfearn }
1995e7c1c91SMatt Redfearn
plat_mem_setup(void)200315806cbSRalf Baechle void __init plat_mem_setup(void)
201315806cbSRalf Baechle {
202315806cbSRalf Baechle unsigned int i;
2035e7c1c91SMatt Redfearn void *fdt = plat_get_fdt();
204315806cbSRalf Baechle
205e81a8c7dSPaul Burton fdt = malta_dt_shim(fdt);
206e81a8c7dSPaul Burton __dt_setup_arch(fdt);
207e8823d26SPaul Burton
20897f2645fSMasahiro Yamada if (IS_ENABLED(CONFIG_EVA))
209f8b7faf1SMarkos Chandras /* EVA has already been configured in mach-malta/kernel-init.h */
210f8b7faf1SMarkos Chandras pr_info("Enhanced Virtual Addressing (EVA) activated\n");
211f8b7faf1SMarkos Chandras
212315806cbSRalf Baechle mips_pcibios_init();
213315806cbSRalf Baechle
214315806cbSRalf Baechle /* Request I/O space for devices used on the Malta board. */
215315806cbSRalf Baechle for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
216315806cbSRalf Baechle request_resource(&ioport_resource, standard_io_resources+i);
217315806cbSRalf Baechle
218315806cbSRalf Baechle /*
219315806cbSRalf Baechle * Enable DMA channel 4 (cascade channel) in the PIIX4 south bridge.
220315806cbSRalf Baechle */
221315806cbSRalf Baechle enable_dma(4);
222315806cbSRalf Baechle
223315806cbSRalf Baechle if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO)
224315806cbSRalf Baechle bonito_quirks_setup();
225315806cbSRalf Baechle
226b6d92b4aSSteven J. Hill plat_setup_iocoherency();
227b6d92b4aSSteven J. Hill
228315806cbSRalf Baechle pci_clock_check();
229315806cbSRalf Baechle
230315806cbSRalf Baechle #ifdef CONFIG_BLK_DEV_FD
231315806cbSRalf Baechle fd_activate();
232315806cbSRalf Baechle #endif
233315806cbSRalf Baechle
234315806cbSRalf Baechle #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
235315806cbSRalf Baechle screen_info_setup();
236315806cbSRalf Baechle #endif
237315806cbSRalf Baechle }
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