xref: /linux/arch/mips/kernel/ptrace.c (revision 5e8d780d745c1619aba81fe7166c5a4b5cad2b84) 
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1992 Ross Biro
7  * Copyright (C) Linus Torvalds
8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9  * Copyright (C) 1996 David S. Miller
10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11  * Copyright (C) 1999 MIPS Technologies, Inc.
12  * Copyright (C) 2000 Ulf Carlsson
13  *
14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15  * binaries.
16  */
17 #include <linux/config.h>
18 #include <linux/compiler.h>
19 #include <linux/kernel.h>
20 #include <linux/sched.h>
21 #include <linux/mm.h>
22 #include <linux/errno.h>
23 #include <linux/ptrace.h>
24 #include <linux/audit.h>
25 #include <linux/smp.h>
26 #include <linux/smp_lock.h>
27 #include <linux/user.h>
28 #include <linux/security.h>
29 #include <linux/signal.h>
30 
31 #include <asm/byteorder.h>
32 #include <asm/cpu.h>
33 #include <asm/dsp.h>
34 #include <asm/fpu.h>
35 #include <asm/mipsregs.h>
36 #include <asm/mipsmtregs.h>
37 #include <asm/pgtable.h>
38 #include <asm/page.h>
39 #include <asm/system.h>
40 #include <asm/uaccess.h>
41 #include <asm/bootinfo.h>
42 #include <asm/reg.h>
43 
44 /*
45  * Called by kernel/ptrace.c when detaching..
46  *
47  * Make sure single step bits etc are not set.
48  */
49 void ptrace_disable(struct task_struct *child)
50 {
51 	/* Nothing to do.. */
52 }
53 
54 /*
55  * Read a general register set.  We always use the 64-bit format, even
56  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
57  * Registers are sign extended to fill the available space.
58  */
59 int ptrace_getregs (struct task_struct *child, __s64 __user *data)
60 {
61 	struct pt_regs *regs;
62 	int i;
63 
64 	if (!access_ok(VERIFY_WRITE, data, 38 * 8))
65 		return -EIO;
66 
67 	regs = task_pt_regs(child);
68 
69 	for (i = 0; i < 32; i++)
70 		__put_user (regs->regs[i], data + i);
71 	__put_user (regs->lo, data + EF_LO - EF_R0);
72 	__put_user (regs->hi, data + EF_HI - EF_R0);
73 	__put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
74 	__put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
75 	__put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
76 	__put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
77 
78 	return 0;
79 }
80 
81 /*
82  * Write a general register set.  As for PTRACE_GETREGS, we always use
83  * the 64-bit format.  On a 32-bit kernel only the lower order half
84  * (according to endianness) will be used.
85  */
86 int ptrace_setregs (struct task_struct *child, __s64 __user *data)
87 {
88 	struct pt_regs *regs;
89 	int i;
90 
91 	if (!access_ok(VERIFY_READ, data, 38 * 8))
92 		return -EIO;
93 
94 	regs = task_pt_regs(child);
95 
96 	for (i = 0; i < 32; i++)
97 		__get_user (regs->regs[i], data + i);
98 	__get_user (regs->lo, data + EF_LO - EF_R0);
99 	__get_user (regs->hi, data + EF_HI - EF_R0);
100 	__get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
101 
102 	/* badvaddr, status, and cause may not be written.  */
103 
104 	return 0;
105 }
106 
107 int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
108 {
109 	int i;
110 
111 	if (!access_ok(VERIFY_WRITE, data, 33 * 8))
112 		return -EIO;
113 
114 	if (tsk_used_math(child)) {
115 		fpureg_t *fregs = get_fpu_regs(child);
116 		for (i = 0; i < 32; i++)
117 			__put_user (fregs[i], i + (__u64 __user *) data);
118 	} else {
119 		for (i = 0; i < 32; i++)
120 			__put_user ((__u64) -1, i + (__u64 __user *) data);
121 	}
122 
123 	__put_user (child->thread.fpu.fcr31, data + 64);
124 
125 	if (cpu_has_fpu) {
126 		unsigned int flags, tmp;
127 
128 		preempt_disable();
129 		if (cpu_has_mipsmt) {
130 			unsigned int vpflags = dvpe();
131 			flags = read_c0_status();
132 			__enable_fpu();
133 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
134 			write_c0_status(flags);
135 			evpe(vpflags);
136 		} else {
137 			flags = read_c0_status();
138 			__enable_fpu();
139 			__asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
140 			write_c0_status(flags);
141 		}
142 		preempt_enable();
143 		__put_user (tmp, data + 65);
144 	} else {
145 		__put_user ((__u32) 0, data + 65);
146 	}
147 
148 	return 0;
149 }
150 
151 int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
152 {
153 	fpureg_t *fregs;
154 	int i;
155 
156 	if (!access_ok(VERIFY_READ, data, 33 * 8))
157 		return -EIO;
158 
159 	fregs = get_fpu_regs(child);
160 
161 	for (i = 0; i < 32; i++)
162 		__get_user (fregs[i], i + (__u64 __user *) data);
163 
164 	__get_user (child->thread.fpu.fcr31, data + 64);
165 
166 	/* FIR may not be written.  */
167 
168 	return 0;
169 }
170 
171 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
172 {
173 	int ret;
174 
175 	switch (request) {
176 	/* when I and D space are separate, these will need to be fixed. */
177 	case PTRACE_PEEKTEXT: /* read word at location addr. */
178 	case PTRACE_PEEKDATA: {
179 		unsigned long tmp;
180 		int copied;
181 
182 		copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
183 		ret = -EIO;
184 		if (copied != sizeof(tmp))
185 			break;
186 		ret = put_user(tmp,(unsigned long __user *) data);
187 		break;
188 	}
189 
190 	/* Read the word at location addr in the USER area. */
191 	case PTRACE_PEEKUSR: {
192 		struct pt_regs *regs;
193 		unsigned long tmp = 0;
194 
195 		regs = task_pt_regs(child);
196 		ret = 0;  /* Default return value. */
197 
198 		switch (addr) {
199 		case 0 ... 31:
200 			tmp = regs->regs[addr];
201 			break;
202 		case FPR_BASE ... FPR_BASE + 31:
203 			if (tsk_used_math(child)) {
204 				fpureg_t *fregs = get_fpu_regs(child);
205 
206 #ifdef CONFIG_32BIT
207 				/*
208 				 * The odd registers are actually the high
209 				 * order bits of the values stored in the even
210 				 * registers - unless we're using r2k_switch.S.
211 				 */
212 				if (addr & 1)
213 					tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
214 				else
215 					tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
216 #endif
217 #ifdef CONFIG_64BIT
218 				tmp = fregs[addr - FPR_BASE];
219 #endif
220 			} else {
221 				tmp = -1;	/* FP not yet used  */
222 			}
223 			break;
224 		case PC:
225 			tmp = regs->cp0_epc;
226 			break;
227 		case CAUSE:
228 			tmp = regs->cp0_cause;
229 			break;
230 		case BADVADDR:
231 			tmp = regs->cp0_badvaddr;
232 			break;
233 		case MMHI:
234 			tmp = regs->hi;
235 			break;
236 		case MMLO:
237 			tmp = regs->lo;
238 			break;
239 		case FPC_CSR:
240 			tmp = child->thread.fpu.fcr31;
241 			break;
242 		case FPC_EIR: {	/* implementation / version register */
243 			unsigned int flags;
244 #ifdef CONFIG_MIPS_MT_SMTC
245 			unsigned int irqflags;
246 			unsigned int mtflags;
247 #endif /* CONFIG_MIPS_MT_SMTC */
248 
249 			if (!cpu_has_fpu)
250 				break;
251 
252 #ifdef CONFIG_MIPS_MT_SMTC
253 			/* Read-modify-write of Status must be atomic */
254 			local_irq_save(irqflags);
255 			mtflags = dmt();
256 #endif /* CONFIG_MIPS_MT_SMTC */
257 
258 			preempt_disable();
259 			if (cpu_has_mipsmt) {
260 				unsigned int vpflags = dvpe();
261 				flags = read_c0_status();
262 				__enable_fpu();
263 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
264 				write_c0_status(flags);
265 				evpe(vpflags);
266 			} else {
267 				flags = read_c0_status();
268 				__enable_fpu();
269 				__asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
270 				write_c0_status(flags);
271 			}
272 #ifdef CONFIG_MIPS_MT_SMTC
273 			emt(mtflags);
274 			local_irq_restore(irqflags);
275 #endif /* CONFIG_MIPS_MT_SMTC */
276 			preempt_enable();
277 			break;
278 		}
279 		case DSP_BASE ... DSP_BASE + 5: {
280 			dspreg_t *dregs;
281 
282 			if (!cpu_has_dsp) {
283 				tmp = 0;
284 				ret = -EIO;
285 				goto out;
286 			}
287 			dregs = __get_dsp_regs(child);
288 			tmp = (unsigned long) (dregs[addr - DSP_BASE]);
289 			break;
290 		}
291 		case DSP_CONTROL:
292 			if (!cpu_has_dsp) {
293 				tmp = 0;
294 				ret = -EIO;
295 				goto out;
296 			}
297 			tmp = child->thread.dsp.dspcontrol;
298 			break;
299 		default:
300 			tmp = 0;
301 			ret = -EIO;
302 			goto out;
303 		}
304 		ret = put_user(tmp, (unsigned long __user *) data);
305 		break;
306 	}
307 
308 	/* when I and D space are separate, this will have to be fixed. */
309 	case PTRACE_POKETEXT: /* write the word at location addr. */
310 	case PTRACE_POKEDATA:
311 		ret = 0;
312 		if (access_process_vm(child, addr, &data, sizeof(data), 1)
313 		    == sizeof(data))
314 			break;
315 		ret = -EIO;
316 		break;
317 
318 	case PTRACE_POKEUSR: {
319 		struct pt_regs *regs;
320 		ret = 0;
321 		regs = task_pt_regs(child);
322 
323 		switch (addr) {
324 		case 0 ... 31:
325 			regs->regs[addr] = data;
326 			break;
327 		case FPR_BASE ... FPR_BASE + 31: {
328 			fpureg_t *fregs = get_fpu_regs(child);
329 
330 			if (!tsk_used_math(child)) {
331 				/* FP not yet used  */
332 				memset(&child->thread.fpu, ~0,
333 				       sizeof(child->thread.fpu));
334 				child->thread.fpu.fcr31 = 0;
335 			}
336 #ifdef CONFIG_32BIT
337 			/*
338 			 * The odd registers are actually the high order bits
339 			 * of the values stored in the even registers - unless
340 			 * we're using r2k_switch.S.
341 			 */
342 			if (addr & 1) {
343 				fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
344 				fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
345 			} else {
346 				fregs[addr - FPR_BASE] &= ~0xffffffffLL;
347 				fregs[addr - FPR_BASE] |= data;
348 			}
349 #endif
350 #ifdef CONFIG_64BIT
351 			fregs[addr - FPR_BASE] = data;
352 #endif
353 			break;
354 		}
355 		case PC:
356 			regs->cp0_epc = data;
357 			break;
358 		case MMHI:
359 			regs->hi = data;
360 			break;
361 		case MMLO:
362 			regs->lo = data;
363 			break;
364 		case FPC_CSR:
365 			child->thread.fpu.fcr31 = data;
366 			break;
367 		case DSP_BASE ... DSP_BASE + 5: {
368 			dspreg_t *dregs;
369 
370 			if (!cpu_has_dsp) {
371 				ret = -EIO;
372 				break;
373 			}
374 
375 			dregs = __get_dsp_regs(child);
376 			dregs[addr - DSP_BASE] = data;
377 			break;
378 		}
379 		case DSP_CONTROL:
380 			if (!cpu_has_dsp) {
381 				ret = -EIO;
382 				break;
383 			}
384 			child->thread.dsp.dspcontrol = data;
385 			break;
386 		default:
387 			/* The rest are not allowed. */
388 			ret = -EIO;
389 			break;
390 		}
391 		break;
392 		}
393 
394 	case PTRACE_GETREGS:
395 		ret = ptrace_getregs (child, (__u64 __user *) data);
396 		break;
397 
398 	case PTRACE_SETREGS:
399 		ret = ptrace_setregs (child, (__u64 __user *) data);
400 		break;
401 
402 	case PTRACE_GETFPREGS:
403 		ret = ptrace_getfpregs (child, (__u32 __user *) data);
404 		break;
405 
406 	case PTRACE_SETFPREGS:
407 		ret = ptrace_setfpregs (child, (__u32 __user *) data);
408 		break;
409 
410 	case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
411 	case PTRACE_CONT: { /* restart after signal. */
412 		ret = -EIO;
413 		if (!valid_signal(data))
414 			break;
415 		if (request == PTRACE_SYSCALL) {
416 			set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
417 		}
418 		else {
419 			clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
420 		}
421 		child->exit_code = data;
422 		wake_up_process(child);
423 		ret = 0;
424 		break;
425 	}
426 
427 	/*
428 	 * make the child exit.  Best I can do is send it a sigkill.
429 	 * perhaps it should be put in the status that it wants to
430 	 * exit.
431 	 */
432 	case PTRACE_KILL:
433 		ret = 0;
434 		if (child->exit_state == EXIT_ZOMBIE)	/* already dead */
435 			break;
436 		child->exit_code = SIGKILL;
437 		wake_up_process(child);
438 		break;
439 
440 	case PTRACE_DETACH: /* detach a process that was attached. */
441 		ret = ptrace_detach(child, data);
442 		break;
443 
444 	case PTRACE_GET_THREAD_AREA:
445 		ret = put_user(task_thread_info(child)->tp_value,
446 				(unsigned long __user *) data);
447 		break;
448 
449 	default:
450 		ret = ptrace_request(child, request, addr, data);
451 		break;
452 	}
453  out:
454 	return ret;
455 }
456 
457 static inline int audit_arch(void)
458 {
459 	int arch = EM_MIPS;
460 #ifdef CONFIG_64BIT
461 	arch |=  __AUDIT_ARCH_64BIT;
462 #endif
463 #if defined(__LITTLE_ENDIAN)
464 	arch |=  __AUDIT_ARCH_LE;
465 #endif
466 	return arch;
467 }
468 
469 /*
470  * Notification of system call entry/exit
471  * - triggered by current->work.syscall_trace
472  */
473 asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
474 {
475 	if (unlikely(current->audit_context) && entryexit)
476 		audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
477 		                   regs->regs[2]);
478 
479 	if (!(current->ptrace & PT_PTRACED))
480 		goto out;
481 	if (!test_thread_flag(TIF_SYSCALL_TRACE))
482 		goto out;
483 
484 	/* The 0x80 provides a way for the tracing parent to distinguish
485 	   between a syscall stop and SIGTRAP delivery */
486 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
487 	                         0x80 : 0));
488 
489 	/*
490 	 * this isn't the same as continuing with a signal, but it will do
491 	 * for normal use.  strace only continues with a signal if the
492 	 * stopping signal is not SIGTRAP.  -brl
493 	 */
494 	if (current->exit_code) {
495 		send_sig(current->exit_code, current, 1);
496 		current->exit_code = 0;
497 	}
498  out:
499 	if (unlikely(current->audit_context) && !entryexit)
500 		audit_syscall_entry(audit_arch(), regs->regs[2],
501 				    regs->regs[4], regs->regs[5],
502 				    regs->regs[6], regs->regs[7]);
503 }
504