1*2874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2384740dcSRalf Baechle /* 3384740dcSRalf Baechle * Copyright (C) 2001, 2002, MontaVista Software Inc. 4384740dcSRalf Baechle * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 5384740dcSRalf Baechle * Copyright (c) 2003 Maciej W. Rozycki 6384740dcSRalf Baechle * 7384740dcSRalf Baechle * include/asm-mips/time.h 8384740dcSRalf Baechle * header file for the new style time.c file and time services. 9384740dcSRalf Baechle */ 10384740dcSRalf Baechle #ifndef _ASM_TIME_H 11384740dcSRalf Baechle #define _ASM_TIME_H 12384740dcSRalf Baechle 13384740dcSRalf Baechle #include <linux/rtc.h> 14384740dcSRalf Baechle #include <linux/spinlock.h> 15384740dcSRalf Baechle #include <linux/clockchips.h> 16384740dcSRalf Baechle #include <linux/clocksource.h> 17384740dcSRalf Baechle 18384740dcSRalf Baechle extern spinlock_t rtc_lock; 19384740dcSRalf Baechle 20384740dcSRalf Baechle /* 21384740dcSRalf Baechle * board specific routines required by time_init(). 22384740dcSRalf Baechle */ 23384740dcSRalf Baechle extern void plat_time_init(void); 24384740dcSRalf Baechle 25384740dcSRalf Baechle /* 26384740dcSRalf Baechle * mips_hpt_frequency - must be set if you intend to use an R4k-compatible 27384740dcSRalf Baechle * counter as a timer interrupt source. 28384740dcSRalf Baechle */ 29384740dcSRalf Baechle extern unsigned int mips_hpt_frequency; 30384740dcSRalf Baechle 31384740dcSRalf Baechle /* 32384740dcSRalf Baechle * The performance counter IRQ on MIPS is a close relative to the timer IRQ 33384740dcSRalf Baechle * so it lives here. 34384740dcSRalf Baechle */ 35384740dcSRalf Baechle extern int (*perf_irq)(void); 36a669efc4SAndrew Bresticker extern int __weak get_c0_perfcount_int(void); 37384740dcSRalf Baechle 38384740dcSRalf Baechle /* 39384740dcSRalf Baechle * Initialize the calling CPU's compare interrupt as clockevent device 40384740dcSRalf Baechle */ 41ec0b9d35SBjorn Helgaas extern unsigned int get_c0_compare_int(void); 42779e7d41SManuel Lauss extern int r4k_clockevent_init(void); 43779e7d41SManuel Lauss mips_clockevent_init(void)44384740dcSRalf Baechlestatic inline int mips_clockevent_init(void) 45384740dcSRalf Baechle { 46e4752dbbSAndrew Bresticker #ifdef CONFIG_CEVT_R4K 47779e7d41SManuel Lauss return r4k_clockevent_init(); 48779e7d41SManuel Lauss #else 49384740dcSRalf Baechle return -ENXIO; 50384740dcSRalf Baechle #endif 51779e7d41SManuel Lauss } 52384740dcSRalf Baechle 53384740dcSRalf Baechle /* 54384740dcSRalf Baechle * Initialize the count register as a clocksource 55384740dcSRalf Baechle */ 56779e7d41SManuel Lauss extern int init_r4k_clocksource(void); 57779e7d41SManuel Lauss init_mips_clocksource(void)58384740dcSRalf Baechlestatic inline int init_mips_clocksource(void) 59384740dcSRalf Baechle { 60f7886e87SSteven J. Hill #ifdef CONFIG_CSRC_R4K 61779e7d41SManuel Lauss return init_r4k_clocksource(); 62779e7d41SManuel Lauss #else 63384740dcSRalf Baechle return 0; 64384740dcSRalf Baechle #endif 65779e7d41SManuel Lauss } 66384740dcSRalf Baechle clockevent_set_clock(struct clock_event_device * cd,unsigned int clock)67e3a4fab0SThomas Gleixnerstatic inline void clockevent_set_clock(struct clock_event_device *cd, 68e3a4fab0SThomas Gleixner unsigned int clock) 69e3a4fab0SThomas Gleixner { 70e3a4fab0SThomas Gleixner clockevents_calc_mult_shift(cd, clock, 4); 71e3a4fab0SThomas Gleixner } 72384740dcSRalf Baechle 73384740dcSRalf Baechle #endif /* _ASM_TIME_H */ 74