11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 4f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 5ec7748b5SSam Ravnborg select HAVE_IDE 642d4b839SMathieu Desnoyers select HAVE_OPROFILE 791f01737SDeng-Cheng Zhu select HAVE_IRQ_WORK 87f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 97f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1088547001SJason Wessel select HAVE_ARCH_KGDB 117563bbf8SMark Brown select ARCH_HAVE_CUSTOM_GPIO_H 12d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 1369a7d1b3SWu Zhangjin select HAVE_FUNCTION_TRACE_MCOUNT_TEST 14538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 15538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 1664575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 1729c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 18c1bf207dSDavid Daney select HAVE_KPROBES 19c1bf207dSDavid Daney select HAVE_KRETPROBES 20b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 21e26d196cSDavid Daney select ARCH_BINFMT_ELF_RANDOMIZE_PIE 22970d032fSRalf Baechle select HAVE_ARCH_TRANSPARENT_HUGEPAGE 2321a41faaSWu Zhangjin select RTC_LIB if !MACH_LOONGSON 242b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 257463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 2648e1fd5aSDavid Daney select HAVE_DMA_ATTRS 2748e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 283bd27e32SDavid Daney select HAVE_GENERIC_HARDIRQS 293bd27e32SDavid Daney select GENERIC_IRQ_PROBE 30f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3194bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 32c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 330f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 349d15ffc8STejun Heo select HAVE_MEMBLOCK 359d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 369d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 37360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 384b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 39cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 40cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 41786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 42786d35d4SDavid Howells select MODULES_USE_ELF_REL 43786d35d4SDavid Howells select MODULES_USE_ELF_RELA if 64BIT 441da177e4SLinus Torvalds 451da177e4SLinus Torvaldsmenu "Machine selection" 461da177e4SLinus Torvalds 475ac6da66SChristoph Lameterconfig ZONE_DMA 485ac6da66SChristoph Lameter bool 495ac6da66SChristoph Lameter 505e83d430SRalf Baechlechoice 515e83d430SRalf Baechle prompt "System type" 525e83d430SRalf Baechle default SGI_IP22 531da177e4SLinus Torvalds 5442a4f17dSManuel Laussconfig MIPS_ALCHEMY 55c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 5642a4f17dSManuel Lauss select 64BIT_PHYS_ADDR 57*f772cdb2SRalf Baechle select CEVT_R4K 58d7ea335cSSteven J. Hill select CSRC_R4K 5942a4f17dSManuel Lauss select IRQ_CPU 6042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 6142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 6242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 6342a4f17dSManuel Lauss select GENERIC_GPIO 6442a4f17dSManuel Lauss select ARCH_WANT_OPTIONAL_GPIOLIB 651b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 6637663860SManuel Lauss select USB_ARCH_HAS_OHCI 6737663860SManuel Lauss select USB_ARCH_HAS_EHCI 681da177e4SLinus Torvalds 697ca5dc14SFlorian Fainelliconfig AR7 707ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 717ca5dc14SFlorian Fainelli select BOOT_ELF32 727ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 737ca5dc14SFlorian Fainelli select CEVT_R4K 747ca5dc14SFlorian Fainelli select CSRC_R4K 757ca5dc14SFlorian Fainelli select IRQ_CPU 767ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 777ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 787ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 797ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 807ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 817ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 821b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 835f3c9098SFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 847ca5dc14SFlorian Fainelli select VLYNQ 858551fb64SYoichi Yuasa select HAVE_CLK 867ca5dc14SFlorian Fainelli help 877ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 887ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 897ca5dc14SFlorian Fainelli 90d4a67d9dSGabor Juhosconfig ATH79 91d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 926eae43c5SGabor Juhos select ARCH_REQUIRE_GPIOLIB 93d4a67d9dSGabor Juhos select BOOT_RAW 94d4a67d9dSGabor Juhos select CEVT_R4K 95d4a67d9dSGabor Juhos select CSRC_R4K 96d4a67d9dSGabor Juhos select DMA_NONCOHERENT 9794638067SGabor Juhos select HAVE_CLK 98d4a67d9dSGabor Juhos select IRQ_CPU 990aabf1a4SGabor Juhos select MIPS_MACHINE 100d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 101d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 102d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 103d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 104d4a67d9dSGabor Juhos help 105d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 106d4a67d9dSGabor Juhos 1071c0c13ebSAurelien Jarnoconfig BCM47XX 108c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 10942f77542SRalf Baechle select CEVT_R4K 110940f6b48SRalf Baechle select CSRC_R4K 1111c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1120e2794b0SRalf Baechle select FW_CFE 1131c0c13ebSAurelien Jarno select HW_HAS_PCI 1141c0c13ebSAurelien Jarno select IRQ_CPU 1151c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1161c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 1171c0c13ebSAurelien Jarno select GENERIC_GPIO 11825e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 1191c0c13ebSAurelien Jarno help 1201c0c13ebSAurelien Jarno Support for BCM47XX based boards 1211c0c13ebSAurelien Jarno 122e7300d04SMaxime Bizonconfig BCM63XX 123e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 124e7300d04SMaxime Bizon select CEVT_R4K 125e7300d04SMaxime Bizon select CSRC_R4K 126e7300d04SMaxime Bizon select DMA_NONCOHERENT 127e7300d04SMaxime Bizon select IRQ_CPU 128e7300d04SMaxime Bizon select SYS_HAS_CPU_MIPS32_R1 129e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 130e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 131e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 132e7300d04SMaxime Bizon select SWAP_IO_SPACE 133e7300d04SMaxime Bizon select ARCH_REQUIRE_GPIOLIB 1343e82eeebSYoichi Yuasa select HAVE_CLK 135e7300d04SMaxime Bizon help 136e7300d04SMaxime Bizon Support for BCM63XX based boards 137e7300d04SMaxime Bizon 1381da177e4SLinus Torvaldsconfig MIPS_COBALT 1393fa986faSMartin Michlmayr bool "Cobalt Server" 14042f77542SRalf Baechle select CEVT_R4K 141940f6b48SRalf Baechle select CSRC_R4K 1421097c6acSYoichi Yuasa select CEVT_GT641XX 1431da177e4SLinus Torvalds select DMA_NONCOHERENT 1441da177e4SLinus Torvalds select HW_HAS_PCI 145d865bea4SRalf Baechle select I8253 1461da177e4SLinus Torvalds select I8259 1471da177e4SLinus Torvalds select IRQ_CPU 148d5ab1a69SYoichi Yuasa select IRQ_GT641XX 149252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 150e25bfc92SYoichi Yuasa select PCI 1517cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 1520a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 153ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 1540e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 1555e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1561da177e4SLinus Torvalds 1571da177e4SLinus Torvaldsconfig MACH_DECSTATION 1583fa986faSMartin Michlmayr bool "DECstations" 1591da177e4SLinus Torvalds select BOOT_ELF32 1606457d9fcSYoichi Yuasa select CEVT_DS1287 16142f77542SRalf Baechle select CEVT_R4K 1624247417dSYoichi Yuasa select CSRC_IOASIC 163940f6b48SRalf Baechle select CSRC_R4K 16420d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 16520d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 16620d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 1671da177e4SLinus Torvalds select DMA_NONCOHERENT 168d388d685SMaciej W. Rozycki select NO_IOPORT 1691da177e4SLinus Torvalds select IRQ_CPU 1707cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 1717cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 172ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 173ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 1745e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 1751723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 1761723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 1771723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 1785e83d430SRalf Baechle help 1791da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 1801da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 1811da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 1821da177e4SLinus Torvalds 1831da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 1841da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds DECstation 5000/50 1871da177e4SLinus Torvalds DECstation 5000/150 1881da177e4SLinus Torvalds DECstation 5000/260 1891da177e4SLinus Torvalds DECsystem 5900/260 1901da177e4SLinus Torvalds 1911da177e4SLinus Torvalds otherwise choose R3000. 1921da177e4SLinus Torvalds 1935e83d430SRalf Baechleconfig MACH_JAZZ 1943fa986faSMartin Michlmayr bool "Jazz family of machines" 1950e2794b0SRalf Baechle select FW_ARC 1960e2794b0SRalf Baechle select FW_ARC32 1975e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 19842f77542SRalf Baechle select CEVT_R4K 199940f6b48SRalf Baechle select CSRC_R4K 200e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2015e83d430SRalf Baechle select GENERIC_ISA_DMA 2028a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 203ea202c63SThomas Bogendoerfer select IRQ_CPU 204d865bea4SRalf Baechle select I8253 2055e83d430SRalf Baechle select I8259 2065e83d430SRalf Baechle select ISA 2077cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2085e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2095e83d430SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 2101723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2111da177e4SLinus Torvalds help 2125e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2135e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 214692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 2155e83d430SRalf Baechle Olivetti M700-10 workstations. 2165e83d430SRalf Baechle 2175ebabe59SLars-Peter Clausenconfig MACH_JZ4740 2185ebabe59SLars-Peter Clausen bool "Ingenic JZ4740 based machines" 2195ebabe59SLars-Peter Clausen select SYS_HAS_CPU_MIPS32_R1 2205ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 2215ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 222f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 2235ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 2245ebabe59SLars-Peter Clausen select IRQ_CPU 2255ebabe59SLars-Peter Clausen select GENERIC_GPIO 2265ebabe59SLars-Peter Clausen select ARCH_REQUIRE_GPIOLIB 2275ebabe59SLars-Peter Clausen select SYS_HAS_EARLY_PRINTK 2285ebabe59SLars-Peter Clausen select HAVE_PWM 229ab5330ebSMaurus Cuelenaere select HAVE_CLK 23083bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 2315ebabe59SLars-Peter Clausen 232171bb2f1SJohn Crispinconfig LANTIQ 233171bb2f1SJohn Crispin bool "Lantiq based platforms" 234171bb2f1SJohn Crispin select DMA_NONCOHERENT 235171bb2f1SJohn Crispin select IRQ_CPU 236171bb2f1SJohn Crispin select CEVT_R4K 237171bb2f1SJohn Crispin select CSRC_R4K 238171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 239171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 240171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 241171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 242171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 243171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 244171bb2f1SJohn Crispin select ARCH_REQUIRE_GPIOLIB 245171bb2f1SJohn Crispin select SWAP_IO_SPACE 246171bb2f1SJohn Crispin select BOOT_RAW 247287e3f3fSJohn Crispin select HAVE_MACH_CLKDEV 248287e3f3fSJohn Crispin select CLKDEV_LOOKUP 249a0392222SJohn Crispin select USE_OF 2503f8c50c9SJohn Crispin select PINCTRL 2513f8c50c9SJohn Crispin select PINCTRL_LANTIQ 252171bb2f1SJohn Crispin 2531f21d2bdSBrian Murphyconfig LASAT 2541f21d2bdSBrian Murphy bool "LASAT Networks platforms" 25542f77542SRalf Baechle select CEVT_R4K 256940f6b48SRalf Baechle select CSRC_R4K 2571f21d2bdSBrian Murphy select DMA_NONCOHERENT 2581f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 2591f21d2bdSBrian Murphy select HW_HAS_PCI 260a5ccfe5cSRalf Baechle select IRQ_CPU 2611f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 2621f21d2bdSBrian Murphy select MIPS_NILE4 2631f21d2bdSBrian Murphy select R5000_CPU_SCACHE 2641f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 2651f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 2661f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 2671f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 2681f21d2bdSBrian Murphy 26985749d24SWu Zhangjinconfig MACH_LOONGSON 27085749d24SWu Zhangjin bool "Loongson family of machines" 271c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 272ade299d8SYoichi Yuasa help 27385749d24SWu Zhangjin This enables the support of Loongson family of machines. 27485749d24SWu Zhangjin 27585749d24SWu Zhangjin Loongson is a family of general-purpose MIPS-compatible CPUs. 27685749d24SWu Zhangjin developed at Institute of Computing Technology (ICT), 27785749d24SWu Zhangjin Chinese Academy of Sciences (CAS) in the People's Republic 27885749d24SWu Zhangjin of China. The chief architect is Professor Weiwu Hu. 279ade299d8SYoichi Yuasa 280ca585cf9SKelvin Cheungconfig MACH_LOONGSON1 281ca585cf9SKelvin Cheung bool "Loongson 1 family of machines" 282ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 283ca585cf9SKelvin Cheung help 284ca585cf9SKelvin Cheung This enables support for the Loongson 1 based machines. 285ca585cf9SKelvin Cheung 286ca585cf9SKelvin Cheung Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by 287ca585cf9SKelvin Cheung the ICT (Institute of Computing Technology) and the Chinese Academy 288ca585cf9SKelvin Cheung of Sciences. 289ca585cf9SKelvin Cheung 2901da177e4SLinus Torvaldsconfig MIPS_MALTA 2913fa986faSMartin Michlmayr bool "MIPS Malta board" 29261ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 2931da177e4SLinus Torvalds select BOOT_ELF32 294fa71c960SRalf Baechle select BOOT_RAW 29542f77542SRalf Baechle select CEVT_R4K 296940f6b48SRalf Baechle select CSRC_R4K 2971da177e4SLinus Torvalds select DMA_NONCOHERENT 2981da177e4SLinus Torvalds select GENERIC_ISA_DMA 2998a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 300aa414dffSRalf Baechle select IRQ_CPU 30139b8d525SRalf Baechle select IRQ_GIC 3021da177e4SLinus Torvalds select HW_HAS_PCI 303d865bea4SRalf Baechle select I8253 3041da177e4SLinus Torvalds select I8259 3055e83d430SRalf Baechle select MIPS_BOARDS_GEN 3065e83d430SRalf Baechle select MIPS_BONITO64 3079318c51aSChris Dearman select MIPS_CPU_SCACHE 308252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3095e83d430SRalf Baechle select MIPS_MSC 3101da177e4SLinus Torvalds select SWAP_IO_SPACE 3117cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 3127cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 3137cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 3145d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 3157cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3167cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 31736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 318ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 319ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 3205e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 3215e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3220365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 323f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 3249693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 3251b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 3261da177e4SLinus Torvalds help 327f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 3281da177e4SLinus Torvalds board. 3291da177e4SLinus Torvalds 330ec47b274SSteven J. Hillconfig MIPS_SEAD3 331ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 332ec47b274SSteven J. Hill select BOOT_ELF32 333ec47b274SSteven J. Hill select BOOT_RAW 334ec47b274SSteven J. Hill select CEVT_R4K 335ec47b274SSteven J. Hill select CSRC_R4K 336ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 337ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 338ec47b274SSteven J. Hill select DMA_NONCOHERENT 339ec47b274SSteven J. Hill select IRQ_CPU 340ec47b274SSteven J. Hill select IRQ_GIC 341ec47b274SSteven J. Hill select MIPS_BOARDS_GEN 342ec47b274SSteven J. Hill select MIPS_CPU_SCACHE 343ec47b274SSteven J. Hill select MIPS_MSC 344ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 345ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 346ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 347ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 348ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 349ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 350ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 351ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 352ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 353ec47b274SSteven J. Hill select USB_ARCH_HAS_EHCI 354ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 355ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 356ec47b274SSteven J. Hill help 357ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 358ec47b274SSteven J. Hill board. 359ec47b274SSteven J. Hill 360a83860c2SRalf Baechleconfig NEC_MARKEINS 361a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 362a83860c2SRalf Baechle select SOC_EMMA2RH 363a83860c2SRalf Baechle select HW_HAS_PCI 364a83860c2SRalf Baechle help 365a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 366ade299d8SYoichi Yuasa 3675e83d430SRalf Baechleconfig MACH_VR41XX 36874142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 36942f77542SRalf Baechle select CEVT_R4K 370940f6b48SRalf Baechle select CSRC_R4K 3717cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 37227fdd325SYoichi Yuasa select ARCH_REQUIRE_GPIOLIB 3735e83d430SRalf Baechle 374edb6310aSDaniel Lairdconfig NXP_STB220 375edb6310aSDaniel Laird bool "NXP STB220 board" 376edb6310aSDaniel Laird select SOC_PNX833X 377edb6310aSDaniel Laird help 378edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 379edb6310aSDaniel Laird 380edb6310aSDaniel Lairdconfig NXP_STB225 381edb6310aSDaniel Laird bool "NXP 225 board" 382edb6310aSDaniel Laird select SOC_PNX833X 383edb6310aSDaniel Laird select SOC_PNX8335 384edb6310aSDaniel Laird help 385edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 386edb6310aSDaniel Laird 387ade299d8SYoichi Yuasaconfig PNX8550_JBS 388a92b0588SDaniel Laird bool "NXP PNX8550 based JBS board" 389ade299d8SYoichi Yuasa select PNX8550 390ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 391ade299d8SYoichi Yuasa 392ade299d8SYoichi Yuasaconfig PNX8550_STB810 393a92b0588SDaniel Laird bool "NXP PNX8550 based STB810 board" 394ade299d8SYoichi Yuasa select PNX8550 395ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 396ade299d8SYoichi Yuasa 3979267a30dSMarc St-Jeanconfig PMC_MSP 3989267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 3999267a30dSMarc St-Jean depends on EXPERIMENTAL 40039d30c13SAnoop P A select CEVT_R4K 40139d30c13SAnoop P A select CSRC_R4K 4029267a30dSMarc St-Jean select DMA_NONCOHERENT 4039267a30dSMarc St-Jean select SWAP_IO_SPACE 4049267a30dSMarc St-Jean select NO_EXCEPT_FILL 4059267a30dSMarc St-Jean select BOOT_RAW 4069267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 4079267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 4089267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 4099267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 4109267a30dSMarc St-Jean select IRQ_CPU 4119267a30dSMarc St-Jean select SERIAL_8250 4129267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 4139267a30dSMarc St-Jean help 4149267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 4159267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 4169267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 4179267a30dSMarc St-Jean a variety of MIPS cores. 4189267a30dSMarc St-Jean 4195e83d430SRalf Baechleconfig PMC_YOSEMITE 4203fa986faSMartin Michlmayr bool "PMC-Sierra Yosemite eval board" 42142f77542SRalf Baechle select CEVT_R4K 422940f6b48SRalf Baechle select CSRC_R4K 4235e83d430SRalf Baechle select DMA_COHERENT 4245e83d430SRalf Baechle select HW_HAS_PCI 4255e83d430SRalf Baechle select IRQ_CPU 4265e83d430SRalf Baechle select IRQ_CPU_RM7K 4275e83d430SRalf Baechle select IRQ_CPU_RM9K 4285e83d430SRalf Baechle select SWAP_IO_SPACE 4297cf8053bSRalf Baechle select SYS_HAS_CPU_RM9000 43036a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 4315e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 4325e83d430SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 4335e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 4345e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 435e73ea273SRalf Baechle select SYS_SUPPORTS_SMP 4365e83d430SRalf Baechle help 4375e83d430SRalf Baechle Yosemite is an evaluation board for the RM9000x2 processor 4385e83d430SRalf Baechle manufactured by PMC-Sierra. 4391da177e4SLinus Torvalds 440a3a0f8c8SDavid VomLehnconfig POWERTV 441a3a0f8c8SDavid VomLehn bool "Cisco PowerTV" 442a3a0f8c8SDavid VomLehn select BOOT_ELF32 443a3a0f8c8SDavid VomLehn select CEVT_R4K 444a3a0f8c8SDavid VomLehn select CPU_MIPSR2_IRQ_VI 445a3a0f8c8SDavid VomLehn select CPU_MIPSR2_IRQ_EI 446a3a0f8c8SDavid VomLehn select CSRC_POWERTV 447a3a0f8c8SDavid VomLehn select DMA_NONCOHERENT 448a3a0f8c8SDavid VomLehn select HW_HAS_PCI 449a3a0f8c8SDavid VomLehn select SYS_HAS_EARLY_PRINTK 450a3a0f8c8SDavid VomLehn select SYS_HAS_CPU_MIPS32_R2 451a3a0f8c8SDavid VomLehn select SYS_SUPPORTS_32BIT_KERNEL 452a3a0f8c8SDavid VomLehn select SYS_SUPPORTS_BIG_ENDIAN 453a3a0f8c8SDavid VomLehn select SYS_SUPPORTS_HIGHMEM 454a3a0f8c8SDavid VomLehn select USB_OHCI_LITTLE_ENDIAN 455a3a0f8c8SDavid VomLehn help 456a3a0f8c8SDavid VomLehn This enables support for the Cisco PowerTV Platform. 457a3a0f8c8SDavid VomLehn 4581da177e4SLinus Torvaldsconfig SGI_IP22 4593fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 4600e2794b0SRalf Baechle select FW_ARC 4610e2794b0SRalf Baechle select FW_ARC32 4621da177e4SLinus Torvalds select BOOT_ELF32 46342f77542SRalf Baechle select CEVT_R4K 464940f6b48SRalf Baechle select CSRC_R4K 465e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 4661da177e4SLinus Torvalds select DMA_NONCOHERENT 4675e83d430SRalf Baechle select HW_HAS_EISA 468d865bea4SRalf Baechle select I8253 46968de4803SThomas Bogendoerfer select I8259 4701da177e4SLinus Torvalds select IP22_CPU_SCACHE 4711da177e4SLinus Torvalds select IRQ_CPU 472aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 473e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 474e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 47536e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 476e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 477e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 478e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 4791da177e4SLinus Torvalds select SWAP_IO_SPACE 4807cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 4817cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 4822b5e63f6SMartin Michlmayr # 4832b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 4842b5e63f6SMartin Michlmayr # memory during early boot on some machines. 4852b5e63f6SMartin Michlmayr # 4862b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 4872b5e63f6SMartin Michlmayr # for a more details discussion 4882b5e63f6SMartin Michlmayr # 4892b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 490ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 491ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4925e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 4931da177e4SLinus Torvalds help 4941da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 4951da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 4961da177e4SLinus Torvalds that runs on these, say Y here. 4971da177e4SLinus Torvalds 4981da177e4SLinus Torvaldsconfig SGI_IP27 4993fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 5000e2794b0SRalf Baechle select FW_ARC 5010e2794b0SRalf Baechle select FW_ARC64 5025e83d430SRalf Baechle select BOOT_ELF64 503e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 504634286f1SRalf Baechle select DMA_COHERENT 50536a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 5061da177e4SLinus Torvalds select HW_HAS_PCI 507130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 5087cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 509ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5105e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 511d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 5121a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 5131da177e4SLinus Torvalds help 5141da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 5151da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 5161da177e4SLinus Torvalds here. 5171da177e4SLinus Torvalds 518e2defae5SThomas Bogendoerferconfig SGI_IP28 519e2defae5SThomas Bogendoerfer bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)" 520e2defae5SThomas Bogendoerfer depends on EXPERIMENTAL 5210e2794b0SRalf Baechle select FW_ARC 5220e2794b0SRalf Baechle select FW_ARC64 523e2defae5SThomas Bogendoerfer select BOOT_ELF64 524e2defae5SThomas Bogendoerfer select CEVT_R4K 525e2defae5SThomas Bogendoerfer select CSRC_R4K 526e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 527e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 528e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 529e2defae5SThomas Bogendoerfer select IRQ_CPU 530e2defae5SThomas Bogendoerfer select HW_HAS_EISA 531e2defae5SThomas Bogendoerfer select I8253 532e2defae5SThomas Bogendoerfer select I8259 533e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 534e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 5355b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 536e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 537e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 538e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 539e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 540e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 5412b5e63f6SMartin Michlmayr # 5422b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 5432b5e63f6SMartin Michlmayr # memory during early boot on some machines. 5442b5e63f6SMartin Michlmayr # 5452b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 5462b5e63f6SMartin Michlmayr # for a more details discussion 5472b5e63f6SMartin Michlmayr # 5482b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 549e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 550e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 551e2defae5SThomas Bogendoerfer help 552e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 553e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 554e2defae5SThomas Bogendoerfer 5551da177e4SLinus Torvaldsconfig SGI_IP32 556cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 5570e2794b0SRalf Baechle select FW_ARC 5580e2794b0SRalf Baechle select FW_ARC32 5591da177e4SLinus Torvalds select BOOT_ELF32 56042f77542SRalf Baechle select CEVT_R4K 561940f6b48SRalf Baechle select CSRC_R4K 5621da177e4SLinus Torvalds select DMA_NONCOHERENT 5631da177e4SLinus Torvalds select HW_HAS_PCI 564dd67b155SRalf Baechle select IRQ_CPU 5651da177e4SLinus Torvalds select R5000_CPU_SCACHE 5661da177e4SLinus Torvalds select RM7000_CPU_SCACHE 5677cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 5687cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 5697cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 570dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 571ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5725e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5731da177e4SLinus Torvalds help 5741da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 5751da177e4SLinus Torvalds 576ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 577ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 5785e83d430SRalf Baechle depends on EXPERIMENTAL 5795e83d430SRalf Baechle select BOOT_ELF32 5805e83d430SRalf Baechle select DMA_COHERENT 5815e83d430SRalf Baechle select SIBYTE_BCM1120 5825e83d430SRalf Baechle select SWAP_IO_SPACE 5837cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5845e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5855e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5865e83d430SRalf Baechle 587ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 588ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 5895e83d430SRalf Baechle depends on EXPERIMENTAL 5905e83d430SRalf Baechle select BOOT_ELF32 5915e83d430SRalf Baechle select DMA_COHERENT 5925e83d430SRalf Baechle select SIBYTE_BCM1120 5935e83d430SRalf Baechle select SWAP_IO_SPACE 5947cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 5955e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 5965e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 5975e83d430SRalf Baechle 5985e83d430SRalf Baechleconfig SIBYTE_CRHONE 5993fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 6005e83d430SRalf Baechle depends on EXPERIMENTAL 6015e83d430SRalf Baechle select BOOT_ELF32 6025e83d430SRalf Baechle select DMA_COHERENT 6035e83d430SRalf Baechle select SIBYTE_BCM1125 6045e83d430SRalf Baechle select SWAP_IO_SPACE 6057cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 6065e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 6075e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 6085e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 6095e83d430SRalf Baechle 610ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 611ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 612ade299d8SYoichi Yuasa depends on EXPERIMENTAL 613ade299d8SYoichi Yuasa select BOOT_ELF32 614ade299d8SYoichi Yuasa select DMA_COHERENT 615ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 616ade299d8SYoichi Yuasa select SWAP_IO_SPACE 617ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 618ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 619ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 620ade299d8SYoichi Yuasa 621ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 622ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 623ade299d8SYoichi Yuasa select BOOT_ELF32 624ade299d8SYoichi Yuasa select DMA_COHERENT 625fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 626ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_2 627ade299d8SYoichi Yuasa select SIBYTE_SB1250 628ade299d8SYoichi Yuasa select SWAP_IO_SPACE 629ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 630ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 631ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 632ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 633cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 634ade299d8SYoichi Yuasa 635ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 636ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 637ade299d8SYoichi Yuasa depends on EXPERIMENTAL 638ade299d8SYoichi Yuasa select BOOT_ELF32 639ade299d8SYoichi Yuasa select DMA_COHERENT 640fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 641ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_2 642ade299d8SYoichi Yuasa select SIBYTE_SB1250 643ade299d8SYoichi Yuasa select SWAP_IO_SPACE 644ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 645ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 646ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 647ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 648ade299d8SYoichi Yuasa 649ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 650ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 651ade299d8SYoichi Yuasa depends on EXPERIMENTAL 652ade299d8SYoichi Yuasa select BOOT_ELF32 653ade299d8SYoichi Yuasa select DMA_COHERENT 654ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_2 655ade299d8SYoichi Yuasa select SIBYTE_SB1250 656ade299d8SYoichi Yuasa select SWAP_IO_SPACE 657ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 658ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 659ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 660ade299d8SYoichi Yuasa 661ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 662ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 663ade299d8SYoichi Yuasa select BOOT_ELF32 664ade299d8SYoichi Yuasa select DMA_COHERENT 665ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 666ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 667ade299d8SYoichi Yuasa select SWAP_IO_SPACE 668ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 669ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 670651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 671ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 672cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 673ade299d8SYoichi Yuasa 67414b36af4SThomas Bogendoerferconfig SNI_RM 67514b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 6760e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 6770e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 678231a35d3SThomas Bogendoerfer select SNIPROM if CPU_BIG_ENDIAN 6795e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 6805e83d430SRalf Baechle select BOOT_ELF32 68142f77542SRalf Baechle select CEVT_R4K 682940f6b48SRalf Baechle select CSRC_R4K 683e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 6845e83d430SRalf Baechle select DMA_NONCOHERENT 6855e83d430SRalf Baechle select GENERIC_ISA_DMA 6868a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 6875e83d430SRalf Baechle select HW_HAS_EISA 6885e83d430SRalf Baechle select HW_HAS_PCI 689c066a32aSThomas Bogendoerfer select IRQ_CPU 690d865bea4SRalf Baechle select I8253 6915e83d430SRalf Baechle select I8259 6925e83d430SRalf Baechle select ISA 6934a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 6947cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6954a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 696c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 6974a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 69836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 699ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 7005e83d430SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 7014a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7025e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7035e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7041da177e4SLinus Torvalds help 70514b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 70614b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 7075e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 7085e83d430SRalf Baechle support this machine type. 7091da177e4SLinus Torvalds 710edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 711edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 7125e83d430SRalf Baechle 713edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 714edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 71523fbee9dSRalf Baechle 71673b4390fSRalf Baechleconfig MIKROTIK_RB532 71773b4390fSRalf Baechle bool "Mikrotik RB532 boards" 71873b4390fSRalf Baechle select CEVT_R4K 71973b4390fSRalf Baechle select CSRC_R4K 72073b4390fSRalf Baechle select DMA_NONCOHERENT 72173b4390fSRalf Baechle select HW_HAS_PCI 72273b4390fSRalf Baechle select IRQ_CPU 72373b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 72473b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 72573b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 72673b4390fSRalf Baechle select SWAP_IO_SPACE 72773b4390fSRalf Baechle select BOOT_RAW 728d888e25bSFlorian Fainelli select ARCH_REQUIRE_GPIOLIB 72973b4390fSRalf Baechle help 73073b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 73173b4390fSRalf Baechle based on the IDT RC32434 SoC. 73273b4390fSRalf Baechle 733ade299d8SYoichi Yuasaconfig WR_PPMC 734ade299d8SYoichi Yuasa bool "Wind River PPMC board" 73542f77542SRalf Baechle select CEVT_R4K 736940f6b48SRalf Baechle select CSRC_R4K 737ade299d8SYoichi Yuasa select IRQ_CPU 738ade299d8SYoichi Yuasa select BOOT_ELF32 739ade299d8SYoichi Yuasa select DMA_NONCOHERENT 740ade299d8SYoichi Yuasa select HW_HAS_PCI 741ade299d8SYoichi Yuasa select PCI_GT64XXX_PCI0 742ade299d8SYoichi Yuasa select SWAP_IO_SPACE 743ade299d8SYoichi Yuasa select SYS_HAS_CPU_MIPS32_R1 744ade299d8SYoichi Yuasa select SYS_HAS_CPU_MIPS32_R2 745ade299d8SYoichi Yuasa select SYS_HAS_CPU_MIPS64_R1 746ade299d8SYoichi Yuasa select SYS_HAS_CPU_NEVADA 747ade299d8SYoichi Yuasa select SYS_HAS_CPU_RM7000 748ade299d8SYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 749ade299d8SYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 750ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 751ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 752ade299d8SYoichi Yuasa help 753ade299d8SYoichi Yuasa This enables support for the Wind River MIPS32 4KC PPMC evaluation 754ade299d8SYoichi Yuasa board, which is based on GT64120 bridge chip. 755ade299d8SYoichi Yuasa 756a86c7f72SDavid Daneyconfig CAVIUM_OCTEON_SIMULATOR 757c9d89d97SYoichi Yuasa bool "Cavium Networks Octeon Simulator" 758a86c7f72SDavid Daney select CEVT_R4K 759a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 760a86c7f72SDavid Daney select DMA_COHERENT 761a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 762a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 763773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 7645e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 765465aaed0SDavid Daney select HOLES_IN_ZONE 766a86c7f72SDavid Daney help 767a86c7f72SDavid Daney The Octeon simulator is software performance model of the Cavium 768a86c7f72SDavid Daney Octeon Processor. It supports simulating Octeon processors on x86 769a86c7f72SDavid Daney hardware. 770a86c7f72SDavid Daney 771a86c7f72SDavid Daneyconfig CAVIUM_OCTEON_REFERENCE_BOARD 772c9d89d97SYoichi Yuasa bool "Cavium Networks Octeon reference board" 773a86c7f72SDavid Daney select CEVT_R4K 774a86c7f72SDavid Daney select 64BIT_PHYS_ADDR 775a86c7f72SDavid Daney select DMA_COHERENT 776a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 777a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 778f65aad41SRalf Baechle select EDAC_SUPPORT 779773cb77dSRalf Baechle select SYS_SUPPORTS_HOTPLUG_CPU 780a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 7815e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 782a86c7f72SDavid Daney select SWAP_IO_SPACE 783e8635b48SDavid Daney select HW_HAS_PCI 784e8635b48SDavid Daney select ARCH_SUPPORTS_MSI 785f00e001eSDavid Daney select ZONE_DMA32 786340fbb8bSDavid Daney select USB_ARCH_HAS_OHCI 787340fbb8bSDavid Daney select USB_ARCH_HAS_EHCI 788465aaed0SDavid Daney select HOLES_IN_ZONE 789a86c7f72SDavid Daney help 790a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 791a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 792a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 793a86c7f72SDavid Daney Some of the supported boards are: 794a86c7f72SDavid Daney EBT3000 795a86c7f72SDavid Daney EBH3000 796a86c7f72SDavid Daney EBH3100 797a86c7f72SDavid Daney Thunder 798a86c7f72SDavid Daney Kodama 799a86c7f72SDavid Daney Hikari 800a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 801a86c7f72SDavid Daney 8027f058e85SJayachandran Cconfig NLM_XLR_BOARD 8037f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 8047f058e85SJayachandran C depends on EXPERIMENTAL 8057f058e85SJayachandran C select BOOT_ELF32 8067f058e85SJayachandran C select NLM_COMMON 8077f058e85SJayachandran C select SYS_HAS_CPU_XLR 8087f058e85SJayachandran C select SYS_SUPPORTS_SMP 8097f058e85SJayachandran C select HW_HAS_PCI 8107f058e85SJayachandran C select SWAP_IO_SPACE 8117f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8127f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 8137f058e85SJayachandran C select 64BIT_PHYS_ADDR 8147f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8157f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 8167f058e85SJayachandran C select DMA_COHERENT 8177f058e85SJayachandran C select NR_CPUS_DEFAULT_32 8187f058e85SJayachandran C select CEVT_R4K 8197f058e85SJayachandran C select CSRC_R4K 8207f058e85SJayachandran C select IRQ_CPU 821f32671a8SGanesan Ramalingam select ARCH_SUPPORTS_MSI 8227f058e85SJayachandran C select ZONE_DMA if 64BIT 8237f058e85SJayachandran C select SYNC_R4K 8247f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 825f35574a3SJayachandran C select USB_ARCH_HAS_OHCI if USB_SUPPORT 826f35574a3SJayachandran C select USB_ARCH_HAS_EHCI if USB_SUPPORT 8277f058e85SJayachandran C help 8287f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 8297f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 8307f058e85SJayachandran C 8311c773ea4SJayachandran Cconfig NLM_XLP_BOARD 8321c773ea4SJayachandran C bool "Netlogic XLP based systems" 8331c773ea4SJayachandran C depends on EXPERIMENTAL 8341c773ea4SJayachandran C select BOOT_ELF32 8351c773ea4SJayachandran C select NLM_COMMON 8361c773ea4SJayachandran C select SYS_HAS_CPU_XLP 8371c773ea4SJayachandran C select SYS_SUPPORTS_SMP 8381c773ea4SJayachandran C select HW_HAS_PCI 8391c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 8401c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 8411c773ea4SJayachandran C select 64BIT_PHYS_ADDR 8421c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 8431c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 8441c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 8451c773ea4SJayachandran C select DMA_COHERENT 8461c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 8471c773ea4SJayachandran C select CEVT_R4K 8481c773ea4SJayachandran C select CSRC_R4K 8491c773ea4SJayachandran C select IRQ_CPU 8501c773ea4SJayachandran C select ZONE_DMA if 64BIT 8511c773ea4SJayachandran C select SYNC_R4K 8521c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 8532f6528e1SJayachandran C select USE_OF 8541c773ea4SJayachandran C help 8551c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 8561c773ea4SJayachandran C Say Y here if you have a XLP based board. 8571c773ea4SJayachandran C 8581da177e4SLinus Torvaldsendchoice 8591da177e4SLinus Torvalds 860e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 861d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 862a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 863e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 8645e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 8655ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 8668ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 8671f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 8685e83d430SRalf Baechlesource "arch/mips/pmc-sierra/Kconfig" 869a3a0f8c8SDavid VomLehnsource "arch/mips/powertv/Kconfig" 87029c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 87138b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 87222b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 8735e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 874a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 87585749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig" 876ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig" 8777f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 87838b18f72SRalf Baechle 8795e83d430SRalf Baechleendmenu 8805e83d430SRalf Baechle 8811da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 8821da177e4SLinus Torvalds bool 8831da177e4SLinus Torvalds default y 8841da177e4SLinus Torvalds 8851da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 8861da177e4SLinus Torvalds bool 8871da177e4SLinus Torvalds 888f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 889f0d1b0b3SDavid Howells bool 890f0d1b0b3SDavid Howells default n 891f0d1b0b3SDavid Howells 892f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 893f0d1b0b3SDavid Howells bool 894f0d1b0b3SDavid Howells default n 895f0d1b0b3SDavid Howells 8963c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 8973c9ee7efSAkinobu Mita bool 8983c9ee7efSAkinobu Mita default y 8993c9ee7efSAkinobu Mita 9001da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 9011da177e4SLinus Torvalds bool 9021da177e4SLinus Torvalds default y 9031da177e4SLinus Torvalds 904ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 9051cc89038SAtsushi Nemoto bool 9061cc89038SAtsushi Nemoto default y 9071cc89038SAtsushi Nemoto 9081da177e4SLinus Torvalds# 9091da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 9101da177e4SLinus Torvalds# 9110e2794b0SRalf Baechleconfig FW_ARC 9121da177e4SLinus Torvalds bool 9131da177e4SLinus Torvalds 91461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 91561ed242dSRalf Baechle bool 91661ed242dSRalf Baechle 9179267a30dSMarc St-Jeanconfig BOOT_RAW 9189267a30dSMarc St-Jean bool 9199267a30dSMarc St-Jean 920217dd11eSRalf Baechleconfig CEVT_BCM1480 921217dd11eSRalf Baechle bool 922217dd11eSRalf Baechle 9236457d9fcSYoichi Yuasaconfig CEVT_DS1287 9246457d9fcSYoichi Yuasa bool 9256457d9fcSYoichi Yuasa 9261097c6acSYoichi Yuasaconfig CEVT_GT641XX 9271097c6acSYoichi Yuasa bool 9281097c6acSYoichi Yuasa 92942f77542SRalf Baechleconfig CEVT_R4K 93042f77542SRalf Baechle bool 93142f77542SRalf Baechle 932217dd11eSRalf Baechleconfig CEVT_SB1250 933217dd11eSRalf Baechle bool 934217dd11eSRalf Baechle 935229f773eSAtsushi Nemotoconfig CEVT_TXX9 936229f773eSAtsushi Nemoto bool 937229f773eSAtsushi Nemoto 938217dd11eSRalf Baechleconfig CSRC_BCM1480 939217dd11eSRalf Baechle bool 940217dd11eSRalf Baechle 9414247417dSYoichi Yuasaconfig CSRC_IOASIC 9424247417dSYoichi Yuasa bool 9434247417dSYoichi Yuasa 944a3a0f8c8SDavid VomLehnconfig CSRC_POWERTV 945a3a0f8c8SDavid VomLehn bool 946a3a0f8c8SDavid VomLehn 947940f6b48SRalf Baechleconfig CSRC_R4K 948940f6b48SRalf Baechle bool 949940f6b48SRalf Baechle 950217dd11eSRalf Baechleconfig CSRC_SB1250 951217dd11eSRalf Baechle bool 952217dd11eSRalf Baechle 953a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 954a9aec7feSAtsushi Nemoto select GENERIC_GPIO 9557444a72eSMichael Buesch select ARCH_REQUIRE_GPIOLIB 956a9aec7feSAtsushi Nemoto bool 957a9aec7feSAtsushi Nemoto 9580e2794b0SRalf Baechleconfig FW_CFE 959df78b5c8SAurelien Jarno bool 960df78b5c8SAurelien Jarno 9614bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 9624bafad92SFUJITA Tomonori def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT 9634bafad92SFUJITA Tomonori 9641da177e4SLinus Torvaldsconfig DMA_COHERENT 9651da177e4SLinus Torvalds bool 9661da177e4SLinus Torvalds 9671da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 9681da177e4SLinus Torvalds bool 969e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 9704ce588cdSRalf Baechle 971e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 9724ce588cdSRalf Baechle bool 9731da177e4SLinus Torvalds 97436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 9751da177e4SLinus Torvalds bool 9761da177e4SLinus Torvalds 977dbb74540SRalf Baechleconfig HOTPLUG_CPU 9781b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 9791b2bc75cSRalf Baechle depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU 9801b2bc75cSRalf Baechle help 9811b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 9821b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 9831b2bc75cSRalf Baechle (Note: power management support will enable this option 9841b2bc75cSRalf Baechle automatically on SMP systems. ) 9851b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 9861b2bc75cSRalf Baechle 9871b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 988dbb74540SRalf Baechle bool 989dbb74540SRalf Baechle 9901da177e4SLinus Torvaldsconfig I8259 9911da177e4SLinus Torvalds bool 9921da177e4SLinus Torvalds 9931da177e4SLinus Torvaldsconfig MIPS_BONITO64 9941da177e4SLinus Torvalds bool 9951da177e4SLinus Torvalds 9961da177e4SLinus Torvaldsconfig MIPS_MSC 9971da177e4SLinus Torvalds bool 9981da177e4SLinus Torvalds 9991f21d2bdSBrian Murphyconfig MIPS_NILE4 10001f21d2bdSBrian Murphy bool 10011f21d2bdSBrian Murphy 10021da177e4SLinus Torvaldsconfig MIPS_DISABLE_OBSOLETE_IDE 10031da177e4SLinus Torvalds bool 10041da177e4SLinus Torvalds 100539b8d525SRalf Baechleconfig SYNC_R4K 100639b8d525SRalf Baechle bool 100739b8d525SRalf Baechle 1008487d70d0SGabor Juhosconfig MIPS_MACHINE 1009487d70d0SGabor Juhos def_bool n 1010487d70d0SGabor Juhos 1011d388d685SMaciej W. Rozyckiconfig NO_IOPORT 1012d388d685SMaciej W. Rozycki def_bool n 1013d388d685SMaciej W. Rozycki 10148313da30SRalf Baechleconfig GENERIC_ISA_DMA 10158313da30SRalf Baechle bool 10168313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1017a35bee8aSNamhyung Kim select ISA_DMA_API 10188313da30SRalf Baechle 1019aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1020aa414dffSRalf Baechle bool 10218313da30SRalf Baechle select GENERIC_ISA_DMA 1022aa414dffSRalf Baechle 1023a35bee8aSNamhyung Kimconfig ISA_DMA_API 1024a35bee8aSNamhyung Kim bool 1025a35bee8aSNamhyung Kim 102609663335SYoichi Yuasaconfig GENERIC_GPIO 102709663335SYoichi Yuasa bool 102809663335SYoichi Yuasa 1029465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1030465aaed0SDavid Daney bool 1031465aaed0SDavid Daney 10325e83d430SRalf Baechle# 10336b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 10345e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 10355e83d430SRalf Baechle# choice statement should be more obvious to the user. 10365e83d430SRalf Baechle# 10375e83d430SRalf Baechlechoice 10386b2aac42SMasanari Iida prompt "Endianness selection" 10391da177e4SLinus Torvalds help 10401da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 10415e83d430SRalf Baechle byte order. These modes require different kernels and a different 10423cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 10435e83d430SRalf Baechle particular system but some systems are just as commonly used in the 10443dde6ad8SDavid Sterba one or the other endianness. 10455e83d430SRalf Baechle 10465e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 10475e83d430SRalf Baechle bool "Big endian" 10485e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 10495e83d430SRalf Baechle 10505e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 10515e83d430SRalf Baechle bool "Little endian" 10525e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 10535e83d430SRalf Baechle help 10545e83d430SRalf Baechle 10555e83d430SRalf Baechleendchoice 10565e83d430SRalf Baechle 105722b0763aSDavid Daneyconfig EXPORT_UASM 105822b0763aSDavid Daney bool 105922b0763aSDavid Daney 10602116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 10612116245eSRalf Baechle bool 10622116245eSRalf Baechle 10635e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 10645e83d430SRalf Baechle bool 10655e83d430SRalf Baechle 10665e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 10675e83d430SRalf Baechle bool 10681da177e4SLinus Torvalds 10699cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 10709cffd154SDavid Daney bool 10719cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 10729cffd154SDavid Daney default y 10739cffd154SDavid Daney 1074aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1075aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1076aa1762f4SDavid Daney 10771da177e4SLinus Torvaldsconfig IRQ_CPU 10781da177e4SLinus Torvalds bool 10791da177e4SLinus Torvalds 10801da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 10811da177e4SLinus Torvalds bool 10821da177e4SLinus Torvalds 10835e83d430SRalf Baechleconfig IRQ_CPU_RM9K 10845e83d430SRalf Baechle bool 10855e83d430SRalf Baechle 10869267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 10879267a30dSMarc St-Jean bool 10889267a30dSMarc St-Jean 10899267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 10909267a30dSMarc St-Jean bool 10919267a30dSMarc St-Jean 10928420fd00SAtsushi Nemotoconfig IRQ_TXX9 10938420fd00SAtsushi Nemoto bool 10948420fd00SAtsushi Nemoto 1095d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1096d5ab1a69SYoichi Yuasa bool 1097d5ab1a69SYoichi Yuasa 109839b8d525SRalf Baechleconfig IRQ_GIC 109939b8d525SRalf Baechle bool 110039b8d525SRalf Baechle 11011da177e4SLinus Torvaldsconfig MIPS_BOARDS_GEN 11021da177e4SLinus Torvalds bool 11031da177e4SLinus Torvalds 1104252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 11051da177e4SLinus Torvalds bool 11061da177e4SLinus Torvalds 11079267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 11089267a30dSMarc St-Jean bool 11099267a30dSMarc St-Jean 1110663c3d90Sthomas@koeller.dyndns.orgconfig MIPS_RM9122 1111663c3d90Sthomas@koeller.dyndns.org bool 1112663c3d90Sthomas@koeller.dyndns.org select SERIAL_RM9000 1113663c3d90Sthomas@koeller.dyndns.org 1114a83860c2SRalf Baechleconfig SOC_EMMA2RH 1115a83860c2SRalf Baechle bool 1116a83860c2SRalf Baechle select CEVT_R4K 1117a83860c2SRalf Baechle select CSRC_R4K 1118a83860c2SRalf Baechle select DMA_NONCOHERENT 1119a83860c2SRalf Baechle select IRQ_CPU 1120a83860c2SRalf Baechle select SWAP_IO_SPACE 1121a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1122a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1123a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1124a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1125a83860c2SRalf Baechle 1126edb6310aSDaniel Lairdconfig SOC_PNX833X 1127edb6310aSDaniel Laird bool 1128edb6310aSDaniel Laird select CEVT_R4K 1129edb6310aSDaniel Laird select CSRC_R4K 1130edb6310aSDaniel Laird select IRQ_CPU 1131edb6310aSDaniel Laird select DMA_NONCOHERENT 1132edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1133edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1134edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1135edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1136edb6310aSDaniel Laird select GENERIC_GPIO 1137edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1138edb6310aSDaniel Laird 1139edb6310aSDaniel Lairdconfig SOC_PNX8335 1140edb6310aSDaniel Laird bool 1141edb6310aSDaniel Laird select SOC_PNX833X 1142edb6310aSDaniel Laird 1143bdf21b18SPete Popovconfig PNX8550 1144bdf21b18SPete Popov bool 1145bdf21b18SPete Popov select SOC_PNX8550 1146bdf21b18SPete Popov 1147bdf21b18SPete Popovconfig SOC_PNX8550 1148bdf21b18SPete Popov bool 1149bdf21b18SPete Popov select DMA_NONCOHERENT 1150bdf21b18SPete Popov select HW_HAS_PCI 1151b8c2a77cSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 115236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 11537cf8053bSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 11544ead1681SFlorian Fainelli select GENERIC_GPIO 1155bdf21b18SPete Popov 11561da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 11571da177e4SLinus Torvalds bool 11581da177e4SLinus Torvalds 1159663c3d90Sthomas@koeller.dyndns.orgconfig SERIAL_RM9000 1160663c3d90Sthomas@koeller.dyndns.org bool 1161663c3d90Sthomas@koeller.dyndns.org 1162e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1163e2defae5SThomas Bogendoerfer bool 1164e2defae5SThomas Bogendoerfer 11655b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 11665b438c44SThomas Bogendoerfer bool 11675b438c44SThomas Bogendoerfer 1168e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1169e2defae5SThomas Bogendoerfer bool 1170e2defae5SThomas Bogendoerfer 1171e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1172e2defae5SThomas Bogendoerfer bool 1173e2defae5SThomas Bogendoerfer 1174e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1175e2defae5SThomas Bogendoerfer bool 1176e2defae5SThomas Bogendoerfer 1177e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1178e2defae5SThomas Bogendoerfer bool 1179e2defae5SThomas Bogendoerfer 1180e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1181e2defae5SThomas Bogendoerfer bool 1182e2defae5SThomas Bogendoerfer 11830e2794b0SRalf Baechleconfig FW_ARC32 11845e83d430SRalf Baechle bool 11855e83d430SRalf Baechle 1186231a35d3SThomas Bogendoerferconfig SNIPROM 1187231a35d3SThomas Bogendoerfer bool 1188231a35d3SThomas Bogendoerfer 11891da177e4SLinus Torvaldsconfig BOOT_ELF32 11901da177e4SLinus Torvalds bool 11911da177e4SLinus Torvalds 11921da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 11931da177e4SLinus Torvalds int 1194c7088755SRalf Baechle default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL 11950db2b74eSRalf Baechle default "6" if MIPS_CPU_SCACHE 1196a86c7f72SDavid Daney default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON 11971da177e4SLinus Torvalds default "5" 11981da177e4SLinus Torvalds 11991da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 12001da177e4SLinus Torvalds bool 12011da177e4SLinus Torvalds 12021da177e4SLinus Torvaldsconfig ARC_CONSOLE 12031da177e4SLinus Torvalds bool "ARC console support" 1204e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 12051da177e4SLinus Torvalds 12061da177e4SLinus Torvaldsconfig ARC_MEMORY 12071da177e4SLinus Torvalds bool 120814b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 12091da177e4SLinus Torvalds default y 12101da177e4SLinus Torvalds 12111da177e4SLinus Torvaldsconfig ARC_PROMLIB 12121da177e4SLinus Torvalds bool 1213e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 12141da177e4SLinus Torvalds default y 12151da177e4SLinus Torvalds 12160e2794b0SRalf Baechleconfig FW_ARC64 12171da177e4SLinus Torvalds bool 12181da177e4SLinus Torvalds 12191da177e4SLinus Torvaldsconfig BOOT_ELF64 12201da177e4SLinus Torvalds bool 12211da177e4SLinus Torvalds 12221da177e4SLinus Torvaldsmenu "CPU selection" 12231da177e4SLinus Torvalds 12241da177e4SLinus Torvaldschoice 12251da177e4SLinus Torvalds prompt "CPU type" 12261da177e4SLinus Torvalds default CPU_R4X00 12271da177e4SLinus Torvalds 12283702bba5SWu Zhangjinconfig CPU_LOONGSON2E 12293702bba5SWu Zhangjin bool "Loongson 2E" 12303702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 12313702bba5SWu Zhangjin select CPU_LOONGSON2 12322a21c730SFuxin Zhang help 12332a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 12342a21c730SFuxin Zhang with many extensions. 12352a21c730SFuxin Zhang 123625985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 12376f7a251aSWu Zhangjin bonito64. 12386f7a251aSWu Zhangjin 12396f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 12406f7a251aSWu Zhangjin bool "Loongson 2F" 12416f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 12426f7a251aSWu Zhangjin select CPU_LOONGSON2 1243c197da91SArnaud Patard select GENERIC_GPIO 1244c197da91SArnaud Patard select ARCH_REQUIRE_GPIOLIB 12456f7a251aSWu Zhangjin help 12466f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 12476f7a251aSWu Zhangjin with many extensions. 12486f7a251aSWu Zhangjin 12496f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 12506f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 12516f7a251aSWu Zhangjin Loongson2E. 12526f7a251aSWu Zhangjin 1253ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1254ca585cf9SKelvin Cheung bool "Loongson 1B" 1255ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1256ca585cf9SKelvin Cheung select CPU_LOONGSON1 1257ca585cf9SKelvin Cheung help 1258ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1259ca585cf9SKelvin Cheung release 2 instruction set. 1260ca585cf9SKelvin Cheung 12616e760c8dSRalf Baechleconfig CPU_MIPS32_R1 12626e760c8dSRalf Baechle bool "MIPS32 Release 1" 12637cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 12646e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1265797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1266ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12676e760c8dSRalf Baechle help 12685e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 12691e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12701e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12711e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 12721e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12731e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 12741e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 12751e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 12761e5f1caaSRalf Baechle performance. 12771e5f1caaSRalf Baechle 12781e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 12791e5f1caaSRalf Baechle bool "MIPS32 Release 2" 12807cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 12811e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1282797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1283ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12841e5f1caaSRalf Baechle help 12855e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 12866e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 12876e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 12886e760c8dSRalf Baechle specific type of processor in your system, choose those that one 12896e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 12901da177e4SLinus Torvalds 12916e760c8dSRalf Baechleconfig CPU_MIPS64_R1 12926e760c8dSRalf Baechle bool "MIPS64 Release 1" 12937cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1294797798c1SRalf Baechle select CPU_HAS_PREFETCH 1295ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1296ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1297ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 12989cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 12996e760c8dSRalf Baechle help 13006e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 13016e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13026e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13036e760c8dSRalf Baechle specific type of processor in your system, choose those that one 13046e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13051e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 13061e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 13071e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 13081e5f1caaSRalf Baechle performance. 13091e5f1caaSRalf Baechle 13101e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 13111e5f1caaSRalf Baechle bool "MIPS64 Release 2" 13127cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1313797798c1SRalf Baechle select CPU_HAS_PREFETCH 13141e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13151e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1316ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13179cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 13181e5f1caaSRalf Baechle help 13191e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 13201e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 13211e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 13221e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 13231e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 13241da177e4SLinus Torvalds 13251da177e4SLinus Torvaldsconfig CPU_R3000 13261da177e4SLinus Torvalds bool "R3000" 13277cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1328f7062ddbSRalf Baechle select CPU_HAS_WB 1329ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1330797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 13311da177e4SLinus Torvalds help 13321da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 13331da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 13341da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 13351da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 13361da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 13371da177e4SLinus Torvalds try to recompile with R3000. 13381da177e4SLinus Torvalds 13391da177e4SLinus Torvaldsconfig CPU_TX39XX 13401da177e4SLinus Torvalds bool "R39XX" 13417cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1342ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvaldsconfig CPU_VR41XX 13451da177e4SLinus Torvalds bool "R41xx" 13467cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1347ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1348ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13491da177e4SLinus Torvalds help 13505e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 13511da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 13521da177e4SLinus Torvalds kernel built with this option will not run on any other type of 13531da177e4SLinus Torvalds processor or vice versa. 13541da177e4SLinus Torvalds 13551da177e4SLinus Torvaldsconfig CPU_R4300 13561da177e4SLinus Torvalds bool "R4300" 13577cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1358ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1359ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 13601da177e4SLinus Torvalds help 13611da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 13621da177e4SLinus Torvalds 13631da177e4SLinus Torvaldsconfig CPU_R4X00 13641da177e4SLinus Torvalds bool "R4x00" 13657cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1366ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1367ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1368970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13691da177e4SLinus Torvalds help 13701da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 13711da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 13721da177e4SLinus Torvalds 13731da177e4SLinus Torvaldsconfig CPU_TX49XX 13741da177e4SLinus Torvalds bool "R49XX" 13757cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1376de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1377ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1378ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1379970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13801da177e4SLinus Torvalds 13811da177e4SLinus Torvaldsconfig CPU_R5000 13821da177e4SLinus Torvalds bool "R5000" 13837cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1384ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1385ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1386970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13871da177e4SLinus Torvalds help 13881da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 13891da177e4SLinus Torvalds 13901da177e4SLinus Torvaldsconfig CPU_R5432 13911da177e4SLinus Torvalds bool "R5432" 13927cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 13935e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 13945e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1395970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 13961da177e4SLinus Torvalds 1397542c1020SShinya Kuribayashiconfig CPU_R5500 1398542c1020SShinya Kuribayashi bool "R5500" 1399542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1400542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1401542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 14029cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1403542c1020SShinya Kuribayashi help 1404542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1405542c1020SShinya Kuribayashi instruction set. 1406542c1020SShinya Kuribayashi 14071da177e4SLinus Torvaldsconfig CPU_R6000 14081da177e4SLinus Torvalds bool "R6000" 1409ed5ba2fbSYoichi Yuasa depends on EXPERIMENTAL 14107cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1411ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 14121da177e4SLinus Torvalds help 14131da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1414c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 14151da177e4SLinus Torvalds 14161da177e4SLinus Torvaldsconfig CPU_NEVADA 14171da177e4SLinus Torvalds bool "RM52xx" 14187cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1419ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1420ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1421970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14221da177e4SLinus Torvalds help 14231da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 14241da177e4SLinus Torvalds 14251da177e4SLinus Torvaldsconfig CPU_R8000 14261da177e4SLinus Torvalds bool "R8000" 1427ed5ba2fbSYoichi Yuasa depends on EXPERIMENTAL 14287cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 14295e83d430SRalf Baechle select CPU_HAS_PREFETCH 1430ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 14311da177e4SLinus Torvalds help 14321da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 14331da177e4SLinus Torvalds uncommon and the support for them is incomplete. 14341da177e4SLinus Torvalds 14351da177e4SLinus Torvaldsconfig CPU_R10000 14361da177e4SLinus Torvalds bool "R10000" 14377cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 14385e83d430SRalf Baechle select CPU_HAS_PREFETCH 1439ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1440ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1441797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1442970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14431da177e4SLinus Torvalds help 14441da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 14451da177e4SLinus Torvalds 14461da177e4SLinus Torvaldsconfig CPU_RM7000 14471da177e4SLinus Torvalds bool "RM7000" 14487cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 14495e83d430SRalf Baechle select CPU_HAS_PREFETCH 1450ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1451ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1452797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1453970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14541da177e4SLinus Torvalds 14551da177e4SLinus Torvaldsconfig CPU_RM9000 14561da177e4SLinus Torvalds bool "RM9000" 14577cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM9000 14585e83d430SRalf Baechle select CPU_HAS_PREFETCH 1459ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1460ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1461797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1462970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14630004a9dfSRalf Baechle select WEAK_ORDERING 14641da177e4SLinus Torvalds 14651da177e4SLinus Torvaldsconfig CPU_SB1 14661da177e4SLinus Torvalds bool "SB1" 14677cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1468ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1469ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1470797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1471970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 14720004a9dfSRalf Baechle select WEAK_ORDERING 14731da177e4SLinus Torvalds 1474a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1475a86c7f72SDavid Daney bool "Cavium Octeon processor" 14765e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 14777ee91de4SYoichi Yuasa select ARCH_SPARSEMEM_ENABLE 1478a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1479a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1480a86c7f72SDavid Daney select SYS_SUPPORTS_SMP 1481a86c7f72SDavid Daney select NR_CPUS_DEFAULT_16 1482a86c7f72SDavid Daney select WEAK_ORDERING 1483a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 14849cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14857ed18152SDavid Daney select LIBFDT 14867ed18152SDavid Daney select USE_OF 1487a86c7f72SDavid Daney help 1488a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1489a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1490a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1491a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1492a86c7f72SDavid Daney 1493c1c0c461SKevin Cernekeeconfig CPU_BMIPS3300 1494c1c0c461SKevin Cernekee bool "BMIPS3300" 1495c1c0c461SKevin Cernekee depends on SYS_HAS_CPU_BMIPS3300 14961bbb6c1bSKevin Cernekee select CPU_BMIPS 1497c1c0c461SKevin Cernekee help 1498c1c0c461SKevin Cernekee Broadcom BMIPS3300 processors. 1499c1c0c461SKevin Cernekee 1500c1c0c461SKevin Cernekeeconfig CPU_BMIPS4350 1501c1c0c461SKevin Cernekee bool "BMIPS4350" 1502c1c0c461SKevin Cernekee depends on SYS_HAS_CPU_BMIPS4350 15031bbb6c1bSKevin Cernekee select CPU_BMIPS 1504c1c0c461SKevin Cernekee select SYS_SUPPORTS_SMP 1505c1c0c461SKevin Cernekee select SYS_SUPPORTS_HOTPLUG_CPU 1506c1c0c461SKevin Cernekee help 1507c1c0c461SKevin Cernekee Broadcom BMIPS4350 ("VIPER") processors. 1508c1c0c461SKevin Cernekee 1509c1c0c461SKevin Cernekeeconfig CPU_BMIPS4380 1510c1c0c461SKevin Cernekee bool "BMIPS4380" 1511c1c0c461SKevin Cernekee depends on SYS_HAS_CPU_BMIPS4380 15121bbb6c1bSKevin Cernekee select CPU_BMIPS 1513c1c0c461SKevin Cernekee select SYS_SUPPORTS_SMP 1514c1c0c461SKevin Cernekee select SYS_SUPPORTS_HOTPLUG_CPU 1515c1c0c461SKevin Cernekee help 1516c1c0c461SKevin Cernekee Broadcom BMIPS4380 processors. 1517c1c0c461SKevin Cernekee 1518c1c0c461SKevin Cernekeeconfig CPU_BMIPS5000 1519c1c0c461SKevin Cernekee bool "BMIPS5000" 1520c1c0c461SKevin Cernekee depends on SYS_HAS_CPU_BMIPS5000 15211bbb6c1bSKevin Cernekee select CPU_BMIPS 1522c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 15231bbb6c1bSKevin Cernekee select MIPS_CPU_SCACHE 1524c1c0c461SKevin Cernekee select SYS_SUPPORTS_SMP 1525c1c0c461SKevin Cernekee select SYS_SUPPORTS_HOTPLUG_CPU 1526c1c0c461SKevin Cernekee help 1527c1c0c461SKevin Cernekee Broadcom BMIPS5000 processors. 1528c1c0c461SKevin Cernekee 15297f058e85SJayachandran Cconfig CPU_XLR 15307f058e85SJayachandran C bool "Netlogic XLR SoC" 15317f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 15327f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 15337f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 15347f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1535970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15367f058e85SJayachandran C select WEAK_ORDERING 15377f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 15387f058e85SJayachandran C help 15397f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 15401c773ea4SJayachandran C 15411c773ea4SJayachandran Cconfig CPU_XLP 15421c773ea4SJayachandran C bool "Netlogic XLP SoC" 15431c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 15441c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 15451c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 15461c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 15471c773ea4SJayachandran C select CPU_HAS_LLSC 15481c773ea4SJayachandran C select WEAK_ORDERING 15491c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 15501c773ea4SJayachandran C select CPU_HAS_PREFETCH 15511c773ea4SJayachandran C help 15521c773ea4SJayachandran C Netlogic Microsystems XLP processors. 15531da177e4SLinus Torvaldsendchoice 15541da177e4SLinus Torvalds 1555622844bfSWu Zhangjinif CPU_LOONGSON2F 1556622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1557622844bfSWu Zhangjin bool 1558622844bfSWu Zhangjin 1559622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1560622844bfSWu Zhangjin bool 1561622844bfSWu Zhangjin 1562622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1563622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1564622844bfSWu Zhangjin default y 1565622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1566622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1567622844bfSWu Zhangjin help 1568622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1569622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1570622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1571622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1572622844bfSWu Zhangjin 1573622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1574622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1575622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1576622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1577622844bfSWu Zhangjin systems. 1578622844bfSWu Zhangjin 1579622844bfSWu Zhangjin If unsure, please say Y. 1580622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1581622844bfSWu Zhangjin 15821b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 15831b93b3c3SWu Zhangjin bool 15841b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 15851b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 15861b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1587fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 15881b93b3c3SWu Zhangjin 15891b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 15901b93b3c3SWu Zhangjin bool 15911b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 15921b93b3c3SWu Zhangjin 15933702bba5SWu Zhangjinconfig CPU_LOONGSON2 15943702bba5SWu Zhangjin bool 15953702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 15963702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 15973702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1598970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15993702bba5SWu Zhangjin 1600ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1601ca585cf9SKelvin Cheung bool 1602ca585cf9SKelvin Cheung select CPU_MIPS32 1603ca585cf9SKelvin Cheung select CPU_MIPSR2 1604ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1605ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1606ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1607ca585cf9SKelvin Cheung 16081bbb6c1bSKevin Cernekeeconfig CPU_BMIPS 16091bbb6c1bSKevin Cernekee bool 16101bbb6c1bSKevin Cernekee select CPU_MIPS32 16111bbb6c1bSKevin Cernekee select CPU_SUPPORTS_32BIT_KERNEL 16121bbb6c1bSKevin Cernekee select DMA_NONCOHERENT 16131bbb6c1bSKevin Cernekee select IRQ_CPU 16141bbb6c1bSKevin Cernekee select SWAP_IO_SPACE 16151bbb6c1bSKevin Cernekee select WEAK_ORDERING 16161bbb6c1bSKevin Cernekee 16173702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 16182a21c730SFuxin Zhang bool 16192a21c730SFuxin Zhang 16206f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 16216f7a251aSWu Zhangjin bool 162255045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 162355045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 162422f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 16256f7a251aSWu Zhangjin 1626ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1627ca585cf9SKelvin Cheung bool 1628ca585cf9SKelvin Cheung 16297cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 16307cf8053bSRalf Baechle bool 16317cf8053bSRalf Baechle 16327cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 16337cf8053bSRalf Baechle bool 16347cf8053bSRalf Baechle 16357cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 16367cf8053bSRalf Baechle bool 16377cf8053bSRalf Baechle 16387cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 16397cf8053bSRalf Baechle bool 16407cf8053bSRalf Baechle 16417cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 16427cf8053bSRalf Baechle bool 16437cf8053bSRalf Baechle 16447cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 16457cf8053bSRalf Baechle bool 16467cf8053bSRalf Baechle 16477cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 16487cf8053bSRalf Baechle bool 16497cf8053bSRalf Baechle 16507cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 16517cf8053bSRalf Baechle bool 16527cf8053bSRalf Baechle 16537cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 16547cf8053bSRalf Baechle bool 16557cf8053bSRalf Baechle 16567cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 16577cf8053bSRalf Baechle bool 16587cf8053bSRalf Baechle 16597cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 16607cf8053bSRalf Baechle bool 16617cf8053bSRalf Baechle 16627cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 16637cf8053bSRalf Baechle bool 16647cf8053bSRalf Baechle 1665542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1666542c1020SShinya Kuribayashi bool 1667542c1020SShinya Kuribayashi 16687cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 16697cf8053bSRalf Baechle bool 16707cf8053bSRalf Baechle 16717cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 16727cf8053bSRalf Baechle bool 16737cf8053bSRalf Baechle 16747cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 16757cf8053bSRalf Baechle bool 16767cf8053bSRalf Baechle 16777cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 16787cf8053bSRalf Baechle bool 16797cf8053bSRalf Baechle 16807cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 16817cf8053bSRalf Baechle bool 16827cf8053bSRalf Baechle 16837cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM9000 16847cf8053bSRalf Baechle bool 16857cf8053bSRalf Baechle 16867cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 16877cf8053bSRalf Baechle bool 16887cf8053bSRalf Baechle 16895e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 16905e683389SDavid Daney bool 16915e683389SDavid Daney 1692c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS3300 1693c1c0c461SKevin Cernekee bool 1694c1c0c461SKevin Cernekee 1695c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1696c1c0c461SKevin Cernekee bool 1697c1c0c461SKevin Cernekee 1698c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1699c1c0c461SKevin Cernekee bool 1700c1c0c461SKevin Cernekee 1701c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1702c1c0c461SKevin Cernekee bool 1703c1c0c461SKevin Cernekee 17047f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 17057f058e85SJayachandran C bool 17067f058e85SJayachandran C 17071c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 17081c773ea4SJayachandran C bool 17091c773ea4SJayachandran C 171017099b11SRalf Baechle# 171117099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 171217099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 171317099b11SRalf Baechle# 17140004a9dfSRalf Baechleconfig WEAK_ORDERING 17150004a9dfSRalf Baechle bool 171617099b11SRalf Baechle 171717099b11SRalf Baechle# 171817099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 171917099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 172017099b11SRalf Baechle# 172117099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 172217099b11SRalf Baechle bool 17235e83d430SRalf Baechleendmenu 17245e83d430SRalf Baechle 17255e83d430SRalf Baechle# 17265e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 17275e83d430SRalf Baechle# 17285e83d430SRalf Baechleconfig CPU_MIPS32 17295e83d430SRalf Baechle bool 17305e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 17315e83d430SRalf Baechle 17325e83d430SRalf Baechleconfig CPU_MIPS64 17335e83d430SRalf Baechle bool 17345e83d430SRalf Baechle default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 17355e83d430SRalf Baechle 17365e83d430SRalf Baechle# 1737c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 17385e83d430SRalf Baechle# 17395e83d430SRalf Baechleconfig CPU_MIPSR1 17405e83d430SRalf Baechle bool 17415e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 17425e83d430SRalf Baechle 17435e83d430SRalf Baechleconfig CPU_MIPSR2 17445e83d430SRalf Baechle bool 1745a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 17465e83d430SRalf Baechle 17475e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 17485e83d430SRalf Baechle bool 17495e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 17505e83d430SRalf Baechle bool 17515e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 17525e83d430SRalf Baechle bool 17535e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 17545e83d430SRalf Baechle bool 175555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 175655045ff5SWu Zhangjin bool 175755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 175855045ff5SWu Zhangjin bool 17599cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 17609cffd154SDavid Daney bool 176122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 176222f1fdfdSWu Zhangjin bool 176382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 176482622284SDavid Daney bool 176582622284SDavid Daney default y if 64BIT && CPU_MIPSR2 17665e83d430SRalf Baechle 17678192c9eaSDavid Daney# 17688192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 17698192c9eaSDavid Daney# 17708192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 17718192c9eaSDavid Daney bool 1772f839490aSDavid Daney default y if CPU_MIPSR1 || CPU_MIPSR2 17738192c9eaSDavid Daney 17745e83d430SRalf Baechlemenu "Kernel type" 17755e83d430SRalf Baechle 17765e83d430SRalf Baechlechoice 17775e83d430SRalf Baechle prompt "Kernel code model" 17785e83d430SRalf Baechle help 17795e83d430SRalf Baechle You should only select this option if you have a workload that 17805e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 17815e83d430SRalf Baechle large memory. You will only be presented a single option in this 17825e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 17835e83d430SRalf Baechle 17845e83d430SRalf Baechleconfig 32BIT 17855e83d430SRalf Baechle bool "32-bit kernel" 17865e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 17875e83d430SRalf Baechle select TRAD_SIGNALS 17885e83d430SRalf Baechle help 17895e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 17905e83d430SRalf Baechleconfig 64BIT 17915e83d430SRalf Baechle bool "64-bit kernel" 17925e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 1793dbda6ac0SRalf Baechle select HAVE_SYSCALL_WRAPPERS 17945e83d430SRalf Baechle help 17955e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 17965e83d430SRalf Baechle 17975e83d430SRalf Baechleendchoice 17985e83d430SRalf Baechle 17991da177e4SLinus Torvaldschoice 18001da177e4SLinus Torvalds prompt "Kernel page size" 18011da177e4SLinus Torvalds default PAGE_SIZE_4KB 18021da177e4SLinus Torvalds 18031da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 18041da177e4SLinus Torvalds bool "4kB" 1805315fe625SWu Zhangjin depends on !CPU_LOONGSON2 18061da177e4SLinus Torvalds help 18071da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 18081da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 18091da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 18101da177e4SLinus Torvalds recommended for low memory systems. 18111da177e4SLinus Torvalds 18121da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 18131da177e4SLinus Torvalds bool "8kB" 1814c52399beSRalf Baechle depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON 18151da177e4SLinus Torvalds help 18161da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 18171da177e4SLinus Torvalds the price of higher memory consumption. This option is available 1818c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 1819c52399beSRalf Baechle suitable Linux distribution to support this. 18201da177e4SLinus Torvalds 18211da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 18221da177e4SLinus Torvalds bool "16kB" 1823714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 18241da177e4SLinus Torvalds help 18251da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 18261da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 1827714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 1828714bfad6SRalf Baechle Linux distribution to support this. 18291da177e4SLinus Torvalds 1830c52399beSRalf Baechleconfig PAGE_SIZE_32KB 1831c52399beSRalf Baechle bool "32kB" 1832c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 1833c52399beSRalf Baechle help 1834c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 1835c52399beSRalf Baechle the price of higher memory consumption. This option is available 1836c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 1837c52399beSRalf Baechle distribution to support this. 1838c52399beSRalf Baechle 18391da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 18401da177e4SLinus Torvalds bool "64kB" 18411da177e4SLinus Torvalds depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX 18421da177e4SLinus Torvalds help 18431da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 18441da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 18451da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 1846714bfad6SRalf Baechle writing this option is still high experimental. 18471da177e4SLinus Torvalds 18481da177e4SLinus Torvaldsendchoice 18491da177e4SLinus Torvalds 1850c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 1851c9bace7cSDavid Daney int "Maximum zone order" 185285f993b8SDavid Daney range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB 185385f993b8SDavid Daney default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB 185485f993b8SDavid Daney range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB 185585f993b8SDavid Daney default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB 185685f993b8SDavid Daney range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB 185785f993b8SDavid Daney default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB 1858c9bace7cSDavid Daney range 11 64 1859c9bace7cSDavid Daney default "11" 1860c9bace7cSDavid Daney help 1861c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 1862c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 1863c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 1864c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 1865c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 1866c9bace7cSDavid Daney increase this value. 1867c9bace7cSDavid Daney 1868c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 1869c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 1870c9bace7cSDavid Daney 1871c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 1872c9bace7cSDavid Daney when choosing a value for this option. 1873c9bace7cSDavid Daney 18741da177e4SLinus Torvaldsconfig BOARD_SCACHE 18751da177e4SLinus Torvalds bool 18761da177e4SLinus Torvalds 18771da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 18781da177e4SLinus Torvalds bool 18791da177e4SLinus Torvalds select BOARD_SCACHE 18801da177e4SLinus Torvalds 18819318c51aSChris Dearman# 18829318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 18839318c51aSChris Dearman# 18849318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 18859318c51aSChris Dearman bool 18869318c51aSChris Dearman select BOARD_SCACHE 18879318c51aSChris Dearman 18881da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 18891da177e4SLinus Torvalds bool 18901da177e4SLinus Torvalds select BOARD_SCACHE 18911da177e4SLinus Torvalds 18921da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 18931da177e4SLinus Torvalds bool 18941da177e4SLinus Torvalds select BOARD_SCACHE 18951da177e4SLinus Torvalds 18961da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 18971da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 18981da177e4SLinus Torvalds depends on CPU_SB1 18991da177e4SLinus Torvalds help 19001da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 19011da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 19021da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 19031da177e4SLinus Torvalds 19041da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 1905c8094b53SRalf Baechle bool 19061da177e4SLinus Torvalds 19073165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 19083165c846SFlorian Fainelli bool 19093165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 19103165c846SFlorian Fainelli 191191405eb6SFlorian Fainelliconfig CPU_R4K_FPU 191291405eb6SFlorian Fainelli bool 191391405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 191491405eb6SFlorian Fainelli 191562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 191662cedc4fSFlorian Fainelli bool 191762cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 191862cedc4fSFlorian Fainelli 1919340ee4b9SRalf Baechlechoice 1920340ee4b9SRalf Baechle prompt "MIPS MT options" 1921f41ae0b2SRalf Baechle 1922f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED 1923f41ae0b2SRalf Baechle bool "Disable multithreading support." 1924f41ae0b2SRalf Baechle help 1925f41ae0b2SRalf Baechle Use this option if your workload can't take advantage of 1926f41ae0b2SRalf Baechle MIPS hardware multithreading support. On systems that don't have 1927f41ae0b2SRalf Baechle the option of an MT-enabled processor this option will be the only 1928f41ae0b2SRalf Baechle option in this menu. 1929340ee4b9SRalf Baechle 193059d6ab86SRalf Baechleconfig MIPS_MT_SMP 193159d6ab86SRalf Baechle bool "Use 1 TC on each available VPE for SMP" 193259d6ab86SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 193359d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 1934d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 193559d6ab86SRalf Baechle select MIPS_MT 1936f510aa3bSRalf Baechle select NR_CPUS_DEFAULT_2 193759d6ab86SRalf Baechle select SMP 19380ab7aefcSRalf Baechle select SYS_SUPPORTS_SCHED_SMT if SMP 193959d6ab86SRalf Baechle select SYS_SUPPORTS_SMP 194087353d8aSRalf Baechle select SMP_UP 1941399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 194259d6ab86SRalf Baechle help 194325f12b33SRalf Baechle This is a kernel model which is known a VSMP but lately has been 194425f12b33SRalf Baechle marketesed into SMVP. 194525f12b33SRalf Baechle Virtual SMP uses the processor's VPEs to implement virtual 194625f12b33SRalf Baechle processors. In currently available configuration of the 34K processor 194725f12b33SRalf Baechle this allows for a dual processor. Both processors will share the same 194825f12b33SRalf Baechle primary caches; each will obtain the half of the TLB for it's own 194925f12b33SRalf Baechle exclusive use. For a layman this model can be described as similar to 195025f12b33SRalf Baechle what Intel calls Hyperthreading. 195125f12b33SRalf Baechle 195225f12b33SRalf Baechle For further information see http://www.linux-mips.org/wiki/34K#VSMP 195359d6ab86SRalf Baechle 195441c594abSRalf Baechleconfig MIPS_MT_SMTC 195541c594abSRalf Baechle bool "SMTC: Use all TCs on all VPEs for SMP" 1956f41ae0b2SRalf Baechle depends on CPU_MIPS32_R2 1957f41ae0b2SRalf Baechle #depends on CPU_MIPS64_R2 # once there is hardware ... 1958f41ae0b2SRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 1959f7062ddbSRalf Baechle select CPU_MIPSR2_IRQ_VI 1960d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 1961f41ae0b2SRalf Baechle select MIPS_MT 1962130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_8 196341c594abSRalf Baechle select SMP 196473b76c78SRalf Baechle select SYS_SUPPORTS_SMP 196587353d8aSRalf Baechle select SMP_UP 1966f41ae0b2SRalf Baechle help 1967f41ae0b2SRalf Baechle This is a kernel model which is known a SMTC or lately has been 1968f41ae0b2SRalf Baechle marketesed into SMVP. 196925f12b33SRalf Baechle is presenting the available TC's of the core as processors to Linux. 197025f12b33SRalf Baechle On currently available 34K processors this means a Linux system will 197125f12b33SRalf Baechle see up to 5 processors. The implementation of the SMTC kernel differs 197225f12b33SRalf Baechle significantly from VSMP and cannot efficiently coexist in the same 197325f12b33SRalf Baechle kernel binary so the choice between VSMP and SMTC is a compile time 197425f12b33SRalf Baechle decision. 197525f12b33SRalf Baechle 197625f12b33SRalf Baechle For further information see http://www.linux-mips.org/wiki/34K#SMTC 197741c594abSRalf Baechle 1978340ee4b9SRalf Baechleendchoice 1979340ee4b9SRalf Baechle 1980f41ae0b2SRalf Baechleconfig MIPS_MT 1981f41ae0b2SRalf Baechle bool 1982f41ae0b2SRalf Baechle 19830ab7aefcSRalf Baechleconfig SCHED_SMT 19840ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 19850ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 19860ab7aefcSRalf Baechle default n 19870ab7aefcSRalf Baechle help 19880ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 19890ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 19900ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 19910ab7aefcSRalf Baechle 19920ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 19930ab7aefcSRalf Baechle bool 19940ab7aefcSRalf Baechle 1995f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 1996f41ae0b2SRalf Baechle bool 1997f41ae0b2SRalf Baechle 1998f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 1999f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2000f088fc84SRalf Baechle default y 200107cc0c9eSRalf Baechle depends on MIPS_MT_SMP || MIPS_MT_SMTC 200207cc0c9eSRalf Baechle 200307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 200407cc0c9eSRalf Baechle bool "VPE loader support." 200507cc0c9eSRalf Baechle depends on SYS_SUPPORTS_MULTITHREADING 200607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 200707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 200807cc0c9eSRalf Baechle select MIPS_MT 200907cc0c9eSRalf Baechle help 201007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 201107cc0c9eSRalf Baechle onto another VPE and running it. 2012f088fc84SRalf Baechle 20130db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP 20140db34215SKevin D. Kissell bool "Use per-TC register bits as backstop for inhibited IM bits" 20150db34215SKevin D. Kissell depends on MIPS_MT_SMTC 20168531a35eSKevin D. Kissell default n 20170db34215SKevin D. Kissell help 20180db34215SKevin D. Kissell To support multiple TC microthreads acting as "CPUs" within 20190db34215SKevin D. Kissell a VPE, VPE-wide interrupt mask bits must be specially manipulated 20200db34215SKevin D. Kissell during interrupt handling. To support legacy drivers and interrupt 20210db34215SKevin D. Kissell controller management code, SMTC has a "backstop" to track and 20220db34215SKevin D. Kissell if necessary restore the interrupt mask. This has some performance 20238531a35eSKevin D. Kissell impact on interrupt service overhead. 20240db34215SKevin D. Kissell 2025f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF 2026f571eff0SKevin D. Kissell bool "Support IRQ affinity API" 2027f571eff0SKevin D. Kissell depends on MIPS_MT_SMTC 2028f571eff0SKevin D. Kissell default n 2029f571eff0SKevin D. Kissell help 2030f571eff0SKevin D. Kissell Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.) 2031f571eff0SKevin D. Kissell for SMTC Linux kernel. Requires platform support, of which 2032f571eff0SKevin D. Kissell an example can be found in the MIPS kernel i8259 and Malta 20338531a35eSKevin D. Kissell platform code. Adds some overhead to interrupt dispatch, and 20348531a35eSKevin D. Kissell should be used only if you know what you are doing. 2035f571eff0SKevin D. Kissell 2036e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2037e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2038e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2039e01402b1SRalf Baechle default y 2040e01402b1SRalf Baechle help 2041e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2042e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2043e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2044e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2045e01402b1SRalf Baechle 2046e01402b1SRalf Baechle# this should possibly be in drivers/char, but it is rather cpu related. Hmmm 2047e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2048e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2049e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 20505e83d430SRalf Baechle help 2051e01402b1SRalf Baechle 20524a16ff4cSRalf Baechleconfig MIPS_CMP 20534a16ff4cSRalf Baechle bool "MIPS CMP framework support" 20544a16ff4cSRalf Baechle depends on SYS_SUPPORTS_MIPS_CMP 2055eb9b5141STim Anderson select SYNC_R4K 20564a16ff4cSRalf Baechle select SYS_SUPPORTS_SMP 20574a16ff4cSRalf Baechle select SYS_SUPPORTS_SCHED_SMT if SMP 20584a16ff4cSRalf Baechle select WEAK_ORDERING 20594a16ff4cSRalf Baechle default n 20604a16ff4cSRalf Baechle help 20614a16ff4cSRalf Baechle This is a placeholder option for the GCMP work. It will need to 20624a16ff4cSRalf Baechle be handled differently... 20634a16ff4cSRalf Baechle 20641da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS 20651da177e4SLinus Torvalds bool 20661da177e4SLinus Torvalds depends on CPU_SB1_PASS_1 20671da177e4SLinus Torvalds default y 20681da177e4SLinus Torvalds 20691da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 20701da177e4SLinus Torvalds bool 20711da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 20721da177e4SLinus Torvalds default y 20731da177e4SLinus Torvalds 20741da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 20751da177e4SLinus Torvalds bool 20761da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 20771da177e4SLinus Torvalds default y 20781da177e4SLinus Torvalds 20791da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR 2080d806cb2bSRalf Baechle bool 20811da177e4SLinus Torvalds 208260ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 208360ec6571Spascal@pabr.org def_bool 64BIT_PHYS_ADDR 208460ec6571Spascal@pabr.org 20859693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 20869693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 20879693a853SFranck Bui-Huu bool "Support for the SmartMIPS ASE" 20889693a853SFranck Bui-Huu help 20899693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 20909693a853SFranck Bui-Huu increased security at both hardware and software level for 20919693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 20929693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 20939693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 20949693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 20959693a853SFranck Bui-Huu here. 20969693a853SFranck Bui-Huu 20971da177e4SLinus Torvaldsconfig CPU_HAS_WB 2098f7062ddbSRalf Baechle bool 2099e01402b1SRalf Baechle 2100df0ac8a4SKevin Cernekeeconfig XKS01 2101df0ac8a4SKevin Cernekee bool 2102df0ac8a4SKevin Cernekee 2103f41ae0b2SRalf Baechle# 2104f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2105f41ae0b2SRalf Baechle# 2106e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2107f41ae0b2SRalf Baechle bool 2108e01402b1SRalf Baechle 2109f41ae0b2SRalf Baechle# 2110f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2111f41ae0b2SRalf Baechle# 2112e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2113f41ae0b2SRalf Baechle bool 2114e01402b1SRalf Baechle 21151da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 21161da177e4SLinus Torvalds bool 21171da177e4SLinus Torvalds depends on !CPU_R3000 21181da177e4SLinus Torvalds default y 21191da177e4SLinus Torvalds 21201da177e4SLinus Torvalds# 212120d60d99SMaciej W. Rozycki# CPU non-features 212220d60d99SMaciej W. Rozycki# 212320d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 212420d60d99SMaciej W. Rozycki bool 212520d60d99SMaciej W. Rozycki 212620d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 212720d60d99SMaciej W. Rozycki bool 212820d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 212920d60d99SMaciej W. Rozycki 213020d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 213120d60d99SMaciej W. Rozycki bool 213220d60d99SMaciej W. Rozycki 213320d60d99SMaciej W. Rozycki# 21341da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 21351da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 21361da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 21371da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 21381da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 21391da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 21401da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 21411da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2142797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2143797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2144797798c1SRalf Baechle# support. 21451da177e4SLinus Torvalds# 21461da177e4SLinus Torvaldsconfig HIGHMEM 21471da177e4SLinus Torvalds bool "High Memory Support" 2148797798c1SRalf Baechle depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM 2149797798c1SRalf Baechle 2150797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2151797798c1SRalf Baechle bool 2152797798c1SRalf Baechle 2153797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2154797798c1SRalf Baechle bool 21551da177e4SLinus Torvalds 21569693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 21579693a853SFranck Bui-Huu bool 21589693a853SFranck Bui-Huu 2159b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2160b4819b59SYoichi Yuasa def_bool y 2161f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2162b4819b59SYoichi Yuasa 2163d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2164d8cb4e11SRalf Baechle bool 2165d8cb4e11SRalf Baechle default y if SGI_IP27 2166d8cb4e11SRalf Baechle help 21673dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2168d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2169d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2170d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2171d8cb4e11SRalf Baechle 2172b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2173b1c6cd42SAtsushi Nemoto bool 21747de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 217531473747SAtsushi Nemoto 2176d8cb4e11SRalf Baechleconfig NUMA 2177d8cb4e11SRalf Baechle bool "NUMA Support" 2178d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2179d8cb4e11SRalf Baechle help 2180d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2181d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2182d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2183d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2184d8cb4e11SRalf Baechle disabled. 2185d8cb4e11SRalf Baechle 2186d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2187d8cb4e11SRalf Baechle bool 2188d8cb4e11SRalf Baechle 2189c80d79d7SYasunori Gotoconfig NODES_SHIFT 2190c80d79d7SYasunori Goto int 2191c80d79d7SYasunori Goto default "6" 2192c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2193c80d79d7SYasunori Goto 219414f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 219514f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2196939991cfSDavid Daney depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON) 219714f70012SDeng-Cheng Zhu default y 219814f70012SDeng-Cheng Zhu help 219914f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 220014f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 220114f70012SDeng-Cheng Zhu 2202b4819b59SYoichi Yuasasource "mm/Kconfig" 2203b4819b59SYoichi Yuasa 22041da177e4SLinus Torvaldsconfig SMP 22051da177e4SLinus Torvalds bool "Multi-Processing support" 2206e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2207b4b30a5aSRalf Baechle select IRQ_PER_CPU 22082f304c0aSJens Axboe select USE_GENERIC_SMP_HELPERS 2209e73ea273SRalf Baechle help 22101da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 22111da177e4SLinus Torvalds a system with only one CPU, like most personal computers, say N. If 22121da177e4SLinus Torvalds you have a system with more than one CPU, say Y. 22131da177e4SLinus Torvalds 22141da177e4SLinus Torvalds If you say N here, the kernel will run on single and multiprocessor 22151da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 22161da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 22171da177e4SLinus Torvalds singleprocessor machines. On a singleprocessor machine, the kernel 22181da177e4SLinus Torvalds will run faster if you say N here. 22191da177e4SLinus Torvalds 22201da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 22211da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 22221da177e4SLinus Torvalds 222303502faaSAdrian Bunk See also the SMP-HOWTO available at 222403502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 22251da177e4SLinus Torvalds 22261da177e4SLinus Torvalds If you don't know what to do here, say N. 22271da177e4SLinus Torvalds 222887353d8aSRalf Baechleconfig SMP_UP 222987353d8aSRalf Baechle bool 223087353d8aSRalf Baechle 22314a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 22324a16ff4cSRalf Baechle bool 22334a16ff4cSRalf Baechle 2234e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2235e73ea273SRalf Baechle bool 2236e73ea273SRalf Baechle 223772ede9b1SAtsushi Nemotoconfig NR_CPUS_DEFAULT_1 223872ede9b1SAtsushi Nemoto bool 223972ede9b1SAtsushi Nemoto 2240130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_2 2241130e2fb7SRalf Baechle bool 2242130e2fb7SRalf Baechle 2243130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2244130e2fb7SRalf Baechle bool 2245130e2fb7SRalf Baechle 2246130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2247130e2fb7SRalf Baechle bool 2248130e2fb7SRalf Baechle 2249130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2250130e2fb7SRalf Baechle bool 2251130e2fb7SRalf Baechle 2252130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2253130e2fb7SRalf Baechle bool 2254130e2fb7SRalf Baechle 2255130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2256130e2fb7SRalf Baechle bool 2257130e2fb7SRalf Baechle 22581da177e4SLinus Torvaldsconfig NR_CPUS 22591da177e4SLinus Torvalds int "Maximum number of CPUs (2-64)" 226072ede9b1SAtsushi Nemoto range 1 64 if NR_CPUS_DEFAULT_1 22611da177e4SLinus Torvalds depends on SMP 226272ede9b1SAtsushi Nemoto default "1" if NR_CPUS_DEFAULT_1 2263130e2fb7SRalf Baechle default "2" if NR_CPUS_DEFAULT_2 2264130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2265130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2266130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2267130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2268130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 22691da177e4SLinus Torvalds help 22701da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 22711da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 22721da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 227372ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 227472ede9b1SAtsushi Nemoto and 2 for all others. 22751da177e4SLinus Torvalds 22761da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 227772ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 227872ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 227972ede9b1SAtsushi Nemoto power of two. 22801da177e4SLinus Torvalds 2281399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2282399aaa25SAl Cooper bool 2283399aaa25SAl Cooper 22841723b4a3SAtsushi Nemoto# 22851723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 22861723b4a3SAtsushi Nemoto# 22871723b4a3SAtsushi Nemoto 22881723b4a3SAtsushi Nemotochoice 22891723b4a3SAtsushi Nemoto prompt "Timer frequency" 22901723b4a3SAtsushi Nemoto default HZ_250 22911723b4a3SAtsushi Nemoto help 22921723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 22931723b4a3SAtsushi Nemoto 22941723b4a3SAtsushi Nemoto config HZ_48 22950f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 22961723b4a3SAtsushi Nemoto 22971723b4a3SAtsushi Nemoto config HZ_100 22981723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 22991723b4a3SAtsushi Nemoto 23001723b4a3SAtsushi Nemoto config HZ_128 23011723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 23021723b4a3SAtsushi Nemoto 23031723b4a3SAtsushi Nemoto config HZ_250 23041723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 23051723b4a3SAtsushi Nemoto 23061723b4a3SAtsushi Nemoto config HZ_256 23071723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 23081723b4a3SAtsushi Nemoto 23091723b4a3SAtsushi Nemoto config HZ_1000 23101723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 23111723b4a3SAtsushi Nemoto 23121723b4a3SAtsushi Nemoto config HZ_1024 23131723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 23141723b4a3SAtsushi Nemoto 23151723b4a3SAtsushi Nemotoendchoice 23161723b4a3SAtsushi Nemoto 23171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 23181723b4a3SAtsushi Nemoto bool 23191723b4a3SAtsushi Nemoto 23201723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 23211723b4a3SAtsushi Nemoto bool 23221723b4a3SAtsushi Nemoto 23231723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 23241723b4a3SAtsushi Nemoto bool 23251723b4a3SAtsushi Nemoto 23261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 23271723b4a3SAtsushi Nemoto bool 23281723b4a3SAtsushi Nemoto 23291723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 23301723b4a3SAtsushi Nemoto bool 23311723b4a3SAtsushi Nemoto 23321723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 23331723b4a3SAtsushi Nemoto bool 23341723b4a3SAtsushi Nemoto 23351723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 23361723b4a3SAtsushi Nemoto bool 23371723b4a3SAtsushi Nemoto 23381723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 23391723b4a3SAtsushi Nemoto bool 23401723b4a3SAtsushi Nemoto default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \ 23411723b4a3SAtsushi Nemoto !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \ 23421723b4a3SAtsushi Nemoto !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \ 23431723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 23441723b4a3SAtsushi Nemoto 23451723b4a3SAtsushi Nemotoconfig HZ 23461723b4a3SAtsushi Nemoto int 23471723b4a3SAtsushi Nemoto default 48 if HZ_48 23481723b4a3SAtsushi Nemoto default 100 if HZ_100 23491723b4a3SAtsushi Nemoto default 128 if HZ_128 23501723b4a3SAtsushi Nemoto default 250 if HZ_250 23511723b4a3SAtsushi Nemoto default 256 if HZ_256 23521723b4a3SAtsushi Nemoto default 1000 if HZ_1000 23531723b4a3SAtsushi Nemoto default 1024 if HZ_1024 23541723b4a3SAtsushi Nemoto 2355e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 23561da177e4SLinus Torvalds 2357ea6e942bSAtsushi Nemotoconfig KEXEC 2358ea6e942bSAtsushi Nemoto bool "Kexec system call (EXPERIMENTAL)" 2359ea6e942bSAtsushi Nemoto depends on EXPERIMENTAL 2360ea6e942bSAtsushi Nemoto help 2361ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2362ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 23633dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2364ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2365ea6e942bSAtsushi Nemoto 236601dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2367ea6e942bSAtsushi Nemoto 2368ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2369ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2370ea6e942bSAtsushi Nemoto initially work for you. It may help to enable device hotplugging 2371ea6e942bSAtsushi Nemoto support. As of this writing the exact hardware interface is 2372ea6e942bSAtsushi Nemoto strongly in flux, so no good recommendation can be made. 2373ea6e942bSAtsushi Nemoto 23747aa1c8f4SRalf Baechleconfig CRASH_DUMP 23757aa1c8f4SRalf Baechle bool "Kernel crash dumps" 23767aa1c8f4SRalf Baechle help 23777aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 23787aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 23797aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 23807aa1c8f4SRalf Baechle a specially reserved region and then later executed after 23817aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 23827aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 23837aa1c8f4SRalf Baechle PHYSICAL_START. 23847aa1c8f4SRalf Baechle 23857aa1c8f4SRalf Baechleconfig PHYSICAL_START 23867aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 23877aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 23887aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 23897aa1c8f4SRalf Baechle depends on CRASH_DUMP 23907aa1c8f4SRalf Baechle help 23917aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 23927aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 23937aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 23947aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 23957aa1c8f4SRalf Baechle passed to the panic-ed kernel). 23967aa1c8f4SRalf Baechle 2397ea6e942bSAtsushi Nemotoconfig SECCOMP 2398ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2399293c5bd1SRalf Baechle depends on PROC_FS 2400ea6e942bSAtsushi Nemoto default y 2401ea6e942bSAtsushi Nemoto help 2402ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2403ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2404ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2405ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2406ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2407ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2408ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2409ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2410ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2411ea6e942bSAtsushi Nemoto 2412ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2413ea6e942bSAtsushi Nemoto 2414f2ffa5abSDezhong Diaoconfig USE_OF 24150b3e06fdSJonas Gorski bool 2416f2ffa5abSDezhong Diao select OF 2417e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2418abd2363fSGrant Likely select IRQ_DOMAIN 2419f2ffa5abSDezhong Diao 24205e83d430SRalf Baechleendmenu 24215e83d430SRalf Baechle 24221df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 24231df0f0ffSAtsushi Nemoto bool 24241df0f0ffSAtsushi Nemoto default y 24251df0f0ffSAtsushi Nemoto 24261df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 24271df0f0ffSAtsushi Nemoto bool 24281df0f0ffSAtsushi Nemoto default y 24291df0f0ffSAtsushi Nemoto 2430b6c3539bSRalf Baechlesource "init/Kconfig" 2431b6c3539bSRalf Baechle 2432dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2433dc52ddc0SMatt Helsley 24341da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 24351da177e4SLinus Torvalds 24365e83d430SRalf Baechleconfig HW_HAS_EISA 24375e83d430SRalf Baechle bool 24381da177e4SLinus Torvaldsconfig HW_HAS_PCI 24391da177e4SLinus Torvalds bool 24401da177e4SLinus Torvalds 24411da177e4SLinus Torvaldsconfig PCI 24421da177e4SLinus Torvalds bool "Support for PCI controller" 24431da177e4SLinus Torvalds depends on HW_HAS_PCI 2444abb4ae46SRalf Baechle select PCI_DOMAINS 2445eab90291SMichael S. Tsirkin select GENERIC_PCI_IOMAP 24460f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 24471da177e4SLinus Torvalds help 24481da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 24491da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 24501da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 24511da177e4SLinus Torvalds say Y, otherwise N. 24521da177e4SLinus Torvalds 24531da177e4SLinus Torvaldsconfig PCI_DOMAINS 24541da177e4SLinus Torvalds bool 24551da177e4SLinus Torvalds 24561da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 24571da177e4SLinus Torvalds 24583f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig" 24593f787ca4SJonas Gorski 24601da177e4SLinus Torvalds# 24611da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 24621da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 24631da177e4SLinus Torvalds# users to choose the right thing ... 24641da177e4SLinus Torvalds# 24651da177e4SLinus Torvaldsconfig ISA 24661da177e4SLinus Torvalds bool 24671da177e4SLinus Torvalds 24681da177e4SLinus Torvaldsconfig EISA 24691da177e4SLinus Torvalds bool "EISA support" 24705e83d430SRalf Baechle depends on HW_HAS_EISA 24711da177e4SLinus Torvalds select ISA 2472aa414dffSRalf Baechle select GENERIC_ISA_DMA 24731da177e4SLinus Torvalds ---help--- 24741da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 24751da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 24761da177e4SLinus Torvalds 24771da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 24781da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 24791da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 24801da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 24811da177e4SLinus Torvalds 24821da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 24831da177e4SLinus Torvalds 24841da177e4SLinus Torvalds Otherwise, say N. 24851da177e4SLinus Torvalds 24861da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 24871da177e4SLinus Torvalds 24881da177e4SLinus Torvaldsconfig TC 24891da177e4SLinus Torvalds bool "TURBOchannel support" 24901da177e4SLinus Torvalds depends on MACH_DECSTATION 24911da177e4SLinus Torvalds help 249250a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 249350a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 249450a23e6eSJustin P. Mattock at: 249550a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 249650a23e6eSJustin P. Mattock and: 249750a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 249850a23e6eSJustin P. Mattock Linux driver support status is documented at: 249950a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 25001da177e4SLinus Torvalds 25011da177e4SLinus Torvaldsconfig MMU 25021da177e4SLinus Torvalds bool 25031da177e4SLinus Torvalds default y 25041da177e4SLinus Torvalds 2505d865bea4SRalf Baechleconfig I8253 2506d865bea4SRalf Baechle bool 2507798778b8SRussell King select CLKSRC_I8253 25082d02612fSThomas Gleixner select CLKEVT_I8253 25099726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 2510d865bea4SRalf Baechle 2511cce335aeSRalf Baechleconfig ZONE_DMA32 2512cce335aeSRalf Baechle bool 2513cce335aeSRalf Baechle 25141da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 25151da177e4SLinus Torvalds 25161da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig" 25171da177e4SLinus Torvalds 2518388b78adSAlexandre Bounineconfig RAPIDIO 2519388b78adSAlexandre Bounine bool "RapidIO support" 2520388b78adSAlexandre Bounine depends on PCI 2521388b78adSAlexandre Bounine default n 2522388b78adSAlexandre Bounine help 2523388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 2524388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 2525388b78adSAlexandre Bounine 2526388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 2527388b78adSAlexandre Bounine 25281da177e4SLinus Torvaldsendmenu 25291da177e4SLinus Torvalds 25301da177e4SLinus Torvaldsmenu "Executable file formats" 25311da177e4SLinus Torvalds 25321da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 25331da177e4SLinus Torvalds 25341da177e4SLinus Torvaldsconfig TRAD_SIGNALS 25351da177e4SLinus Torvalds bool 25361da177e4SLinus Torvalds 25371da177e4SLinus Torvaldsconfig MIPS32_COMPAT 25381da177e4SLinus Torvalds bool "Kernel support for Linux/MIPS 32-bit binary compatibility" 2539875d43e7SRalf Baechle depends on 64BIT 25401da177e4SLinus Torvalds help 25411da177e4SLinus Torvalds Select this option if you want Linux/MIPS 32-bit binary 25421da177e4SLinus Torvalds compatibility. Since all software available for Linux/MIPS is 25431da177e4SLinus Torvalds currently 32-bit you should say Y here. 25441da177e4SLinus Torvalds 25451da177e4SLinus Torvaldsconfig COMPAT 25461da177e4SLinus Torvalds bool 25471da177e4SLinus Torvalds depends on MIPS32_COMPAT 254848b25c43SChris Metcalf select ARCH_WANT_OLD_COMPAT_IPC 25491da177e4SLinus Torvalds default y 25501da177e4SLinus Torvalds 255105e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 255205e43966SAtsushi Nemoto bool 255305e43966SAtsushi Nemoto depends on COMPAT && SYSVIPC 255405e43966SAtsushi Nemoto default y 255505e43966SAtsushi Nemoto 25561da177e4SLinus Torvaldsconfig MIPS32_O32 25571da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 25581da177e4SLinus Torvalds depends on MIPS32_COMPAT 25591da177e4SLinus Torvalds help 25601da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 25611da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 25621da177e4SLinus Torvalds existing binaries are in this format. 25631da177e4SLinus Torvalds 25641da177e4SLinus Torvalds If unsure, say Y. 25651da177e4SLinus Torvalds 25661da177e4SLinus Torvaldsconfig MIPS32_N32 25671da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 25681da177e4SLinus Torvalds depends on MIPS32_COMPAT 25691da177e4SLinus Torvalds help 25701da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 25711da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 25721da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 25731da177e4SLinus Torvalds cases. 25741da177e4SLinus Torvalds 25751da177e4SLinus Torvalds If unsure, say N. 25761da177e4SLinus Torvalds 25771da177e4SLinus Torvaldsconfig BINFMT_ELF32 25781da177e4SLinus Torvalds bool 25791da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 25801da177e4SLinus Torvalds 25812116245eSRalf Baechleendmenu 25821da177e4SLinus Torvalds 25832116245eSRalf Baechlemenu "Power management options" 2584952fa954SRodolfo Giometti 2585363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 2586363c55caSWu Zhangjin def_bool y 25873f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2588363c55caSWu Zhangjin 2589f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 2590f4cb5700SJohannes Berg def_bool y 25913f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 2592f4cb5700SJohannes Berg 25932116245eSRalf Baechlesource "kernel/power/Kconfig" 2594952fa954SRodolfo Giometti 25951da177e4SLinus Torvaldsendmenu 25961da177e4SLinus Torvalds 25979726b43aSWu Zhangjinsource "arch/mips/kernel/cpufreq/Kconfig" 25989726b43aSWu Zhangjin 2599d5950b43SSam Ravnborgsource "net/Kconfig" 2600d5950b43SSam Ravnborg 26011da177e4SLinus Torvaldssource "drivers/Kconfig" 26021da177e4SLinus Torvalds 260398cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 260498cdee0eSRalf Baechle 26051da177e4SLinus Torvaldssource "fs/Kconfig" 26061da177e4SLinus Torvalds 26071da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 26081da177e4SLinus Torvalds 26091da177e4SLinus Torvaldssource "security/Kconfig" 26101da177e4SLinus Torvalds 26111da177e4SLinus Torvaldssource "crypto/Kconfig" 26121da177e4SLinus Torvalds 26131da177e4SLinus Torvaldssource "lib/Kconfig" 2614