11da177e4SLinus Torvaldsconfig MIPS 21da177e4SLinus Torvalds bool 31da177e4SLinus Torvalds default y 440e084a5SRalf Baechle select ARCH_SUPPORTS_UPROBES 5a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 6393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 75fac4f7aSPaul Burton select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 81ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 9c3fc5cd5SRalf Baechle select HAVE_CONTEXT_TRACKING 10f8ac0425SYoichi Yuasa select HAVE_GENERIC_DMA_COHERENT 11ec7748b5SSam Ravnborg select HAVE_IDE 1242d4b839SMathieu Desnoyers select HAVE_OPROFILE 137f788d2dSDeng-Cheng Zhu select HAVE_PERF_EVENTS 147f788d2dSDeng-Cheng Zhu select PERF_USE_VMALLOC 1588547001SJason Wessel select HAVE_ARCH_KGDB 16490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 17c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 186077776bSDaniel Borkmann select HAVE_CBPF_JIT if !CPU_MICROMIPS 19d2bb0762SWu Zhangjin select HAVE_FUNCTION_TRACER 20538f1952SWu Zhangjin select HAVE_DYNAMIC_FTRACE 21538f1952SWu Zhangjin select HAVE_FTRACE_MCOUNT_RECORD 2264575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 2329c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 24c1bf207dSDavid Daney select HAVE_KPROBES 25c1bf207dSDavid Daney select HAVE_KRETPROBES 26fb59e394SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 27b69ec42bSCatalin Marinas select HAVE_DEBUG_KMEMLEAK 281d7bf993SRalf Baechle select HAVE_SYSCALL_TRACEPOINTS 292b68f6caSKees Cook select ARCH_HAS_ELF_RANDOMIZE 30383c97b4SBen Hutchings select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 3130ad29bbSHuacai Chen select RTC_LIB if !MACH_LOONGSON64 322b78920dSDeng-Cheng Zhu select GENERIC_ATOMIC64 if !64BIT 337463449bSCatalin Marinas select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE 34f4649382SZubair Lutfullah Kakakhel select HAVE_DMA_CONTIGUOUS 3548e1fd5aSDavid Daney select HAVE_DMA_API_DEBUG 363bd27e32SDavid Daney select GENERIC_IRQ_PROBE 37f8396c17SThomas Gleixner select GENERIC_IRQ_SHOW 3878857614SMarkos Chandras select GENERIC_PCI_IOMAP 3994bb0c1aSDavid Daney select HAVE_ARCH_JUMP_LABEL 40c1d7e01dSWill Deacon select ARCH_WANT_IPC_PARSE_VERSION 410f462e3cSThomas Gleixner select IRQ_FORCED_THREADING 429d15ffc8STejun Heo select HAVE_MEMBLOCK 439d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 449d15ffc8STejun Heo select ARCH_DISCARD_MEMBLOCK 45360014a3SThomas Gleixner select GENERIC_SMP_IDLE_THREAD 464b054495SDavid Daney select BUILDTIME_EXTABLE_SORT 47cde1794bSAnna-Maria Gleixner select GENERIC_CLOCKEVENTS 48929de4ccSDeng-Cheng Zhu select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 49cde1794bSAnna-Maria Gleixner select GENERIC_CMOS_UPDATE 50786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 5142a0bb3fSPetr Mladek select HAVE_NMI 524febd95aSStephen Rothwell select VIRT_TO_BUS 532f12fb20SJoshua Kinard select MODULES_USE_ELF_REL if MODULES 542f12fb20SJoshua Kinard select MODULES_USE_ELF_RELA if MODULES && 64BIT 5550150d2bSAl Viro select CLONE_BACKWARDS 56d1a1dc0bSDave Hansen select HAVE_DEBUG_STACKOVERFLOW 5719952a92SKees Cook select HAVE_CC_STACKPROTECTOR 58b1d4c6caSJames Hogan select CPU_PM if CPU_IDLE 59cc7964afSPaul Burton select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 6090cee759SPaul Burton select ARCH_BINFMT_ELF_STATE 61d79d853dSMarkos Chandras select SYSCTL_EXCEPTION_TRACE 62bb877e96SDeng-Cheng Zhu select HAVE_VIRT_CPU_ACCOUNTING_GEN 63ec9ddad3SDeng-Cheng Zhu select HAVE_IRQ_TIME_ACCOUNTING 64a7f4df4eSAlex Smith select GENERIC_TIME_VSYSCALL 65a7f4df4eSAlex Smith select ARCH_CLOCKSOURCE_DATA 661d2753a6SDavid Daney select HANDLE_DOMAIN_IRQ 671da177e4SLinus Torvalds 681da177e4SLinus Torvaldsmenu "Machine selection" 691da177e4SLinus Torvalds 705e83d430SRalf Baechlechoice 715e83d430SRalf Baechle prompt "System type" 725e83d430SRalf Baechle default SGI_IP22 731da177e4SLinus Torvalds 7442a4f17dSManuel Laussconfig MIPS_ALCHEMY 75c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 7634adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 77f772cdb2SRalf Baechle select CEVT_R4K 78d7ea335cSSteven J. Hill select CSRC_R4K 7967e38cf2SRalf Baechle select IRQ_MIPS_CPU 8088e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 8142a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 8242a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 8342a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 84d30a2b47SLinus Walleij select GPIOLIB 851b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 8647440229SManuel Lauss select COMMON_CLK 871da177e4SLinus Torvalds 887ca5dc14SFlorian Fainelliconfig AR7 897ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 907ca5dc14SFlorian Fainelli select BOOT_ELF32 917ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 927ca5dc14SFlorian Fainelli select CEVT_R4K 937ca5dc14SFlorian Fainelli select CSRC_R4K 9467e38cf2SRalf Baechle select IRQ_MIPS_CPU 957ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 967ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 977ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 987ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 997ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1007ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 101377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1021b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 103d30a2b47SLinus Walleij select GPIOLIB 1047ca5dc14SFlorian Fainelli select VLYNQ 1058551fb64SYoichi Yuasa select HAVE_CLK 1067ca5dc14SFlorian Fainelli help 1077ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1087ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1097ca5dc14SFlorian Fainelli 11043cc739fSSergey Ryazanovconfig ATH25 11143cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 11243cc739fSSergey Ryazanov select CEVT_R4K 11343cc739fSSergey Ryazanov select CSRC_R4K 11443cc739fSSergey Ryazanov select DMA_NONCOHERENT 11567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1161753e74eSSergey Ryazanov select IRQ_DOMAIN 11743cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 11843cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 11943cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1208aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 12143cc739fSSergey Ryazanov help 12243cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 12343cc739fSSergey Ryazanov 124d4a67d9dSGabor Juhosconfig ATH79 125d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 126ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 127d4a67d9dSGabor Juhos select BOOT_RAW 128d4a67d9dSGabor Juhos select CEVT_R4K 129d4a67d9dSGabor Juhos select CSRC_R4K 130d4a67d9dSGabor Juhos select DMA_NONCOHERENT 131d30a2b47SLinus Walleij select GPIOLIB 13294638067SGabor Juhos select HAVE_CLK 133411520afSAlban Bedel select COMMON_CLK 1342c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 13567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1360aabf1a4SGabor Juhos select MIPS_MACHINE 137d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 138d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 139d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 140d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 141377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 142b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 14303c8c407SAlban Bedel select USE_OF 144d4a67d9dSGabor Juhos help 145d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 146d4a67d9dSGabor Juhos 1475f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 1485f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 149d666cd02SKevin Cernekee select BOOT_RAW 150d666cd02SKevin Cernekee select NO_EXCEPT_FILL 151d666cd02SKevin Cernekee select USE_OF 152d666cd02SKevin Cernekee select CEVT_R4K 153d666cd02SKevin Cernekee select CSRC_R4K 154d666cd02SKevin Cernekee select SYNC_R4K 155d666cd02SKevin Cernekee select COMMON_CLK 156c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 15760b858f2SKevin Cernekee select BCM7038_L1_IRQ 15860b858f2SKevin Cernekee select BCM7120_L2_IRQ 15960b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 16067e38cf2SRalf Baechle select IRQ_MIPS_CPU 16160b858f2SKevin Cernekee select DMA_NONCOHERENT 162d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 16360b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 164d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 165d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 16660b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 16760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 16860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 169d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 170d666cd02SKevin Cernekee select SWAP_IO_SPACE 17160b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 17360b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 17460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 175d666cd02SKevin Cernekee help 1765f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 1775f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 1785f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 1795f2d4459SKevin Cernekee must be set appropriately for your board. 180d666cd02SKevin Cernekee 1811c0c13ebSAurelien Jarnoconfig BCM47XX 182c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 183fe08f8c2SHauke Mehrtens select BOOT_RAW 18442f77542SRalf Baechle select CEVT_R4K 185940f6b48SRalf Baechle select CSRC_R4K 1861c0c13ebSAurelien Jarno select DMA_NONCOHERENT 1871c0c13ebSAurelien Jarno select HW_HAS_PCI 18867e38cf2SRalf Baechle select IRQ_MIPS_CPU 189314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 190dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 1911c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 1921c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 193377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 19425e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 195e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 196c949c0bcSRafał Miłecki select GPIOLIB 197c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 198f6e734a8SRafał Miłecki select BCM47XX_NVRAM 1992ab71a02SRafał Miłecki select BCM47XX_SPROM 2001c0c13ebSAurelien Jarno help 2011c0c13ebSAurelien Jarno Support for BCM47XX based boards 2021c0c13ebSAurelien Jarno 203e7300d04SMaxime Bizonconfig BCM63XX 204e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 205ae8de61cSFlorian Fainelli select BOOT_RAW 206e7300d04SMaxime Bizon select CEVT_R4K 207e7300d04SMaxime Bizon select CSRC_R4K 208fc264022SJonas Gorski select SYNC_R4K 209e7300d04SMaxime Bizon select DMA_NONCOHERENT 21067e38cf2SRalf Baechle select IRQ_MIPS_CPU 211e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 212e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 213e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 214e7300d04SMaxime Bizon select SWAP_IO_SPACE 215d30a2b47SLinus Walleij select GPIOLIB 2163e82eeebSYoichi Yuasa select HAVE_CLK 217af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 218e7300d04SMaxime Bizon help 219e7300d04SMaxime Bizon Support for BCM63XX based boards 220e7300d04SMaxime Bizon 2211da177e4SLinus Torvaldsconfig MIPS_COBALT 2223fa986faSMartin Michlmayr bool "Cobalt Server" 22342f77542SRalf Baechle select CEVT_R4K 224940f6b48SRalf Baechle select CSRC_R4K 2251097c6acSYoichi Yuasa select CEVT_GT641XX 2261da177e4SLinus Torvalds select DMA_NONCOHERENT 2271da177e4SLinus Torvalds select HW_HAS_PCI 228d865bea4SRalf Baechle select I8253 2291da177e4SLinus Torvalds select I8259 23067e38cf2SRalf Baechle select IRQ_MIPS_CPU 231d5ab1a69SYoichi Yuasa select IRQ_GT641XX 232252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 233e25bfc92SYoichi Yuasa select PCI 2347cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2350a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 236ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2370e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 2385e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 239e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 2401da177e4SLinus Torvalds 2411da177e4SLinus Torvaldsconfig MACH_DECSTATION 2423fa986faSMartin Michlmayr bool "DECstations" 2431da177e4SLinus Torvalds select BOOT_ELF32 2446457d9fcSYoichi Yuasa select CEVT_DS1287 24581d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 2464247417dSYoichi Yuasa select CSRC_IOASIC 24781d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 24820d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 24920d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 25020d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 2511da177e4SLinus Torvalds select DMA_NONCOHERENT 252ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 25367e38cf2SRalf Baechle select IRQ_MIPS_CPU 2547cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 2557cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 256ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 2577d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2585e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 2591723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 2601723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 2611723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 262930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 2635e83d430SRalf Baechle help 2641da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 2651da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 2661da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 2671da177e4SLinus Torvalds 2681da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 2691da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 2701da177e4SLinus Torvalds 2711da177e4SLinus Torvalds DECstation 5000/50 2721da177e4SLinus Torvalds DECstation 5000/150 2731da177e4SLinus Torvalds DECstation 5000/260 2741da177e4SLinus Torvalds DECsystem 5900/260 2751da177e4SLinus Torvalds 2761da177e4SLinus Torvalds otherwise choose R3000. 2771da177e4SLinus Torvalds 2785e83d430SRalf Baechleconfig MACH_JAZZ 2793fa986faSMartin Michlmayr bool "Jazz family of machines" 2800e2794b0SRalf Baechle select FW_ARC 2810e2794b0SRalf Baechle select FW_ARC32 2825e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 28342f77542SRalf Baechle select CEVT_R4K 284940f6b48SRalf Baechle select CSRC_R4K 285e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 2865e83d430SRalf Baechle select GENERIC_ISA_DMA 2878a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 28867e38cf2SRalf Baechle select IRQ_MIPS_CPU 289d865bea4SRalf Baechle select I8253 2905e83d430SRalf Baechle select I8259 2915e83d430SRalf Baechle select ISA 2927cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 2935e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 2947d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 2951723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 2961da177e4SLinus Torvalds help 2975e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 2985e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 299692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3005e83d430SRalf Baechle Olivetti M700-10 workstations. 3015e83d430SRalf Baechle 302de361e8bSPaul Burtonconfig MACH_INGENIC 303de361e8bSPaul Burton bool "Ingenic SoC based machines" 3045ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3055ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 306f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3075ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 30867e38cf2SRalf Baechle select IRQ_MIPS_CPU 309d30a2b47SLinus Walleij select GPIOLIB 310ff1930c6SPaul Burton select COMMON_CLK 31183bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 312ffb1843dSPaul Burton select BUILTIN_DTB 313ffb1843dSPaul Burton select USE_OF 3146ec127fbSPaul Burton select LIBFDT 3155ebabe59SLars-Peter Clausen 316171bb2f1SJohn Crispinconfig LANTIQ 317171bb2f1SJohn Crispin bool "Lantiq based platforms" 318171bb2f1SJohn Crispin select DMA_NONCOHERENT 31967e38cf2SRalf Baechle select IRQ_MIPS_CPU 320171bb2f1SJohn Crispin select CEVT_R4K 321171bb2f1SJohn Crispin select CSRC_R4K 322171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 323171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 324171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 325171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 326377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 327171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 328171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 329d30a2b47SLinus Walleij select GPIOLIB 330171bb2f1SJohn Crispin select SWAP_IO_SPACE 331171bb2f1SJohn Crispin select BOOT_RAW 332287e3f3fSJohn Crispin select CLKDEV_LOOKUP 333a0392222SJohn Crispin select USE_OF 3343f8c50c9SJohn Crispin select PINCTRL 3353f8c50c9SJohn Crispin select PINCTRL_LANTIQ 336c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 337c530781cSJohn Crispin select RESET_CONTROLLER 338171bb2f1SJohn Crispin 3391f21d2bdSBrian Murphyconfig LASAT 3401f21d2bdSBrian Murphy bool "LASAT Networks platforms" 34142f77542SRalf Baechle select CEVT_R4K 34216f0bbbcSRalf Baechle select CRC32 343940f6b48SRalf Baechle select CSRC_R4K 3441f21d2bdSBrian Murphy select DMA_NONCOHERENT 3451f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 3461f21d2bdSBrian Murphy select HW_HAS_PCI 34767e38cf2SRalf Baechle select IRQ_MIPS_CPU 3481f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 3491f21d2bdSBrian Murphy select MIPS_NILE4 3501f21d2bdSBrian Murphy select R5000_CPU_SCACHE 3511f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 3521f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 3531f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 3541f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 3551f21d2bdSBrian Murphy 35630ad29bbSHuacai Chenconfig MACH_LOONGSON32 35730ad29bbSHuacai Chen bool "Loongson-1 family of machines" 358c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 359ade299d8SYoichi Yuasa help 36030ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 36185749d24SWu Zhangjin 36230ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 36330ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 36430ad29bbSHuacai Chen Sciences (CAS). 365ade299d8SYoichi Yuasa 36630ad29bbSHuacai Chenconfig MACH_LOONGSON64 36730ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 368ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 369ca585cf9SKelvin Cheung help 37030ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 371ca585cf9SKelvin Cheung 37230ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 37330ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 37430ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 37530ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 37630ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 37730ad29bbSHuacai Chen Weiwu Hu. 378ca585cf9SKelvin Cheung 3796a438309SAndrew Brestickerconfig MACH_PISTACHIO 3806a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 3816a438309SAndrew Bresticker select BOOT_ELF32 3826a438309SAndrew Bresticker select BOOT_RAW 3836a438309SAndrew Bresticker select CEVT_R4K 3846a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 3856a438309SAndrew Bresticker select COMMON_CLK 3866a438309SAndrew Bresticker select CSRC_R4K 3876a438309SAndrew Bresticker select DMA_MAYBE_COHERENT 388d30a2b47SLinus Walleij select GPIOLIB 38967e38cf2SRalf Baechle select IRQ_MIPS_CPU 3906a438309SAndrew Bresticker select LIBFDT 3916a438309SAndrew Bresticker select MFD_SYSCON 3926a438309SAndrew Bresticker select MIPS_CPU_SCACHE 3936a438309SAndrew Bresticker select MIPS_GIC 3946a438309SAndrew Bresticker select PINCTRL 3956a438309SAndrew Bresticker select REGULATOR 3966a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 3976a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 3986a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 3996a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4006a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 4016a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 402018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 403018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4046a438309SAndrew Bresticker select USE_OF 4056a438309SAndrew Bresticker help 4066a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4076a438309SAndrew Bresticker 4089937f5ffSZubair Lutfullah Kakakhelconfig MACH_XILFPGA 4099937f5ffSZubair Lutfullah Kakakhel bool "MIPSfpga Xilinx based boards" 4109937f5ffSZubair Lutfullah Kakakhel select BOOT_ELF32 4119937f5ffSZubair Lutfullah Kakakhel select BOOT_RAW 4129937f5ffSZubair Lutfullah Kakakhel select BUILTIN_DTB 4139937f5ffSZubair Lutfullah Kakakhel select CEVT_R4K 4149937f5ffSZubair Lutfullah Kakakhel select COMMON_CLK 4159937f5ffSZubair Lutfullah Kakakhel select CSRC_R4K 416d30a2b47SLinus Walleij select GPIOLIB 4179937f5ffSZubair Lutfullah Kakakhel select IRQ_MIPS_CPU 4189937f5ffSZubair Lutfullah Kakakhel select LIBFDT 4199937f5ffSZubair Lutfullah Kakakhel select MIPS_CPU_SCACHE 4209937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_EARLY_PRINTK 4219937f5ffSZubair Lutfullah Kakakhel select SYS_HAS_CPU_MIPS32_R2 4229937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_32BIT_KERNEL 4239937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_LITTLE_ENDIAN 4249937f5ffSZubair Lutfullah Kakakhel select SYS_SUPPORTS_ZBOOT_UART16550 4259937f5ffSZubair Lutfullah Kakakhel select USE_OF 4269937f5ffSZubair Lutfullah Kakakhel select USE_GENERIC_EARLY_PRINTK_8250 4279937f5ffSZubair Lutfullah Kakakhel help 4289937f5ffSZubair Lutfullah Kakakhel This enables support for the IMG University Program MIPSfpga platform. 4299937f5ffSZubair Lutfullah Kakakhel 4301da177e4SLinus Torvaldsconfig MIPS_MALTA 4313fa986faSMartin Michlmayr bool "MIPS Malta board" 43261ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4331da177e4SLinus Torvalds select BOOT_ELF32 434fa71c960SRalf Baechle select BOOT_RAW 435e8823d26SPaul Burton select BUILTIN_DTB 43642f77542SRalf Baechle select CEVT_R4K 437940f6b48SRalf Baechle select CSRC_R4K 438fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 43942b002abSGuenter Roeck select COMMON_CLK 440885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4411da177e4SLinus Torvalds select GENERIC_ISA_DMA 4428a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 44367e38cf2SRalf Baechle select IRQ_MIPS_CPU 4448a19b8f1SAndrew Bresticker select MIPS_GIC 4451da177e4SLinus Torvalds select HW_HAS_PCI 446d865bea4SRalf Baechle select I8253 4471da177e4SLinus Torvalds select I8259 4485e83d430SRalf Baechle select MIPS_BONITO64 4499318c51aSChris Dearman select MIPS_CPU_SCACHE 450a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 451252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4525e83d430SRalf Baechle select MIPS_MSC 453ecafe3e9SPaul Burton select SMP_UP if SMP 4541da177e4SLinus Torvalds select SWAP_IO_SPACE 4557cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 4567cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 457bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 458c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 459575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 4607cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 4615d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 462575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 4637cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 4647cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 465ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 466ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 4675e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 468c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 4695e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 470424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 4710365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 472e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 473377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 474f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 4759693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 4761b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 4778c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 478e8823d26SPaul Burton select USE_OF 479abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 480e81a8c7dSPaul Burton select BUILTIN_DTB 481e81a8c7dSPaul Burton select LIBFDT 4821da177e4SLinus Torvalds help 483f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 4841da177e4SLinus Torvalds board. 4851da177e4SLinus Torvalds 4862572f00dSJoshua Hendersonconfig MACH_PIC32 4872572f00dSJoshua Henderson bool "Microchip PIC32 Family" 4882572f00dSJoshua Henderson help 4892572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 4902572f00dSJoshua Henderson 4912572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 4922572f00dSJoshua Henderson microcontrollers. 4932572f00dSJoshua Henderson 494ec47b274SSteven J. Hillconfig MIPS_SEAD3 495ec47b274SSteven J. Hill bool "MIPS SEAD3 board" 496ec47b274SSteven J. Hill select BOOT_ELF32 497ec47b274SSteven J. Hill select BOOT_RAW 498f262b5f2SAndrew Bresticker select BUILTIN_DTB 499ec47b274SSteven J. Hill select CEVT_R4K 500ec47b274SSteven J. Hill select CSRC_R4K 501fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 50242b002abSGuenter Roeck select COMMON_CLK 503ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_VI 504ec47b274SSteven J. Hill select CPU_MIPSR2_IRQ_EI 505ec47b274SSteven J. Hill select DMA_NONCOHERENT 50667e38cf2SRalf Baechle select IRQ_MIPS_CPU 5078a19b8f1SAndrew Bresticker select MIPS_GIC 50844327236SQais Yousef select LIBFDT 509ec47b274SSteven J. Hill select MIPS_MSC 510ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R1 511ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS32_R2 512d4594b27SPaul Burton select SYS_HAS_CPU_MIPS32_R6 513ec47b274SSteven J. Hill select SYS_HAS_CPU_MIPS64_R1 514ec47b274SSteven J. Hill select SYS_HAS_EARLY_PRINTK 515ec47b274SSteven J. Hill select SYS_SUPPORTS_32BIT_KERNEL 516ec47b274SSteven J. Hill select SYS_SUPPORTS_64BIT_KERNEL 517ec47b274SSteven J. Hill select SYS_SUPPORTS_BIG_ENDIAN 518ec47b274SSteven J. Hill select SYS_SUPPORTS_LITTLE_ENDIAN 519ec47b274SSteven J. Hill select SYS_SUPPORTS_SMARTMIPS 520a6a4834cSSteven J. Hill select SYS_SUPPORTS_MICROMIPS 521377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 5228c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 523ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_DESC 524ec47b274SSteven J. Hill select USB_EHCI_BIG_ENDIAN_MMIO 5259b731009SSteven J. Hill select USE_OF 526ec47b274SSteven J. Hill help 527ec47b274SSteven J. Hill This enables support for the MIPS Technologies SEAD3 evaluation 528ec47b274SSteven J. Hill board. 529ec47b274SSteven J. Hill 530a83860c2SRalf Baechleconfig NEC_MARKEINS 531a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 532a83860c2SRalf Baechle select SOC_EMMA2RH 533a83860c2SRalf Baechle select HW_HAS_PCI 534a83860c2SRalf Baechle help 535a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 536ade299d8SYoichi Yuasa 5375e83d430SRalf Baechleconfig MACH_VR41XX 53874142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 53942f77542SRalf Baechle select CEVT_R4K 540940f6b48SRalf Baechle select CSRC_R4K 5417cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 542377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 543d30a2b47SLinus Walleij select GPIOLIB 5445e83d430SRalf Baechle 545edb6310aSDaniel Lairdconfig NXP_STB220 546edb6310aSDaniel Laird bool "NXP STB220 board" 547edb6310aSDaniel Laird select SOC_PNX833X 548edb6310aSDaniel Laird help 549edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 550edb6310aSDaniel Laird 551edb6310aSDaniel Lairdconfig NXP_STB225 552edb6310aSDaniel Laird bool "NXP 225 board" 553edb6310aSDaniel Laird select SOC_PNX833X 554edb6310aSDaniel Laird select SOC_PNX8335 555edb6310aSDaniel Laird help 556edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 557edb6310aSDaniel Laird 5589267a30dSMarc St-Jeanconfig PMC_MSP 5599267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 56039d30c13SAnoop P A select CEVT_R4K 56139d30c13SAnoop P A select CSRC_R4K 5629267a30dSMarc St-Jean select DMA_NONCOHERENT 5639267a30dSMarc St-Jean select SWAP_IO_SPACE 5649267a30dSMarc St-Jean select NO_EXCEPT_FILL 5659267a30dSMarc St-Jean select BOOT_RAW 5669267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5679267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5689267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5699267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 570377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 57167e38cf2SRalf Baechle select IRQ_MIPS_CPU 5729267a30dSMarc St-Jean select SERIAL_8250 5739267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5749296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5759296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5769267a30dSMarc St-Jean help 5779267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5789267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5799267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5809267a30dSMarc St-Jean a variety of MIPS cores. 5819267a30dSMarc St-Jean 582ae2b5bb6SJohn Crispinconfig RALINK 583ae2b5bb6SJohn Crispin bool "Ralink based machines" 584ae2b5bb6SJohn Crispin select CEVT_R4K 585ae2b5bb6SJohn Crispin select CSRC_R4K 586ae2b5bb6SJohn Crispin select BOOT_RAW 587ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 58867e38cf2SRalf Baechle select IRQ_MIPS_CPU 589ae2b5bb6SJohn Crispin select USE_OF 590ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 591ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 592ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 593ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 594377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 595ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 596ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 5972a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 5982a153f1cSJohn Crispin select RESET_CONTROLLER 599ae2b5bb6SJohn Crispin 6001da177e4SLinus Torvaldsconfig SGI_IP22 6013fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6020e2794b0SRalf Baechle select FW_ARC 6030e2794b0SRalf Baechle select FW_ARC32 6041da177e4SLinus Torvalds select BOOT_ELF32 60542f77542SRalf Baechle select CEVT_R4K 606940f6b48SRalf Baechle select CSRC_R4K 607e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6081da177e4SLinus Torvalds select DMA_NONCOHERENT 6095e83d430SRalf Baechle select HW_HAS_EISA 610d865bea4SRalf Baechle select I8253 61168de4803SThomas Bogendoerfer select I8259 6121da177e4SLinus Torvalds select IP22_CPU_SCACHE 61367e38cf2SRalf Baechle select IRQ_MIPS_CPU 614aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 615e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 616e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 61736e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 618e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 619e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 620e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6211da177e4SLinus Torvalds select SWAP_IO_SPACE 6227cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6237cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6242b5e63f6SMartin Michlmayr # 6252b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6262b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6272b5e63f6SMartin Michlmayr # 6282b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6292b5e63f6SMartin Michlmayr # for a more details discussion 6302b5e63f6SMartin Michlmayr # 6312b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 632ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 633ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6345e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 635930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6361da177e4SLinus Torvalds help 6371da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6381da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6391da177e4SLinus Torvalds that runs on these, say Y here. 6401da177e4SLinus Torvalds 6411da177e4SLinus Torvaldsconfig SGI_IP27 6423fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6430e2794b0SRalf Baechle select FW_ARC 6440e2794b0SRalf Baechle select FW_ARC64 6455e83d430SRalf Baechle select BOOT_ELF64 646e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 647634286f1SRalf Baechle select DMA_COHERENT 64836a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6491da177e4SLinus Torvalds select HW_HAS_PCI 650130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6517cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 652ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6535e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 654d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6551a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 656930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6571da177e4SLinus Torvalds help 6581da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6591da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6601da177e4SLinus Torvalds here. 6611da177e4SLinus Torvalds 662e2defae5SThomas Bogendoerferconfig SGI_IP28 6637d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6640e2794b0SRalf Baechle select FW_ARC 6650e2794b0SRalf Baechle select FW_ARC64 666e2defae5SThomas Bogendoerfer select BOOT_ELF64 667e2defae5SThomas Bogendoerfer select CEVT_R4K 668e2defae5SThomas Bogendoerfer select CSRC_R4K 669e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 670e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 671e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 67267e38cf2SRalf Baechle select IRQ_MIPS_CPU 673e2defae5SThomas Bogendoerfer select HW_HAS_EISA 674e2defae5SThomas Bogendoerfer select I8253 675e2defae5SThomas Bogendoerfer select I8259 676e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 677e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6785b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 679e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 680e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 681e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 682e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 683e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6842b5e63f6SMartin Michlmayr # 6852b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6862b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6872b5e63f6SMartin Michlmayr # 6882b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6892b5e63f6SMartin Michlmayr # for a more details discussion 6902b5e63f6SMartin Michlmayr # 6912b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 692e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 693e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 694dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 695e2defae5SThomas Bogendoerfer help 696e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 697e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 698e2defae5SThomas Bogendoerfer 6991da177e4SLinus Torvaldsconfig SGI_IP32 700cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7010e2794b0SRalf Baechle select FW_ARC 7020e2794b0SRalf Baechle select FW_ARC32 7031da177e4SLinus Torvalds select BOOT_ELF32 70442f77542SRalf Baechle select CEVT_R4K 705940f6b48SRalf Baechle select CSRC_R4K 7061da177e4SLinus Torvalds select DMA_NONCOHERENT 7071da177e4SLinus Torvalds select HW_HAS_PCI 70867e38cf2SRalf Baechle select IRQ_MIPS_CPU 7091da177e4SLinus Torvalds select R5000_CPU_SCACHE 7101da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7117cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7127cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7137cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 714dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 715ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7165e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7171da177e4SLinus Torvalds help 7181da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7191da177e4SLinus Torvalds 720ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 721ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7225e83d430SRalf Baechle select BOOT_ELF32 7235e83d430SRalf Baechle select DMA_COHERENT 7245e83d430SRalf Baechle select SIBYTE_BCM1120 7255e83d430SRalf Baechle select SWAP_IO_SPACE 7267cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7275e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7285e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7295e83d430SRalf Baechle 730ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 731ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7325e83d430SRalf Baechle select BOOT_ELF32 7335e83d430SRalf Baechle select DMA_COHERENT 7345e83d430SRalf Baechle select SIBYTE_BCM1120 7355e83d430SRalf Baechle select SWAP_IO_SPACE 7367cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7375e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7385e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7395e83d430SRalf Baechle 7405e83d430SRalf Baechleconfig SIBYTE_CRHONE 7413fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7425e83d430SRalf Baechle select BOOT_ELF32 7435e83d430SRalf Baechle select DMA_COHERENT 7445e83d430SRalf Baechle select SIBYTE_BCM1125 7455e83d430SRalf Baechle select SWAP_IO_SPACE 7467cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7475e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7485e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7495e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7505e83d430SRalf Baechle 751ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 752ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 753ade299d8SYoichi Yuasa select BOOT_ELF32 754ade299d8SYoichi Yuasa select DMA_COHERENT 755ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 756ade299d8SYoichi Yuasa select SWAP_IO_SPACE 757ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 758ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 759ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 760ade299d8SYoichi Yuasa 761ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 762ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 763ade299d8SYoichi Yuasa select BOOT_ELF32 764ade299d8SYoichi Yuasa select DMA_COHERENT 765fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 766ade299d8SYoichi Yuasa select SIBYTE_SB1250 767ade299d8SYoichi Yuasa select SWAP_IO_SPACE 768ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 769ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 770ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 771ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 772cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 773ade299d8SYoichi Yuasa 774ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 775ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 776ade299d8SYoichi Yuasa select BOOT_ELF32 777ade299d8SYoichi Yuasa select DMA_COHERENT 778fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 779ade299d8SYoichi Yuasa select SIBYTE_SB1250 780ade299d8SYoichi Yuasa select SWAP_IO_SPACE 781ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 782ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 783ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 784ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 785ade299d8SYoichi Yuasa 786ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 787ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 788ade299d8SYoichi Yuasa select BOOT_ELF32 789ade299d8SYoichi Yuasa select DMA_COHERENT 790ade299d8SYoichi Yuasa select SIBYTE_SB1250 791ade299d8SYoichi Yuasa select SWAP_IO_SPACE 792ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 793ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 794ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 795ade299d8SYoichi Yuasa 796ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 797ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 798ade299d8SYoichi Yuasa select BOOT_ELF32 799ade299d8SYoichi Yuasa select DMA_COHERENT 800ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 801ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 802ade299d8SYoichi Yuasa select SWAP_IO_SPACE 803ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 804ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 805651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 806ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 807cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 808ade299d8SYoichi Yuasa 80914b36af4SThomas Bogendoerferconfig SNI_RM 81014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8110e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8120e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 813aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8145e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8155e83d430SRalf Baechle select BOOT_ELF32 81642f77542SRalf Baechle select CEVT_R4K 817940f6b48SRalf Baechle select CSRC_R4K 818e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8195e83d430SRalf Baechle select DMA_NONCOHERENT 8205e83d430SRalf Baechle select GENERIC_ISA_DMA 8218a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8225e83d430SRalf Baechle select HW_HAS_EISA 8235e83d430SRalf Baechle select HW_HAS_PCI 82467e38cf2SRalf Baechle select IRQ_MIPS_CPU 825d865bea4SRalf Baechle select I8253 8265e83d430SRalf Baechle select I8259 8275e83d430SRalf Baechle select ISA 8284a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8297cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8304a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 831c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8324a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 83336a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 834ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8357d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8364a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8375e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8385e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8391da177e4SLinus Torvalds help 84014b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 84114b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8425e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8435e83d430SRalf Baechle support this machine type. 8441da177e4SLinus Torvalds 845edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 846edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8475e83d430SRalf Baechle 848edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 849edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 85023fbee9dSRalf Baechle 85173b4390fSRalf Baechleconfig MIKROTIK_RB532 85273b4390fSRalf Baechle bool "Mikrotik RB532 boards" 85373b4390fSRalf Baechle select CEVT_R4K 85473b4390fSRalf Baechle select CSRC_R4K 85573b4390fSRalf Baechle select DMA_NONCOHERENT 85673b4390fSRalf Baechle select HW_HAS_PCI 85767e38cf2SRalf Baechle select IRQ_MIPS_CPU 85873b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 85973b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 86073b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 86173b4390fSRalf Baechle select SWAP_IO_SPACE 86273b4390fSRalf Baechle select BOOT_RAW 863d30a2b47SLinus Walleij select GPIOLIB 864930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 86573b4390fSRalf Baechle help 86673b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 86773b4390fSRalf Baechle based on the IDT RC32434 SoC. 86873b4390fSRalf Baechle 8699ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8709ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 871a86c7f72SDavid Daney select CEVT_R4K 87234adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 873a86c7f72SDavid Daney select DMA_COHERENT 874a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 875a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 876f65aad41SRalf Baechle select EDAC_SUPPORT 877b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 87873569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 87973569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 880a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8815e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 882a86c7f72SDavid Daney select SWAP_IO_SPACE 883e8635b48SDavid Daney select HW_HAS_PCI 884f00e001eSDavid Daney select ZONE_DMA32 885465aaed0SDavid Daney select HOLES_IN_ZONE 886d30a2b47SLinus Walleij select GPIOLIB 8876e511163SDavid Daney select LIBFDT 8886e511163SDavid Daney select USE_OF 8896e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8906e511163SDavid Daney select SYS_SUPPORTS_SMP 8916e511163SDavid Daney select NR_CPUS_DEFAULT_16 892e326479fSAndrew Bresticker select BUILTIN_DTB 8938c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 894a86c7f72SDavid Daney help 895a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 896a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 897a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 898a86c7f72SDavid Daney Some of the supported boards are: 899a86c7f72SDavid Daney EBT3000 900a86c7f72SDavid Daney EBH3000 901a86c7f72SDavid Daney EBH3100 902a86c7f72SDavid Daney Thunder 903a86c7f72SDavid Daney Kodama 904a86c7f72SDavid Daney Hikari 905a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 906a86c7f72SDavid Daney 9077f058e85SJayachandran Cconfig NLM_XLR_BOARD 9087f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9097f058e85SJayachandran C select BOOT_ELF32 9107f058e85SJayachandran C select NLM_COMMON 9117f058e85SJayachandran C select SYS_HAS_CPU_XLR 9127f058e85SJayachandran C select SYS_SUPPORTS_SMP 9137f058e85SJayachandran C select HW_HAS_PCI 9147f058e85SJayachandran C select SWAP_IO_SPACE 9157f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9167f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 91734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9187f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9197f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9207f058e85SJayachandran C select DMA_COHERENT 9217f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9227f058e85SJayachandran C select CEVT_R4K 9237f058e85SJayachandran C select CSRC_R4K 92467e38cf2SRalf Baechle select IRQ_MIPS_CPU 925b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9267f058e85SJayachandran C select SYNC_R4K 9277f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9288f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9298f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9307f058e85SJayachandran C help 9317f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9327f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9337f058e85SJayachandran C 9341c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9351c773ea4SJayachandran C bool "Netlogic XLP based systems" 9361c773ea4SJayachandran C select BOOT_ELF32 9371c773ea4SJayachandran C select NLM_COMMON 9381c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9391c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9401c773ea4SJayachandran C select HW_HAS_PCI 9411c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9421c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 94334adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 944d30a2b47SLinus Walleij select GPIOLIB 9451c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9461c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9471c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9481c773ea4SJayachandran C select DMA_COHERENT 9491c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9501c773ea4SJayachandran C select CEVT_R4K 9511c773ea4SJayachandran C select CSRC_R4K 95267e38cf2SRalf Baechle select IRQ_MIPS_CPU 953b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9541c773ea4SJayachandran C select SYNC_R4K 9551c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9562f6528e1SJayachandran C select USE_OF 9578f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9588f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9591c773ea4SJayachandran C help 9601c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9611c773ea4SJayachandran C Say Y here if you have a XLP based board. 9621c773ea4SJayachandran C 9639bc463beSDavid Daneyconfig MIPS_PARAVIRT 9649bc463beSDavid Daney bool "Para-Virtualized guest system" 9659bc463beSDavid Daney select CEVT_R4K 9669bc463beSDavid Daney select CSRC_R4K 9679bc463beSDavid Daney select DMA_COHERENT 9689bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9699bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9709bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9719bc463beSDavid Daney select SYS_SUPPORTS_SMP 9729bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9739bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9749bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9759bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9769bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9779bc463beSDavid Daney select HW_HAS_PCI 9789bc463beSDavid Daney select SWAP_IO_SPACE 9799bc463beSDavid Daney help 9809bc463beSDavid Daney This option supports guest running under ???? 9819bc463beSDavid Daney 9821da177e4SLinus Torvaldsendchoice 9831da177e4SLinus Torvalds 984e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9853b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 986d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 987a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 988e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9898945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 9905e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 9915ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 9928ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 9931f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 9942572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 995af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 9960f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 997ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 99829c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 99938b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 100022b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10015e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1002a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 100330ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 100430ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10057f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1006ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 10079937f5ffSZubair Lutfullah Kakakhelsource "arch/mips/xilfpga/Kconfig" 100838b18f72SRalf Baechle 10095e83d430SRalf Baechleendmenu 10105e83d430SRalf Baechle 10111da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10121da177e4SLinus Torvalds bool 10131da177e4SLinus Torvalds default y 10141da177e4SLinus Torvalds 10151da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10161da177e4SLinus Torvalds bool 10171da177e4SLinus Torvalds 1018f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32 1019f0d1b0b3SDavid Howells bool 1020f0d1b0b3SDavid Howells default n 1021f0d1b0b3SDavid Howells 1022f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64 1023f0d1b0b3SDavid Howells bool 1024f0d1b0b3SDavid Howells default n 1025f0d1b0b3SDavid Howells 10263c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10273c9ee7efSAkinobu Mita bool 10283c9ee7efSAkinobu Mita default y 10293c9ee7efSAkinobu Mita 10301da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10311da177e4SLinus Torvalds bool 10321da177e4SLinus Torvalds default y 10331da177e4SLinus Torvalds 1034ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10351cc89038SAtsushi Nemoto bool 10361cc89038SAtsushi Nemoto default y 10371cc89038SAtsushi Nemoto 10381da177e4SLinus Torvalds# 10391da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10401da177e4SLinus Torvalds# 10410e2794b0SRalf Baechleconfig FW_ARC 10421da177e4SLinus Torvalds bool 10431da177e4SLinus Torvalds 104461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 104561ed242dSRalf Baechle bool 104661ed242dSRalf Baechle 10479267a30dSMarc St-Jeanconfig BOOT_RAW 10489267a30dSMarc St-Jean bool 10499267a30dSMarc St-Jean 1050217dd11eSRalf Baechleconfig CEVT_BCM1480 1051217dd11eSRalf Baechle bool 1052217dd11eSRalf Baechle 10536457d9fcSYoichi Yuasaconfig CEVT_DS1287 10546457d9fcSYoichi Yuasa bool 10556457d9fcSYoichi Yuasa 10561097c6acSYoichi Yuasaconfig CEVT_GT641XX 10571097c6acSYoichi Yuasa bool 10581097c6acSYoichi Yuasa 105942f77542SRalf Baechleconfig CEVT_R4K 106042f77542SRalf Baechle bool 106142f77542SRalf Baechle 1062217dd11eSRalf Baechleconfig CEVT_SB1250 1063217dd11eSRalf Baechle bool 1064217dd11eSRalf Baechle 1065229f773eSAtsushi Nemotoconfig CEVT_TXX9 1066229f773eSAtsushi Nemoto bool 1067229f773eSAtsushi Nemoto 1068217dd11eSRalf Baechleconfig CSRC_BCM1480 1069217dd11eSRalf Baechle bool 1070217dd11eSRalf Baechle 10714247417dSYoichi Yuasaconfig CSRC_IOASIC 10724247417dSYoichi Yuasa bool 10734247417dSYoichi Yuasa 1074940f6b48SRalf Baechleconfig CSRC_R4K 1075940f6b48SRalf Baechle bool 1076940f6b48SRalf Baechle 1077217dd11eSRalf Baechleconfig CSRC_SB1250 1078217dd11eSRalf Baechle bool 1079217dd11eSRalf Baechle 1080a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1081a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1082a7f4df4eSAlex Smith 1083a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1084d30a2b47SLinus Walleij select GPIOLIB 1085a9aec7feSAtsushi Nemoto bool 1086a9aec7feSAtsushi Nemoto 10870e2794b0SRalf Baechleconfig FW_CFE 1088df78b5c8SAurelien Jarno bool 1089df78b5c8SAurelien Jarno 10904bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 109134adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10924bafad92SFUJITA Tomonori 109340e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 109440e084a5SRalf Baechle bool 109540e084a5SRalf Baechle 1096885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1097885014bcSFelix Fietkau select DMA_NONCOHERENT 1098885014bcSFelix Fietkau bool 1099885014bcSFelix Fietkau 11001da177e4SLinus Torvaldsconfig DMA_COHERENT 11011da177e4SLinus Torvalds bool 11021da177e4SLinus Torvalds 11031da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11041da177e4SLinus Torvalds bool 1105e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11064ce588cdSRalf Baechle 1107e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11084ce588cdSRalf Baechle bool 11091da177e4SLinus Torvalds 111036a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11111da177e4SLinus Torvalds bool 11121da177e4SLinus Torvalds 1113dbb74540SRalf Baechleconfig HOTPLUG_CPU 11141b2bc75cSRalf Baechle bool "Support for hot-pluggable CPUs" 111540b31360SStephen Rothwell depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 11161b2bc75cSRalf Baechle help 11171b2bc75cSRalf Baechle Say Y here to allow turning CPUs off and on. CPUs can be 11181b2bc75cSRalf Baechle controlled through /sys/devices/system/cpu. 11191b2bc75cSRalf Baechle (Note: power management support will enable this option 11201b2bc75cSRalf Baechle automatically on SMP systems. ) 11211b2bc75cSRalf Baechle Say N if you want to disable CPU hotplug. 11221b2bc75cSRalf Baechle 11231b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1124dbb74540SRalf Baechle bool 1125dbb74540SRalf Baechle 11261da177e4SLinus Torvaldsconfig MIPS_BONITO64 11271da177e4SLinus Torvalds bool 11281da177e4SLinus Torvalds 11291da177e4SLinus Torvaldsconfig MIPS_MSC 11301da177e4SLinus Torvalds bool 11311da177e4SLinus Torvalds 11321f21d2bdSBrian Murphyconfig MIPS_NILE4 11331f21d2bdSBrian Murphy bool 11341f21d2bdSBrian Murphy 113539b8d525SRalf Baechleconfig SYNC_R4K 113639b8d525SRalf Baechle bool 113739b8d525SRalf Baechle 1138487d70d0SGabor Juhosconfig MIPS_MACHINE 1139487d70d0SGabor Juhos def_bool n 1140487d70d0SGabor Juhos 1141ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1142d388d685SMaciej W. Rozycki def_bool n 1143d388d685SMaciej W. Rozycki 11444e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11454e0748f5SMarkos Chandras bool 11464e0748f5SMarkos Chandras 11478313da30SRalf Baechleconfig GENERIC_ISA_DMA 11488313da30SRalf Baechle bool 11498313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1150a35bee8aSNamhyung Kim select ISA_DMA_API 11518313da30SRalf Baechle 1152aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1153aa414dffSRalf Baechle bool 11548313da30SRalf Baechle select GENERIC_ISA_DMA 1155aa414dffSRalf Baechle 1156a35bee8aSNamhyung Kimconfig ISA_DMA_API 1157a35bee8aSNamhyung Kim bool 1158a35bee8aSNamhyung Kim 1159465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1160465aaed0SDavid Daney bool 1161465aaed0SDavid Daney 11628c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11638c530ea3SMatt Redfearn bool 11648c530ea3SMatt Redfearn help 11658c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11668c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11678c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11688c530ea3SMatt Redfearn 11695e83d430SRalf Baechle# 11706b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11715e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11725e83d430SRalf Baechle# choice statement should be more obvious to the user. 11735e83d430SRalf Baechle# 11745e83d430SRalf Baechlechoice 11756b2aac42SMasanari Iida prompt "Endianness selection" 11761da177e4SLinus Torvalds help 11771da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11785e83d430SRalf Baechle byte order. These modes require different kernels and a different 11793cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11805e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11813dde6ad8SDavid Sterba one or the other endianness. 11825e83d430SRalf Baechle 11835e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11845e83d430SRalf Baechle bool "Big endian" 11855e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11865e83d430SRalf Baechle 11875e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11885e83d430SRalf Baechle bool "Little endian" 11895e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11905e83d430SRalf Baechle 11915e83d430SRalf Baechleendchoice 11925e83d430SRalf Baechle 119322b0763aSDavid Daneyconfig EXPORT_UASM 119422b0763aSDavid Daney bool 119522b0763aSDavid Daney 11962116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 11972116245eSRalf Baechle bool 11982116245eSRalf Baechle 11995e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12005e83d430SRalf Baechle bool 12015e83d430SRalf Baechle 12025e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12035e83d430SRalf Baechle bool 12041da177e4SLinus Torvalds 12059cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12069cffd154SDavid Daney bool 12079cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12089cffd154SDavid Daney default y 12099cffd154SDavid Daney 1210aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1211aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1212aa1762f4SDavid Daney 12131da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12141da177e4SLinus Torvalds bool 12151da177e4SLinus Torvalds 12169267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12179267a30dSMarc St-Jean bool 12189267a30dSMarc St-Jean 12199267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12209267a30dSMarc St-Jean bool 12219267a30dSMarc St-Jean 12228420fd00SAtsushi Nemotoconfig IRQ_TXX9 12238420fd00SAtsushi Nemoto bool 12248420fd00SAtsushi Nemoto 1225d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1226d5ab1a69SYoichi Yuasa bool 1227d5ab1a69SYoichi Yuasa 1228252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12291da177e4SLinus Torvalds bool 12301da177e4SLinus Torvalds 12319267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12329267a30dSMarc St-Jean bool 12339267a30dSMarc St-Jean 1234a83860c2SRalf Baechleconfig SOC_EMMA2RH 1235a83860c2SRalf Baechle bool 1236a83860c2SRalf Baechle select CEVT_R4K 1237a83860c2SRalf Baechle select CSRC_R4K 1238a83860c2SRalf Baechle select DMA_NONCOHERENT 123967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1240a83860c2SRalf Baechle select SWAP_IO_SPACE 1241a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1242a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1243a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1244a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1245a83860c2SRalf Baechle 1246edb6310aSDaniel Lairdconfig SOC_PNX833X 1247edb6310aSDaniel Laird bool 1248edb6310aSDaniel Laird select CEVT_R4K 1249edb6310aSDaniel Laird select CSRC_R4K 125067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1251edb6310aSDaniel Laird select DMA_NONCOHERENT 1252edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1253edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1254edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1255edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1256377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1257edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1258edb6310aSDaniel Laird 1259edb6310aSDaniel Lairdconfig SOC_PNX8335 1260edb6310aSDaniel Laird bool 1261edb6310aSDaniel Laird select SOC_PNX833X 1262edb6310aSDaniel Laird 1263a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1264a7e07b1aSMarkos Chandras bool 1265a7e07b1aSMarkos Chandras 12661da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12671da177e4SLinus Torvalds bool 12681da177e4SLinus Torvalds 1269e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1270e2defae5SThomas Bogendoerfer bool 1271e2defae5SThomas Bogendoerfer 12725b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12735b438c44SThomas Bogendoerfer bool 12745b438c44SThomas Bogendoerfer 1275e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1276e2defae5SThomas Bogendoerfer bool 1277e2defae5SThomas Bogendoerfer 1278e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1279e2defae5SThomas Bogendoerfer bool 1280e2defae5SThomas Bogendoerfer 1281e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1282e2defae5SThomas Bogendoerfer bool 1283e2defae5SThomas Bogendoerfer 1284e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1285e2defae5SThomas Bogendoerfer bool 1286e2defae5SThomas Bogendoerfer 1287e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1288e2defae5SThomas Bogendoerfer bool 1289e2defae5SThomas Bogendoerfer 12900e2794b0SRalf Baechleconfig FW_ARC32 12915e83d430SRalf Baechle bool 12925e83d430SRalf Baechle 1293aaa9fad3SPaul Bolleconfig FW_SNIPROM 1294231a35d3SThomas Bogendoerfer bool 1295231a35d3SThomas Bogendoerfer 12961da177e4SLinus Torvaldsconfig BOOT_ELF32 12971da177e4SLinus Torvalds bool 12981da177e4SLinus Torvalds 1299930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1300930beb5aSFlorian Fainelli bool 1301930beb5aSFlorian Fainelli 1302930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1303930beb5aSFlorian Fainelli bool 1304930beb5aSFlorian Fainelli 1305930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1306930beb5aSFlorian Fainelli bool 1307930beb5aSFlorian Fainelli 1308930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1309930beb5aSFlorian Fainelli bool 1310930beb5aSFlorian Fainelli 13111da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13121da177e4SLinus Torvalds int 1313a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13145432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13155432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13165432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13171da177e4SLinus Torvalds default "5" 13181da177e4SLinus Torvalds 13191da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13201da177e4SLinus Torvalds bool 13211da177e4SLinus Torvalds 13221da177e4SLinus Torvaldsconfig ARC_CONSOLE 13231da177e4SLinus Torvalds bool "ARC console support" 1324e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13251da177e4SLinus Torvalds 13261da177e4SLinus Torvaldsconfig ARC_MEMORY 13271da177e4SLinus Torvalds bool 132814b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13291da177e4SLinus Torvalds default y 13301da177e4SLinus Torvalds 13311da177e4SLinus Torvaldsconfig ARC_PROMLIB 13321da177e4SLinus Torvalds bool 1333e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13341da177e4SLinus Torvalds default y 13351da177e4SLinus Torvalds 13360e2794b0SRalf Baechleconfig FW_ARC64 13371da177e4SLinus Torvalds bool 13381da177e4SLinus Torvalds 13391da177e4SLinus Torvaldsconfig BOOT_ELF64 13401da177e4SLinus Torvalds bool 13411da177e4SLinus Torvalds 13421da177e4SLinus Torvaldsmenu "CPU selection" 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvaldschoice 13451da177e4SLinus Torvalds prompt "CPU type" 13461da177e4SLinus Torvalds default CPU_R4X00 13471da177e4SLinus Torvalds 13480e476d91SHuacai Chenconfig CPU_LOONGSON3 13490e476d91SHuacai Chen bool "Loongson 3 CPU" 13500e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13510e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13520e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13530e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13540e476d91SHuacai Chen select WEAK_ORDERING 13550e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1356b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 1357d30a2b47SLinus Walleij select GPIOLIB 13580e476d91SHuacai Chen help 13590e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13600e476d91SHuacai Chen set with many extensions. 13610e476d91SHuacai Chen 13621e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13631e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13641e820da3SHuacai Chen default n 13651e820da3SHuacai Chen select CPU_MIPSR2 13661e820da3SHuacai Chen select CPU_HAS_PREFETCH 13671e820da3SHuacai Chen depends on CPU_LOONGSON3 13681e820da3SHuacai Chen help 13691e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13701e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13711e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13721e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13731e820da3SHuacai Chen Fast TLB refill support, etc. 13741e820da3SHuacai Chen 13751e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13761e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13771e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13781e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13791e820da3SHuacai Chen 13803702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13813702bba5SWu Zhangjin bool "Loongson 2E" 13823702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13833702bba5SWu Zhangjin select CPU_LOONGSON2 13842a21c730SFuxin Zhang help 13852a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13862a21c730SFuxin Zhang with many extensions. 13872a21c730SFuxin Zhang 138825985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13896f7a251aSWu Zhangjin bonito64. 13906f7a251aSWu Zhangjin 13916f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13926f7a251aSWu Zhangjin bool "Loongson 2F" 13936f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 13946f7a251aSWu Zhangjin select CPU_LOONGSON2 1395d30a2b47SLinus Walleij select GPIOLIB 13966f7a251aSWu Zhangjin help 13976f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 13986f7a251aSWu Zhangjin with many extensions. 13996f7a251aSWu Zhangjin 14006f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14016f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14026f7a251aSWu Zhangjin Loongson2E. 14036f7a251aSWu Zhangjin 1404ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1405ca585cf9SKelvin Cheung bool "Loongson 1B" 1406ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1407ca585cf9SKelvin Cheung select CPU_LOONGSON1 14089ec88b60SKelvin Cheung select ARCH_WANT_OPTIONAL_GPIOLIB 14099ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1410ca585cf9SKelvin Cheung help 1411ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1412ca585cf9SKelvin Cheung release 2 instruction set. 1413ca585cf9SKelvin Cheung 14146e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14156e760c8dSRalf Baechle bool "MIPS32 Release 1" 14167cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14176e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1418797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1419ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14206e760c8dSRalf Baechle help 14215e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14221e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14231e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14241e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14251e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14261e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14271e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14281e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14291e5f1caaSRalf Baechle performance. 14301e5f1caaSRalf Baechle 14311e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14321e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14337cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14341e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1435797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1436ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1437a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14382235a54dSSanjay Lal select HAVE_KVM 14391e5f1caaSRalf Baechle help 14405e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14416e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14426e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14436e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14446e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14451da177e4SLinus Torvalds 14467fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1447674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14487fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14497fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14507fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14517fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14527fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14534e0748f5SMarkos Chandras select GENERIC_CSUM 14547fd08ca5SLeonid Yegoshin select HAVE_KVM 14557fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14567fd08ca5SLeonid Yegoshin help 14577fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14587fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14597fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14607fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14617fd08ca5SLeonid Yegoshin 14626e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14636e760c8dSRalf Baechle bool "MIPS64 Release 1" 14647cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1465797798c1SRalf Baechle select CPU_HAS_PREFETCH 1466ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1467ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1468ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14699cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14706e760c8dSRalf Baechle help 14716e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14726e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14736e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14746e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14756e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14761e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 14771e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 14781e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 14791e5f1caaSRalf Baechle performance. 14801e5f1caaSRalf Baechle 14811e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14821e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14837cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1484797798c1SRalf Baechle select CPU_HAS_PREFETCH 14851e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 14861e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1487ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14889cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1489a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14901e5f1caaSRalf Baechle help 14911e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 14921e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14931e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14941e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14951e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14961da177e4SLinus Torvalds 14977fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1498674d10e2SMarkos Chandras bool "MIPS64 Release 6" 14997fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15007fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15017fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15027fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15037fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15047fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15054e0748f5SMarkos Chandras select GENERIC_CSUM 15064e9d324dSPaul Burton select MIPS_O32_FP64_SUPPORT if MIPS32_O32 15077fd08ca5SLeonid Yegoshin help 15087fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15097fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15107fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15117fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15127fd08ca5SLeonid Yegoshin 15131da177e4SLinus Torvaldsconfig CPU_R3000 15141da177e4SLinus Torvalds bool "R3000" 15157cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1516f7062ddbSRalf Baechle select CPU_HAS_WB 1517ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1518797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15191da177e4SLinus Torvalds help 15201da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15211da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15221da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15231da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15241da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15251da177e4SLinus Torvalds try to recompile with R3000. 15261da177e4SLinus Torvalds 15271da177e4SLinus Torvaldsconfig CPU_TX39XX 15281da177e4SLinus Torvalds bool "R39XX" 15297cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1530ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15311da177e4SLinus Torvalds 15321da177e4SLinus Torvaldsconfig CPU_VR41XX 15331da177e4SLinus Torvalds bool "R41xx" 15347cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1535ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1536ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15371da177e4SLinus Torvalds help 15385e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15391da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15401da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15411da177e4SLinus Torvalds processor or vice versa. 15421da177e4SLinus Torvalds 15431da177e4SLinus Torvaldsconfig CPU_R4300 15441da177e4SLinus Torvalds bool "R4300" 15457cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1546ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1547ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15481da177e4SLinus Torvalds help 15491da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15501da177e4SLinus Torvalds 15511da177e4SLinus Torvaldsconfig CPU_R4X00 15521da177e4SLinus Torvalds bool "R4x00" 15537cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1554ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1555ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1556970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15571da177e4SLinus Torvalds help 15581da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15591da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15601da177e4SLinus Torvalds 15611da177e4SLinus Torvaldsconfig CPU_TX49XX 15621da177e4SLinus Torvalds bool "R49XX" 15637cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1564de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1565ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1566ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1567970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15681da177e4SLinus Torvalds 15691da177e4SLinus Torvaldsconfig CPU_R5000 15701da177e4SLinus Torvalds bool "R5000" 15717cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1572ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1573ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1574970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15751da177e4SLinus Torvalds help 15761da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 15771da177e4SLinus Torvalds 15781da177e4SLinus Torvaldsconfig CPU_R5432 15791da177e4SLinus Torvalds bool "R5432" 15807cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15815e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15825e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1583970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15841da177e4SLinus Torvalds 1585542c1020SShinya Kuribayashiconfig CPU_R5500 1586542c1020SShinya Kuribayashi bool "R5500" 1587542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1588542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1589542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 15909cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1591542c1020SShinya Kuribayashi help 1592542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1593542c1020SShinya Kuribayashi instruction set. 1594542c1020SShinya Kuribayashi 15951da177e4SLinus Torvaldsconfig CPU_R6000 15961da177e4SLinus Torvalds bool "R6000" 15977cf8053bSRalf Baechle depends on SYS_HAS_CPU_R6000 1598ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15991da177e4SLinus Torvalds help 16001da177e4SLinus Torvalds MIPS Technologies R6000 and R6000A series processors. Note these 1601c09b47d8SChris Dearman processors are extremely rare and the support for them is incomplete. 16021da177e4SLinus Torvalds 16031da177e4SLinus Torvaldsconfig CPU_NEVADA 16041da177e4SLinus Torvalds bool "RM52xx" 16057cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1606ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1607ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1608970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16091da177e4SLinus Torvalds help 16101da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16111da177e4SLinus Torvalds 16121da177e4SLinus Torvaldsconfig CPU_R8000 16131da177e4SLinus Torvalds bool "R8000" 16147cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16155e83d430SRalf Baechle select CPU_HAS_PREFETCH 1616ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16171da177e4SLinus Torvalds help 16181da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16191da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16201da177e4SLinus Torvalds 16211da177e4SLinus Torvaldsconfig CPU_R10000 16221da177e4SLinus Torvalds bool "R10000" 16237cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16245e83d430SRalf Baechle select CPU_HAS_PREFETCH 1625ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1626ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1627797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1628970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16291da177e4SLinus Torvalds help 16301da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16311da177e4SLinus Torvalds 16321da177e4SLinus Torvaldsconfig CPU_RM7000 16331da177e4SLinus Torvalds bool "RM7000" 16347cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16355e83d430SRalf Baechle select CPU_HAS_PREFETCH 1636ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1637ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1638797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1639970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16401da177e4SLinus Torvalds 16411da177e4SLinus Torvaldsconfig CPU_SB1 16421da177e4SLinus Torvalds bool "SB1" 16437cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1644ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1645ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1646797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1647970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16480004a9dfSRalf Baechle select WEAK_ORDERING 16491da177e4SLinus Torvalds 1650a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1651a86c7f72SDavid Daney bool "Cavium Octeon processor" 16525e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1653a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1654a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1655a86c7f72SDavid Daney select WEAK_ORDERING 1656a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16579cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1658df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1659df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1660930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 1661a86c7f72SDavid Daney help 1662a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1663a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1664a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1665a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1666a86c7f72SDavid Daney 1667cd746249SJonas Gorskiconfig CPU_BMIPS 1668cd746249SJonas Gorski bool "Broadcom BMIPS" 1669cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1670cd746249SJonas Gorski select CPU_MIPS32 1671fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1672cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1673cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1674cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1675cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1676cd746249SJonas Gorski select DMA_NONCOHERENT 167767e38cf2SRalf Baechle select IRQ_MIPS_CPU 1678cd746249SJonas Gorski select SWAP_IO_SPACE 1679cd746249SJonas Gorski select WEAK_ORDERING 1680c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 168169aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1682c1c0c461SKevin Cernekee help 1683fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1684c1c0c461SKevin Cernekee 16857f058e85SJayachandran Cconfig CPU_XLR 16867f058e85SJayachandran C bool "Netlogic XLR SoC" 16877f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16887f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 16897f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 16907f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1691970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16927f058e85SJayachandran C select WEAK_ORDERING 16937f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 16947f058e85SJayachandran C help 16957f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 16961c773ea4SJayachandran C 16971c773ea4SJayachandran Cconfig CPU_XLP 16981c773ea4SJayachandran C bool "Netlogic XLP SoC" 16991c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17001c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17011c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17021c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17031c773ea4SJayachandran C select WEAK_ORDERING 17041c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17051c773ea4SJayachandran C select CPU_HAS_PREFETCH 1706d6504846SJayachandran C select CPU_MIPSR2 1707ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17082db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17091c773ea4SJayachandran C help 17101c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17111da177e4SLinus Torvaldsendchoice 17121da177e4SLinus Torvalds 1713a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1714a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1715a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17167fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1717a6e18781SLeonid Yegoshin help 1718a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1719a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1720a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1721a6e18781SLeonid Yegoshin 1722a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1723a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1724a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1725a6e18781SLeonid Yegoshin select EVA 1726a6e18781SLeonid Yegoshin default y 1727a6e18781SLeonid Yegoshin help 1728a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1729a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1730a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1731a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1732a6e18781SLeonid Yegoshin 1733c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1734c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1735c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1736c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1737c5b36783SSteven J. Hill help 1738c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1739c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1740c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1741c5b36783SSteven J. Hill 1742c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1743c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1744c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1745c5b36783SSteven J. Hill depends on !EVA 1746c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1747c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1748c5b36783SSteven J. Hill select XPA 1749c5b36783SSteven J. Hill select HIGHMEM 1750c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1751c5b36783SSteven J. Hill default n 1752c5b36783SSteven J. Hill help 1753c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1754c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1755c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1756c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1757c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1758c5b36783SSteven J. Hill If unsure, say 'N' here. 1759c5b36783SSteven J. Hill 1760622844bfSWu Zhangjinif CPU_LOONGSON2F 1761622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1762622844bfSWu Zhangjin bool 1763622844bfSWu Zhangjin 1764622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1765622844bfSWu Zhangjin bool 1766622844bfSWu Zhangjin 1767622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1768622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1769622844bfSWu Zhangjin default y 1770622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1771622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1772622844bfSWu Zhangjin help 1773622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1774622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1775622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1776622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1777622844bfSWu Zhangjin 1778622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1779622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1780622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1781622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1782622844bfSWu Zhangjin systems. 1783622844bfSWu Zhangjin 1784622844bfSWu Zhangjin If unsure, please say Y. 1785622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1786622844bfSWu Zhangjin 17871b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17881b93b3c3SWu Zhangjin bool 17891b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 17901b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 179131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 17921b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1793fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 17944e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 17951b93b3c3SWu Zhangjin 17961b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 17971b93b3c3SWu Zhangjin bool 17981b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 17991b93b3c3SWu Zhangjin 1800dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1801dbb98314SAlban Bedel bool 1802dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1803dbb98314SAlban Bedel 18043702bba5SWu Zhangjinconfig CPU_LOONGSON2 18053702bba5SWu Zhangjin bool 18063702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18073702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18083702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1809970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18103702bba5SWu Zhangjin 1811ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1812ca585cf9SKelvin Cheung bool 1813ca585cf9SKelvin Cheung select CPU_MIPS32 1814ca585cf9SKelvin Cheung select CPU_MIPSR2 1815ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1816ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1817ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1818f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1819ca585cf9SKelvin Cheung 1820fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 182104fa8bf7SJonas Gorski select SMP_UP if SMP 18221bbb6c1bSKevin Cernekee bool 1823cd746249SJonas Gorski 1824cd746249SJonas Gorskiconfig CPU_BMIPS4350 1825cd746249SJonas Gorski bool 1826cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1827cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1828cd746249SJonas Gorski 1829cd746249SJonas Gorskiconfig CPU_BMIPS4380 1830cd746249SJonas Gorski bool 1831bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1832cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1833cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1834b4720809SFlorian Fainelli select CPU_HAS_RIXI 1835cd746249SJonas Gorski 1836cd746249SJonas Gorskiconfig CPU_BMIPS5000 1837cd746249SJonas Gorski bool 1838cd746249SJonas Gorski select MIPS_CPU_SCACHE 1839bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1840cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1841cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1842b4720809SFlorian Fainelli select CPU_HAS_RIXI 18431bbb6c1bSKevin Cernekee 18440e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18450e476d91SHuacai Chen bool 18460e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1847b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18480e476d91SHuacai Chen 18493702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18502a21c730SFuxin Zhang bool 18512a21c730SFuxin Zhang 18526f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18536f7a251aSWu Zhangjin bool 185455045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 185555045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 185622f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18576f7a251aSWu Zhangjin 1858ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1859ca585cf9SKelvin Cheung bool 1860ca585cf9SKelvin Cheung 18617cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18627cf8053bSRalf Baechle bool 18637cf8053bSRalf Baechle 18647cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18657cf8053bSRalf Baechle bool 18667cf8053bSRalf Baechle 1867a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1868a6e18781SLeonid Yegoshin bool 1869a6e18781SLeonid Yegoshin 1870c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1871c5b36783SSteven J. Hill bool 1872c5b36783SSteven J. Hill 18737fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18747fd08ca5SLeonid Yegoshin bool 18757fd08ca5SLeonid Yegoshin 18767cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 18777cf8053bSRalf Baechle bool 18787cf8053bSRalf Baechle 18797cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 18807cf8053bSRalf Baechle bool 18817cf8053bSRalf Baechle 18827fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 18837fd08ca5SLeonid Yegoshin bool 18847fd08ca5SLeonid Yegoshin 18857cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 18867cf8053bSRalf Baechle bool 18877cf8053bSRalf Baechle 18887cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 18897cf8053bSRalf Baechle bool 18907cf8053bSRalf Baechle 18917cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 18927cf8053bSRalf Baechle bool 18937cf8053bSRalf Baechle 18947cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 18957cf8053bSRalf Baechle bool 18967cf8053bSRalf Baechle 18977cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 18987cf8053bSRalf Baechle bool 18997cf8053bSRalf Baechle 19007cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19017cf8053bSRalf Baechle bool 19027cf8053bSRalf Baechle 19037cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19047cf8053bSRalf Baechle bool 19057cf8053bSRalf Baechle 19067cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19077cf8053bSRalf Baechle bool 19087cf8053bSRalf Baechle 1909542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1910542c1020SShinya Kuribayashi bool 1911542c1020SShinya Kuribayashi 19127cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000 19137cf8053bSRalf Baechle bool 19147cf8053bSRalf Baechle 19157cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19167cf8053bSRalf Baechle bool 19177cf8053bSRalf Baechle 19187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19197cf8053bSRalf Baechle bool 19207cf8053bSRalf Baechle 19217cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19227cf8053bSRalf Baechle bool 19237cf8053bSRalf Baechle 19247cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19257cf8053bSRalf Baechle bool 19267cf8053bSRalf Baechle 19277cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19287cf8053bSRalf Baechle bool 19297cf8053bSRalf Baechle 19305e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19315e683389SDavid Daney bool 19325e683389SDavid Daney 1933cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1934c1c0c461SKevin Cernekee bool 1935c1c0c461SKevin Cernekee 1936fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1937c1c0c461SKevin Cernekee bool 1938cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1939c1c0c461SKevin Cernekee 1940c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1941c1c0c461SKevin Cernekee bool 1942cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1943c1c0c461SKevin Cernekee 1944c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1945c1c0c461SKevin Cernekee bool 1946cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1947c1c0c461SKevin Cernekee 1948c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1949c1c0c461SKevin Cernekee bool 1950cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1951c1c0c461SKevin Cernekee 19527f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19537f058e85SJayachandran C bool 19547f058e85SJayachandran C 19551c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19561c773ea4SJayachandran C bool 19571c773ea4SJayachandran C 1958b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1959b6911bbaSPaul Burton depends on MIPS_MALTA 1960b6911bbaSPaul Burton depends on PCI 1961b6911bbaSPaul Burton bool 1962b6911bbaSPaul Burton default y 1963b6911bbaSPaul Burton 196417099b11SRalf Baechle# 196517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 196617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 196717099b11SRalf Baechle# 19680004a9dfSRalf Baechleconfig WEAK_ORDERING 19690004a9dfSRalf Baechle bool 197017099b11SRalf Baechle 197117099b11SRalf Baechle# 197217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 197317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 197417099b11SRalf Baechle# 197517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 197617099b11SRalf Baechle bool 19775e83d430SRalf Baechleendmenu 19785e83d430SRalf Baechle 19795e83d430SRalf Baechle# 19805e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19815e83d430SRalf Baechle# 19825e83d430SRalf Baechleconfig CPU_MIPS32 19835e83d430SRalf Baechle bool 19847fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 19855e83d430SRalf Baechle 19865e83d430SRalf Baechleconfig CPU_MIPS64 19875e83d430SRalf Baechle bool 19887fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 19895e83d430SRalf Baechle 19905e83d430SRalf Baechle# 1991c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 19925e83d430SRalf Baechle# 19935e83d430SRalf Baechleconfig CPU_MIPSR1 19945e83d430SRalf Baechle bool 19955e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 19965e83d430SRalf Baechle 19975e83d430SRalf Baechleconfig CPU_MIPSR2 19985e83d430SRalf Baechle bool 1999a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20008256b17eSFlorian Fainelli select CPU_HAS_RIXI 2001a7e07b1aSMarkos Chandras select MIPS_SPRAM 20025e83d430SRalf Baechle 20037fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20047fd08ca5SLeonid Yegoshin bool 20057fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20068256b17eSFlorian Fainelli select CPU_HAS_RIXI 200787321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20082db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 2009a7e07b1aSMarkos Chandras select MIPS_SPRAM 20105e83d430SRalf Baechle 2011a6e18781SLeonid Yegoshinconfig EVA 2012a6e18781SLeonid Yegoshin bool 2013a6e18781SLeonid Yegoshin 2014c5b36783SSteven J. Hillconfig XPA 2015c5b36783SSteven J. Hill bool 2016c5b36783SSteven J. Hill 20175e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20185e83d430SRalf Baechle bool 20195e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20205e83d430SRalf Baechle bool 20215e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20225e83d430SRalf Baechle bool 20235e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20245e83d430SRalf Baechle bool 202555045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 202655045ff5SWu Zhangjin bool 202755045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 202855045ff5SWu Zhangjin bool 20299cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20309cffd154SDavid Daney bool 203122f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 203222f1fdfdSWu Zhangjin bool 203382622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 203482622284SDavid Daney bool 2035d6504846SJayachandran C default y if 64BIT && CPU_MIPSR2 && !CPU_XLP 20365e83d430SRalf Baechle 20378192c9eaSDavid Daney# 20388192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20398192c9eaSDavid Daney# 20408192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20418192c9eaSDavid Daney bool 2042679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20438192c9eaSDavid Daney 20445e83d430SRalf Baechlemenu "Kernel type" 20455e83d430SRalf Baechle 20465e83d430SRalf Baechlechoice 20475e83d430SRalf Baechle prompt "Kernel code model" 20485e83d430SRalf Baechle help 20495e83d430SRalf Baechle You should only select this option if you have a workload that 20505e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20515e83d430SRalf Baechle large memory. You will only be presented a single option in this 20525e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20535e83d430SRalf Baechle 20545e83d430SRalf Baechleconfig 32BIT 20555e83d430SRalf Baechle bool "32-bit kernel" 20565e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20575e83d430SRalf Baechle select TRAD_SIGNALS 20585e83d430SRalf Baechle help 20595e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2060f17c4ca3SRalf Baechle 20615e83d430SRalf Baechleconfig 64BIT 20625e83d430SRalf Baechle bool "64-bit kernel" 20635e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20645e83d430SRalf Baechle help 20655e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20665e83d430SRalf Baechle 20675e83d430SRalf Baechleendchoice 20685e83d430SRalf Baechle 20692235a54dSSanjay Lalconfig KVM_GUEST 20702235a54dSSanjay Lal bool "KVM Guest Kernel" 2071f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20722235a54dSSanjay Lal help 2073caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2074caa1faa7SJames Hogan mode. 20752235a54dSSanjay Lal 2076eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2077eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20782235a54dSSanjay Lal depends on KVM_GUEST 2079eda3d33cSJames Hogan default 100 20802235a54dSSanjay Lal help 2081eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2082eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2083eda3d33cSJames Hogan timer frequency is specified directly. 20842235a54dSSanjay Lal 20851e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 20861e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 20871e321fa9SLeonid Yegoshin depends on 64BIT 20881e321fa9SLeonid Yegoshin help 20891e321fa9SLeonid Yegoshin Support a maximum at least 48 bits of application virtual memory. 20901e321fa9SLeonid Yegoshin Default is 40 bits or less, depending on the CPU. 20911e321fa9SLeonid Yegoshin This option result in a small memory overhead for page tables. 20921e321fa9SLeonid Yegoshin This option is only supported with 16k and 64k page sizes. 20931e321fa9SLeonid Yegoshin If unsure, say N. 20941e321fa9SLeonid Yegoshin 20951da177e4SLinus Torvaldschoice 20961da177e4SLinus Torvalds prompt "Kernel page size" 20971da177e4SLinus Torvalds default PAGE_SIZE_4KB 20981da177e4SLinus Torvalds 20991da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21001da177e4SLinus Torvalds bool "4kB" 21010e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21021e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21031da177e4SLinus Torvalds help 21041da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21051da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21061da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21071da177e4SLinus Torvalds recommended for low memory systems. 21081da177e4SLinus Torvalds 21091da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21101da177e4SLinus Torvalds bool "8kB" 21117d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21121e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21131da177e4SLinus Torvalds help 21141da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21151da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2116c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2117c52399beSRalf Baechle suitable Linux distribution to support this. 21181da177e4SLinus Torvalds 21191da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21201da177e4SLinus Torvalds bool "16kB" 2121714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21221da177e4SLinus Torvalds help 21231da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21241da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2125714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2126714bfad6SRalf Baechle Linux distribution to support this. 21271da177e4SLinus Torvalds 2128c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2129c52399beSRalf Baechle bool "32kB" 2130c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21311e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2132c52399beSRalf Baechle help 2133c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2134c52399beSRalf Baechle the price of higher memory consumption. This option is available 2135c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2136c52399beSRalf Baechle distribution to support this. 2137c52399beSRalf Baechle 21381da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21391da177e4SLinus Torvalds bool "64kB" 214074c81ecdSRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000 21411da177e4SLinus Torvalds help 21421da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21431da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21441da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2145714bfad6SRalf Baechle writing this option is still high experimental. 21461da177e4SLinus Torvalds 21471da177e4SLinus Torvaldsendchoice 21481da177e4SLinus Torvalds 2149c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2150c9bace7cSDavid Daney int "Maximum zone order" 2151e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2152e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2153e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2154e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2155e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2156e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2157c9bace7cSDavid Daney range 11 64 2158c9bace7cSDavid Daney default "11" 2159c9bace7cSDavid Daney help 2160c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2161c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2162c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2163c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2164c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2165c9bace7cSDavid Daney increase this value. 2166c9bace7cSDavid Daney 2167c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2168c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2169c9bace7cSDavid Daney 2170c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2171c9bace7cSDavid Daney when choosing a value for this option. 2172c9bace7cSDavid Daney 21731da177e4SLinus Torvaldsconfig BOARD_SCACHE 21741da177e4SLinus Torvalds bool 21751da177e4SLinus Torvalds 21761da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21771da177e4SLinus Torvalds bool 21781da177e4SLinus Torvalds select BOARD_SCACHE 21791da177e4SLinus Torvalds 21809318c51aSChris Dearman# 21819318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 21829318c51aSChris Dearman# 21839318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 21849318c51aSChris Dearman bool 21859318c51aSChris Dearman select BOARD_SCACHE 21869318c51aSChris Dearman 21871da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 21881da177e4SLinus Torvalds bool 21891da177e4SLinus Torvalds select BOARD_SCACHE 21901da177e4SLinus Torvalds 21911da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 21921da177e4SLinus Torvalds bool 21931da177e4SLinus Torvalds select BOARD_SCACHE 21941da177e4SLinus Torvalds 21951da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 21961da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 21971da177e4SLinus Torvalds depends on CPU_SB1 21981da177e4SLinus Torvalds help 21991da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22001da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22011da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22021da177e4SLinus Torvalds 22031da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2204c8094b53SRalf Baechle bool 22051da177e4SLinus Torvalds 22063165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22073165c846SFlorian Fainelli bool 22083165c846SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX) 22093165c846SFlorian Fainelli 221091405eb6SFlorian Fainelliconfig CPU_R4K_FPU 221191405eb6SFlorian Fainelli bool 221291405eb6SFlorian Fainelli default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 221391405eb6SFlorian Fainelli 221462cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 221562cedc4fSFlorian Fainelli bool 221662cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 221762cedc4fSFlorian Fainelli 221859d6ab86SRalf Baechleconfig MIPS_MT_SMP 2219a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22205676319cSMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 222159d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2222d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2223c080faa5SSteven J. Hill select SYNC_R4K 222459d6ab86SRalf Baechle select MIPS_MT 222559d6ab86SRalf Baechle select SMP 222687353d8aSRalf Baechle select SMP_UP 2227c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2228c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2229399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 223059d6ab86SRalf Baechle help 2231c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2232c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2233c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2234c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2235c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 223659d6ab86SRalf Baechle 2237f41ae0b2SRalf Baechleconfig MIPS_MT 2238f41ae0b2SRalf Baechle bool 2239f41ae0b2SRalf Baechle 22400ab7aefcSRalf Baechleconfig SCHED_SMT 22410ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22420ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22430ab7aefcSRalf Baechle default n 22440ab7aefcSRalf Baechle help 22450ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22460ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22470ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22480ab7aefcSRalf Baechle 22490ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22500ab7aefcSRalf Baechle bool 22510ab7aefcSRalf Baechle 2252f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2253f41ae0b2SRalf Baechle bool 2254f41ae0b2SRalf Baechle 2255f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2256f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2257f088fc84SRalf Baechle default y 2258b633648cSRalf Baechle depends on MIPS_MT_SMP 225907cc0c9eSRalf Baechle 2260b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2261b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 2262b0a668fbSLeonid Yegoshin depends on CPU_MIPSR6 && !SMP 2263b0a668fbSLeonid Yegoshin default y 2264b0a668fbSLeonid Yegoshin help 2265b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2266b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 226707edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2268b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2269b0a668fbSLeonid Yegoshin final kernel image. 2270b0a668fbSLeonid Yegoshincomment "MIPS R2-to-R6 emulator is only available for UP kernels" 2271b0a668fbSLeonid Yegoshin depends on SMP && CPU_MIPSR6 2272b0a668fbSLeonid Yegoshin 227307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 227407cc0c9eSRalf Baechle bool "VPE loader support." 2275704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 227607cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 227707cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 227807cc0c9eSRalf Baechle select MIPS_MT 227907cc0c9eSRalf Baechle help 228007cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 228107cc0c9eSRalf Baechle onto another VPE and running it. 2282f088fc84SRalf Baechle 228317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 228417a1d523SDeng-Cheng Zhu bool 228517a1d523SDeng-Cheng Zhu default "y" 228617a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 228717a1d523SDeng-Cheng Zhu 22881a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 22891a2a6d7eSDeng-Cheng Zhu bool 22901a2a6d7eSDeng-Cheng Zhu default "y" 22911a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 22921a2a6d7eSDeng-Cheng Zhu 2293e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2294e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2295e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2296e01402b1SRalf Baechle default y 2297e01402b1SRalf Baechle help 2298e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2299e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2300e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2301e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2302e01402b1SRalf Baechle 2303e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2304e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2305e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 23065e83d430SRalf Baechle help 2307e01402b1SRalf Baechle 2308da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2309da615cf6SDeng-Cheng Zhu bool 2310da615cf6SDeng-Cheng Zhu default "y" 2311da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2312da615cf6SDeng-Cheng Zhu 23132c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23142c973ef0SDeng-Cheng Zhu bool 23152c973ef0SDeng-Cheng Zhu default "y" 23162c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23172c973ef0SDeng-Cheng Zhu 23184a16ff4cSRalf Baechleconfig MIPS_CMP 23195cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23205676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2321b10b43baSMarkos Chandras select SMP 2322eb9b5141STim Anderson select SYNC_R4K 2323b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23244a16ff4cSRalf Baechle select WEAK_ORDERING 23254a16ff4cSRalf Baechle default n 23264a16ff4cSRalf Baechle help 2327044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2328044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2329044505c7SPaul Burton its ability to start secondary CPUs. 23304a16ff4cSRalf Baechle 23315cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23325cac93b3SPaul Burton instead of this. 23335cac93b3SPaul Burton 23340ee958e1SPaul Burtonconfig MIPS_CPS 23350ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23365a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23370ee958e1SPaul Burton select MIPS_CM 23380ee958e1SPaul Burton select MIPS_CPC 23391d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23400ee958e1SPaul Burton select SMP 23410ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23421d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 23430ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23440ee958e1SPaul Burton select WEAK_ORDERING 23450ee958e1SPaul Burton help 23460ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23470ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23480ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23490ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23500ee958e1SPaul Burton support is unavailable. 23510ee958e1SPaul Burton 23523179d37eSPaul Burtonconfig MIPS_CPS_PM 235339a59593SMarkos Chandras depends on MIPS_CPS 2354a8b84677SPaul Burton select MIPS_CPC 23553179d37eSPaul Burton bool 23563179d37eSPaul Burton 23579f98f3ddSPaul Burtonconfig MIPS_CM 23589f98f3ddSPaul Burton bool 23599f98f3ddSPaul Burton 23609c38cf44SPaul Burtonconfig MIPS_CPC 23619c38cf44SPaul Burton bool 23622600990eSRalf Baechle 23631da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23641da177e4SLinus Torvalds bool 23651da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23661da177e4SLinus Torvalds default y 23671da177e4SLinus Torvalds 23681da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23691da177e4SLinus Torvalds bool 23701da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23711da177e4SLinus Torvalds default y 23721da177e4SLinus Torvalds 23732235a54dSSanjay Lal 237460ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 237534adb28dSRalf Baechle bool 237660ec6571Spascal@pabr.org 23779e2b5372SMarkos Chandraschoice 23789e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 23799e2b5372SMarkos Chandras 23809e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 23819e2b5372SMarkos Chandras bool "None" 23829e2b5372SMarkos Chandras help 23839e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 23849e2b5372SMarkos Chandras 23859693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 23869693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 23879e2b5372SMarkos Chandras bool "SmartMIPS" 23889693a853SFranck Bui-Huu help 23899693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 23909693a853SFranck Bui-Huu increased security at both hardware and software level for 23919693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 23929693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 23939693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 23949693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 23959693a853SFranck Bui-Huu here. 23969693a853SFranck Bui-Huu 2397bce86083SSteven J. Hillconfig CPU_MICROMIPS 23987fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 23999e2b5372SMarkos Chandras bool "microMIPS" 2400bce86083SSteven J. Hill help 2401bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2402bce86083SSteven J. Hill microMIPS ISA 2403bce86083SSteven J. Hill 24049e2b5372SMarkos Chandrasendchoice 24059e2b5372SMarkos Chandras 2406a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24070ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2408a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24092a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2410a5e9a69eSPaul Burton help 2411a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2412a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24131db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24141db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24151db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24161db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24171db1af84SPaul Burton the size & complexity of your kernel. 2418a5e9a69eSPaul Burton 2419a5e9a69eSPaul Burton If unsure, say Y. 2420a5e9a69eSPaul Burton 24211da177e4SLinus Torvaldsconfig CPU_HAS_WB 2422f7062ddbSRalf Baechle bool 2423e01402b1SRalf Baechle 2424df0ac8a4SKevin Cernekeeconfig XKS01 2425df0ac8a4SKevin Cernekee bool 2426df0ac8a4SKevin Cernekee 24278256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24288256b17eSFlorian Fainelli bool 24298256b17eSFlorian Fainelli 2430f41ae0b2SRalf Baechle# 2431f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2432f41ae0b2SRalf Baechle# 2433e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2434f41ae0b2SRalf Baechle bool 2435e01402b1SRalf Baechle 2436f41ae0b2SRalf Baechle# 2437f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2438f41ae0b2SRalf Baechle# 2439e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2440f41ae0b2SRalf Baechle bool 2441e01402b1SRalf Baechle 24421da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24431da177e4SLinus Torvalds bool 24441da177e4SLinus Torvalds depends on !CPU_R3000 24451da177e4SLinus Torvalds default y 24461da177e4SLinus Torvalds 24471da177e4SLinus Torvalds# 244820d60d99SMaciej W. Rozycki# CPU non-features 244920d60d99SMaciej W. Rozycki# 245020d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 245120d60d99SMaciej W. Rozycki bool 245220d60d99SMaciej W. Rozycki 245320d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 245420d60d99SMaciej W. Rozycki bool 245520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 245620d60d99SMaciej W. Rozycki 245720d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 245820d60d99SMaciej W. Rozycki bool 245920d60d99SMaciej W. Rozycki 24604edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24614edf00a4SPaul Burton int 24624edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24634edf00a4SPaul Burton default 4 if CPU_R8000 24644edf00a4SPaul Burton default 0 24654edf00a4SPaul Burton 24664edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24674edf00a4SPaul Burton int 24682db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24694edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24704edf00a4SPaul Burton default 8 24714edf00a4SPaul Burton 24722db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24732db003a5SPaul Burton bool 24742db003a5SPaul Burton 247520d60d99SMaciej W. Rozycki# 24761da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 24771da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 24781da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 24791da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 24801da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 24811da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 24821da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 24831da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2484797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2485797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2486797798c1SRalf Baechle# support. 24871da177e4SLinus Torvalds# 24881da177e4SLinus Torvaldsconfig HIGHMEM 24891da177e4SLinus Torvalds bool "High Memory Support" 2490a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2491797798c1SRalf Baechle 2492797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2493797798c1SRalf Baechle bool 2494797798c1SRalf Baechle 2495797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2496797798c1SRalf Baechle bool 24971da177e4SLinus Torvalds 24989693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 24999693a853SFranck Bui-Huu bool 25009693a853SFranck Bui-Huu 2501a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2502a6a4834cSSteven J. Hill bool 2503a6a4834cSSteven J. Hill 2504377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2505377cb1b6SRalf Baechle bool 2506377cb1b6SRalf Baechle help 2507377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2508377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2509377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2510377cb1b6SRalf Baechle 2511a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2512a5e9a69eSPaul Burton bool 2513a5e9a69eSPaul Burton 2514b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2515b4819b59SYoichi Yuasa def_bool y 2516f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2517b4819b59SYoichi Yuasa 2518d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2519d8cb4e11SRalf Baechle bool 2520d8cb4e11SRalf Baechle default y if SGI_IP27 2521d8cb4e11SRalf Baechle help 25223dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2523d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2524d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2525d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2526d8cb4e11SRalf Baechle 2527b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2528b1c6cd42SAtsushi Nemoto bool 25297de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 253031473747SAtsushi Nemoto 2531d8cb4e11SRalf Baechleconfig NUMA 2532d8cb4e11SRalf Baechle bool "NUMA Support" 2533d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2534d8cb4e11SRalf Baechle help 2535d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2536d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2537d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2538d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2539d8cb4e11SRalf Baechle disabled. 2540d8cb4e11SRalf Baechle 2541d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2542d8cb4e11SRalf Baechle bool 2543d8cb4e11SRalf Baechle 25448c530ea3SMatt Redfearnconfig RELOCATABLE 25458c530ea3SMatt Redfearn bool "Relocatable kernel" 25468c530ea3SMatt Redfearn depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6) 25478c530ea3SMatt Redfearn help 25488c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25498c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25508c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25518c530ea3SMatt Redfearn but are discarded at runtime 25528c530ea3SMatt Redfearn 2553069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2554069fd766SMatt Redfearn hex "Relocation table size" 2555069fd766SMatt Redfearn depends on RELOCATABLE 2556069fd766SMatt Redfearn range 0x0 0x01000000 2557069fd766SMatt Redfearn default "0x00100000" 2558069fd766SMatt Redfearn ---help--- 2559069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2560069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2561069fd766SMatt Redfearn 2562069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2563069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2564069fd766SMatt Redfearn 2565069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2566069fd766SMatt Redfearn 2567069fd766SMatt Redfearn If unsure, leave at the default value. 2568069fd766SMatt Redfearn 2569405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2570405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2571405bc8fdSMatt Redfearn depends on RELOCATABLE 2572405bc8fdSMatt Redfearn ---help--- 2573405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2574405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2575405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2576405bc8fdSMatt Redfearn of kernel internals. 2577405bc8fdSMatt Redfearn 2578405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2579405bc8fdSMatt Redfearn 2580405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2581405bc8fdSMatt Redfearn 2582405bc8fdSMatt Redfearn If unsure, say N. 2583405bc8fdSMatt Redfearn 2584405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2585405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2586405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2587405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2588405bc8fdSMatt Redfearn range 0x0 0x08000000 2589405bc8fdSMatt Redfearn default "0x01000000" 2590405bc8fdSMatt Redfearn ---help--- 2591405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2592405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2593405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2594405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2595405bc8fdSMatt Redfearn 2596405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2597405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2598405bc8fdSMatt Redfearn 2599c80d79d7SYasunori Gotoconfig NODES_SHIFT 2600c80d79d7SYasunori Goto int 2601c80d79d7SYasunori Goto default "6" 2602c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2603c80d79d7SYasunori Goto 260414f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 260514f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 260623021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 260714f70012SDeng-Cheng Zhu default y 260814f70012SDeng-Cheng Zhu help 260914f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 261014f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 261114f70012SDeng-Cheng Zhu 2612b4819b59SYoichi Yuasasource "mm/Kconfig" 2613b4819b59SYoichi Yuasa 26141da177e4SLinus Torvaldsconfig SMP 26151da177e4SLinus Torvalds bool "Multi-Processing support" 2616e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2617e73ea273SRalf Baechle help 26181da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26194a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26204a474157SRobert Graffham than one CPU, say Y. 26211da177e4SLinus Torvalds 26224a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26231da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26241da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26254a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26261da177e4SLinus Torvalds will run faster if you say N here. 26271da177e4SLinus Torvalds 26281da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26291da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26301da177e4SLinus Torvalds 263103502faaSAdrian Bunk See also the SMP-HOWTO available at 263203502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26331da177e4SLinus Torvalds 26341da177e4SLinus Torvalds If you don't know what to do here, say N. 26351da177e4SLinus Torvalds 263687353d8aSRalf Baechleconfig SMP_UP 263787353d8aSRalf Baechle bool 263887353d8aSRalf Baechle 26394a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26404a16ff4cSRalf Baechle bool 26414a16ff4cSRalf Baechle 26420ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26430ee958e1SPaul Burton bool 26440ee958e1SPaul Burton 2645e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2646e73ea273SRalf Baechle bool 2647e73ea273SRalf Baechle 2648130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2649130e2fb7SRalf Baechle bool 2650130e2fb7SRalf Baechle 2651130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2652130e2fb7SRalf Baechle bool 2653130e2fb7SRalf Baechle 2654130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2655130e2fb7SRalf Baechle bool 2656130e2fb7SRalf Baechle 2657130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2658130e2fb7SRalf Baechle bool 2659130e2fb7SRalf Baechle 2660130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2661130e2fb7SRalf Baechle bool 2662130e2fb7SRalf Baechle 26631da177e4SLinus Torvaldsconfig NR_CPUS 2664a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2665a91796a9SJayachandran C range 2 256 26661da177e4SLinus Torvalds depends on SMP 2667130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2668130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2669130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2670130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2671130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 26721da177e4SLinus Torvalds help 26731da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 26741da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 26751da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 267672ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 267772ede9b1SAtsushi Nemoto and 2 for all others. 26781da177e4SLinus Torvalds 26791da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 268072ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 268172ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 268272ede9b1SAtsushi Nemoto power of two. 26831da177e4SLinus Torvalds 2684399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2685399aaa25SAl Cooper bool 2686399aaa25SAl Cooper 26871723b4a3SAtsushi Nemoto# 26881723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 26891723b4a3SAtsushi Nemoto# 26901723b4a3SAtsushi Nemoto 26911723b4a3SAtsushi Nemotochoice 26921723b4a3SAtsushi Nemoto prompt "Timer frequency" 26931723b4a3SAtsushi Nemoto default HZ_250 26941723b4a3SAtsushi Nemoto help 26951723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 26961723b4a3SAtsushi Nemoto 269767596573SPaul Burton config HZ_24 269867596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 269967596573SPaul Burton 27001723b4a3SAtsushi Nemoto config HZ_48 27010f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27021723b4a3SAtsushi Nemoto 27031723b4a3SAtsushi Nemoto config HZ_100 27041723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27051723b4a3SAtsushi Nemoto 27061723b4a3SAtsushi Nemoto config HZ_128 27071723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27081723b4a3SAtsushi Nemoto 27091723b4a3SAtsushi Nemoto config HZ_250 27101723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27111723b4a3SAtsushi Nemoto 27121723b4a3SAtsushi Nemoto config HZ_256 27131723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27141723b4a3SAtsushi Nemoto 27151723b4a3SAtsushi Nemoto config HZ_1000 27161723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27171723b4a3SAtsushi Nemoto 27181723b4a3SAtsushi Nemoto config HZ_1024 27191723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27201723b4a3SAtsushi Nemoto 27211723b4a3SAtsushi Nemotoendchoice 27221723b4a3SAtsushi Nemoto 272367596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 272467596573SPaul Burton bool 272567596573SPaul Burton 27261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27271723b4a3SAtsushi Nemoto bool 27281723b4a3SAtsushi Nemoto 27291723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27301723b4a3SAtsushi Nemoto bool 27311723b4a3SAtsushi Nemoto 27321723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27331723b4a3SAtsushi Nemoto bool 27341723b4a3SAtsushi Nemoto 27351723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27361723b4a3SAtsushi Nemoto bool 27371723b4a3SAtsushi Nemoto 27381723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27391723b4a3SAtsushi Nemoto bool 27401723b4a3SAtsushi Nemoto 27411723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27421723b4a3SAtsushi Nemoto bool 27431723b4a3SAtsushi Nemoto 27441723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27451723b4a3SAtsushi Nemoto bool 27461723b4a3SAtsushi Nemoto 27471723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27481723b4a3SAtsushi Nemoto bool 274967596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 275067596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 275167596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 275267596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 275367596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 275467596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 275567596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27561723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 27571723b4a3SAtsushi Nemoto 27581723b4a3SAtsushi Nemotoconfig HZ 27591723b4a3SAtsushi Nemoto int 276067596573SPaul Burton default 24 if HZ_24 27611723b4a3SAtsushi Nemoto default 48 if HZ_48 27621723b4a3SAtsushi Nemoto default 100 if HZ_100 27631723b4a3SAtsushi Nemoto default 128 if HZ_128 27641723b4a3SAtsushi Nemoto default 250 if HZ_250 27651723b4a3SAtsushi Nemoto default 256 if HZ_256 27661723b4a3SAtsushi Nemoto default 1000 if HZ_1000 27671723b4a3SAtsushi Nemoto default 1024 if HZ_1024 27681723b4a3SAtsushi Nemoto 276996685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 277096685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 277196685b17SDeng-Cheng Zhu 2772e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 27731da177e4SLinus Torvalds 2774ea6e942bSAtsushi Nemotoconfig KEXEC 27757d60717eSKees Cook bool "Kexec system call" 27762965faa5SDave Young select KEXEC_CORE 2777ea6e942bSAtsushi Nemoto help 2778ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2779ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 27803dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2781ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2782ea6e942bSAtsushi Nemoto 278301dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2784ea6e942bSAtsushi Nemoto 2785ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2786ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2787bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2788bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2789bf220695SGeert Uytterhoeven made. 2790ea6e942bSAtsushi Nemoto 27917aa1c8f4SRalf Baechleconfig CRASH_DUMP 27927aa1c8f4SRalf Baechle bool "Kernel crash dumps" 27937aa1c8f4SRalf Baechle help 27947aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 27957aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 27967aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 27977aa1c8f4SRalf Baechle a specially reserved region and then later executed after 27987aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 27997aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28007aa1c8f4SRalf Baechle PHYSICAL_START. 28017aa1c8f4SRalf Baechle 28027aa1c8f4SRalf Baechleconfig PHYSICAL_START 28037aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28047aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 28057aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 28067aa1c8f4SRalf Baechle depends on CRASH_DUMP 28077aa1c8f4SRalf Baechle help 28087aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28097aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28107aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28117aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28127aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28137aa1c8f4SRalf Baechle 2814ea6e942bSAtsushi Nemotoconfig SECCOMP 2815ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2816293c5bd1SRalf Baechle depends on PROC_FS 2817ea6e942bSAtsushi Nemoto default y 2818ea6e942bSAtsushi Nemoto help 2819ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2820ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2821ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2822ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2823ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2824ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2825ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2826ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2827ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2828ea6e942bSAtsushi Nemoto 2829ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2830ea6e942bSAtsushi Nemoto 2831597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28320ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2833597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2834597ce172SPaul Burton help 2835597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2836597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2837597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2838597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2839597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2840597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2841597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2842597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2843597ce172SPaul Burton saying N here. 2844597ce172SPaul Burton 284506e2e882SPaul Burton Although binutils currently supports use of this flag the details 284606e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 284706e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 284806e2e882SPaul Burton behaviour before the details have been finalised, this option should 284906e2e882SPaul Burton be considered experimental and only enabled by those working upon 285006e2e882SPaul Burton said details. 285106e2e882SPaul Burton 285206e2e882SPaul Burton If unsure, say N. 2853597ce172SPaul Burton 2854f2ffa5abSDezhong Diaoconfig USE_OF 28550b3e06fdSJonas Gorski bool 2856f2ffa5abSDezhong Diao select OF 2857e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2858abd2363fSGrant Likely select IRQ_DOMAIN 2859f2ffa5abSDezhong Diao 28607fafb068SAndrew Brestickerconfig BUILTIN_DTB 28617fafb068SAndrew Bresticker bool 28627fafb068SAndrew Bresticker 28631da8f179SJonas Gorskichoice 28645b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 28651da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 28661da8f179SJonas Gorski 28671da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 28681da8f179SJonas Gorski bool "None" 28691da8f179SJonas Gorski help 28701da8f179SJonas Gorski Do not enable appended dtb support. 28711da8f179SJonas Gorski 287287db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 287387db537dSAaro Koskinen bool "vmlinux" 287487db537dSAaro Koskinen help 287587db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 287687db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 287787db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 287887db537dSAaro Koskinen objcopy: 287987db537dSAaro Koskinen 288087db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 288187db537dSAaro Koskinen 288287db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 288387db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 288487db537dSAaro Koskinen the documented boot protocol using a device tree. 288587db537dSAaro Koskinen 28861da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 28871da8f179SJonas Gorski bool "vmlinux.bin" 28881da8f179SJonas Gorski help 28891da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 28901da8f179SJonas Gorski DTB) appended to raw vmlinux.bin (without decompressor). 28911da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 28921da8f179SJonas Gorski 28931da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 28941da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 28951da8f179SJonas Gorski the documented boot protocol using a device tree. 28961da8f179SJonas Gorski 28971da8f179SJonas Gorski Beware that there is very little in terms of protection against 28981da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 28991da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29001da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29011da8f179SJonas Gorski if you don't intend to always append a DTB. 2902c0b4e101SJonas Gorski 2903c0b4e101SJonas Gorski config MIPS_ZBOOT_APPENDED_DTB 2904c0b4e101SJonas Gorski bool "vmlinuz.bin" 2905c0b4e101SJonas Gorski depends on SYS_SUPPORTS_ZBOOT 2906c0b4e101SJonas Gorski help 2907c0b4e101SJonas Gorski With this option, the boot code will look for a device tree binary 2908c0b4e101SJonas Gorski DTB) appended to raw vmlinuz.bin (with decompressor). 2909c0b4e101SJonas Gorski (e.g. cat vmlinuz.bin <filename>.dtb > vmlinuz_w_dtb). 2910c0b4e101SJonas Gorski 2911c0b4e101SJonas Gorski This is meant as a backward compatibility convenience for those 2912c0b4e101SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 2913c0b4e101SJonas Gorski the documented boot protocol using a device tree. 2914c0b4e101SJonas Gorski 2915c0b4e101SJonas Gorski Beware that there is very little in terms of protection against 2916c0b4e101SJonas Gorski this option being confused by leftover garbage in memory that might 2917c0b4e101SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 2918c0b4e101SJonas Gorski to vmlinuz.bin. Do not leave this option active in a production kernel 2919c0b4e101SJonas Gorski if you don't intend to always append a DTB. 29201da8f179SJonas Gorskiendchoice 29211da8f179SJonas Gorski 29222024972eSJonas Gorskichoice 29232024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29242bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29252bcef9b4SJonas Gorski !MIPS_MALTA && !MIPS_SEAD3 && \ 29262bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29272024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29282024972eSJonas Gorski 29292024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29302024972eSJonas Gorski depends on USE_OF 29312024972eSJonas Gorski bool "Dtb kernel arguments if available" 29322024972eSJonas Gorski 29332024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29342024972eSJonas Gorski depends on USE_OF 29352024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29362024972eSJonas Gorski 29372024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29382024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2939ed47e153SRabin Vincent 2940ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2941ed47e153SRabin Vincent depends on CMDLINE_BOOL 2942ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29432024972eSJonas Gorskiendchoice 29442024972eSJonas Gorski 29455e83d430SRalf Baechleendmenu 29465e83d430SRalf Baechle 29471df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29481df0f0ffSAtsushi Nemoto bool 29491df0f0ffSAtsushi Nemoto default y 29501df0f0ffSAtsushi Nemoto 29511df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29521df0f0ffSAtsushi Nemoto bool 29531df0f0ffSAtsushi Nemoto default y 29541df0f0ffSAtsushi Nemoto 2955e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2956e1e16115SAaro Koskinen bool 2957e1e16115SAaro Koskinen default y 2958e1e16115SAaro Koskinen 2959a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2960a728ab52SKirill A. Shutemov int 2961a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2962a728ab52SKirill A. Shutemov default 2 2963a728ab52SKirill A. Shutemov 2964b6c3539bSRalf Baechlesource "init/Kconfig" 2965b6c3539bSRalf Baechle 2966dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2967dc52ddc0SMatt Helsley 29681da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29691da177e4SLinus Torvalds 29705e83d430SRalf Baechleconfig HW_HAS_EISA 29715e83d430SRalf Baechle bool 29721da177e4SLinus Torvaldsconfig HW_HAS_PCI 29731da177e4SLinus Torvalds bool 29741da177e4SLinus Torvalds 29751da177e4SLinus Torvaldsconfig PCI 29761da177e4SLinus Torvalds bool "Support for PCI controller" 29771da177e4SLinus Torvalds depends on HW_HAS_PCI 2978abb4ae46SRalf Baechle select PCI_DOMAINS 29790f3b3956SMichael S. Tsirkin select NO_GENERIC_PCI_IOPORT_MAP 29801da177e4SLinus Torvalds help 29811da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 29821da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 29831da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 29841da177e4SLinus Torvalds say Y, otherwise N. 29851da177e4SLinus Torvalds 29860e476d91SHuacai Chenconfig HT_PCI 29870e476d91SHuacai Chen bool "Support for HT-linked PCI" 29880e476d91SHuacai Chen default y 29890e476d91SHuacai Chen depends on CPU_LOONGSON3 29900e476d91SHuacai Chen select PCI 29910e476d91SHuacai Chen select PCI_DOMAINS 29920e476d91SHuacai Chen help 29930e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 29940e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 29950e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 29960e476d91SHuacai Chen 29971da177e4SLinus Torvaldsconfig PCI_DOMAINS 29981da177e4SLinus Torvalds bool 29991da177e4SLinus Torvalds 30001da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30011da177e4SLinus Torvalds 30021da177e4SLinus Torvalds# 30031da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30041da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30051da177e4SLinus Torvalds# users to choose the right thing ... 30061da177e4SLinus Torvalds# 30071da177e4SLinus Torvaldsconfig ISA 30081da177e4SLinus Torvalds bool 30091da177e4SLinus Torvalds 30101da177e4SLinus Torvaldsconfig EISA 30111da177e4SLinus Torvalds bool "EISA support" 30125e83d430SRalf Baechle depends on HW_HAS_EISA 30131da177e4SLinus Torvalds select ISA 3014aa414dffSRalf Baechle select GENERIC_ISA_DMA 30151da177e4SLinus Torvalds ---help--- 30161da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30171da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30181da177e4SLinus Torvalds 30191da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30201da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30211da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30221da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30231da177e4SLinus Torvalds 30241da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30251da177e4SLinus Torvalds 30261da177e4SLinus Torvalds Otherwise, say N. 30271da177e4SLinus Torvalds 30281da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30291da177e4SLinus Torvalds 30301da177e4SLinus Torvaldsconfig TC 30311da177e4SLinus Torvalds bool "TURBOchannel support" 30321da177e4SLinus Torvalds depends on MACH_DECSTATION 30331da177e4SLinus Torvalds help 303450a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 303550a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 303650a23e6eSJustin P. Mattock at: 303750a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 303850a23e6eSJustin P. Mattock and: 303950a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 304050a23e6eSJustin P. Mattock Linux driver support status is documented at: 304150a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30421da177e4SLinus Torvalds 30431da177e4SLinus Torvaldsconfig MMU 30441da177e4SLinus Torvalds bool 30451da177e4SLinus Torvalds default y 30461da177e4SLinus Torvalds 3047d865bea4SRalf Baechleconfig I8253 3048d865bea4SRalf Baechle bool 3049798778b8SRussell King select CLKSRC_I8253 30502d02612fSThomas Gleixner select CLKEVT_I8253 30519726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3052d865bea4SRalf Baechle 3053e05eb3f8SRalf Baechleconfig ZONE_DMA 3054e05eb3f8SRalf Baechle bool 3055e05eb3f8SRalf Baechle 3056cce335aeSRalf Baechleconfig ZONE_DMA32 3057cce335aeSRalf Baechle bool 3058cce335aeSRalf Baechle 30591da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 30601da177e4SLinus Torvalds 3061388b78adSAlexandre Bounineconfig RAPIDIO 306256abde72SAlexandre Bounine tristate "RapidIO support" 3063388b78adSAlexandre Bounine depends on PCI 3064388b78adSAlexandre Bounine default n 3065388b78adSAlexandre Bounine help 3066388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3067388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3068388b78adSAlexandre Bounine 3069388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3070388b78adSAlexandre Bounine 30711da177e4SLinus Torvaldsendmenu 30721da177e4SLinus Torvalds 30731da177e4SLinus Torvaldsmenu "Executable file formats" 30741da177e4SLinus Torvalds 30751da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 30761da177e4SLinus Torvalds 30771da177e4SLinus Torvaldsconfig TRAD_SIGNALS 30781da177e4SLinus Torvalds bool 30791da177e4SLinus Torvalds 30801da177e4SLinus Torvaldsconfig MIPS32_COMPAT 308178aaf956SRalf Baechle bool 30821da177e4SLinus Torvalds 30831da177e4SLinus Torvaldsconfig COMPAT 30841da177e4SLinus Torvalds bool 30851da177e4SLinus Torvalds 308605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 308705e43966SAtsushi Nemoto bool 308805e43966SAtsushi Nemoto 30891da177e4SLinus Torvaldsconfig MIPS32_O32 30901da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 309178aaf956SRalf Baechle depends on 64BIT 309278aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 309378aaf956SRalf Baechle select COMPAT 309478aaf956SRalf Baechle select MIPS32_COMPAT 309578aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 30961da177e4SLinus Torvalds help 30971da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 30981da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 30991da177e4SLinus Torvalds existing binaries are in this format. 31001da177e4SLinus Torvalds 31011da177e4SLinus Torvalds If unsure, say Y. 31021da177e4SLinus Torvalds 31031da177e4SLinus Torvaldsconfig MIPS32_N32 31041da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3105c22eacfeSRalf Baechle depends on 64BIT 310678aaf956SRalf Baechle select COMPAT 310778aaf956SRalf Baechle select MIPS32_COMPAT 310878aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31091da177e4SLinus Torvalds help 31101da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31111da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31121da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31131da177e4SLinus Torvalds cases. 31141da177e4SLinus Torvalds 31151da177e4SLinus Torvalds If unsure, say N. 31161da177e4SLinus Torvalds 31171da177e4SLinus Torvaldsconfig BINFMT_ELF32 31181da177e4SLinus Torvalds bool 31191da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3120*f43edca7SRalf Baechle select ELFCORE 31211da177e4SLinus Torvalds 31222116245eSRalf Baechleendmenu 31231da177e4SLinus Torvalds 31242116245eSRalf Baechlemenu "Power management options" 3125952fa954SRodolfo Giometti 3126363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3127363c55caSWu Zhangjin def_bool y 31283f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3129363c55caSWu Zhangjin 3130f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3131f4cb5700SJohannes Berg def_bool y 31323f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3133f4cb5700SJohannes Berg 31342116245eSRalf Baechlesource "kernel/power/Kconfig" 3135952fa954SRodolfo Giometti 31361da177e4SLinus Torvaldsendmenu 31371da177e4SLinus Torvalds 31387a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31397a998935SViresh Kumar bool 31407a998935SViresh Kumar 31417a998935SViresh Kumarmenu "CPU Power Management" 3142c095ebafSPaul Burton 3143c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31447a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31457a998935SViresh Kumarendif 31469726b43aSWu Zhangjin 3147c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3148c095ebafSPaul Burton 3149c095ebafSPaul Burtonendmenu 3150c095ebafSPaul Burton 3151d5950b43SSam Ravnborgsource "net/Kconfig" 3152d5950b43SSam Ravnborg 31531da177e4SLinus Torvaldssource "drivers/Kconfig" 31541da177e4SLinus Torvalds 315598cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 315698cdee0eSRalf Baechle 31571da177e4SLinus Torvaldssource "fs/Kconfig" 31581da177e4SLinus Torvalds 31591da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 31601da177e4SLinus Torvalds 31611da177e4SLinus Torvaldssource "security/Kconfig" 31621da177e4SLinus Torvalds 31631da177e4SLinus Torvaldssource "crypto/Kconfig" 31641da177e4SLinus Torvalds 31651da177e4SLinus Torvaldssource "lib/Kconfig" 31662235a54dSSanjay Lal 31672235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3168