1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 512597988SMatt Redfearn select ARCH_BINFMT_ELF_STATE 612597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 712597988SMatt Redfearn select ARCH_DISCARD_MEMBLOCK 812597988SMatt Redfearn select ARCH_HAS_ELF_RANDOMIZE 912597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 10a862a426SMark Salter select ARCH_MIGHT_HAVE_PC_PARPORT 11393c1262SMark Salter select ARCH_MIGHT_HAVE_PC_SERIO 1212597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 131ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1412597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1525da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 160b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 1712597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 1812597988SMatt Redfearn select BUILDTIME_EXTABLE_SORT 1912597988SMatt Redfearn select CLONE_BACKWARDS 2012597988SMatt Redfearn select CPU_PM if CPU_IDLE 2112597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2212597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2312597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2412597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2512597988SMatt Redfearn select GENERIC_IRQ_PROBE 2612597988SMatt Redfearn select GENERIC_IRQ_SHOW 2712597988SMatt Redfearn select GENERIC_PCI_IOMAP 2812597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 2912597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 3012597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 3112597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 3212597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 3388547001SJason Wessel select HAVE_ARCH_KGDB 34109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 35109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 36490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 37c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 3812597988SMatt Redfearn select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT 39f381bf6dSDavid Daney select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS) 40f381bf6dSDavid Daney select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS) 4112597988SMatt Redfearn select HAVE_CC_STACKPROTECTOR 4212597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 4312597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 4464575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 4512597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 4612597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 4712597988SMatt Redfearn select HAVE_DMA_API_DEBUG 4812597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 4912597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 5012597988SMatt Redfearn select HAVE_EXIT_THREAD 5112597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 5229c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 5312597988SMatt Redfearn select HAVE_FUNCTION_TRACER 5412597988SMatt Redfearn select HAVE_GENERIC_DMA_COHERENT 5512597988SMatt Redfearn select HAVE_IDE 5612597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 5712597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 58c1bf207dSDavid Daney select HAVE_KPROBES 59c1bf207dSDavid Daney select HAVE_KRETPROBES 609d15ffc8STejun Heo select HAVE_MEMBLOCK 619d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 62786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 6342a0bb3fSPetr Mladek select HAVE_NMI 6412597988SMatt Redfearn select HAVE_OPROFILE 6512597988SMatt Redfearn select HAVE_PERF_EVENTS 6608bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 6712597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 68a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 6912597988SMatt Redfearn select IRQ_FORCED_THREADING 7012597988SMatt Redfearn select MODULES_USE_ELF_RELA if MODULES && 64BIT 7112597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 7212597988SMatt Redfearn select PERF_USE_VMALLOC 7312597988SMatt Redfearn select RTC_LIB if !MACH_LOONGSON64 7412597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 7512597988SMatt Redfearn select VIRT_TO_BUS 761da177e4SLinus Torvalds 771da177e4SLinus Torvaldsmenu "Machine selection" 781da177e4SLinus Torvalds 795e83d430SRalf Baechlechoice 805e83d430SRalf Baechle prompt "System type" 81d41e6858SMatt Redfearn default MIPS_GENERIC 821da177e4SLinus Torvalds 83eed0eabdSPaul Burtonconfig MIPS_GENERIC 84eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 85eed0eabdSPaul Burton select BOOT_RAW 86eed0eabdSPaul Burton select BUILTIN_DTB 87eed0eabdSPaul Burton select CEVT_R4K 88eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 89eed0eabdSPaul Burton select COMMON_CLK 90eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_VI 91eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 92eed0eabdSPaul Burton select CSRC_R4K 93eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 94eed0eabdSPaul Burton select HW_HAS_PCI 95eed0eabdSPaul Burton select IRQ_MIPS_CPU 96eed0eabdSPaul Burton select LIBFDT 97eed0eabdSPaul Burton select MIPS_CPU_SCACHE 98eed0eabdSPaul Burton select MIPS_GIC 99eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 100eed0eabdSPaul Burton select NO_EXCEPT_FILL 101eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 102eed0eabdSPaul Burton select PINCTRL 103eed0eabdSPaul Burton select SMP_UP if SMP 104a3078e59SMatt Redfearn select SWAP_IO_SPACE 105eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 106eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 107eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 108eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 109eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 110eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 111eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 112eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 113eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 114eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 115eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 116eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 117eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS_CPS 118eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 119eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 120eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 121eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 122eed0eabdSPaul Burton select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 123eed0eabdSPaul Burton select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 124eed0eabdSPaul Burton select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 125eed0eabdSPaul Burton select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 126eed0eabdSPaul Burton select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN 127eed0eabdSPaul Burton select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN 128eed0eabdSPaul Burton select USE_OF 129eed0eabdSPaul Burton help 130eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 131eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 132eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 133eed0eabdSPaul Burton Interface) specification. 134eed0eabdSPaul Burton 13542a4f17dSManuel Laussconfig MIPS_ALCHEMY 136c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 13734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 138f772cdb2SRalf Baechle select CEVT_R4K 139d7ea335cSSteven J. Hill select CSRC_R4K 14067e38cf2SRalf Baechle select IRQ_MIPS_CPU 14188e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 14242a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 14342a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 14442a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 145d30a2b47SLinus Walleij select GPIOLIB 1461b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 14747440229SManuel Lauss select COMMON_CLK 1481da177e4SLinus Torvalds 1497ca5dc14SFlorian Fainelliconfig AR7 1507ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1517ca5dc14SFlorian Fainelli select BOOT_ELF32 1527ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1537ca5dc14SFlorian Fainelli select CEVT_R4K 1547ca5dc14SFlorian Fainelli select CSRC_R4K 15567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1567ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1577ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1587ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1597ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1607ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1617ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 162377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1631b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 164d30a2b47SLinus Walleij select GPIOLIB 1657ca5dc14SFlorian Fainelli select VLYNQ 1668551fb64SYoichi Yuasa select HAVE_CLK 1677ca5dc14SFlorian Fainelli help 1687ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1697ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1707ca5dc14SFlorian Fainelli 17143cc739fSSergey Ryazanovconfig ATH25 17243cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 17343cc739fSSergey Ryazanov select CEVT_R4K 17443cc739fSSergey Ryazanov select CSRC_R4K 17543cc739fSSergey Ryazanov select DMA_NONCOHERENT 17667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1771753e74eSSergey Ryazanov select IRQ_DOMAIN 17843cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 17943cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 18043cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1818aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 18243cc739fSSergey Ryazanov help 18343cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 18443cc739fSSergey Ryazanov 185d4a67d9dSGabor Juhosconfig ATH79 186d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 187ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 188d4a67d9dSGabor Juhos select BOOT_RAW 189d4a67d9dSGabor Juhos select CEVT_R4K 190d4a67d9dSGabor Juhos select CSRC_R4K 191d4a67d9dSGabor Juhos select DMA_NONCOHERENT 192d30a2b47SLinus Walleij select GPIOLIB 19394638067SGabor Juhos select HAVE_CLK 194411520afSAlban Bedel select COMMON_CLK 1952c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 19667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1970aabf1a4SGabor Juhos select MIPS_MACHINE 198d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 199d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 200d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 201d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 202377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 203b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 20403c8c407SAlban Bedel select USE_OF 205d4a67d9dSGabor Juhos help 206d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 207d4a67d9dSGabor Juhos 2085f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2095f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 210d666cd02SKevin Cernekee select BOOT_RAW 211d666cd02SKevin Cernekee select NO_EXCEPT_FILL 212d666cd02SKevin Cernekee select USE_OF 213d666cd02SKevin Cernekee select CEVT_R4K 214d666cd02SKevin Cernekee select CSRC_R4K 215d666cd02SKevin Cernekee select SYNC_R4K 216d666cd02SKevin Cernekee select COMMON_CLK 217c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 21860b858f2SKevin Cernekee select BCM7038_L1_IRQ 21960b858f2SKevin Cernekee select BCM7120_L2_IRQ 22060b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 22167e38cf2SRalf Baechle select IRQ_MIPS_CPU 22260b858f2SKevin Cernekee select DMA_NONCOHERENT 223d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 22460b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 225d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 226d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 22760b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 22860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 22960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 230d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 231d666cd02SKevin Cernekee select SWAP_IO_SPACE 23260b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 23460b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 23560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2364dc4704cSJustin Chen select HARDIRQS_SW_RESEND 237d666cd02SKevin Cernekee help 2385f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2395f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2405f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2415f2d4459SKevin Cernekee must be set appropriately for your board. 242d666cd02SKevin Cernekee 2431c0c13ebSAurelien Jarnoconfig BCM47XX 244c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 245fe08f8c2SHauke Mehrtens select BOOT_RAW 24642f77542SRalf Baechle select CEVT_R4K 247940f6b48SRalf Baechle select CSRC_R4K 2481c0c13ebSAurelien Jarno select DMA_NONCOHERENT 2491c0c13ebSAurelien Jarno select HW_HAS_PCI 25067e38cf2SRalf Baechle select IRQ_MIPS_CPU 251314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 252dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2531c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2541c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 255377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 25625e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 257e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 258c949c0bcSRafał Miłecki select GPIOLIB 259c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 260f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2612ab71a02SRafał Miłecki select BCM47XX_SPROM 262*dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2631c0c13ebSAurelien Jarno help 2641c0c13ebSAurelien Jarno Support for BCM47XX based boards 2651c0c13ebSAurelien Jarno 266e7300d04SMaxime Bizonconfig BCM63XX 267e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 268ae8de61cSFlorian Fainelli select BOOT_RAW 269e7300d04SMaxime Bizon select CEVT_R4K 270e7300d04SMaxime Bizon select CSRC_R4K 271fc264022SJonas Gorski select SYNC_R4K 272e7300d04SMaxime Bizon select DMA_NONCOHERENT 27367e38cf2SRalf Baechle select IRQ_MIPS_CPU 274e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 275e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 276e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 277e7300d04SMaxime Bizon select SWAP_IO_SPACE 278d30a2b47SLinus Walleij select GPIOLIB 2793e82eeebSYoichi Yuasa select HAVE_CLK 280af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 281c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 282e7300d04SMaxime Bizon help 283e7300d04SMaxime Bizon Support for BCM63XX based boards 284e7300d04SMaxime Bizon 2851da177e4SLinus Torvaldsconfig MIPS_COBALT 2863fa986faSMartin Michlmayr bool "Cobalt Server" 28742f77542SRalf Baechle select CEVT_R4K 288940f6b48SRalf Baechle select CSRC_R4K 2891097c6acSYoichi Yuasa select CEVT_GT641XX 2901da177e4SLinus Torvalds select DMA_NONCOHERENT 2911da177e4SLinus Torvalds select HW_HAS_PCI 292d865bea4SRalf Baechle select I8253 2931da177e4SLinus Torvalds select I8259 29467e38cf2SRalf Baechle select IRQ_MIPS_CPU 295d5ab1a69SYoichi Yuasa select IRQ_GT641XX 296252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 297e25bfc92SYoichi Yuasa select PCI 2987cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 2990a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 300ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3010e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3025e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 303e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3041da177e4SLinus Torvalds 3051da177e4SLinus Torvaldsconfig MACH_DECSTATION 3063fa986faSMartin Michlmayr bool "DECstations" 3071da177e4SLinus Torvalds select BOOT_ELF32 3086457d9fcSYoichi Yuasa select CEVT_DS1287 30981d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3104247417dSYoichi Yuasa select CSRC_IOASIC 31181d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 31220d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 31320d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 31420d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3151da177e4SLinus Torvalds select DMA_NONCOHERENT 316ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 31767e38cf2SRalf Baechle select IRQ_MIPS_CPU 3187cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3197cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 320ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3217d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3225e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3231723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3241723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3251723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 326930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3275e83d430SRalf Baechle help 3281da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3291da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3301da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3311da177e4SLinus Torvalds 3321da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3331da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3341da177e4SLinus Torvalds 3351da177e4SLinus Torvalds DECstation 5000/50 3361da177e4SLinus Torvalds DECstation 5000/150 3371da177e4SLinus Torvalds DECstation 5000/260 3381da177e4SLinus Torvalds DECsystem 5900/260 3391da177e4SLinus Torvalds 3401da177e4SLinus Torvalds otherwise choose R3000. 3411da177e4SLinus Torvalds 3425e83d430SRalf Baechleconfig MACH_JAZZ 3433fa986faSMartin Michlmayr bool "Jazz family of machines" 3440e2794b0SRalf Baechle select FW_ARC 3450e2794b0SRalf Baechle select FW_ARC32 3465e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 34742f77542SRalf Baechle select CEVT_R4K 348940f6b48SRalf Baechle select CSRC_R4K 349e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3505e83d430SRalf Baechle select GENERIC_ISA_DMA 3518a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 35267e38cf2SRalf Baechle select IRQ_MIPS_CPU 353d865bea4SRalf Baechle select I8253 3545e83d430SRalf Baechle select I8259 3555e83d430SRalf Baechle select ISA 3567cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3575e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3587d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3591723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3601da177e4SLinus Torvalds help 3615e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3625e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 363692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3645e83d430SRalf Baechle Olivetti M700-10 workstations. 3655e83d430SRalf Baechle 366de361e8bSPaul Burtonconfig MACH_INGENIC 367de361e8bSPaul Burton bool "Ingenic SoC based machines" 3685ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3695ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 370f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 3715ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 37267e38cf2SRalf Baechle select IRQ_MIPS_CPU 37337b4c3caSPaul Cercueil select PINCTRL 374d30a2b47SLinus Walleij select GPIOLIB 375ff1930c6SPaul Burton select COMMON_CLK 37683bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 377ffb1843dSPaul Burton select BUILTIN_DTB 378ffb1843dSPaul Burton select USE_OF 3796ec127fbSPaul Burton select LIBFDT 3805ebabe59SLars-Peter Clausen 381171bb2f1SJohn Crispinconfig LANTIQ 382171bb2f1SJohn Crispin bool "Lantiq based platforms" 383171bb2f1SJohn Crispin select DMA_NONCOHERENT 38467e38cf2SRalf Baechle select IRQ_MIPS_CPU 385171bb2f1SJohn Crispin select CEVT_R4K 386171bb2f1SJohn Crispin select CSRC_R4K 387171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 388171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 389171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 390171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 391377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 392171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 393171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 394d30a2b47SLinus Walleij select GPIOLIB 395171bb2f1SJohn Crispin select SWAP_IO_SPACE 396171bb2f1SJohn Crispin select BOOT_RAW 397287e3f3fSJohn Crispin select CLKDEV_LOOKUP 398a0392222SJohn Crispin select USE_OF 3993f8c50c9SJohn Crispin select PINCTRL 4003f8c50c9SJohn Crispin select PINCTRL_LANTIQ 401c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 402c530781cSJohn Crispin select RESET_CONTROLLER 403171bb2f1SJohn Crispin 4041f21d2bdSBrian Murphyconfig LASAT 4051f21d2bdSBrian Murphy bool "LASAT Networks platforms" 40642f77542SRalf Baechle select CEVT_R4K 40716f0bbbcSRalf Baechle select CRC32 408940f6b48SRalf Baechle select CSRC_R4K 4091f21d2bdSBrian Murphy select DMA_NONCOHERENT 4101f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 4111f21d2bdSBrian Murphy select HW_HAS_PCI 41267e38cf2SRalf Baechle select IRQ_MIPS_CPU 4131f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4141f21d2bdSBrian Murphy select MIPS_NILE4 4151f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4161f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4171f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4181f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4191f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4201f21d2bdSBrian Murphy 42130ad29bbSHuacai Chenconfig MACH_LOONGSON32 42230ad29bbSHuacai Chen bool "Loongson-1 family of machines" 423c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 424ade299d8SYoichi Yuasa help 42530ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 42685749d24SWu Zhangjin 42730ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 42830ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 42930ad29bbSHuacai Chen Sciences (CAS). 430ade299d8SYoichi Yuasa 43130ad29bbSHuacai Chenconfig MACH_LOONGSON64 43230ad29bbSHuacai Chen bool "Loongson-2/3 family of machines" 433ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 434ca585cf9SKelvin Cheung help 43530ad29bbSHuacai Chen This enables the support of Loongson-2/3 family of machines. 436ca585cf9SKelvin Cheung 43730ad29bbSHuacai Chen Loongson-2 is a family of single-core CPUs and Loongson-3 is a 43830ad29bbSHuacai Chen family of multi-core CPUs. They are both 64-bit general-purpose 43930ad29bbSHuacai Chen MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute 44030ad29bbSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS) 44130ad29bbSHuacai Chen in the People's Republic of China. The chief architect is Professor 44230ad29bbSHuacai Chen Weiwu Hu. 443ca585cf9SKelvin Cheung 4446a438309SAndrew Brestickerconfig MACH_PISTACHIO 4456a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 4466a438309SAndrew Bresticker select BOOT_ELF32 4476a438309SAndrew Bresticker select BOOT_RAW 4486a438309SAndrew Bresticker select CEVT_R4K 4496a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 4506a438309SAndrew Bresticker select COMMON_CLK 4516a438309SAndrew Bresticker select CSRC_R4K 452645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 453d30a2b47SLinus Walleij select GPIOLIB 45467e38cf2SRalf Baechle select IRQ_MIPS_CPU 4556a438309SAndrew Bresticker select LIBFDT 4566a438309SAndrew Bresticker select MFD_SYSCON 4576a438309SAndrew Bresticker select MIPS_CPU_SCACHE 4586a438309SAndrew Bresticker select MIPS_GIC 4596a438309SAndrew Bresticker select PINCTRL 4606a438309SAndrew Bresticker select REGULATOR 4616a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 4626a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 4636a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 4646a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 4656a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 46641cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 4676a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 468018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 469018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 4706a438309SAndrew Bresticker select USE_OF 4716a438309SAndrew Bresticker help 4726a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 4736a438309SAndrew Bresticker 4741da177e4SLinus Torvaldsconfig MIPS_MALTA 4753fa986faSMartin Michlmayr bool "MIPS Malta board" 47661ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 4771da177e4SLinus Torvalds select BOOT_ELF32 478fa71c960SRalf Baechle select BOOT_RAW 479e8823d26SPaul Burton select BUILTIN_DTB 48042f77542SRalf Baechle select CEVT_R4K 481940f6b48SRalf Baechle select CSRC_R4K 482fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 48342b002abSGuenter Roeck select COMMON_CLK 484885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 4851da177e4SLinus Torvalds select GENERIC_ISA_DMA 4868a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 48767e38cf2SRalf Baechle select IRQ_MIPS_CPU 4888a19b8f1SAndrew Bresticker select MIPS_GIC 4891da177e4SLinus Torvalds select HW_HAS_PCI 490d865bea4SRalf Baechle select I8253 4911da177e4SLinus Torvalds select I8259 4925e83d430SRalf Baechle select MIPS_BONITO64 4939318c51aSChris Dearman select MIPS_CPU_SCACHE 494a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 495252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 4965e83d430SRalf Baechle select MIPS_MSC 497ecafe3e9SPaul Burton select SMP_UP if SMP 4981da177e4SLinus Torvalds select SWAP_IO_SPACE 4997cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5007cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 501bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 502c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 503575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5047cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5055d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 506575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5077cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5087cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 509ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 510ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5115e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 512c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5135e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 514424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 5150365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 516e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 517377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 518f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 5199693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 5201b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 5218c530ea3SMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 522e8823d26SPaul Burton select USE_OF 52338ec82feSPaul Burton select LIBFDT 524abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 525e81a8c7dSPaul Burton select BUILTIN_DTB 526e81a8c7dSPaul Burton select LIBFDT 5271da177e4SLinus Torvalds help 528f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5291da177e4SLinus Torvalds board. 5301da177e4SLinus Torvalds 5312572f00dSJoshua Hendersonconfig MACH_PIC32 5322572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5332572f00dSJoshua Henderson help 5342572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5352572f00dSJoshua Henderson 5362572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5372572f00dSJoshua Henderson microcontrollers. 5382572f00dSJoshua Henderson 539a83860c2SRalf Baechleconfig NEC_MARKEINS 540a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 541a83860c2SRalf Baechle select SOC_EMMA2RH 542a83860c2SRalf Baechle select HW_HAS_PCI 543a83860c2SRalf Baechle help 544a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 545ade299d8SYoichi Yuasa 5465e83d430SRalf Baechleconfig MACH_VR41XX 54774142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 54842f77542SRalf Baechle select CEVT_R4K 549940f6b48SRalf Baechle select CSRC_R4K 5507cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 551377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 552d30a2b47SLinus Walleij select GPIOLIB 5535e83d430SRalf Baechle 554edb6310aSDaniel Lairdconfig NXP_STB220 555edb6310aSDaniel Laird bool "NXP STB220 board" 556edb6310aSDaniel Laird select SOC_PNX833X 557edb6310aSDaniel Laird help 558edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 559edb6310aSDaniel Laird 560edb6310aSDaniel Lairdconfig NXP_STB225 561edb6310aSDaniel Laird bool "NXP 225 board" 562edb6310aSDaniel Laird select SOC_PNX833X 563edb6310aSDaniel Laird select SOC_PNX8335 564edb6310aSDaniel Laird help 565edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 566edb6310aSDaniel Laird 5679267a30dSMarc St-Jeanconfig PMC_MSP 5689267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 56939d30c13SAnoop P A select CEVT_R4K 57039d30c13SAnoop P A select CSRC_R4K 5719267a30dSMarc St-Jean select DMA_NONCOHERENT 5729267a30dSMarc St-Jean select SWAP_IO_SPACE 5739267a30dSMarc St-Jean select NO_EXCEPT_FILL 5749267a30dSMarc St-Jean select BOOT_RAW 5759267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 5769267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 5779267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 5789267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 579377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 58067e38cf2SRalf Baechle select IRQ_MIPS_CPU 5819267a30dSMarc St-Jean select SERIAL_8250 5829267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 5839296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 5849296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 5859267a30dSMarc St-Jean help 5869267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 5879267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 5889267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 5899267a30dSMarc St-Jean a variety of MIPS cores. 5909267a30dSMarc St-Jean 591ae2b5bb6SJohn Crispinconfig RALINK 592ae2b5bb6SJohn Crispin bool "Ralink based machines" 593ae2b5bb6SJohn Crispin select CEVT_R4K 594ae2b5bb6SJohn Crispin select CSRC_R4K 595ae2b5bb6SJohn Crispin select BOOT_RAW 596ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 59767e38cf2SRalf Baechle select IRQ_MIPS_CPU 598ae2b5bb6SJohn Crispin select USE_OF 599ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 600ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 601ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 602ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 603377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 604ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 605ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6062a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6072a153f1cSJohn Crispin select RESET_CONTROLLER 608ae2b5bb6SJohn Crispin 6091da177e4SLinus Torvaldsconfig SGI_IP22 6103fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 6110e2794b0SRalf Baechle select FW_ARC 6120e2794b0SRalf Baechle select FW_ARC32 6131da177e4SLinus Torvalds select BOOT_ELF32 61442f77542SRalf Baechle select CEVT_R4K 615940f6b48SRalf Baechle select CSRC_R4K 616e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6171da177e4SLinus Torvalds select DMA_NONCOHERENT 6185e83d430SRalf Baechle select HW_HAS_EISA 619d865bea4SRalf Baechle select I8253 62068de4803SThomas Bogendoerfer select I8259 6211da177e4SLinus Torvalds select IP22_CPU_SCACHE 62267e38cf2SRalf Baechle select IRQ_MIPS_CPU 623aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 624e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 625e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 62636e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 627e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 628e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 629e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6301da177e4SLinus Torvalds select SWAP_IO_SPACE 6317cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6327cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 6332b5e63f6SMartin Michlmayr # 6342b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6352b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6362b5e63f6SMartin Michlmayr # 6372b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6382b5e63f6SMartin Michlmayr # for a more details discussion 6392b5e63f6SMartin Michlmayr # 6402b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 641ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 642ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6435e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 644930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6451da177e4SLinus Torvalds help 6461da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 6471da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 6481da177e4SLinus Torvalds that runs on these, say Y here. 6491da177e4SLinus Torvalds 6501da177e4SLinus Torvaldsconfig SGI_IP27 6513fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 6520e2794b0SRalf Baechle select FW_ARC 6530e2794b0SRalf Baechle select FW_ARC64 6545e83d430SRalf Baechle select BOOT_ELF64 655e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 656634286f1SRalf Baechle select DMA_COHERENT 65736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 6581da177e4SLinus Torvalds select HW_HAS_PCI 659130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 6607cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 661ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6625e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 663d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 6641a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 665930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6661da177e4SLinus Torvalds help 6671da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 6681da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 6691da177e4SLinus Torvalds here. 6701da177e4SLinus Torvalds 671e2defae5SThomas Bogendoerferconfig SGI_IP28 6727d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 6730e2794b0SRalf Baechle select FW_ARC 6740e2794b0SRalf Baechle select FW_ARC64 675e2defae5SThomas Bogendoerfer select BOOT_ELF64 676e2defae5SThomas Bogendoerfer select CEVT_R4K 677e2defae5SThomas Bogendoerfer select CSRC_R4K 678e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 679e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 680e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 68167e38cf2SRalf Baechle select IRQ_MIPS_CPU 682e2defae5SThomas Bogendoerfer select HW_HAS_EISA 683e2defae5SThomas Bogendoerfer select I8253 684e2defae5SThomas Bogendoerfer select I8259 685e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 686e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 6875b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 688e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 689e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 690e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 691e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 692e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 6932b5e63f6SMartin Michlmayr # 6942b5e63f6SMartin Michlmayr # Disable EARLY_PRINTK for now since it leads to overwritten prom 6952b5e63f6SMartin Michlmayr # memory during early boot on some machines. 6962b5e63f6SMartin Michlmayr # 6972b5e63f6SMartin Michlmayr # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com 6982b5e63f6SMartin Michlmayr # for a more details discussion 6992b5e63f6SMartin Michlmayr # 7002b5e63f6SMartin Michlmayr # select SYS_HAS_EARLY_PRINTK 701e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 702e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 703dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 704e2defae5SThomas Bogendoerfer help 705e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 706e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 707e2defae5SThomas Bogendoerfer 7081da177e4SLinus Torvaldsconfig SGI_IP32 709cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 7100e2794b0SRalf Baechle select FW_ARC 7110e2794b0SRalf Baechle select FW_ARC32 7121da177e4SLinus Torvalds select BOOT_ELF32 71342f77542SRalf Baechle select CEVT_R4K 714940f6b48SRalf Baechle select CSRC_R4K 7151da177e4SLinus Torvalds select DMA_NONCOHERENT 7161da177e4SLinus Torvalds select HW_HAS_PCI 71767e38cf2SRalf Baechle select IRQ_MIPS_CPU 7181da177e4SLinus Torvalds select R5000_CPU_SCACHE 7191da177e4SLinus Torvalds select RM7000_CPU_SCACHE 7207cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 7217cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 7227cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 723dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 724ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7255e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7261da177e4SLinus Torvalds help 7271da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 7281da177e4SLinus Torvalds 729ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 730ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 7315e83d430SRalf Baechle select BOOT_ELF32 7325e83d430SRalf Baechle select DMA_COHERENT 7335e83d430SRalf Baechle select SIBYTE_BCM1120 7345e83d430SRalf Baechle select SWAP_IO_SPACE 7357cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7365e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7375e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7385e83d430SRalf Baechle 739ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 740ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 7415e83d430SRalf Baechle select BOOT_ELF32 7425e83d430SRalf Baechle select DMA_COHERENT 7435e83d430SRalf Baechle select SIBYTE_BCM1120 7445e83d430SRalf Baechle select SWAP_IO_SPACE 7457cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7465e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7475e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7485e83d430SRalf Baechle 7495e83d430SRalf Baechleconfig SIBYTE_CRHONE 7503fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 7515e83d430SRalf Baechle select BOOT_ELF32 7525e83d430SRalf Baechle select DMA_COHERENT 7535e83d430SRalf Baechle select SIBYTE_BCM1125 7545e83d430SRalf Baechle select SWAP_IO_SPACE 7557cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 7565e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 7575e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 7585e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 7595e83d430SRalf Baechle 760ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 761ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 762ade299d8SYoichi Yuasa select BOOT_ELF32 763ade299d8SYoichi Yuasa select DMA_COHERENT 764ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 765ade299d8SYoichi Yuasa select SWAP_IO_SPACE 766ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 767ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 768ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 769ade299d8SYoichi Yuasa 770ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 771ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 772ade299d8SYoichi Yuasa select BOOT_ELF32 773ade299d8SYoichi Yuasa select DMA_COHERENT 774fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 775ade299d8SYoichi Yuasa select SIBYTE_SB1250 776ade299d8SYoichi Yuasa select SWAP_IO_SPACE 777ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 778ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 779ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 780ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 781cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 782ade299d8SYoichi Yuasa 783ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 784ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 785ade299d8SYoichi Yuasa select BOOT_ELF32 786ade299d8SYoichi Yuasa select DMA_COHERENT 787fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 788ade299d8SYoichi Yuasa select SIBYTE_SB1250 789ade299d8SYoichi Yuasa select SWAP_IO_SPACE 790ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 791ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 792ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 793ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 794ade299d8SYoichi Yuasa 795ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 796ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 797ade299d8SYoichi Yuasa select BOOT_ELF32 798ade299d8SYoichi Yuasa select DMA_COHERENT 799ade299d8SYoichi Yuasa select SIBYTE_SB1250 800ade299d8SYoichi Yuasa select SWAP_IO_SPACE 801ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 802ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 803ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 804ade299d8SYoichi Yuasa 805ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 806ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 807ade299d8SYoichi Yuasa select BOOT_ELF32 808ade299d8SYoichi Yuasa select DMA_COHERENT 809ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 810ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 811ade299d8SYoichi Yuasa select SWAP_IO_SPACE 812ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 813ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 814651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 815ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 816cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 817ade299d8SYoichi Yuasa 81814b36af4SThomas Bogendoerferconfig SNI_RM 81914b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 8200e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 8210e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 822aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 8235e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 8245e83d430SRalf Baechle select BOOT_ELF32 82542f77542SRalf Baechle select CEVT_R4K 826940f6b48SRalf Baechle select CSRC_R4K 827e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 8285e83d430SRalf Baechle select DMA_NONCOHERENT 8295e83d430SRalf Baechle select GENERIC_ISA_DMA 8308a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 8315e83d430SRalf Baechle select HW_HAS_EISA 8325e83d430SRalf Baechle select HW_HAS_PCI 83367e38cf2SRalf Baechle select IRQ_MIPS_CPU 834d865bea4SRalf Baechle select I8253 8355e83d430SRalf Baechle select I8259 8365e83d430SRalf Baechle select ISA 8374a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 8387cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 8394a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 840c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 8414a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 84236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 843ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 8447d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 8454a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 8465e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8475e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8481da177e4SLinus Torvalds help 84914b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 85014b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 8515e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 8525e83d430SRalf Baechle support this machine type. 8531da177e4SLinus Torvalds 854edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 855edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 8565e83d430SRalf Baechle 857edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 858edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 85923fbee9dSRalf Baechle 86073b4390fSRalf Baechleconfig MIKROTIK_RB532 86173b4390fSRalf Baechle bool "Mikrotik RB532 boards" 86273b4390fSRalf Baechle select CEVT_R4K 86373b4390fSRalf Baechle select CSRC_R4K 86473b4390fSRalf Baechle select DMA_NONCOHERENT 86573b4390fSRalf Baechle select HW_HAS_PCI 86667e38cf2SRalf Baechle select IRQ_MIPS_CPU 86773b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 86873b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 86973b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 87073b4390fSRalf Baechle select SWAP_IO_SPACE 87173b4390fSRalf Baechle select BOOT_RAW 872d30a2b47SLinus Walleij select GPIOLIB 873930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 87473b4390fSRalf Baechle help 87573b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 87673b4390fSRalf Baechle based on the IDT RC32434 SoC. 87773b4390fSRalf Baechle 8789ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 8799ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 880a86c7f72SDavid Daney select CEVT_R4K 88134adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 882a86c7f72SDavid Daney select DMA_COHERENT 883a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 884a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 885f65aad41SRalf Baechle select EDAC_SUPPORT 886b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 88773569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 88873569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 889a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 8905e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 891e8635b48SDavid Daney select HW_HAS_PCI 892f00e001eSDavid Daney select ZONE_DMA32 893465aaed0SDavid Daney select HOLES_IN_ZONE 894d30a2b47SLinus Walleij select GPIOLIB 8956e511163SDavid Daney select LIBFDT 8966e511163SDavid Daney select USE_OF 8976e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 8986e511163SDavid Daney select SYS_SUPPORTS_SMP 8997820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9007820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 901e326479fSAndrew Bresticker select BUILTIN_DTB 9028c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 9033ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 904a86c7f72SDavid Daney help 905a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 906a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 907a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 908a86c7f72SDavid Daney Some of the supported boards are: 909a86c7f72SDavid Daney EBT3000 910a86c7f72SDavid Daney EBH3000 911a86c7f72SDavid Daney EBH3100 912a86c7f72SDavid Daney Thunder 913a86c7f72SDavid Daney Kodama 914a86c7f72SDavid Daney Hikari 915a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 916a86c7f72SDavid Daney 9177f058e85SJayachandran Cconfig NLM_XLR_BOARD 9187f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 9197f058e85SJayachandran C select BOOT_ELF32 9207f058e85SJayachandran C select NLM_COMMON 9217f058e85SJayachandran C select SYS_HAS_CPU_XLR 9227f058e85SJayachandran C select SYS_SUPPORTS_SMP 9237f058e85SJayachandran C select HW_HAS_PCI 9247f058e85SJayachandran C select SWAP_IO_SPACE 9257f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9267f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 92734adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 9287f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9297f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 9307f058e85SJayachandran C select DMA_COHERENT 9317f058e85SJayachandran C select NR_CPUS_DEFAULT_32 9327f058e85SJayachandran C select CEVT_R4K 9337f058e85SJayachandran C select CSRC_R4K 93467e38cf2SRalf Baechle select IRQ_MIPS_CPU 935b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9367f058e85SJayachandran C select SYNC_R4K 9377f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 9388f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9398f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9407f058e85SJayachandran C help 9417f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 9427f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 9437f058e85SJayachandran C 9441c773ea4SJayachandran Cconfig NLM_XLP_BOARD 9451c773ea4SJayachandran C bool "Netlogic XLP based systems" 9461c773ea4SJayachandran C select BOOT_ELF32 9471c773ea4SJayachandran C select NLM_COMMON 9481c773ea4SJayachandran C select SYS_HAS_CPU_XLP 9491c773ea4SJayachandran C select SYS_SUPPORTS_SMP 9501c773ea4SJayachandran C select HW_HAS_PCI 9511c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 9521c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 95334adb28dSRalf Baechle select ARCH_PHYS_ADDR_T_64BIT 954d30a2b47SLinus Walleij select GPIOLIB 9551c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 9561c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 9571c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 9581c773ea4SJayachandran C select DMA_COHERENT 9591c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 9601c773ea4SJayachandran C select CEVT_R4K 9611c773ea4SJayachandran C select CSRC_R4K 96267e38cf2SRalf Baechle select IRQ_MIPS_CPU 963b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 9641c773ea4SJayachandran C select SYNC_R4K 9651c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 9662f6528e1SJayachandran C select USE_OF 9678f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 9688f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 9691c773ea4SJayachandran C help 9701c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 9711c773ea4SJayachandran C Say Y here if you have a XLP based board. 9721c773ea4SJayachandran C 9739bc463beSDavid Daneyconfig MIPS_PARAVIRT 9749bc463beSDavid Daney bool "Para-Virtualized guest system" 9759bc463beSDavid Daney select CEVT_R4K 9769bc463beSDavid Daney select CSRC_R4K 9779bc463beSDavid Daney select DMA_COHERENT 9789bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 9799bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 9809bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 9819bc463beSDavid Daney select SYS_SUPPORTS_SMP 9829bc463beSDavid Daney select NR_CPUS_DEFAULT_4 9839bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 9849bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 9859bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 9869bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 9879bc463beSDavid Daney select HW_HAS_PCI 9889bc463beSDavid Daney select SWAP_IO_SPACE 9899bc463beSDavid Daney help 9909bc463beSDavid Daney This option supports guest running under ???? 9919bc463beSDavid Daney 9921da177e4SLinus Torvaldsendchoice 9931da177e4SLinus Torvalds 994e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 9953b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 996d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 997a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 998e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 9998945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1000eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10015e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10025ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10038ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10041f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10052572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1006af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10070f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1008ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 100929c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 101038b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 101122b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10125e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1013a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 101430ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 101530ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 10167f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1017ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 101838b18f72SRalf Baechle 10195e83d430SRalf Baechleendmenu 10205e83d430SRalf Baechle 10211da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK 10221da177e4SLinus Torvalds bool 10231da177e4SLinus Torvalds default y 10241da177e4SLinus Torvalds 10251da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM 10261da177e4SLinus Torvalds bool 10271da177e4SLinus Torvalds 10283c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 10293c9ee7efSAkinobu Mita bool 10303c9ee7efSAkinobu Mita default y 10313c9ee7efSAkinobu Mita 10321da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 10331da177e4SLinus Torvalds bool 10341da177e4SLinus Torvalds default y 10351da177e4SLinus Torvalds 1036ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 10371cc89038SAtsushi Nemoto bool 10381cc89038SAtsushi Nemoto default y 10391cc89038SAtsushi Nemoto 10401da177e4SLinus Torvalds# 10411da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 10421da177e4SLinus Torvalds# 10430e2794b0SRalf Baechleconfig FW_ARC 10441da177e4SLinus Torvalds bool 10451da177e4SLinus Torvalds 104661ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 104761ed242dSRalf Baechle bool 104861ed242dSRalf Baechle 10499267a30dSMarc St-Jeanconfig BOOT_RAW 10509267a30dSMarc St-Jean bool 10519267a30dSMarc St-Jean 1052217dd11eSRalf Baechleconfig CEVT_BCM1480 1053217dd11eSRalf Baechle bool 1054217dd11eSRalf Baechle 10556457d9fcSYoichi Yuasaconfig CEVT_DS1287 10566457d9fcSYoichi Yuasa bool 10576457d9fcSYoichi Yuasa 10581097c6acSYoichi Yuasaconfig CEVT_GT641XX 10591097c6acSYoichi Yuasa bool 10601097c6acSYoichi Yuasa 106142f77542SRalf Baechleconfig CEVT_R4K 106242f77542SRalf Baechle bool 106342f77542SRalf Baechle 1064217dd11eSRalf Baechleconfig CEVT_SB1250 1065217dd11eSRalf Baechle bool 1066217dd11eSRalf Baechle 1067229f773eSAtsushi Nemotoconfig CEVT_TXX9 1068229f773eSAtsushi Nemoto bool 1069229f773eSAtsushi Nemoto 1070217dd11eSRalf Baechleconfig CSRC_BCM1480 1071217dd11eSRalf Baechle bool 1072217dd11eSRalf Baechle 10734247417dSYoichi Yuasaconfig CSRC_IOASIC 10744247417dSYoichi Yuasa bool 10754247417dSYoichi Yuasa 1076940f6b48SRalf Baechleconfig CSRC_R4K 1077940f6b48SRalf Baechle bool 1078940f6b48SRalf Baechle 1079217dd11eSRalf Baechleconfig CSRC_SB1250 1080217dd11eSRalf Baechle bool 1081217dd11eSRalf Baechle 1082a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1083a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1084a7f4df4eSAlex Smith 1085a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1086d30a2b47SLinus Walleij select GPIOLIB 1087a9aec7feSAtsushi Nemoto bool 1088a9aec7feSAtsushi Nemoto 10890e2794b0SRalf Baechleconfig FW_CFE 1090df78b5c8SAurelien Jarno bool 1091df78b5c8SAurelien Jarno 10924bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT 109334adb28dSRalf Baechle def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT 10944bafad92SFUJITA Tomonori 109540e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 109640e084a5SRalf Baechle bool 109740e084a5SRalf Baechle 1098885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1099885014bcSFelix Fietkau select DMA_NONCOHERENT 1100885014bcSFelix Fietkau bool 1101885014bcSFelix Fietkau 110220d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 110320d33064SPaul Burton bool 110420d33064SPaul Burton select DMA_MAYBE_COHERENT 110520d33064SPaul Burton 11061da177e4SLinus Torvaldsconfig DMA_COHERENT 11071da177e4SLinus Torvalds bool 11081da177e4SLinus Torvalds 11091da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11101da177e4SLinus Torvalds bool 1111e1e02b32SFUJITA Tomonori select NEED_DMA_MAP_STATE 11124ce588cdSRalf Baechle 1113e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE 11144ce588cdSRalf Baechle bool 11151da177e4SLinus Torvalds 111636a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11171da177e4SLinus Torvalds bool 11181da177e4SLinus Torvalds 11191b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1120dbb74540SRalf Baechle bool 1121dbb74540SRalf Baechle 11221da177e4SLinus Torvaldsconfig MIPS_BONITO64 11231da177e4SLinus Torvalds bool 11241da177e4SLinus Torvalds 11251da177e4SLinus Torvaldsconfig MIPS_MSC 11261da177e4SLinus Torvalds bool 11271da177e4SLinus Torvalds 11281f21d2bdSBrian Murphyconfig MIPS_NILE4 11291f21d2bdSBrian Murphy bool 11301f21d2bdSBrian Murphy 113139b8d525SRalf Baechleconfig SYNC_R4K 113239b8d525SRalf Baechle bool 113339b8d525SRalf Baechle 1134487d70d0SGabor Juhosconfig MIPS_MACHINE 1135487d70d0SGabor Juhos def_bool n 1136487d70d0SGabor Juhos 1137ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1138d388d685SMaciej W. Rozycki def_bool n 1139d388d685SMaciej W. Rozycki 11404e0748f5SMarkos Chandrasconfig GENERIC_CSUM 11414e0748f5SMarkos Chandras bool 11424e0748f5SMarkos Chandras 11438313da30SRalf Baechleconfig GENERIC_ISA_DMA 11448313da30SRalf Baechle bool 11458313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1146a35bee8aSNamhyung Kim select ISA_DMA_API 11478313da30SRalf Baechle 1148aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1149aa414dffSRalf Baechle bool 11508313da30SRalf Baechle select GENERIC_ISA_DMA 1151aa414dffSRalf Baechle 1152a35bee8aSNamhyung Kimconfig ISA_DMA_API 1153a35bee8aSNamhyung Kim bool 1154a35bee8aSNamhyung Kim 1155465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1156465aaed0SDavid Daney bool 1157465aaed0SDavid Daney 11588c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 11598c530ea3SMatt Redfearn bool 11608c530ea3SMatt Redfearn help 11618c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 11628c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 11638c530ea3SMatt Redfearn to allow access to command line and entropy sources. 11648c530ea3SMatt Redfearn 1165f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1166f381bf6dSDavid Daney def_bool y 1167f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1168f381bf6dSDavid Daney 1169f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1170f381bf6dSDavid Daney def_bool y 1171f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1172f381bf6dSDavid Daney 1173f381bf6dSDavid Daney 11745e83d430SRalf Baechle# 11756b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 11765e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 11775e83d430SRalf Baechle# choice statement should be more obvious to the user. 11785e83d430SRalf Baechle# 11795e83d430SRalf Baechlechoice 11806b2aac42SMasanari Iida prompt "Endianness selection" 11811da177e4SLinus Torvalds help 11821da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 11835e83d430SRalf Baechle byte order. These modes require different kernels and a different 11843cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 11855e83d430SRalf Baechle particular system but some systems are just as commonly used in the 11863dde6ad8SDavid Sterba one or the other endianness. 11875e83d430SRalf Baechle 11885e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 11895e83d430SRalf Baechle bool "Big endian" 11905e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 11915e83d430SRalf Baechle 11925e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 11935e83d430SRalf Baechle bool "Little endian" 11945e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 11955e83d430SRalf Baechle 11965e83d430SRalf Baechleendchoice 11975e83d430SRalf Baechle 119822b0763aSDavid Daneyconfig EXPORT_UASM 119922b0763aSDavid Daney bool 120022b0763aSDavid Daney 12012116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12022116245eSRalf Baechle bool 12032116245eSRalf Baechle 12045e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12055e83d430SRalf Baechle bool 12065e83d430SRalf Baechle 12075e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12085e83d430SRalf Baechle bool 12091da177e4SLinus Torvalds 12109cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12119cffd154SDavid Daney bool 12129cffd154SDavid Daney depends on CPU_SUPPORTS_HUGEPAGES && 64BIT 12139cffd154SDavid Daney default y 12149cffd154SDavid Daney 1215aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1216aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1217aa1762f4SDavid Daney 12181da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 12191da177e4SLinus Torvalds bool 12201da177e4SLinus Torvalds 12219267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 12229267a30dSMarc St-Jean bool 12239267a30dSMarc St-Jean 12249267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 12259267a30dSMarc St-Jean bool 12269267a30dSMarc St-Jean 12278420fd00SAtsushi Nemotoconfig IRQ_TXX9 12288420fd00SAtsushi Nemoto bool 12298420fd00SAtsushi Nemoto 1230d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1231d5ab1a69SYoichi Yuasa bool 1232d5ab1a69SYoichi Yuasa 1233252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 12341da177e4SLinus Torvalds bool 12351da177e4SLinus Torvalds 12369267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 12379267a30dSMarc St-Jean bool 12389267a30dSMarc St-Jean 1239a83860c2SRalf Baechleconfig SOC_EMMA2RH 1240a83860c2SRalf Baechle bool 1241a83860c2SRalf Baechle select CEVT_R4K 1242a83860c2SRalf Baechle select CSRC_R4K 1243a83860c2SRalf Baechle select DMA_NONCOHERENT 124467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1245a83860c2SRalf Baechle select SWAP_IO_SPACE 1246a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1247a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1248a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1249a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1250a83860c2SRalf Baechle 1251edb6310aSDaniel Lairdconfig SOC_PNX833X 1252edb6310aSDaniel Laird bool 1253edb6310aSDaniel Laird select CEVT_R4K 1254edb6310aSDaniel Laird select CSRC_R4K 125567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1256edb6310aSDaniel Laird select DMA_NONCOHERENT 1257edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1258edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1259edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1260edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1261377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1262edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1263edb6310aSDaniel Laird 1264edb6310aSDaniel Lairdconfig SOC_PNX8335 1265edb6310aSDaniel Laird bool 1266edb6310aSDaniel Laird select SOC_PNX833X 1267edb6310aSDaniel Laird 1268a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1269a7e07b1aSMarkos Chandras bool 1270a7e07b1aSMarkos Chandras 12711da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 12721da177e4SLinus Torvalds bool 12731da177e4SLinus Torvalds 1274e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1275e2defae5SThomas Bogendoerfer bool 1276e2defae5SThomas Bogendoerfer 12775b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 12785b438c44SThomas Bogendoerfer bool 12795b438c44SThomas Bogendoerfer 1280e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1281e2defae5SThomas Bogendoerfer bool 1282e2defae5SThomas Bogendoerfer 1283e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1284e2defae5SThomas Bogendoerfer bool 1285e2defae5SThomas Bogendoerfer 1286e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1287e2defae5SThomas Bogendoerfer bool 1288e2defae5SThomas Bogendoerfer 1289e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1290e2defae5SThomas Bogendoerfer bool 1291e2defae5SThomas Bogendoerfer 1292e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1293e2defae5SThomas Bogendoerfer bool 1294e2defae5SThomas Bogendoerfer 12950e2794b0SRalf Baechleconfig FW_ARC32 12965e83d430SRalf Baechle bool 12975e83d430SRalf Baechle 1298aaa9fad3SPaul Bolleconfig FW_SNIPROM 1299231a35d3SThomas Bogendoerfer bool 1300231a35d3SThomas Bogendoerfer 13011da177e4SLinus Torvaldsconfig BOOT_ELF32 13021da177e4SLinus Torvalds bool 13031da177e4SLinus Torvalds 1304930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1305930beb5aSFlorian Fainelli bool 1306930beb5aSFlorian Fainelli 1307930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1308930beb5aSFlorian Fainelli bool 1309930beb5aSFlorian Fainelli 1310930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1311930beb5aSFlorian Fainelli bool 1312930beb5aSFlorian Fainelli 1313930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1314930beb5aSFlorian Fainelli bool 1315930beb5aSFlorian Fainelli 13161da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 13171da177e4SLinus Torvalds int 1318a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 13195432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 13205432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 13215432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 13221da177e4SLinus Torvalds default "5" 13231da177e4SLinus Torvalds 13241da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 13251da177e4SLinus Torvalds bool 13261da177e4SLinus Torvalds 13271da177e4SLinus Torvaldsconfig ARC_CONSOLE 13281da177e4SLinus Torvalds bool "ARC console support" 1329e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 13301da177e4SLinus Torvalds 13311da177e4SLinus Torvaldsconfig ARC_MEMORY 13321da177e4SLinus Torvalds bool 133314b36af4SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP32 13341da177e4SLinus Torvalds default y 13351da177e4SLinus Torvalds 13361da177e4SLinus Torvaldsconfig ARC_PROMLIB 13371da177e4SLinus Torvalds bool 1338e2defae5SThomas Bogendoerfer depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32 13391da177e4SLinus Torvalds default y 13401da177e4SLinus Torvalds 13410e2794b0SRalf Baechleconfig FW_ARC64 13421da177e4SLinus Torvalds bool 13431da177e4SLinus Torvalds 13441da177e4SLinus Torvaldsconfig BOOT_ELF64 13451da177e4SLinus Torvalds bool 13461da177e4SLinus Torvalds 13471da177e4SLinus Torvaldsmenu "CPU selection" 13481da177e4SLinus Torvalds 13491da177e4SLinus Torvaldschoice 13501da177e4SLinus Torvalds prompt "CPU type" 13511da177e4SLinus Torvalds default CPU_R4X00 13521da177e4SLinus Torvalds 13530e476d91SHuacai Chenconfig CPU_LOONGSON3 13540e476d91SHuacai Chen bool "Loongson 3 CPU" 13550e476d91SHuacai Chen depends on SYS_HAS_CPU_LOONGSON3 13560e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 13570e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 13580e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 13590e476d91SHuacai Chen select WEAK_ORDERING 13600e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 1361b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 136217c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1363d30a2b47SLinus Walleij select GPIOLIB 13640e476d91SHuacai Chen help 13650e476d91SHuacai Chen The Loongson 3 processor implements the MIPS64R2 instruction 13660e476d91SHuacai Chen set with many extensions. 13670e476d91SHuacai Chen 13681e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT 13691e820da3SHuacai Chen bool "New Loongson 3 CPU Enhancements" 13701e820da3SHuacai Chen default n 13711e820da3SHuacai Chen select CPU_MIPSR2 13721e820da3SHuacai Chen select CPU_HAS_PREFETCH 13731e820da3SHuacai Chen depends on CPU_LOONGSON3 13741e820da3SHuacai Chen help 13751e820da3SHuacai Chen New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A 13761e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 13771e820da3SHuacai Chen FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User 13781e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 13791e820da3SHuacai Chen Fast TLB refill support, etc. 13801e820da3SHuacai Chen 13811e820da3SHuacai Chen This option enable those enhancements which are not probed at run 13821e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 13831e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 13841e820da3SHuacai Chen new Loongson 3 machines only, please say 'Y' here. 13851e820da3SHuacai Chen 13863702bba5SWu Zhangjinconfig CPU_LOONGSON2E 13873702bba5SWu Zhangjin bool "Loongson 2E" 13883702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 13893702bba5SWu Zhangjin select CPU_LOONGSON2 13902a21c730SFuxin Zhang help 13912a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 13922a21c730SFuxin Zhang with many extensions. 13932a21c730SFuxin Zhang 139425985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 13956f7a251aSWu Zhangjin bonito64. 13966f7a251aSWu Zhangjin 13976f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 13986f7a251aSWu Zhangjin bool "Loongson 2F" 13996f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 14006f7a251aSWu Zhangjin select CPU_LOONGSON2 1401d30a2b47SLinus Walleij select GPIOLIB 14026f7a251aSWu Zhangjin help 14036f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 14046f7a251aSWu Zhangjin with many extensions. 14056f7a251aSWu Zhangjin 14066f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 14076f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 14086f7a251aSWu Zhangjin Loongson2E. 14096f7a251aSWu Zhangjin 1410ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1411ca585cf9SKelvin Cheung bool "Loongson 1B" 1412ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1413ca585cf9SKelvin Cheung select CPU_LOONGSON1 14149ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1415ca585cf9SKelvin Cheung help 1416ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1417ca585cf9SKelvin Cheung release 2 instruction set. 1418ca585cf9SKelvin Cheung 141912e3280bSYang Lingconfig CPU_LOONGSON1C 142012e3280bSYang Ling bool "Loongson 1C" 142112e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 142212e3280bSYang Ling select CPU_LOONGSON1 142312e3280bSYang Ling select LEDS_GPIO_REGISTER 142412e3280bSYang Ling help 142512e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 142612e3280bSYang Ling release 2 instruction set. 142712e3280bSYang Ling 14286e760c8dSRalf Baechleconfig CPU_MIPS32_R1 14296e760c8dSRalf Baechle bool "MIPS32 Release 1" 14307cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 14316e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1432797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1433ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14346e760c8dSRalf Baechle help 14355e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 14361e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14371e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14381e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 14391e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14401e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 14411e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 14421e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 14431e5f1caaSRalf Baechle performance. 14441e5f1caaSRalf Baechle 14451e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 14461e5f1caaSRalf Baechle bool "MIPS32 Release 2" 14477cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 14481e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1449797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1450ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1451a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 14522235a54dSSanjay Lal select HAVE_KVM 14531e5f1caaSRalf Baechle help 14545e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 14556e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 14566e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 14576e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14586e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 14591da177e4SLinus Torvalds 14607fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1461674d10e2SMarkos Chandras bool "MIPS32 Release 6" 14627fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 14637fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 14647fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 14657fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 14667fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 14674e0748f5SMarkos Chandras select GENERIC_CSUM 14687fd08ca5SLeonid Yegoshin select HAVE_KVM 14697fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 14707fd08ca5SLeonid Yegoshin help 14717fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 14727fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 14737fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 14747fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 14757fd08ca5SLeonid Yegoshin 14766e760c8dSRalf Baechleconfig CPU_MIPS64_R1 14776e760c8dSRalf Baechle bool "MIPS64 Release 1" 14787cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1479797798c1SRalf Baechle select CPU_HAS_PREFETCH 1480ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1481ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1482ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 14839cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 14846e760c8dSRalf Baechle help 14856e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 14866e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 14876e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 14886e760c8dSRalf Baechle specific type of processor in your system, choose those that one 14896e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 14901e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 14911e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 14921e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 14931e5f1caaSRalf Baechle performance. 14941e5f1caaSRalf Baechle 14951e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 14961e5f1caaSRalf Baechle bool "MIPS64 Release 2" 14977cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1498797798c1SRalf Baechle select CPU_HAS_PREFETCH 14991e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15001e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1501ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15029cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1503a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 150440a2df49SJames Hogan select HAVE_KVM 15051e5f1caaSRalf Baechle help 15061e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 15071e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15081e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15091e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15101e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 15111da177e4SLinus Torvalds 15127fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1513674d10e2SMarkos Chandras bool "MIPS64 Release 6" 15147fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 15157fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 15167fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15177fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 15187fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15197fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15204e0748f5SMarkos Chandras select GENERIC_CSUM 15212e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 152240a2df49SJames Hogan select HAVE_KVM 15237fd08ca5SLeonid Yegoshin help 15247fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15257fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 15267fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 15277fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 15287fd08ca5SLeonid Yegoshin 15291da177e4SLinus Torvaldsconfig CPU_R3000 15301da177e4SLinus Torvalds bool "R3000" 15317cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1532f7062ddbSRalf Baechle select CPU_HAS_WB 1533ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1534797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15351da177e4SLinus Torvalds help 15361da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 15371da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 15381da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 15391da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 15401da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 15411da177e4SLinus Torvalds try to recompile with R3000. 15421da177e4SLinus Torvalds 15431da177e4SLinus Torvaldsconfig CPU_TX39XX 15441da177e4SLinus Torvalds bool "R39XX" 15457cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1546ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 15471da177e4SLinus Torvalds 15481da177e4SLinus Torvaldsconfig CPU_VR41XX 15491da177e4SLinus Torvalds bool "R41xx" 15507cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1551ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1552ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15531da177e4SLinus Torvalds help 15545e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 15551da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 15561da177e4SLinus Torvalds kernel built with this option will not run on any other type of 15571da177e4SLinus Torvalds processor or vice versa. 15581da177e4SLinus Torvalds 15591da177e4SLinus Torvaldsconfig CPU_R4300 15601da177e4SLinus Torvalds bool "R4300" 15617cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4300 1562ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1563ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 15641da177e4SLinus Torvalds help 15651da177e4SLinus Torvalds MIPS Technologies R4300-series processors. 15661da177e4SLinus Torvalds 15671da177e4SLinus Torvaldsconfig CPU_R4X00 15681da177e4SLinus Torvalds bool "R4x00" 15697cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1570ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1571ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1572970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15731da177e4SLinus Torvalds help 15741da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 15751da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 15761da177e4SLinus Torvalds 15771da177e4SLinus Torvaldsconfig CPU_TX49XX 15781da177e4SLinus Torvalds bool "R49XX" 15797cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1580de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1581ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1582ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1583970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15841da177e4SLinus Torvalds 15851da177e4SLinus Torvaldsconfig CPU_R5000 15861da177e4SLinus Torvalds bool "R5000" 15877cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1588ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1589ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1590970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 15911da177e4SLinus Torvalds help 15921da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 15931da177e4SLinus Torvalds 15941da177e4SLinus Torvaldsconfig CPU_R5432 15951da177e4SLinus Torvalds bool "R5432" 15967cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5432 15975e83d430SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 15985e83d430SRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1599970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16001da177e4SLinus Torvalds 1601542c1020SShinya Kuribayashiconfig CPU_R5500 1602542c1020SShinya Kuribayashi bool "R5500" 1603542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1604542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1605542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 16069cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1607542c1020SShinya Kuribayashi help 1608542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1609542c1020SShinya Kuribayashi instruction set. 1610542c1020SShinya Kuribayashi 16111da177e4SLinus Torvaldsconfig CPU_NEVADA 16121da177e4SLinus Torvalds bool "RM52xx" 16137cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1614ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1615ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1616970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16171da177e4SLinus Torvalds help 16181da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 16191da177e4SLinus Torvalds 16201da177e4SLinus Torvaldsconfig CPU_R8000 16211da177e4SLinus Torvalds bool "R8000" 16227cf8053bSRalf Baechle depends on SYS_HAS_CPU_R8000 16235e83d430SRalf Baechle select CPU_HAS_PREFETCH 1624ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16251da177e4SLinus Torvalds help 16261da177e4SLinus Torvalds MIPS Technologies R8000 processors. Note these processors are 16271da177e4SLinus Torvalds uncommon and the support for them is incomplete. 16281da177e4SLinus Torvalds 16291da177e4SLinus Torvaldsconfig CPU_R10000 16301da177e4SLinus Torvalds bool "R10000" 16317cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 16325e83d430SRalf Baechle select CPU_HAS_PREFETCH 1633ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1634ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1635797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1636970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16371da177e4SLinus Torvalds help 16381da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 16391da177e4SLinus Torvalds 16401da177e4SLinus Torvaldsconfig CPU_RM7000 16411da177e4SLinus Torvalds bool "RM7000" 16427cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 16435e83d430SRalf Baechle select CPU_HAS_PREFETCH 1644ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1645ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1646797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1647970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16481da177e4SLinus Torvalds 16491da177e4SLinus Torvaldsconfig CPU_SB1 16501da177e4SLinus Torvalds bool "SB1" 16517cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1652ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1653ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1654797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1655970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16560004a9dfSRalf Baechle select WEAK_ORDERING 16571da177e4SLinus Torvalds 1658a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1659a86c7f72SDavid Daney bool "Cavium Octeon processor" 16605e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1661a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1662a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1663a86c7f72SDavid Daney select WEAK_ORDERING 1664a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 16659cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1666df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1667df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1668930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 16690ae3abcdSJames Hogan select HAVE_KVM 1670a86c7f72SDavid Daney help 1671a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1672a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1673a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1674a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1675a86c7f72SDavid Daney 1676cd746249SJonas Gorskiconfig CPU_BMIPS 1677cd746249SJonas Gorski bool "Broadcom BMIPS" 1678cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1679cd746249SJonas Gorski select CPU_MIPS32 1680fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1681cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1682cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1683cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1684cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1685cd746249SJonas Gorski select DMA_NONCOHERENT 168667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1687cd746249SJonas Gorski select SWAP_IO_SPACE 1688cd746249SJonas Gorski select WEAK_ORDERING 1689c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 169069aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1691a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1692a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1693c1c0c461SKevin Cernekee help 1694fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1695c1c0c461SKevin Cernekee 16967f058e85SJayachandran Cconfig CPU_XLR 16977f058e85SJayachandran C bool "Netlogic XLR SoC" 16987f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 16997f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17007f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17017f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1702970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17037f058e85SJayachandran C select WEAK_ORDERING 17047f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17057f058e85SJayachandran C help 17067f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17071c773ea4SJayachandran C 17081c773ea4SJayachandran Cconfig CPU_XLP 17091c773ea4SJayachandran C bool "Netlogic XLP SoC" 17101c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 17111c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17121c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17131c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 17141c773ea4SJayachandran C select WEAK_ORDERING 17151c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17161c773ea4SJayachandran C select CPU_HAS_PREFETCH 1717d6504846SJayachandran C select CPU_MIPSR2 1718ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 17192db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 17201c773ea4SJayachandran C help 17211c773ea4SJayachandran C Netlogic Microsystems XLP processors. 17221da177e4SLinus Torvaldsendchoice 17231da177e4SLinus Torvalds 1724a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1725a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1726a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 17277fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1728a6e18781SLeonid Yegoshin help 1729a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1730a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1731a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1732a6e18781SLeonid Yegoshin 1733a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1734a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1735a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1736a6e18781SLeonid Yegoshin select EVA 1737a6e18781SLeonid Yegoshin default y 1738a6e18781SLeonid Yegoshin help 1739a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1740a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1741a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1742a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1743a6e18781SLeonid Yegoshin 1744c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1745c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1746c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1747c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1748c5b36783SSteven J. Hill help 1749c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1750c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1751c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1752c5b36783SSteven J. Hill 1753c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1754c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1755c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1756c5b36783SSteven J. Hill depends on !EVA 1757c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1758c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1759c5b36783SSteven J. Hill select XPA 1760c5b36783SSteven J. Hill select HIGHMEM 1761c5b36783SSteven J. Hill select ARCH_PHYS_ADDR_T_64BIT 1762c5b36783SSteven J. Hill default n 1763c5b36783SSteven J. Hill help 1764c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1765c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1766c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1767c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1768c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1769c5b36783SSteven J. Hill If unsure, say 'N' here. 1770c5b36783SSteven J. Hill 1771622844bfSWu Zhangjinif CPU_LOONGSON2F 1772622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1773622844bfSWu Zhangjin bool 1774622844bfSWu Zhangjin 1775622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1776622844bfSWu Zhangjin bool 1777622844bfSWu Zhangjin 1778622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1779622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1780622844bfSWu Zhangjin default y 1781622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1782622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1783622844bfSWu Zhangjin help 1784622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1785622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1786622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1787622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1788622844bfSWu Zhangjin 1789622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1790622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1791622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1792622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1793622844bfSWu Zhangjin systems. 1794622844bfSWu Zhangjin 1795622844bfSWu Zhangjin If unsure, please say Y. 1796622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1797622844bfSWu Zhangjin 17981b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 17991b93b3c3SWu Zhangjin bool 18001b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18011b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 180231c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18031b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1804fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18054e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18061b93b3c3SWu Zhangjin 18071b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18081b93b3c3SWu Zhangjin bool 18091b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18101b93b3c3SWu Zhangjin 1811dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1812dbb98314SAlban Bedel bool 1813dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1814dbb98314SAlban Bedel 18153702bba5SWu Zhangjinconfig CPU_LOONGSON2 18163702bba5SWu Zhangjin bool 18173702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 18183702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 18193702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1820970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 18213702bba5SWu Zhangjin 1822ca585cf9SKelvin Cheungconfig CPU_LOONGSON1 1823ca585cf9SKelvin Cheung bool 1824ca585cf9SKelvin Cheung select CPU_MIPS32 1825ca585cf9SKelvin Cheung select CPU_MIPSR2 1826ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1827ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1828ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1829f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1830ca585cf9SKelvin Cheung 1831fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 183204fa8bf7SJonas Gorski select SMP_UP if SMP 18331bbb6c1bSKevin Cernekee bool 1834cd746249SJonas Gorski 1835cd746249SJonas Gorskiconfig CPU_BMIPS4350 1836cd746249SJonas Gorski bool 1837cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1838cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1839cd746249SJonas Gorski 1840cd746249SJonas Gorskiconfig CPU_BMIPS4380 1841cd746249SJonas Gorski bool 1842bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1843cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1844cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1845b4720809SFlorian Fainelli select CPU_HAS_RIXI 1846cd746249SJonas Gorski 1847cd746249SJonas Gorskiconfig CPU_BMIPS5000 1848cd746249SJonas Gorski bool 1849cd746249SJonas Gorski select MIPS_CPU_SCACHE 1850bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1851cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1852cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1853b4720809SFlorian Fainelli select CPU_HAS_RIXI 18541bbb6c1bSKevin Cernekee 18550e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3 18560e476d91SHuacai Chen bool 18570e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1858b2edcfc8SHuacai Chen select CPU_HAS_RIXI 18590e476d91SHuacai Chen 18603702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 18612a21c730SFuxin Zhang bool 18622a21c730SFuxin Zhang 18636f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 18646f7a251aSWu Zhangjin bool 186555045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 186655045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 186722f1fdfdSWu Zhangjin select CPU_SUPPORTS_UNCACHED_ACCELERATED 18686f7a251aSWu Zhangjin 1869ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1870ca585cf9SKelvin Cheung bool 1871ca585cf9SKelvin Cheung 187212e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 187312e3280bSYang Ling bool 187412e3280bSYang Ling 18757cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 18767cf8053bSRalf Baechle bool 18777cf8053bSRalf Baechle 18787cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 18797cf8053bSRalf Baechle bool 18807cf8053bSRalf Baechle 1881a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1882a6e18781SLeonid Yegoshin bool 1883a6e18781SLeonid Yegoshin 1884c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1885c5b36783SSteven J. Hill bool 1886c5b36783SSteven J. Hill 18877fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 18887fd08ca5SLeonid Yegoshin bool 18897fd08ca5SLeonid Yegoshin 18907cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 18917cf8053bSRalf Baechle bool 18927cf8053bSRalf Baechle 18937cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 18947cf8053bSRalf Baechle bool 18957cf8053bSRalf Baechle 18967fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 18977fd08ca5SLeonid Yegoshin bool 18987fd08ca5SLeonid Yegoshin 18997cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19007cf8053bSRalf Baechle bool 19017cf8053bSRalf Baechle 19027cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19037cf8053bSRalf Baechle bool 19047cf8053bSRalf Baechle 19057cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19067cf8053bSRalf Baechle bool 19077cf8053bSRalf Baechle 19087cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300 19097cf8053bSRalf Baechle bool 19107cf8053bSRalf Baechle 19117cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 19127cf8053bSRalf Baechle bool 19137cf8053bSRalf Baechle 19147cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 19157cf8053bSRalf Baechle bool 19167cf8053bSRalf Baechle 19177cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 19187cf8053bSRalf Baechle bool 19197cf8053bSRalf Baechle 19207cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432 19217cf8053bSRalf Baechle bool 19227cf8053bSRalf Baechle 1923542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 1924542c1020SShinya Kuribayashi bool 1925542c1020SShinya Kuribayashi 19267cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 19277cf8053bSRalf Baechle bool 19287cf8053bSRalf Baechle 19297cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000 19307cf8053bSRalf Baechle bool 19317cf8053bSRalf Baechle 19327cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 19337cf8053bSRalf Baechle bool 19347cf8053bSRalf Baechle 19357cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 19367cf8053bSRalf Baechle bool 19377cf8053bSRalf Baechle 19387cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 19397cf8053bSRalf Baechle bool 19407cf8053bSRalf Baechle 19415e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 19425e683389SDavid Daney bool 19435e683389SDavid Daney 1944cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 1945c1c0c461SKevin Cernekee bool 1946c1c0c461SKevin Cernekee 1947fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 1948c1c0c461SKevin Cernekee bool 1949cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1950c1c0c461SKevin Cernekee 1951c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 1952c1c0c461SKevin Cernekee bool 1953cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1954c1c0c461SKevin Cernekee 1955c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 1956c1c0c461SKevin Cernekee bool 1957cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1958c1c0c461SKevin Cernekee 1959c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 1960c1c0c461SKevin Cernekee bool 1961cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 1962c1c0c461SKevin Cernekee 19637f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 19647f058e85SJayachandran C bool 19657f058e85SJayachandran C 19661c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 19671c773ea4SJayachandran C bool 19681c773ea4SJayachandran C 1969b6911bbaSPaul Burtonconfig MIPS_MALTA_PM 1970b6911bbaSPaul Burton depends on MIPS_MALTA 1971b6911bbaSPaul Burton depends on PCI 1972b6911bbaSPaul Burton bool 1973b6911bbaSPaul Burton default y 1974b6911bbaSPaul Burton 197517099b11SRalf Baechle# 197617099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 197717099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 197817099b11SRalf Baechle# 19790004a9dfSRalf Baechleconfig WEAK_ORDERING 19800004a9dfSRalf Baechle bool 198117099b11SRalf Baechle 198217099b11SRalf Baechle# 198317099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 198417099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 198517099b11SRalf Baechle# 198617099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 198717099b11SRalf Baechle bool 19885e83d430SRalf Baechleendmenu 19895e83d430SRalf Baechle 19905e83d430SRalf Baechle# 19915e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 19925e83d430SRalf Baechle# 19935e83d430SRalf Baechleconfig CPU_MIPS32 19945e83d430SRalf Baechle bool 19957fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 19965e83d430SRalf Baechle 19975e83d430SRalf Baechleconfig CPU_MIPS64 19985e83d430SRalf Baechle bool 19997fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20005e83d430SRalf Baechle 20015e83d430SRalf Baechle# 2002c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2 20035e83d430SRalf Baechle# 20045e83d430SRalf Baechleconfig CPU_MIPSR1 20055e83d430SRalf Baechle bool 20065e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20075e83d430SRalf Baechle 20085e83d430SRalf Baechleconfig CPU_MIPSR2 20095e83d430SRalf Baechle bool 2010a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20118256b17eSFlorian Fainelli select CPU_HAS_RIXI 2012a7e07b1aSMarkos Chandras select MIPS_SPRAM 20135e83d430SRalf Baechle 20147fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20157fd08ca5SLeonid Yegoshin bool 20167fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20178256b17eSFlorian Fainelli select CPU_HAS_RIXI 201887321fddSPaul Burton select HAVE_ARCH_BITREVERSE 20192db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 2020a7e07b1aSMarkos Chandras select MIPS_SPRAM 20215e83d430SRalf Baechle 2022a6e18781SLeonid Yegoshinconfig EVA 2023a6e18781SLeonid Yegoshin bool 2024a6e18781SLeonid Yegoshin 2025c5b36783SSteven J. Hillconfig XPA 2026c5b36783SSteven J. Hill bool 2027c5b36783SSteven J. Hill 20285e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 20295e83d430SRalf Baechle bool 20305e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 20315e83d430SRalf Baechle bool 20325e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 20335e83d430SRalf Baechle bool 20345e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 20355e83d430SRalf Baechle bool 203655045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 203755045ff5SWu Zhangjin bool 203855045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 203955045ff5SWu Zhangjin bool 20409cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 20419cffd154SDavid Daney bool 204222f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED 204322f1fdfdSWu Zhangjin bool 204482622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 204582622284SDavid Daney bool 2046cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 20475e83d430SRalf Baechle 20488192c9eaSDavid Daney# 20498192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 20508192c9eaSDavid Daney# 20518192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 20528192c9eaSDavid Daney bool 2053679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 20548192c9eaSDavid Daney 20555e83d430SRalf Baechlemenu "Kernel type" 20565e83d430SRalf Baechle 20575e83d430SRalf Baechlechoice 20585e83d430SRalf Baechle prompt "Kernel code model" 20595e83d430SRalf Baechle help 20605e83d430SRalf Baechle You should only select this option if you have a workload that 20615e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 20625e83d430SRalf Baechle large memory. You will only be presented a single option in this 20635e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 20645e83d430SRalf Baechle 20655e83d430SRalf Baechleconfig 32BIT 20665e83d430SRalf Baechle bool "32-bit kernel" 20675e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 20685e83d430SRalf Baechle select TRAD_SIGNALS 20695e83d430SRalf Baechle help 20705e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2071f17c4ca3SRalf Baechle 20725e83d430SRalf Baechleconfig 64BIT 20735e83d430SRalf Baechle bool "64-bit kernel" 20745e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 20755e83d430SRalf Baechle help 20765e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 20775e83d430SRalf Baechle 20785e83d430SRalf Baechleendchoice 20795e83d430SRalf Baechle 20802235a54dSSanjay Lalconfig KVM_GUEST 20812235a54dSSanjay Lal bool "KVM Guest Kernel" 2082f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 20832235a54dSSanjay Lal help 2084caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2085caa1faa7SJames Hogan mode. 20862235a54dSSanjay Lal 2087eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2088eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 20892235a54dSSanjay Lal depends on KVM_GUEST 2090eda3d33cSJames Hogan default 100 20912235a54dSSanjay Lal help 2092eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2093eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2094eda3d33cSJames Hogan timer frequency is specified directly. 20952235a54dSSanjay Lal 20961e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 20971e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 20981e321fa9SLeonid Yegoshin depends on 64BIT 20991e321fa9SLeonid Yegoshin help 21003377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21013377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21023377e227SAlex Belits For page sizes 16k and above, this option results in a small 21033377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21043377e227SAlex Belits level of page tables is added which imposes both a memory 21053377e227SAlex Belits overhead as well as slower TLB fault handling. 21063377e227SAlex Belits 21071e321fa9SLeonid Yegoshin If unsure, say N. 21081e321fa9SLeonid Yegoshin 21091da177e4SLinus Torvaldschoice 21101da177e4SLinus Torvalds prompt "Kernel page size" 21111da177e4SLinus Torvalds default PAGE_SIZE_4KB 21121da177e4SLinus Torvalds 21131da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 21141da177e4SLinus Torvalds bool "4kB" 21150e476d91SHuacai Chen depends on !CPU_LOONGSON2 && !CPU_LOONGSON3 21161da177e4SLinus Torvalds help 21171da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 21181da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 21191da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 21201da177e4SLinus Torvalds recommended for low memory systems. 21211da177e4SLinus Torvalds 21221da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 21231da177e4SLinus Torvalds bool "8kB" 21247d60717eSKees Cook depends on CPU_R8000 || CPU_CAVIUM_OCTEON 21251e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 21261da177e4SLinus Torvalds help 21271da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 21281da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2129c52399beSRalf Baechle only on R8000 and cnMIPS processors. Note that you will need a 2130c52399beSRalf Baechle suitable Linux distribution to support this. 21311da177e4SLinus Torvalds 21321da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 21331da177e4SLinus Torvalds bool "16kB" 2134714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 21351da177e4SLinus Torvalds help 21361da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 21371da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2138714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2139714bfad6SRalf Baechle Linux distribution to support this. 21401da177e4SLinus Torvalds 2141c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2142c52399beSRalf Baechle bool "32kB" 2143c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 21441e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2145c52399beSRalf Baechle help 2146c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2147c52399beSRalf Baechle the price of higher memory consumption. This option is available 2148c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2149c52399beSRalf Baechle distribution to support this. 2150c52399beSRalf Baechle 21511da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 21521da177e4SLinus Torvalds bool "64kB" 21533b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 21541da177e4SLinus Torvalds help 21551da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 21561da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 21571da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2158714bfad6SRalf Baechle writing this option is still high experimental. 21591da177e4SLinus Torvalds 21601da177e4SLinus Torvaldsendchoice 21611da177e4SLinus Torvalds 2162c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2163c9bace7cSDavid Daney int "Maximum zone order" 2164e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2165e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2166e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2167e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2168e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2169e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2170c9bace7cSDavid Daney range 11 64 2171c9bace7cSDavid Daney default "11" 2172c9bace7cSDavid Daney help 2173c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2174c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2175c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2176c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2177c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2178c9bace7cSDavid Daney increase this value. 2179c9bace7cSDavid Daney 2180c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2181c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2182c9bace7cSDavid Daney 2183c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2184c9bace7cSDavid Daney when choosing a value for this option. 2185c9bace7cSDavid Daney 21861da177e4SLinus Torvaldsconfig BOARD_SCACHE 21871da177e4SLinus Torvalds bool 21881da177e4SLinus Torvalds 21891da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 21901da177e4SLinus Torvalds bool 21911da177e4SLinus Torvalds select BOARD_SCACHE 21921da177e4SLinus Torvalds 21939318c51aSChris Dearman# 21949318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 21959318c51aSChris Dearman# 21969318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 21979318c51aSChris Dearman bool 21989318c51aSChris Dearman select BOARD_SCACHE 21999318c51aSChris Dearman 22001da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22011da177e4SLinus Torvalds bool 22021da177e4SLinus Torvalds select BOARD_SCACHE 22031da177e4SLinus Torvalds 22041da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22051da177e4SLinus Torvalds bool 22061da177e4SLinus Torvalds select BOARD_SCACHE 22071da177e4SLinus Torvalds 22081da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 22091da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 22101da177e4SLinus Torvalds depends on CPU_SB1 22111da177e4SLinus Torvalds help 22121da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 22131da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 22141da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 22151da177e4SLinus Torvalds 22161da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2217c8094b53SRalf Baechle bool 22181da177e4SLinus Torvalds 22193165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 22203165c846SFlorian Fainelli bool 22213b2db173SPaul Burton default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX) 22223165c846SFlorian Fainelli 222391405eb6SFlorian Fainelliconfig CPU_R4K_FPU 222491405eb6SFlorian Fainelli bool 2225a2aea699SPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 222691405eb6SFlorian Fainelli 222762cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 222862cedc4fSFlorian Fainelli bool 222962cedc4fSFlorian Fainelli default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON) 223062cedc4fSFlorian Fainelli 223159d6ab86SRalf Baechleconfig MIPS_MT_SMP 2232a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 22335cbf9688SPaul Burton default y 2234527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 223559d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2236d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2237c080faa5SSteven J. Hill select SYNC_R4K 223859d6ab86SRalf Baechle select MIPS_MT 223959d6ab86SRalf Baechle select SMP 224087353d8aSRalf Baechle select SMP_UP 2241c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2242c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2243399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 224459d6ab86SRalf Baechle help 2245c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2246c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2247c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2248c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2249c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 225059d6ab86SRalf Baechle 2251f41ae0b2SRalf Baechleconfig MIPS_MT 2252f41ae0b2SRalf Baechle bool 2253f41ae0b2SRalf Baechle 22540ab7aefcSRalf Baechleconfig SCHED_SMT 22550ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 22560ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 22570ab7aefcSRalf Baechle default n 22580ab7aefcSRalf Baechle help 22590ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 22600ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 22610ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 22620ab7aefcSRalf Baechle 22630ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 22640ab7aefcSRalf Baechle bool 22650ab7aefcSRalf Baechle 2266f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2267f41ae0b2SRalf Baechle bool 2268f41ae0b2SRalf Baechle 2269f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2270f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2271f088fc84SRalf Baechle default y 2272b633648cSRalf Baechle depends on MIPS_MT_SMP 227307cc0c9eSRalf Baechle 2274b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2275b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 22769eaa9a82SPaul Burton depends on CPU_MIPSR6 2277b0a668fbSLeonid Yegoshin default y 2278b0a668fbSLeonid Yegoshin help 2279b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2280b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 228107edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2282b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2283b0a668fbSLeonid Yegoshin final kernel image. 2284b0a668fbSLeonid Yegoshin 228507cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 228607cc0c9eSRalf Baechle bool "VPE loader support." 2287704e6460SMarkos Chandras depends on SYS_SUPPORTS_MULTITHREADING && MODULES 228807cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 228907cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 229007cc0c9eSRalf Baechle select MIPS_MT 229107cc0c9eSRalf Baechle help 229207cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 229307cc0c9eSRalf Baechle onto another VPE and running it. 2294f088fc84SRalf Baechle 229517a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 229617a1d523SDeng-Cheng Zhu bool 229717a1d523SDeng-Cheng Zhu default "y" 229817a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 229917a1d523SDeng-Cheng Zhu 23001a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 23011a2a6d7eSDeng-Cheng Zhu bool 23021a2a6d7eSDeng-Cheng Zhu default "y" 23031a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 23041a2a6d7eSDeng-Cheng Zhu 2305e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2306e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2307e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2308e01402b1SRalf Baechle default y 2309e01402b1SRalf Baechle help 2310e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2311e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2312e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2313e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2314e01402b1SRalf Baechle 2315e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2316e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2317e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 23185e83d430SRalf Baechle help 2319e01402b1SRalf Baechle 2320da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2321da615cf6SDeng-Cheng Zhu bool 2322da615cf6SDeng-Cheng Zhu default "y" 2323da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2324da615cf6SDeng-Cheng Zhu 23252c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 23262c973ef0SDeng-Cheng Zhu bool 23272c973ef0SDeng-Cheng Zhu default "y" 23282c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 23292c973ef0SDeng-Cheng Zhu 23304a16ff4cSRalf Baechleconfig MIPS_CMP 23315cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 23325676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2333b10b43baSMarkos Chandras select SMP 2334eb9b5141STim Anderson select SYNC_R4K 2335b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 23364a16ff4cSRalf Baechle select WEAK_ORDERING 23374a16ff4cSRalf Baechle default n 23384a16ff4cSRalf Baechle help 2339044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2340044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2341044505c7SPaul Burton its ability to start secondary CPUs. 23424a16ff4cSRalf Baechle 23435cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 23445cac93b3SPaul Burton instead of this. 23455cac93b3SPaul Burton 23460ee958e1SPaul Burtonconfig MIPS_CPS 23470ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 23485a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 23490ee958e1SPaul Burton select MIPS_CM 23501d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 23510ee958e1SPaul Burton select SMP 23520ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 23531d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2354c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 23550ee958e1SPaul Burton select SYS_SUPPORTS_SMP 23560ee958e1SPaul Burton select WEAK_ORDERING 23570ee958e1SPaul Burton help 23580ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 23590ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 23600ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 23610ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 23620ee958e1SPaul Burton support is unavailable. 23630ee958e1SPaul Burton 23643179d37eSPaul Burtonconfig MIPS_CPS_PM 236539a59593SMarkos Chandras depends on MIPS_CPS 23663179d37eSPaul Burton bool 23673179d37eSPaul Burton 23689f98f3ddSPaul Burtonconfig MIPS_CM 23699f98f3ddSPaul Burton bool 23703c9b4166SPaul Burton select MIPS_CPC 23719f98f3ddSPaul Burton 23729c38cf44SPaul Burtonconfig MIPS_CPC 23739c38cf44SPaul Burton bool 23742600990eSRalf Baechle 23751da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 23761da177e4SLinus Torvalds bool 23771da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 23781da177e4SLinus Torvalds default y 23791da177e4SLinus Torvalds 23801da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 23811da177e4SLinus Torvalds bool 23821da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 23831da177e4SLinus Torvalds default y 23841da177e4SLinus Torvalds 23852235a54dSSanjay Lal 238660ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT 238734adb28dSRalf Baechle bool 238860ec6571Spascal@pabr.org 23899e2b5372SMarkos Chandraschoice 23909e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 23919e2b5372SMarkos Chandras 23929e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 23939e2b5372SMarkos Chandras bool "None" 23949e2b5372SMarkos Chandras help 23959e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 23969e2b5372SMarkos Chandras 23979693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 23989693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 23999e2b5372SMarkos Chandras bool "SmartMIPS" 24009693a853SFranck Bui-Huu help 24019693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 24029693a853SFranck Bui-Huu increased security at both hardware and software level for 24039693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 24049693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 24059693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 24069693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 24079693a853SFranck Bui-Huu here. 24089693a853SFranck Bui-Huu 2409bce86083SSteven J. Hillconfig CPU_MICROMIPS 24107fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 24119e2b5372SMarkos Chandras bool "microMIPS" 2412bce86083SSteven J. Hill help 2413bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2414bce86083SSteven J. Hill microMIPS ISA 2415bce86083SSteven J. Hill 24169e2b5372SMarkos Chandrasendchoice 24179e2b5372SMarkos Chandras 2418a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 24190ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2420a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 24212a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2422a5e9a69eSPaul Burton help 2423a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2424a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 24251db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 24261db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 24271db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 24281db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 24291db1af84SPaul Burton the size & complexity of your kernel. 2430a5e9a69eSPaul Burton 2431a5e9a69eSPaul Burton If unsure, say Y. 2432a5e9a69eSPaul Burton 24331da177e4SLinus Torvaldsconfig CPU_HAS_WB 2434f7062ddbSRalf Baechle bool 2435e01402b1SRalf Baechle 2436df0ac8a4SKevin Cernekeeconfig XKS01 2437df0ac8a4SKevin Cernekee bool 2438df0ac8a4SKevin Cernekee 24398256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 24408256b17eSFlorian Fainelli bool 24418256b17eSFlorian Fainelli 2442f41ae0b2SRalf Baechle# 2443f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2444f41ae0b2SRalf Baechle# 2445e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2446f41ae0b2SRalf Baechle bool 2447e01402b1SRalf Baechle 2448f41ae0b2SRalf Baechle# 2449f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2450f41ae0b2SRalf Baechle# 2451e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2452f41ae0b2SRalf Baechle bool 2453e01402b1SRalf Baechle 24541da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 24551da177e4SLinus Torvalds bool 24561da177e4SLinus Torvalds depends on !CPU_R3000 24571da177e4SLinus Torvalds default y 24581da177e4SLinus Torvalds 24591da177e4SLinus Torvalds# 246020d60d99SMaciej W. Rozycki# CPU non-features 246120d60d99SMaciej W. Rozycki# 246220d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 246320d60d99SMaciej W. Rozycki bool 246420d60d99SMaciej W. Rozycki 246520d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 246620d60d99SMaciej W. Rozycki bool 246720d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 246820d60d99SMaciej W. Rozycki 246920d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 247020d60d99SMaciej W. Rozycki bool 247120d60d99SMaciej W. Rozycki 24724edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 24734edf00a4SPaul Burton int 24744edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24754edf00a4SPaul Burton default 4 if CPU_R8000 24764edf00a4SPaul Burton default 0 24774edf00a4SPaul Burton 24784edf00a4SPaul Burtonconfig MIPS_ASID_BITS 24794edf00a4SPaul Burton int 24802db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 24814edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 24824edf00a4SPaul Burton default 8 24834edf00a4SPaul Burton 24842db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 24852db003a5SPaul Burton bool 24862db003a5SPaul Burton 248720d60d99SMaciej W. Rozycki# 24881da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 24891da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 24901da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 24911da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 24921da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 24931da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 24941da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 24951da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2496797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2497797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2498797798c1SRalf Baechle# support. 24991da177e4SLinus Torvalds# 25001da177e4SLinus Torvaldsconfig HIGHMEM 25011da177e4SLinus Torvalds bool "High Memory Support" 2502a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2503797798c1SRalf Baechle 2504797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2505797798c1SRalf Baechle bool 2506797798c1SRalf Baechle 2507797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2508797798c1SRalf Baechle bool 25091da177e4SLinus Torvalds 25109693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 25119693a853SFranck Bui-Huu bool 25129693a853SFranck Bui-Huu 2513a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2514a6a4834cSSteven J. Hill bool 2515a6a4834cSSteven J. Hill 2516377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2517377cb1b6SRalf Baechle bool 2518377cb1b6SRalf Baechle help 2519377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2520377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2521377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2522377cb1b6SRalf Baechle 2523a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2524a5e9a69eSPaul Burton bool 2525a5e9a69eSPaul Burton 2526b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2527b4819b59SYoichi Yuasa def_bool y 2528f133f22dSWu Zhangjin depends on !NUMA && !CPU_LOONGSON2 2529b4819b59SYoichi Yuasa 2530d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE 2531d8cb4e11SRalf Baechle bool 2532d8cb4e11SRalf Baechle default y if SGI_IP27 2533d8cb4e11SRalf Baechle help 25343dde6ad8SDavid Sterba Say Y to support efficient handling of discontiguous physical memory, 2535d8cb4e11SRalf Baechle for architectures which are either NUMA (Non-Uniform Memory Access) 2536d8cb4e11SRalf Baechle or have huge holes in the physical address space for other reasons. 2537d8cb4e11SRalf Baechle See <file:Documentation/vm/numa> for more. 2538d8cb4e11SRalf Baechle 2539b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2540b1c6cd42SAtsushi Nemoto bool 25417de58fabSAtsushi Nemoto select SPARSEMEM_STATIC 254231473747SAtsushi Nemoto 2543d8cb4e11SRalf Baechleconfig NUMA 2544d8cb4e11SRalf Baechle bool "NUMA Support" 2545d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2546d8cb4e11SRalf Baechle help 2547d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2548d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2549d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2550d8cb4e11SRalf Baechle leave it disabled; on single node systems disable this option 2551d8cb4e11SRalf Baechle disabled. 2552d8cb4e11SRalf Baechle 2553d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2554d8cb4e11SRalf Baechle bool 2555d8cb4e11SRalf Baechle 25568c530ea3SMatt Redfearnconfig RELOCATABLE 25578c530ea3SMatt Redfearn bool "Relocatable kernel" 25583ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 25598c530ea3SMatt Redfearn help 25608c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 25618c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 25628c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 25638c530ea3SMatt Redfearn but are discarded at runtime 25648c530ea3SMatt Redfearn 2565069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2566069fd766SMatt Redfearn hex "Relocation table size" 2567069fd766SMatt Redfearn depends on RELOCATABLE 2568069fd766SMatt Redfearn range 0x0 0x01000000 2569069fd766SMatt Redfearn default "0x00100000" 2570069fd766SMatt Redfearn ---help--- 2571069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2572069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2573069fd766SMatt Redfearn 2574069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2575069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2576069fd766SMatt Redfearn 2577069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2578069fd766SMatt Redfearn 2579069fd766SMatt Redfearn If unsure, leave at the default value. 2580069fd766SMatt Redfearn 2581405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2582405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2583405bc8fdSMatt Redfearn depends on RELOCATABLE 2584405bc8fdSMatt Redfearn ---help--- 2585405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2586405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2587405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2588405bc8fdSMatt Redfearn of kernel internals. 2589405bc8fdSMatt Redfearn 2590405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2591405bc8fdSMatt Redfearn 2592405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2593405bc8fdSMatt Redfearn 2594405bc8fdSMatt Redfearn If unsure, say N. 2595405bc8fdSMatt Redfearn 2596405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2597405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2598405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2599405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2600405bc8fdSMatt Redfearn range 0x0 0x08000000 2601405bc8fdSMatt Redfearn default "0x01000000" 2602405bc8fdSMatt Redfearn ---help--- 2603405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2604405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2605405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2606405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2607405bc8fdSMatt Redfearn 2608405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2609405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2610405bc8fdSMatt Redfearn 2611c80d79d7SYasunori Gotoconfig NODES_SHIFT 2612c80d79d7SYasunori Goto int 2613c80d79d7SYasunori Goto default "6" 2614c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2615c80d79d7SYasunori Goto 261614f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 261714f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 261823021b2bSYang Shi depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3) 261914f70012SDeng-Cheng Zhu default y 262014f70012SDeng-Cheng Zhu help 262114f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 262214f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 262314f70012SDeng-Cheng Zhu 2624b4819b59SYoichi Yuasasource "mm/Kconfig" 2625b4819b59SYoichi Yuasa 26261da177e4SLinus Torvaldsconfig SMP 26271da177e4SLinus Torvalds bool "Multi-Processing support" 2628e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2629e73ea273SRalf Baechle help 26301da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 26314a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 26324a474157SRobert Graffham than one CPU, say Y. 26331da177e4SLinus Torvalds 26344a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 26351da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 26361da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 26374a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 26381da177e4SLinus Torvalds will run faster if you say N here. 26391da177e4SLinus Torvalds 26401da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 26411da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 26421da177e4SLinus Torvalds 264303502faaSAdrian Bunk See also the SMP-HOWTO available at 264403502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 26451da177e4SLinus Torvalds 26461da177e4SLinus Torvalds If you don't know what to do here, say N. 26471da177e4SLinus Torvalds 26487840d618SMatt Redfearnconfig HOTPLUG_CPU 26497840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 26507840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 26517840d618SMatt Redfearn help 26527840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 26537840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 26547840d618SMatt Redfearn (Note: power management support will enable this option 26557840d618SMatt Redfearn automatically on SMP systems. ) 26567840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 26577840d618SMatt Redfearn 265887353d8aSRalf Baechleconfig SMP_UP 265987353d8aSRalf Baechle bool 266087353d8aSRalf Baechle 26614a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 26624a16ff4cSRalf Baechle bool 26634a16ff4cSRalf Baechle 26640ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 26650ee958e1SPaul Burton bool 26660ee958e1SPaul Burton 2667e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2668e73ea273SRalf Baechle bool 2669e73ea273SRalf Baechle 2670130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2671130e2fb7SRalf Baechle bool 2672130e2fb7SRalf Baechle 2673130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2674130e2fb7SRalf Baechle bool 2675130e2fb7SRalf Baechle 2676130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2677130e2fb7SRalf Baechle bool 2678130e2fb7SRalf Baechle 2679130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2680130e2fb7SRalf Baechle bool 2681130e2fb7SRalf Baechle 2682130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2683130e2fb7SRalf Baechle bool 2684130e2fb7SRalf Baechle 26851da177e4SLinus Torvaldsconfig NR_CPUS 2686a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2687a91796a9SJayachandran C range 2 256 26881da177e4SLinus Torvalds depends on SMP 2689130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2690130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2691130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2692130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2693130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 26941da177e4SLinus Torvalds help 26951da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 26961da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 26971da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 269872ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 269972ede9b1SAtsushi Nemoto and 2 for all others. 27001da177e4SLinus Torvalds 27011da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 270272ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 270372ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 270472ede9b1SAtsushi Nemoto power of two. 27051da177e4SLinus Torvalds 2706399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2707399aaa25SAl Cooper bool 2708399aaa25SAl Cooper 27097820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 27107820b84bSDavid Daney bool 27117820b84bSDavid Daney 27127820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 27137820b84bSDavid Daney int 27147820b84bSDavid Daney depends on SMP 27157820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 27167820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 27177820b84bSDavid Daney 27181723b4a3SAtsushi Nemoto# 27191723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 27201723b4a3SAtsushi Nemoto# 27211723b4a3SAtsushi Nemoto 27221723b4a3SAtsushi Nemotochoice 27231723b4a3SAtsushi Nemoto prompt "Timer frequency" 27241723b4a3SAtsushi Nemoto default HZ_250 27251723b4a3SAtsushi Nemoto help 27261723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 27271723b4a3SAtsushi Nemoto 272867596573SPaul Burton config HZ_24 272967596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 273067596573SPaul Burton 27311723b4a3SAtsushi Nemoto config HZ_48 27320f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 27331723b4a3SAtsushi Nemoto 27341723b4a3SAtsushi Nemoto config HZ_100 27351723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 27361723b4a3SAtsushi Nemoto 27371723b4a3SAtsushi Nemoto config HZ_128 27381723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 27391723b4a3SAtsushi Nemoto 27401723b4a3SAtsushi Nemoto config HZ_250 27411723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 27421723b4a3SAtsushi Nemoto 27431723b4a3SAtsushi Nemoto config HZ_256 27441723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 27451723b4a3SAtsushi Nemoto 27461723b4a3SAtsushi Nemoto config HZ_1000 27471723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 27481723b4a3SAtsushi Nemoto 27491723b4a3SAtsushi Nemoto config HZ_1024 27501723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 27511723b4a3SAtsushi Nemoto 27521723b4a3SAtsushi Nemotoendchoice 27531723b4a3SAtsushi Nemoto 275467596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 275567596573SPaul Burton bool 275667596573SPaul Burton 27571723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 27581723b4a3SAtsushi Nemoto bool 27591723b4a3SAtsushi Nemoto 27601723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 27611723b4a3SAtsushi Nemoto bool 27621723b4a3SAtsushi Nemoto 27631723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 27641723b4a3SAtsushi Nemoto bool 27651723b4a3SAtsushi Nemoto 27661723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 27671723b4a3SAtsushi Nemoto bool 27681723b4a3SAtsushi Nemoto 27691723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 27701723b4a3SAtsushi Nemoto bool 27711723b4a3SAtsushi Nemoto 27721723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 27731723b4a3SAtsushi Nemoto bool 27741723b4a3SAtsushi Nemoto 27751723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 27761723b4a3SAtsushi Nemoto bool 27771723b4a3SAtsushi Nemoto 27781723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 27791723b4a3SAtsushi Nemoto bool 278067596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 278167596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 278267596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 278367596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 278467596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 278567596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 278667596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 27871723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 27881723b4a3SAtsushi Nemoto 27891723b4a3SAtsushi Nemotoconfig HZ 27901723b4a3SAtsushi Nemoto int 279167596573SPaul Burton default 24 if HZ_24 27921723b4a3SAtsushi Nemoto default 48 if HZ_48 27931723b4a3SAtsushi Nemoto default 100 if HZ_100 27941723b4a3SAtsushi Nemoto default 128 if HZ_128 27951723b4a3SAtsushi Nemoto default 250 if HZ_250 27961723b4a3SAtsushi Nemoto default 256 if HZ_256 27971723b4a3SAtsushi Nemoto default 1000 if HZ_1000 27981723b4a3SAtsushi Nemoto default 1024 if HZ_1024 27991723b4a3SAtsushi Nemoto 280096685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 280196685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 280296685b17SDeng-Cheng Zhu 2803e80de850SRalf Baechlesource "kernel/Kconfig.preempt" 28041da177e4SLinus Torvalds 2805ea6e942bSAtsushi Nemotoconfig KEXEC 28067d60717eSKees Cook bool "Kexec system call" 28072965faa5SDave Young select KEXEC_CORE 2808ea6e942bSAtsushi Nemoto help 2809ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2810ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 28113dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2812ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2813ea6e942bSAtsushi Nemoto 281401dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2815ea6e942bSAtsushi Nemoto 2816ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2817ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2818bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2819bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2820bf220695SGeert Uytterhoeven made. 2821ea6e942bSAtsushi Nemoto 28227aa1c8f4SRalf Baechleconfig CRASH_DUMP 28237aa1c8f4SRalf Baechle bool "Kernel crash dumps" 28247aa1c8f4SRalf Baechle help 28257aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 28267aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 28277aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 28287aa1c8f4SRalf Baechle a specially reserved region and then later executed after 28297aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 28307aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 28317aa1c8f4SRalf Baechle PHYSICAL_START. 28327aa1c8f4SRalf Baechle 28337aa1c8f4SRalf Baechleconfig PHYSICAL_START 28347aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 28357aa1c8f4SRalf Baechle default "0xffffffff84000000" if 64BIT 28367aa1c8f4SRalf Baechle default "0x84000000" if 32BIT 28377aa1c8f4SRalf Baechle depends on CRASH_DUMP 28387aa1c8f4SRalf Baechle help 28397aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 28407aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 28417aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 28427aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 28437aa1c8f4SRalf Baechle passed to the panic-ed kernel). 28447aa1c8f4SRalf Baechle 2845ea6e942bSAtsushi Nemotoconfig SECCOMP 2846ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2847293c5bd1SRalf Baechle depends on PROC_FS 2848ea6e942bSAtsushi Nemoto default y 2849ea6e942bSAtsushi Nemoto help 2850ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2851ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2852ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2853ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2854ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 2855ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 2856ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 2857ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 2858ea6e942bSAtsushi Nemoto defined by each seccomp mode. 2859ea6e942bSAtsushi Nemoto 2860ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 2861ea6e942bSAtsushi Nemoto 2862597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 28630ce3417eSPaul Burton bool "Support for O32 binaries using 64-bit FP" 2864597ce172SPaul Burton depends on 32BIT || MIPS32_O32 2865597ce172SPaul Burton help 2866597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 2867597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 2868597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2869597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 2870597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 2871597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 2872597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 2873597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 2874597ce172SPaul Burton saying N here. 2875597ce172SPaul Burton 287606e2e882SPaul Burton Although binutils currently supports use of this flag the details 287706e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 287806e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 287906e2e882SPaul Burton behaviour before the details have been finalised, this option should 288006e2e882SPaul Burton be considered experimental and only enabled by those working upon 288106e2e882SPaul Burton said details. 288206e2e882SPaul Burton 288306e2e882SPaul Burton If unsure, say N. 2884597ce172SPaul Burton 2885f2ffa5abSDezhong Diaoconfig USE_OF 28860b3e06fdSJonas Gorski bool 2887f2ffa5abSDezhong Diao select OF 2888e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 2889abd2363fSGrant Likely select IRQ_DOMAIN 2890f2ffa5abSDezhong Diao 28917fafb068SAndrew Brestickerconfig BUILTIN_DTB 28927fafb068SAndrew Bresticker bool 28937fafb068SAndrew Bresticker 28941da8f179SJonas Gorskichoice 28955b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 28961da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 28971da8f179SJonas Gorski 28981da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 28991da8f179SJonas Gorski bool "None" 29001da8f179SJonas Gorski help 29011da8f179SJonas Gorski Do not enable appended dtb support. 29021da8f179SJonas Gorski 290387db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 290487db537dSAaro Koskinen bool "vmlinux" 290587db537dSAaro Koskinen help 290687db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 290787db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 290887db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 290987db537dSAaro Koskinen objcopy: 291087db537dSAaro Koskinen 291187db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 291287db537dSAaro Koskinen 291387db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 291487db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 291587db537dSAaro Koskinen the documented boot protocol using a device tree. 291687db537dSAaro Koskinen 29171da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 2918b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 29191da8f179SJonas Gorski help 29201da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 2921b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 29221da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 29231da8f179SJonas Gorski 29241da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 29251da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 29261da8f179SJonas Gorski the documented boot protocol using a device tree. 29271da8f179SJonas Gorski 29281da8f179SJonas Gorski Beware that there is very little in terms of protection against 29291da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 29301da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 29311da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 29321da8f179SJonas Gorski if you don't intend to always append a DTB. 29331da8f179SJonas Gorskiendchoice 29341da8f179SJonas Gorski 29352024972eSJonas Gorskichoice 29362024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 29372bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 29383f5f0a44SPaul Burton !MIPS_MALTA && \ 29392bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 29402024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 29412024972eSJonas Gorski 29422024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 29432024972eSJonas Gorski depends on USE_OF 29442024972eSJonas Gorski bool "Dtb kernel arguments if available" 29452024972eSJonas Gorski 29462024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 29472024972eSJonas Gorski depends on USE_OF 29482024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 29492024972eSJonas Gorski 29502024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 29512024972eSJonas Gorski bool "Bootloader kernel arguments if available" 2952ed47e153SRabin Vincent 2953ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 2954ed47e153SRabin Vincent depends on CMDLINE_BOOL 2955ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 29562024972eSJonas Gorskiendchoice 29572024972eSJonas Gorski 29585e83d430SRalf Baechleendmenu 29595e83d430SRalf Baechle 29601df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 29611df0f0ffSAtsushi Nemoto bool 29621df0f0ffSAtsushi Nemoto default y 29631df0f0ffSAtsushi Nemoto 29641df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 29651df0f0ffSAtsushi Nemoto bool 29661df0f0ffSAtsushi Nemoto default y 29671df0f0ffSAtsushi Nemoto 2968e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT 2969e1e16115SAaro Koskinen bool 2970e1e16115SAaro Koskinen default y 2971e1e16115SAaro Koskinen 2972a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 2973a728ab52SKirill A. Shutemov int 29743377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 2975a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 2976a728ab52SKirill A. Shutemov default 2 2977a728ab52SKirill A. Shutemov 2978b6c3539bSRalf Baechlesource "init/Kconfig" 2979b6c3539bSRalf Baechle 2980dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer" 2981dc52ddc0SMatt Helsley 29821da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 29831da177e4SLinus Torvalds 29845e83d430SRalf Baechleconfig HW_HAS_EISA 29855e83d430SRalf Baechle bool 29861da177e4SLinus Torvaldsconfig HW_HAS_PCI 29871da177e4SLinus Torvalds bool 29881da177e4SLinus Torvalds 29891da177e4SLinus Torvaldsconfig PCI 29901da177e4SLinus Torvalds bool "Support for PCI controller" 29911da177e4SLinus Torvalds depends on HW_HAS_PCI 2992abb4ae46SRalf Baechle select PCI_DOMAINS 29931da177e4SLinus Torvalds help 29941da177e4SLinus Torvalds Find out whether you have a PCI motherboard. PCI is the name of a 29951da177e4SLinus Torvalds bus system, i.e. the way the CPU talks to the other stuff inside 29961da177e4SLinus Torvalds your box. Other bus systems are ISA, EISA, or VESA. If you have PCI, 29971da177e4SLinus Torvalds say Y, otherwise N. 29981da177e4SLinus Torvalds 29990e476d91SHuacai Chenconfig HT_PCI 30000e476d91SHuacai Chen bool "Support for HT-linked PCI" 30010e476d91SHuacai Chen default y 30020e476d91SHuacai Chen depends on CPU_LOONGSON3 30030e476d91SHuacai Chen select PCI 30040e476d91SHuacai Chen select PCI_DOMAINS 30050e476d91SHuacai Chen help 30060e476d91SHuacai Chen Loongson family machines use Hyper-Transport bus for inter-core 30070e476d91SHuacai Chen connection and device connection. The PCI bus is a subordinate 30080e476d91SHuacai Chen linked at HT. Choose Y for Loongson-3 based machines. 30090e476d91SHuacai Chen 30101da177e4SLinus Torvaldsconfig PCI_DOMAINS 30111da177e4SLinus Torvalds bool 30121da177e4SLinus Torvalds 301388555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC 301488555b48SPaul Burton bool 301588555b48SPaul Burton 3016c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 301787dd9a4dSPaul Burton select PCI_DOMAINS_GENERIC if PCI_DOMAINS 3018c5611df9SPaul Burton bool 3019c5611df9SPaul Burton 3020c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3021c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3022c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 3023c5611df9SPaul Burton 30241da177e4SLinus Torvaldssource "drivers/pci/Kconfig" 30251da177e4SLinus Torvalds 30261da177e4SLinus Torvalds# 30271da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 30281da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 30291da177e4SLinus Torvalds# users to choose the right thing ... 30301da177e4SLinus Torvalds# 30311da177e4SLinus Torvaldsconfig ISA 30321da177e4SLinus Torvalds bool 30331da177e4SLinus Torvalds 30341da177e4SLinus Torvaldsconfig EISA 30351da177e4SLinus Torvalds bool "EISA support" 30365e83d430SRalf Baechle depends on HW_HAS_EISA 30371da177e4SLinus Torvalds select ISA 3038aa414dffSRalf Baechle select GENERIC_ISA_DMA 30391da177e4SLinus Torvalds ---help--- 30401da177e4SLinus Torvalds The Extended Industry Standard Architecture (EISA) bus was 30411da177e4SLinus Torvalds developed as an open alternative to the IBM MicroChannel bus. 30421da177e4SLinus Torvalds 30431da177e4SLinus Torvalds The EISA bus provided some of the features of the IBM MicroChannel 30441da177e4SLinus Torvalds bus while maintaining backward compatibility with cards made for 30451da177e4SLinus Torvalds the older ISA bus. The EISA bus saw limited use between 1988 and 30461da177e4SLinus Torvalds 1995 when it was made obsolete by the PCI bus. 30471da177e4SLinus Torvalds 30481da177e4SLinus Torvalds Say Y here if you are building a kernel for an EISA-based machine. 30491da177e4SLinus Torvalds 30501da177e4SLinus Torvalds Otherwise, say N. 30511da177e4SLinus Torvalds 30521da177e4SLinus Torvaldssource "drivers/eisa/Kconfig" 30531da177e4SLinus Torvalds 30541da177e4SLinus Torvaldsconfig TC 30551da177e4SLinus Torvalds bool "TURBOchannel support" 30561da177e4SLinus Torvalds depends on MACH_DECSTATION 30571da177e4SLinus Torvalds help 305850a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 305950a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 306050a23e6eSJustin P. Mattock at: 306150a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 306250a23e6eSJustin P. Mattock and: 306350a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 306450a23e6eSJustin P. Mattock Linux driver support status is documented at: 306550a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 30661da177e4SLinus Torvalds 30671da177e4SLinus Torvaldsconfig MMU 30681da177e4SLinus Torvalds bool 30691da177e4SLinus Torvalds default y 30701da177e4SLinus Torvalds 3071109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3072109c32ffSMatt Redfearn default 12 if 64BIT 3073109c32ffSMatt Redfearn default 8 3074109c32ffSMatt Redfearn 3075109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3076109c32ffSMatt Redfearn default 18 if 64BIT 3077109c32ffSMatt Redfearn default 15 3078109c32ffSMatt Redfearn 3079109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3080109c32ffSMatt Redfearn default 8 3081109c32ffSMatt Redfearn 3082109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3083109c32ffSMatt Redfearn default 15 3084109c32ffSMatt Redfearn 3085d865bea4SRalf Baechleconfig I8253 3086d865bea4SRalf Baechle bool 3087798778b8SRussell King select CLKSRC_I8253 30882d02612fSThomas Gleixner select CLKEVT_I8253 30899726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3090d865bea4SRalf Baechle 3091e05eb3f8SRalf Baechleconfig ZONE_DMA 3092e05eb3f8SRalf Baechle bool 3093e05eb3f8SRalf Baechle 3094cce335aeSRalf Baechleconfig ZONE_DMA32 3095cce335aeSRalf Baechle bool 3096cce335aeSRalf Baechle 30971da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig" 30981da177e4SLinus Torvalds 3099388b78adSAlexandre Bounineconfig RAPIDIO 310056abde72SAlexandre Bounine tristate "RapidIO support" 3101388b78adSAlexandre Bounine depends on PCI 3102388b78adSAlexandre Bounine default n 3103388b78adSAlexandre Bounine help 3104388b78adSAlexandre Bounine If you say Y here, the kernel will include drivers and 3105388b78adSAlexandre Bounine infrastructure code to support RapidIO interconnect devices. 3106388b78adSAlexandre Bounine 3107388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig" 3108388b78adSAlexandre Bounine 31091da177e4SLinus Torvaldsendmenu 31101da177e4SLinus Torvalds 31111da177e4SLinus Torvaldsmenu "Executable file formats" 31121da177e4SLinus Torvalds 31131da177e4SLinus Torvaldssource "fs/Kconfig.binfmt" 31141da177e4SLinus Torvalds 31151da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31161da177e4SLinus Torvalds bool 31171da177e4SLinus Torvalds 31181da177e4SLinus Torvaldsconfig MIPS32_COMPAT 311978aaf956SRalf Baechle bool 31201da177e4SLinus Torvalds 31211da177e4SLinus Torvaldsconfig COMPAT 31221da177e4SLinus Torvalds bool 31231da177e4SLinus Torvalds 312405e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 312505e43966SAtsushi Nemoto bool 312605e43966SAtsushi Nemoto 31271da177e4SLinus Torvaldsconfig MIPS32_O32 31281da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 312978aaf956SRalf Baechle depends on 64BIT 313078aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 313178aaf956SRalf Baechle select COMPAT 313278aaf956SRalf Baechle select MIPS32_COMPAT 313378aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31341da177e4SLinus Torvalds help 31351da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 31361da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 31371da177e4SLinus Torvalds existing binaries are in this format. 31381da177e4SLinus Torvalds 31391da177e4SLinus Torvalds If unsure, say Y. 31401da177e4SLinus Torvalds 31411da177e4SLinus Torvaldsconfig MIPS32_N32 31421da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3143c22eacfeSRalf Baechle depends on 64BIT 314478aaf956SRalf Baechle select COMPAT 314578aaf956SRalf Baechle select MIPS32_COMPAT 314678aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 31471da177e4SLinus Torvalds help 31481da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 31491da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 31501da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 31511da177e4SLinus Torvalds cases. 31521da177e4SLinus Torvalds 31531da177e4SLinus Torvalds If unsure, say N. 31541da177e4SLinus Torvalds 31551da177e4SLinus Torvaldsconfig BINFMT_ELF32 31561da177e4SLinus Torvalds bool 31571da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3158f43edca7SRalf Baechle select ELFCORE 31591da177e4SLinus Torvalds 31602116245eSRalf Baechleendmenu 31611da177e4SLinus Torvalds 31622116245eSRalf Baechlemenu "Power management options" 3163952fa954SRodolfo Giometti 3164363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3165363c55caSWu Zhangjin def_bool y 31663f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3167363c55caSWu Zhangjin 3168f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3169f4cb5700SJohannes Berg def_bool y 31703f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3171f4cb5700SJohannes Berg 31722116245eSRalf Baechlesource "kernel/power/Kconfig" 3173952fa954SRodolfo Giometti 31741da177e4SLinus Torvaldsendmenu 31751da177e4SLinus Torvalds 31767a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 31777a998935SViresh Kumar bool 31787a998935SViresh Kumar 31797a998935SViresh Kumarmenu "CPU Power Management" 3180c095ebafSPaul Burton 3181c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 31827a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 31837a998935SViresh Kumarendif 31849726b43aSWu Zhangjin 3185c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3186c095ebafSPaul Burton 3187c095ebafSPaul Burtonendmenu 3188c095ebafSPaul Burton 3189d5950b43SSam Ravnborgsource "net/Kconfig" 3190d5950b43SSam Ravnborg 31911da177e4SLinus Torvaldssource "drivers/Kconfig" 31921da177e4SLinus Torvalds 319398cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 319498cdee0eSRalf Baechle 31951da177e4SLinus Torvaldssource "fs/Kconfig" 31961da177e4SLinus Torvalds 31971da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug" 31981da177e4SLinus Torvalds 31991da177e4SLinus Torvaldssource "security/Kconfig" 32001da177e4SLinus Torvalds 32011da177e4SLinus Torvaldssource "crypto/Kconfig" 32021da177e4SLinus Torvalds 32031da177e4SLinus Torvaldssource "lib/Kconfig" 32042235a54dSSanjay Lal 32052235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3206