xref: /linux/arch/mips/Kconfig (revision bce860833ab1e40113eb0efab34d0c8f3b0226b1)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
4f8ac0425SYoichi Yuasa	select HAVE_GENERIC_DMA_COHERENT
5ec7748b5SSam Ravnborg	select HAVE_IDE
642d4b839SMathieu Desnoyers	select HAVE_OPROFILE
77f788d2dSDeng-Cheng Zhu	select HAVE_PERF_EVENTS
87f788d2dSDeng-Cheng Zhu	select PERF_USE_VMALLOC
988547001SJason Wessel	select HAVE_ARCH_KGDB
107563bbf8SMark Brown	select ARCH_HAVE_CUSTOM_GPIO_H
11d2bb0762SWu Zhangjin	select HAVE_FUNCTION_TRACER
1269a7d1b3SWu Zhangjin	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
13538f1952SWu Zhangjin	select HAVE_DYNAMIC_FTRACE
14538f1952SWu Zhangjin	select HAVE_FTRACE_MCOUNT_RECORD
1564575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
1629c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
17c1bf207dSDavid Daney	select HAVE_KPROBES
18c1bf207dSDavid Daney	select HAVE_KRETPROBES
19b69ec42bSCatalin Marinas	select HAVE_DEBUG_KMEMLEAK
20e26d196cSDavid Daney	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
21383c97b4SBen Hutchings	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
2221a41faaSWu Zhangjin	select RTC_LIB if !MACH_LOONGSON
232b78920dSDeng-Cheng Zhu	select GENERIC_ATOMIC64 if !64BIT
247463449bSCatalin Marinas	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
2548e1fd5aSDavid Daney	select HAVE_DMA_ATTRS
2648e1fd5aSDavid Daney	select HAVE_DMA_API_DEBUG
273bd27e32SDavid Daney	select HAVE_GENERIC_HARDIRQS
283bd27e32SDavid Daney	select GENERIC_IRQ_PROBE
29f8396c17SThomas Gleixner	select GENERIC_IRQ_SHOW
3094bb0c1aSDavid Daney	select HAVE_ARCH_JUMP_LABEL
31c1d7e01dSWill Deacon	select ARCH_WANT_IPC_PARSE_VERSION
320f462e3cSThomas Gleixner	select IRQ_FORCED_THREADING
339d15ffc8STejun Heo	select HAVE_MEMBLOCK
349d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
359d15ffc8STejun Heo	select ARCH_DISCARD_MEMBLOCK
36360014a3SThomas Gleixner	select GENERIC_SMP_IDLE_THREAD
374b054495SDavid Daney	select BUILDTIME_EXTABLE_SORT
38cde1794bSAnna-Maria Gleixner	select GENERIC_CLOCKEVENTS
39cde1794bSAnna-Maria Gleixner	select GENERIC_CMOS_UPDATE
40786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
414febd95aSStephen Rothwell	select VIRT_TO_BUS
422f12fb20SJoshua Kinard	select MODULES_USE_ELF_REL if MODULES
432f12fb20SJoshua Kinard	select MODULES_USE_ELF_RELA if MODULES && 64BIT
4450150d2bSAl Viro	select CLONE_BACKWARDS
451da177e4SLinus Torvalds
461da177e4SLinus Torvaldsmenu "Machine selection"
471da177e4SLinus Torvalds
485ac6da66SChristoph Lameterconfig ZONE_DMA
495ac6da66SChristoph Lameter	bool
505ac6da66SChristoph Lameter
515e83d430SRalf Baechlechoice
525e83d430SRalf Baechle	prompt "System type"
535e83d430SRalf Baechle	default SGI_IP22
541da177e4SLinus Torvalds
5542a4f17dSManuel Laussconfig MIPS_ALCHEMY
56c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
5742a4f17dSManuel Lauss	select 64BIT_PHYS_ADDR
58f772cdb2SRalf Baechle	select CEVT_R4K
59d7ea335cSSteven J. Hill	select CSRC_R4K
6042a4f17dSManuel Lauss	select IRQ_CPU
6142a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
6242a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
6342a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
6442a4f17dSManuel Lauss	select GENERIC_GPIO
6542a4f17dSManuel Lauss	select ARCH_WANT_OPTIONAL_GPIOLIB
661b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
6737663860SManuel Lauss	select USB_ARCH_HAS_OHCI
6837663860SManuel Lauss	select USB_ARCH_HAS_EHCI
691da177e4SLinus Torvalds
707ca5dc14SFlorian Fainelliconfig AR7
717ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
727ca5dc14SFlorian Fainelli	select BOOT_ELF32
737ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
747ca5dc14SFlorian Fainelli	select CEVT_R4K
757ca5dc14SFlorian Fainelli	select CSRC_R4K
767ca5dc14SFlorian Fainelli	select IRQ_CPU
777ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
787ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
797ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
807ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
817ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
827ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
831b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
845f3c9098SFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
857ca5dc14SFlorian Fainelli	select VLYNQ
868551fb64SYoichi Yuasa	select HAVE_CLK
877ca5dc14SFlorian Fainelli	help
887ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
897ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
907ca5dc14SFlorian Fainelli
91d4a67d9dSGabor Juhosconfig ATH79
92d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
936eae43c5SGabor Juhos	select ARCH_REQUIRE_GPIOLIB
94d4a67d9dSGabor Juhos	select BOOT_RAW
95d4a67d9dSGabor Juhos	select CEVT_R4K
96d4a67d9dSGabor Juhos	select CSRC_R4K
97d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
9894638067SGabor Juhos	select HAVE_CLK
99d4a67d9dSGabor Juhos	select IRQ_CPU
1000aabf1a4SGabor Juhos	select MIPS_MACHINE
101d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
102d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
103d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
104d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
105d4a67d9dSGabor Juhos	help
106d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
107d4a67d9dSGabor Juhos
1081c0c13ebSAurelien Jarnoconfig BCM47XX
109c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
1102da4c74dSHauke Mehrtens	select ARCH_WANT_OPTIONAL_GPIOLIB
111fe08f8c2SHauke Mehrtens	select BOOT_RAW
11242f77542SRalf Baechle	select CEVT_R4K
113940f6b48SRalf Baechle	select CSRC_R4K
1141c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
1150e2794b0SRalf Baechle	select FW_CFE
1161c0c13ebSAurelien Jarno	select HW_HAS_PCI
1171c0c13ebSAurelien Jarno	select IRQ_CPU
118dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
1191c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
1201c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
12125e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
1221c0c13ebSAurelien Jarno	help
1231c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
1241c0c13ebSAurelien Jarno
125e7300d04SMaxime Bizonconfig BCM63XX
126e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
127e7300d04SMaxime Bizon	select CEVT_R4K
128e7300d04SMaxime Bizon	select CSRC_R4K
129e7300d04SMaxime Bizon	select DMA_NONCOHERENT
130e7300d04SMaxime Bizon	select IRQ_CPU
131e7300d04SMaxime Bizon	select SYS_HAS_CPU_MIPS32_R1
132e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
133e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
134e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
135e7300d04SMaxime Bizon	select SWAP_IO_SPACE
136e7300d04SMaxime Bizon	select ARCH_REQUIRE_GPIOLIB
1373e82eeebSYoichi Yuasa	select HAVE_CLK
138e7300d04SMaxime Bizon	help
139e7300d04SMaxime Bizon	 Support for BCM63XX based boards
140e7300d04SMaxime Bizon
1411da177e4SLinus Torvaldsconfig MIPS_COBALT
1423fa986faSMartin Michlmayr	bool "Cobalt Server"
14342f77542SRalf Baechle	select CEVT_R4K
144940f6b48SRalf Baechle	select CSRC_R4K
1451097c6acSYoichi Yuasa	select CEVT_GT641XX
1461da177e4SLinus Torvalds	select DMA_NONCOHERENT
1471da177e4SLinus Torvalds	select HW_HAS_PCI
148d865bea4SRalf Baechle	select I8253
1491da177e4SLinus Torvalds	select I8259
1501da177e4SLinus Torvalds	select IRQ_CPU
151d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
152252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
153e25bfc92SYoichi Yuasa	select PCI
1547cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
1550a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
156ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
1570e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
1585e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
1591da177e4SLinus Torvalds
1601da177e4SLinus Torvaldsconfig MACH_DECSTATION
1613fa986faSMartin Michlmayr	bool "DECstations"
1621da177e4SLinus Torvalds	select BOOT_ELF32
1636457d9fcSYoichi Yuasa	select CEVT_DS1287
16442f77542SRalf Baechle	select CEVT_R4K
1654247417dSYoichi Yuasa	select CSRC_IOASIC
166940f6b48SRalf Baechle	select CSRC_R4K
16720d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
16820d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
16920d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
1701da177e4SLinus Torvalds	select DMA_NONCOHERENT
171d388d685SMaciej W. Rozycki	select NO_IOPORT
1721da177e4SLinus Torvalds	select IRQ_CPU
1737cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
1747cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
175ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
1767d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
1775e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
1781723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
1791723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
1801723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
1815e83d430SRalf Baechle	help
1821da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
1831da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
1841da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
1851da177e4SLinus Torvalds
1861da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
1871da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
1881da177e4SLinus Torvalds
1891da177e4SLinus Torvalds		DECstation 5000/50
1901da177e4SLinus Torvalds		DECstation 5000/150
1911da177e4SLinus Torvalds		DECstation 5000/260
1921da177e4SLinus Torvalds		DECsystem 5900/260
1931da177e4SLinus Torvalds
1941da177e4SLinus Torvalds	  otherwise choose R3000.
1951da177e4SLinus Torvalds
1965e83d430SRalf Baechleconfig MACH_JAZZ
1973fa986faSMartin Michlmayr	bool "Jazz family of machines"
1980e2794b0SRalf Baechle	select FW_ARC
1990e2794b0SRalf Baechle	select FW_ARC32
2005e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
20142f77542SRalf Baechle	select CEVT_R4K
202940f6b48SRalf Baechle	select CSRC_R4K
203e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
2045e83d430SRalf Baechle	select GENERIC_ISA_DMA
2058a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
206ea202c63SThomas Bogendoerfer	select IRQ_CPU
207d865bea4SRalf Baechle	select I8253
2085e83d430SRalf Baechle	select I8259
2095e83d430SRalf Baechle	select ISA
2107cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
2115e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
2127d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
2131723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
2141da177e4SLinus Torvalds	help
2155e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
2165e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
217692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
2185e83d430SRalf Baechle	 Olivetti M700-10 workstations.
2195e83d430SRalf Baechle
2205ebabe59SLars-Peter Clausenconfig MACH_JZ4740
2215ebabe59SLars-Peter Clausen	bool "Ingenic JZ4740 based machines"
2225ebabe59SLars-Peter Clausen	select SYS_HAS_CPU_MIPS32_R1
2235ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
2245ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
225f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
2265ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
2275ebabe59SLars-Peter Clausen	select IRQ_CPU
2285ebabe59SLars-Peter Clausen	select GENERIC_GPIO
2295ebabe59SLars-Peter Clausen	select ARCH_REQUIRE_GPIOLIB
2305ebabe59SLars-Peter Clausen	select SYS_HAS_EARLY_PRINTK
2315ebabe59SLars-Peter Clausen	select HAVE_PWM
232ab5330ebSMaurus Cuelenaere	select HAVE_CLK
23383bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
2345ebabe59SLars-Peter Clausen
235171bb2f1SJohn Crispinconfig LANTIQ
236171bb2f1SJohn Crispin	bool "Lantiq based platforms"
237171bb2f1SJohn Crispin	select DMA_NONCOHERENT
238171bb2f1SJohn Crispin	select IRQ_CPU
239171bb2f1SJohn Crispin	select CEVT_R4K
240171bb2f1SJohn Crispin	select CSRC_R4K
241171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
242171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
243171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
244171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
245171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
246171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
247171bb2f1SJohn Crispin	select ARCH_REQUIRE_GPIOLIB
248171bb2f1SJohn Crispin	select SWAP_IO_SPACE
249171bb2f1SJohn Crispin	select BOOT_RAW
250287e3f3fSJohn Crispin	select HAVE_MACH_CLKDEV
251287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
252a0392222SJohn Crispin	select USE_OF
2533f8c50c9SJohn Crispin	select PINCTRL
2543f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
255171bb2f1SJohn Crispin
2561f21d2bdSBrian Murphyconfig LASAT
2571f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
25842f77542SRalf Baechle	select CEVT_R4K
259940f6b48SRalf Baechle	select CSRC_R4K
2601f21d2bdSBrian Murphy	select DMA_NONCOHERENT
2611f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
2621f21d2bdSBrian Murphy	select HW_HAS_PCI
263a5ccfe5cSRalf Baechle	select IRQ_CPU
2641f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
2651f21d2bdSBrian Murphy	select MIPS_NILE4
2661f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
2671f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
2681f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
2691f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
2701f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
2711f21d2bdSBrian Murphy
27285749d24SWu Zhangjinconfig MACH_LOONGSON
27385749d24SWu Zhangjin	bool "Loongson family of machines"
274c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
275ade299d8SYoichi Yuasa	help
27685749d24SWu Zhangjin	  This enables the support of Loongson family of machines.
27785749d24SWu Zhangjin
27885749d24SWu Zhangjin	  Loongson is a family of general-purpose MIPS-compatible CPUs.
27985749d24SWu Zhangjin	  developed at Institute of Computing Technology (ICT),
28085749d24SWu Zhangjin	  Chinese Academy of Sciences (CAS) in the People's Republic
28185749d24SWu Zhangjin	  of China. The chief architect is Professor Weiwu Hu.
282ade299d8SYoichi Yuasa
283ca585cf9SKelvin Cheungconfig MACH_LOONGSON1
284ca585cf9SKelvin Cheung	bool "Loongson 1 family of machines"
285ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
286ca585cf9SKelvin Cheung	help
287ca585cf9SKelvin Cheung	  This enables support for the Loongson 1 based machines.
288ca585cf9SKelvin Cheung
289ca585cf9SKelvin Cheung	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
290ca585cf9SKelvin Cheung	  the ICT (Institute of Computing Technology) and the Chinese Academy
291ca585cf9SKelvin Cheung	  of Sciences.
292ca585cf9SKelvin Cheung
2931da177e4SLinus Torvaldsconfig MIPS_MALTA
2943fa986faSMartin Michlmayr	bool "MIPS Malta board"
29561ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
2961da177e4SLinus Torvalds	select BOOT_ELF32
297fa71c960SRalf Baechle	select BOOT_RAW
29842f77542SRalf Baechle	select CEVT_R4K
299940f6b48SRalf Baechle	select CSRC_R4K
300778eeb1bSSteven J. Hill	select CSRC_GIC
3011da177e4SLinus Torvalds	select DMA_NONCOHERENT
3021da177e4SLinus Torvalds	select GENERIC_ISA_DMA
3038a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
304aa414dffSRalf Baechle	select IRQ_CPU
30539b8d525SRalf Baechle	select IRQ_GIC
3061da177e4SLinus Torvalds	select HW_HAS_PCI
307d865bea4SRalf Baechle	select I8253
3081da177e4SLinus Torvalds	select I8259
3095e83d430SRalf Baechle	select MIPS_BOARDS_GEN
3105e83d430SRalf Baechle	select MIPS_BONITO64
3119318c51aSChris Dearman	select MIPS_CPU_SCACHE
312252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
3135e83d430SRalf Baechle	select MIPS_MSC
3141da177e4SLinus Torvalds	select SWAP_IO_SPACE
3157cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
3167cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
3177cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
3185d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
3197cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
3207cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
32136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
322ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
323ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
3245e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
3255e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
3260365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
327f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
3289693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
3291b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
3301da177e4SLinus Torvalds	help
331f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
3321da177e4SLinus Torvalds	  board.
3331da177e4SLinus Torvalds
334ec47b274SSteven J. Hillconfig MIPS_SEAD3
335ec47b274SSteven J. Hill	bool "MIPS SEAD3 board"
336ec47b274SSteven J. Hill	select BOOT_ELF32
337ec47b274SSteven J. Hill	select BOOT_RAW
338ec47b274SSteven J. Hill	select CEVT_R4K
339ec47b274SSteven J. Hill	select CSRC_R4K
340ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_VI
341ec47b274SSteven J. Hill	select CPU_MIPSR2_IRQ_EI
342ec47b274SSteven J. Hill	select DMA_NONCOHERENT
343ec47b274SSteven J. Hill	select IRQ_CPU
344ec47b274SSteven J. Hill	select IRQ_GIC
345ec47b274SSteven J. Hill	select MIPS_BOARDS_GEN
346ec47b274SSteven J. Hill	select MIPS_CPU_SCACHE
347ec47b274SSteven J. Hill	select MIPS_MSC
348ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R1
349ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R2
350ec47b274SSteven J. Hill	select SYS_HAS_CPU_MIPS64_R1
351ec47b274SSteven J. Hill	select SYS_HAS_EARLY_PRINTK
352ec47b274SSteven J. Hill	select SYS_SUPPORTS_32BIT_KERNEL
353ec47b274SSteven J. Hill	select SYS_SUPPORTS_64BIT_KERNEL
354ec47b274SSteven J. Hill	select SYS_SUPPORTS_BIG_ENDIAN
355ec47b274SSteven J. Hill	select SYS_SUPPORTS_LITTLE_ENDIAN
356ec47b274SSteven J. Hill	select SYS_SUPPORTS_SMARTMIPS
357a6a4834cSSteven J. Hill	select SYS_SUPPORTS_MICROMIPS
358ec47b274SSteven J. Hill	select USB_ARCH_HAS_EHCI
359ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_DESC
360ec47b274SSteven J. Hill	select USB_EHCI_BIG_ENDIAN_MMIO
3619b731009SSteven J. Hill	select USE_OF
362ec47b274SSteven J. Hill	help
363ec47b274SSteven J. Hill	  This enables support for the MIPS Technologies SEAD3 evaluation
364ec47b274SSteven J. Hill	  board.
365ec47b274SSteven J. Hill
366a83860c2SRalf Baechleconfig NEC_MARKEINS
367a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
368a83860c2SRalf Baechle	select SOC_EMMA2RH
369a83860c2SRalf Baechle	select HW_HAS_PCI
370a83860c2SRalf Baechle	help
371a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
372ade299d8SYoichi Yuasa
3735e83d430SRalf Baechleconfig MACH_VR41XX
37474142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
37542f77542SRalf Baechle	select CEVT_R4K
376940f6b48SRalf Baechle	select CSRC_R4K
3777cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
37827fdd325SYoichi Yuasa	select ARCH_REQUIRE_GPIOLIB
3795e83d430SRalf Baechle
380edb6310aSDaniel Lairdconfig NXP_STB220
381edb6310aSDaniel Laird	bool "NXP STB220 board"
382edb6310aSDaniel Laird	select SOC_PNX833X
383edb6310aSDaniel Laird	help
384edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
385edb6310aSDaniel Laird
386edb6310aSDaniel Lairdconfig NXP_STB225
387edb6310aSDaniel Laird	bool "NXP 225 board"
388edb6310aSDaniel Laird	select SOC_PNX833X
389edb6310aSDaniel Laird	select SOC_PNX8335
390edb6310aSDaniel Laird	help
391edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
392edb6310aSDaniel Laird
3939267a30dSMarc St-Jeanconfig PMC_MSP
3949267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
39539d30c13SAnoop P A	select CEVT_R4K
39639d30c13SAnoop P A	select CSRC_R4K
3979267a30dSMarc St-Jean	select DMA_NONCOHERENT
3989267a30dSMarc St-Jean	select SWAP_IO_SPACE
3999267a30dSMarc St-Jean	select NO_EXCEPT_FILL
4009267a30dSMarc St-Jean	select BOOT_RAW
4019267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
4029267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
4039267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
4049267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
4059267a30dSMarc St-Jean	select IRQ_CPU
4069267a30dSMarc St-Jean	select SERIAL_8250
4079267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
4089267a30dSMarc St-Jean	help
4099267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
4109267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
4119267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
4129267a30dSMarc St-Jean	  a variety of MIPS cores.
4139267a30dSMarc St-Jean
414a3a0f8c8SDavid VomLehnconfig POWERTV
415a3a0f8c8SDavid VomLehn	bool "Cisco PowerTV"
416a3a0f8c8SDavid VomLehn	select BOOT_ELF32
417a3a0f8c8SDavid VomLehn	select CEVT_R4K
418a3a0f8c8SDavid VomLehn	select CPU_MIPSR2_IRQ_VI
419a3a0f8c8SDavid VomLehn	select CPU_MIPSR2_IRQ_EI
420a3a0f8c8SDavid VomLehn	select CSRC_POWERTV
421a3a0f8c8SDavid VomLehn	select DMA_NONCOHERENT
422a3a0f8c8SDavid VomLehn	select HW_HAS_PCI
423a3a0f8c8SDavid VomLehn	select SYS_HAS_EARLY_PRINTK
424a3a0f8c8SDavid VomLehn	select SYS_HAS_CPU_MIPS32_R2
425a3a0f8c8SDavid VomLehn	select SYS_SUPPORTS_32BIT_KERNEL
426a3a0f8c8SDavid VomLehn	select SYS_SUPPORTS_BIG_ENDIAN
427a3a0f8c8SDavid VomLehn	select SYS_SUPPORTS_HIGHMEM
428a3a0f8c8SDavid VomLehn	select USB_OHCI_LITTLE_ENDIAN
429a3a0f8c8SDavid VomLehn	help
430a3a0f8c8SDavid VomLehn	  This enables support for the Cisco PowerTV Platform.
431a3a0f8c8SDavid VomLehn
432ae2b5bb6SJohn Crispinconfig RALINK
433ae2b5bb6SJohn Crispin	bool "Ralink based machines"
434ae2b5bb6SJohn Crispin	select CEVT_R4K
435ae2b5bb6SJohn Crispin	select CSRC_R4K
436ae2b5bb6SJohn Crispin	select BOOT_RAW
437ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
438ae2b5bb6SJohn Crispin	select IRQ_CPU
439ae2b5bb6SJohn Crispin	select USE_OF
440ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
441ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
442ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
443ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
444ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
445ae2b5bb6SJohn Crispin	select HAVE_MACH_CLKDEV
446ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
447ae2b5bb6SJohn Crispin
4481da177e4SLinus Torvaldsconfig SGI_IP22
4493fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
4500e2794b0SRalf Baechle	select FW_ARC
4510e2794b0SRalf Baechle	select FW_ARC32
4521da177e4SLinus Torvalds	select BOOT_ELF32
45342f77542SRalf Baechle	select CEVT_R4K
454940f6b48SRalf Baechle	select CSRC_R4K
455e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
4561da177e4SLinus Torvalds	select DMA_NONCOHERENT
4575e83d430SRalf Baechle	select HW_HAS_EISA
458d865bea4SRalf Baechle	select I8253
45968de4803SThomas Bogendoerfer	select I8259
4601da177e4SLinus Torvalds	select IP22_CPU_SCACHE
4611da177e4SLinus Torvalds	select IRQ_CPU
462aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
463e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
464e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
46536e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
466e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
467e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
468e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
4691da177e4SLinus Torvalds	select SWAP_IO_SPACE
4707cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
4717cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
4722b5e63f6SMartin Michlmayr	#
4732b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
4742b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
4752b5e63f6SMartin Michlmayr	#
4762b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
4772b5e63f6SMartin Michlmayr	# for a more details discussion
4782b5e63f6SMartin Michlmayr	#
4792b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
480ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
481ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
4825e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
4831da177e4SLinus Torvalds	help
4841da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
4851da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
4861da177e4SLinus Torvalds	  that runs on these, say Y here.
4871da177e4SLinus Torvalds
4881da177e4SLinus Torvaldsconfig SGI_IP27
4893fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
4900e2794b0SRalf Baechle	select FW_ARC
4910e2794b0SRalf Baechle	select FW_ARC64
4925e83d430SRalf Baechle	select BOOT_ELF64
493e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
494634286f1SRalf Baechle	select DMA_COHERENT
49536a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
4961da177e4SLinus Torvalds	select HW_HAS_PCI
497130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
4987cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
499ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5005e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
501d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
5021a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
5031da177e4SLinus Torvalds	help
5041da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
5051da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
5061da177e4SLinus Torvalds	  here.
5071da177e4SLinus Torvalds
508e2defae5SThomas Bogendoerferconfig SGI_IP28
5097d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
5100e2794b0SRalf Baechle	select FW_ARC
5110e2794b0SRalf Baechle	select FW_ARC64
512e2defae5SThomas Bogendoerfer	select BOOT_ELF64
513e2defae5SThomas Bogendoerfer	select CEVT_R4K
514e2defae5SThomas Bogendoerfer	select CSRC_R4K
515e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
516e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
517e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
518e2defae5SThomas Bogendoerfer	select IRQ_CPU
519e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
520e2defae5SThomas Bogendoerfer	select I8253
521e2defae5SThomas Bogendoerfer	select I8259
522e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
523e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
5245b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
525e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
526e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
527e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
528e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
529e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
5302b5e63f6SMartin Michlmayr	#
5312b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
5322b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
5332b5e63f6SMartin Michlmayr	#
5342b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
5352b5e63f6SMartin Michlmayr	# for a more details discussion
5362b5e63f6SMartin Michlmayr	#
5372b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
538e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
539e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
540e2defae5SThomas Bogendoerfer      help
541e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
542e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
543e2defae5SThomas Bogendoerfer
5441da177e4SLinus Torvaldsconfig SGI_IP32
545cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
5460e2794b0SRalf Baechle	select FW_ARC
5470e2794b0SRalf Baechle	select FW_ARC32
5481da177e4SLinus Torvalds	select BOOT_ELF32
54942f77542SRalf Baechle	select CEVT_R4K
550940f6b48SRalf Baechle	select CSRC_R4K
5511da177e4SLinus Torvalds	select DMA_NONCOHERENT
5521da177e4SLinus Torvalds	select HW_HAS_PCI
553dd67b155SRalf Baechle	select IRQ_CPU
5541da177e4SLinus Torvalds	select R5000_CPU_SCACHE
5551da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
5567cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
5577cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
5587cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
559dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
560ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5615e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5621da177e4SLinus Torvalds	help
5631da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
5641da177e4SLinus Torvalds
565ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
566ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
5675e83d430SRalf Baechle	select BOOT_ELF32
5685e83d430SRalf Baechle	select DMA_COHERENT
5695e83d430SRalf Baechle	select SIBYTE_BCM1120
5705e83d430SRalf Baechle	select SWAP_IO_SPACE
5717cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5725e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5735e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5745e83d430SRalf Baechle
575ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
576ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
5775e83d430SRalf Baechle	select BOOT_ELF32
5785e83d430SRalf Baechle	select DMA_COHERENT
5795e83d430SRalf Baechle	select SIBYTE_BCM1120
5805e83d430SRalf Baechle	select SWAP_IO_SPACE
5817cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5825e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5835e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5845e83d430SRalf Baechle
5855e83d430SRalf Baechleconfig SIBYTE_CRHONE
5863fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
5875e83d430SRalf Baechle	select BOOT_ELF32
5885e83d430SRalf Baechle	select DMA_COHERENT
5895e83d430SRalf Baechle	select SIBYTE_BCM1125
5905e83d430SRalf Baechle	select SWAP_IO_SPACE
5917cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
5925e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
5935e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
5945e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
5955e83d430SRalf Baechle
596ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
597ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
598ade299d8SYoichi Yuasa	select BOOT_ELF32
599ade299d8SYoichi Yuasa	select DMA_COHERENT
600ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
601ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
602ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
603ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
604ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
605ade299d8SYoichi Yuasa
606ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
607ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
608ade299d8SYoichi Yuasa	select BOOT_ELF32
609ade299d8SYoichi Yuasa	select DMA_COHERENT
610fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
611ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_2
612ade299d8SYoichi Yuasa	select SIBYTE_SB1250
613ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
614ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
615ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
616ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
617ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
618cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
619ade299d8SYoichi Yuasa
620ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
621ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
622ade299d8SYoichi Yuasa	select BOOT_ELF32
623ade299d8SYoichi Yuasa	select DMA_COHERENT
624fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
625ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_2
626ade299d8SYoichi Yuasa	select SIBYTE_SB1250
627ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
628ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
629ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
630ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
631ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
632ade299d8SYoichi Yuasa
633ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
634ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
635ade299d8SYoichi Yuasa	select BOOT_ELF32
636ade299d8SYoichi Yuasa	select DMA_COHERENT
637ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_2
638ade299d8SYoichi Yuasa	select SIBYTE_SB1250
639ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
640ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
641ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
642ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
643ade299d8SYoichi Yuasa
644ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
645ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
646ade299d8SYoichi Yuasa	select BOOT_ELF32
647ade299d8SYoichi Yuasa	select DMA_COHERENT
648ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
649ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
650ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
651ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
652ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
653651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
654ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
655cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
656ade299d8SYoichi Yuasa
65714b36af4SThomas Bogendoerferconfig SNI_RM
65814b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
6590e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
6600e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
661aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
6625e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
6635e83d430SRalf Baechle	select BOOT_ELF32
66442f77542SRalf Baechle	select CEVT_R4K
665940f6b48SRalf Baechle	select CSRC_R4K
666e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
6675e83d430SRalf Baechle	select DMA_NONCOHERENT
6685e83d430SRalf Baechle	select GENERIC_ISA_DMA
6698a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
6705e83d430SRalf Baechle	select HW_HAS_EISA
6715e83d430SRalf Baechle	select HW_HAS_PCI
672c066a32aSThomas Bogendoerfer	select IRQ_CPU
673d865bea4SRalf Baechle	select I8253
6745e83d430SRalf Baechle	select I8259
6755e83d430SRalf Baechle	select ISA
6764a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
6777cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6784a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
679c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6804a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
68136a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
682ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
6837d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
6844a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
6855e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
6865e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
6871da177e4SLinus Torvalds	help
68814b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
68914b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
6905e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
6915e83d430SRalf Baechle	  support this machine type.
6921da177e4SLinus Torvalds
693edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
694edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
6955e83d430SRalf Baechle
696edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
697edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
69823fbee9dSRalf Baechle
69973b4390fSRalf Baechleconfig MIKROTIK_RB532
70073b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
70173b4390fSRalf Baechle	select CEVT_R4K
70273b4390fSRalf Baechle	select CSRC_R4K
70373b4390fSRalf Baechle	select DMA_NONCOHERENT
70473b4390fSRalf Baechle	select HW_HAS_PCI
70573b4390fSRalf Baechle	select IRQ_CPU
70673b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
70773b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
70873b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
70973b4390fSRalf Baechle	select SWAP_IO_SPACE
71073b4390fSRalf Baechle	select BOOT_RAW
711d888e25bSFlorian Fainelli	select ARCH_REQUIRE_GPIOLIB
71273b4390fSRalf Baechle	help
71373b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
71473b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
71573b4390fSRalf Baechle
716ade299d8SYoichi Yuasaconfig WR_PPMC
717ade299d8SYoichi Yuasa	bool "Wind River PPMC board"
71842f77542SRalf Baechle	select CEVT_R4K
719940f6b48SRalf Baechle	select CSRC_R4K
720ade299d8SYoichi Yuasa	select IRQ_CPU
721ade299d8SYoichi Yuasa	select BOOT_ELF32
722ade299d8SYoichi Yuasa	select DMA_NONCOHERENT
723ade299d8SYoichi Yuasa	select HW_HAS_PCI
724ade299d8SYoichi Yuasa	select PCI_GT64XXX_PCI0
725ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
726ade299d8SYoichi Yuasa	select SYS_HAS_CPU_MIPS32_R1
727ade299d8SYoichi Yuasa	select SYS_HAS_CPU_MIPS32_R2
728ade299d8SYoichi Yuasa	select SYS_HAS_CPU_MIPS64_R1
729ade299d8SYoichi Yuasa	select SYS_HAS_CPU_NEVADA
730ade299d8SYoichi Yuasa	select SYS_HAS_CPU_RM7000
731ade299d8SYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
732ade299d8SYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
733ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
734ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
735ade299d8SYoichi Yuasa	help
736ade299d8SYoichi Yuasa	  This enables support for the Wind River MIPS32 4KC PPMC evaluation
737ade299d8SYoichi Yuasa	  board, which is based on GT64120 bridge chip.
738ade299d8SYoichi Yuasa
739a86c7f72SDavid Daneyconfig CAVIUM_OCTEON_SIMULATOR
740c9d89d97SYoichi Yuasa	bool "Cavium Networks Octeon Simulator"
741a86c7f72SDavid Daney	select CEVT_R4K
742a86c7f72SDavid Daney	select 64BIT_PHYS_ADDR
743a86c7f72SDavid Daney	select DMA_COHERENT
744a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
745a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
746773cb77dSRalf Baechle	select SYS_SUPPORTS_HOTPLUG_CPU
7475e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
748465aaed0SDavid Daney	select HOLES_IN_ZONE
749a86c7f72SDavid Daney	help
750a86c7f72SDavid Daney	  The Octeon simulator is software performance model of the Cavium
751a86c7f72SDavid Daney	  Octeon Processor. It supports simulating Octeon processors on x86
752a86c7f72SDavid Daney	  hardware.
753a86c7f72SDavid Daney
754a86c7f72SDavid Daneyconfig CAVIUM_OCTEON_REFERENCE_BOARD
755c9d89d97SYoichi Yuasa	bool "Cavium Networks Octeon reference board"
756a86c7f72SDavid Daney	select CEVT_R4K
757a86c7f72SDavid Daney	select 64BIT_PHYS_ADDR
758a86c7f72SDavid Daney	select DMA_COHERENT
759a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
760a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
761f65aad41SRalf Baechle	select EDAC_SUPPORT
762773cb77dSRalf Baechle	select SYS_SUPPORTS_HOTPLUG_CPU
763a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
7645e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
765a86c7f72SDavid Daney	select SWAP_IO_SPACE
766e8635b48SDavid Daney	select HW_HAS_PCI
767e8635b48SDavid Daney	select ARCH_SUPPORTS_MSI
768f00e001eSDavid Daney	select ZONE_DMA32
769340fbb8bSDavid Daney	select USB_ARCH_HAS_OHCI
770340fbb8bSDavid Daney	select USB_ARCH_HAS_EHCI
771465aaed0SDavid Daney	select HOLES_IN_ZONE
772a86c7f72SDavid Daney	help
773a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
774a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
775a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
776a86c7f72SDavid Daney	  Some of the supported boards are:
777a86c7f72SDavid Daney		EBT3000
778a86c7f72SDavid Daney		EBH3000
779a86c7f72SDavid Daney		EBH3100
780a86c7f72SDavid Daney		Thunder
781a86c7f72SDavid Daney		Kodama
782a86c7f72SDavid Daney		Hikari
783a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
784a86c7f72SDavid Daney
7857f058e85SJayachandran Cconfig NLM_XLR_BOARD
7867f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
7877f058e85SJayachandran C	select BOOT_ELF32
7887f058e85SJayachandran C	select NLM_COMMON
7897f058e85SJayachandran C	select SYS_HAS_CPU_XLR
7907f058e85SJayachandran C	select SYS_SUPPORTS_SMP
7917f058e85SJayachandran C	select HW_HAS_PCI
7927f058e85SJayachandran C	select SWAP_IO_SPACE
7937f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
7947f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
7957f058e85SJayachandran C	select 64BIT_PHYS_ADDR
7967f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
7977f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
7987f058e85SJayachandran C	select DMA_COHERENT
7997f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
8007f058e85SJayachandran C	select CEVT_R4K
8017f058e85SJayachandran C	select CSRC_R4K
8027f058e85SJayachandran C	select IRQ_CPU
803f32671a8SGanesan Ramalingam	select ARCH_SUPPORTS_MSI
804b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8057f058e85SJayachandran C	select SYNC_R4K
8067f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
807f35574a3SJayachandran C	select USB_ARCH_HAS_OHCI if USB_SUPPORT
808f35574a3SJayachandran C	select USB_ARCH_HAS_EHCI if USB_SUPPORT
8097f058e85SJayachandran C	help
8107f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
8117f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
8127f058e85SJayachandran C
8131c773ea4SJayachandran Cconfig NLM_XLP_BOARD
8141c773ea4SJayachandran C	bool "Netlogic XLP based systems"
8151c773ea4SJayachandran C	select BOOT_ELF32
8161c773ea4SJayachandran C	select NLM_COMMON
8171c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
8181c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
8191c773ea4SJayachandran C	select HW_HAS_PCI
8201c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
8211c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
8221c773ea4SJayachandran C	select 64BIT_PHYS_ADDR
8231c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
8241c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
8251c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
8261c773ea4SJayachandran C	select DMA_COHERENT
8271c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
8281c773ea4SJayachandran C	select CEVT_R4K
8291c773ea4SJayachandran C	select CSRC_R4K
8301c773ea4SJayachandran C	select IRQ_CPU
831b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
8321c773ea4SJayachandran C	select SYNC_R4K
8331c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
8342f6528e1SJayachandran C	select USE_OF
8351c773ea4SJayachandran C	help
8361c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
8371c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
8381c773ea4SJayachandran C
8391da177e4SLinus Torvaldsendchoice
8401da177e4SLinus Torvalds
841e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
842d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
843a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
844e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
8455e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
8465ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
8478ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
8481f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
8490f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
850a3a0f8c8SDavid VomLehnsource "arch/mips/powertv/Kconfig"
851ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
85229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
85338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
85422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
8555e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
856a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
85785749d24SWu Zhangjinsource "arch/mips/loongson/Kconfig"
858ca585cf9SKelvin Cheungsource "arch/mips/loongson1/Kconfig"
8597f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
86038b18f72SRalf Baechle
8615e83d430SRalf Baechleendmenu
8625e83d430SRalf Baechle
8631da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
8641da177e4SLinus Torvalds	bool
8651da177e4SLinus Torvalds	default y
8661da177e4SLinus Torvalds
8671da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
8681da177e4SLinus Torvalds	bool
8691da177e4SLinus Torvalds
870f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U32
871f0d1b0b3SDavid Howells	bool
872f0d1b0b3SDavid Howells	default n
873f0d1b0b3SDavid Howells
874f0d1b0b3SDavid Howellsconfig ARCH_HAS_ILOG2_U64
875f0d1b0b3SDavid Howells	bool
876f0d1b0b3SDavid Howells	default n
877f0d1b0b3SDavid Howells
8783c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
8793c9ee7efSAkinobu Mita	bool
8803c9ee7efSAkinobu Mita	default y
8813c9ee7efSAkinobu Mita
8821da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
8831da177e4SLinus Torvalds	bool
8841da177e4SLinus Torvalds	default y
8851da177e4SLinus Torvalds
886ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
8871cc89038SAtsushi Nemoto	bool
8881cc89038SAtsushi Nemoto	default y
8891cc89038SAtsushi Nemoto
8901da177e4SLinus Torvalds#
8911da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
8921da177e4SLinus Torvalds#
8930e2794b0SRalf Baechleconfig FW_ARC
8941da177e4SLinus Torvalds	bool
8951da177e4SLinus Torvalds
89661ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
89761ed242dSRalf Baechle	bool
89861ed242dSRalf Baechle
8999267a30dSMarc St-Jeanconfig BOOT_RAW
9009267a30dSMarc St-Jean	bool
9019267a30dSMarc St-Jean
902217dd11eSRalf Baechleconfig CEVT_BCM1480
903217dd11eSRalf Baechle	bool
904217dd11eSRalf Baechle
9056457d9fcSYoichi Yuasaconfig CEVT_DS1287
9066457d9fcSYoichi Yuasa	bool
9076457d9fcSYoichi Yuasa
9081097c6acSYoichi Yuasaconfig CEVT_GT641XX
9091097c6acSYoichi Yuasa	bool
9101097c6acSYoichi Yuasa
91142f77542SRalf Baechleconfig CEVT_R4K
91242f77542SRalf Baechle	bool
91342f77542SRalf Baechle
914217dd11eSRalf Baechleconfig CEVT_SB1250
915217dd11eSRalf Baechle	bool
916217dd11eSRalf Baechle
917229f773eSAtsushi Nemotoconfig CEVT_TXX9
918229f773eSAtsushi Nemoto	bool
919229f773eSAtsushi Nemoto
920217dd11eSRalf Baechleconfig CSRC_BCM1480
921217dd11eSRalf Baechle	bool
922217dd11eSRalf Baechle
9234247417dSYoichi Yuasaconfig CSRC_IOASIC
9244247417dSYoichi Yuasa	bool
9254247417dSYoichi Yuasa
926a3a0f8c8SDavid VomLehnconfig CSRC_POWERTV
927a3a0f8c8SDavid VomLehn	bool
928a3a0f8c8SDavid VomLehn
929940f6b48SRalf Baechleconfig CSRC_R4K
930940f6b48SRalf Baechle	bool
931940f6b48SRalf Baechle
932778eeb1bSSteven J. Hillconfig CSRC_GIC
933778eeb1bSSteven J. Hill	bool
934778eeb1bSSteven J. Hill
935217dd11eSRalf Baechleconfig CSRC_SB1250
936217dd11eSRalf Baechle	bool
937217dd11eSRalf Baechle
938a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
939a9aec7feSAtsushi Nemoto	select GENERIC_GPIO
9407444a72eSMichael Buesch	select ARCH_REQUIRE_GPIOLIB
941a9aec7feSAtsushi Nemoto	bool
942a9aec7feSAtsushi Nemoto
9430e2794b0SRalf Baechleconfig FW_CFE
944df78b5c8SAurelien Jarno	bool
945df78b5c8SAurelien Jarno
9464bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
9474bafad92SFUJITA Tomonori	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
9484bafad92SFUJITA Tomonori
9491da177e4SLinus Torvaldsconfig DMA_COHERENT
9501da177e4SLinus Torvalds	bool
9511da177e4SLinus Torvalds
9521da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
9531da177e4SLinus Torvalds	bool
954e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
9554ce588cdSRalf Baechle
956e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
9574ce588cdSRalf Baechle	bool
9581da177e4SLinus Torvalds
95936a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
9601da177e4SLinus Torvalds	bool
9611da177e4SLinus Torvalds
962dbb74540SRalf Baechleconfig HOTPLUG_CPU
9631b2bc75cSRalf Baechle	bool "Support for hot-pluggable CPUs"
9641b2bc75cSRalf Baechle	depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
9651b2bc75cSRalf Baechle	help
9661b2bc75cSRalf Baechle	  Say Y here to allow turning CPUs off and on. CPUs can be
9671b2bc75cSRalf Baechle	  controlled through /sys/devices/system/cpu.
9681b2bc75cSRalf Baechle	  (Note: power management support will enable this option
9691b2bc75cSRalf Baechle	    automatically on SMP systems. )
9701b2bc75cSRalf Baechle	  Say N if you want to disable CPU hotplug.
9711b2bc75cSRalf Baechle
9721b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
973dbb74540SRalf Baechle	bool
974dbb74540SRalf Baechle
9751da177e4SLinus Torvaldsconfig I8259
9761da177e4SLinus Torvalds	bool
9771da177e4SLinus Torvalds
9781da177e4SLinus Torvaldsconfig MIPS_BONITO64
9791da177e4SLinus Torvalds	bool
9801da177e4SLinus Torvalds
9811da177e4SLinus Torvaldsconfig MIPS_MSC
9821da177e4SLinus Torvalds	bool
9831da177e4SLinus Torvalds
9841f21d2bdSBrian Murphyconfig MIPS_NILE4
9851f21d2bdSBrian Murphy	bool
9861f21d2bdSBrian Murphy
9871da177e4SLinus Torvaldsconfig MIPS_DISABLE_OBSOLETE_IDE
9881da177e4SLinus Torvalds	bool
9891da177e4SLinus Torvalds
99039b8d525SRalf Baechleconfig SYNC_R4K
99139b8d525SRalf Baechle	bool
99239b8d525SRalf Baechle
993487d70d0SGabor Juhosconfig MIPS_MACHINE
994487d70d0SGabor Juhos	def_bool n
995487d70d0SGabor Juhos
996d388d685SMaciej W. Rozyckiconfig NO_IOPORT
997d388d685SMaciej W. Rozycki	def_bool n
998d388d685SMaciej W. Rozycki
9998313da30SRalf Baechleconfig GENERIC_ISA_DMA
10008313da30SRalf Baechle	bool
10018313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1002a35bee8aSNamhyung Kim	select ISA_DMA_API
10038313da30SRalf Baechle
1004aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1005aa414dffSRalf Baechle	bool
10068313da30SRalf Baechle	select GENERIC_ISA_DMA
1007aa414dffSRalf Baechle
1008a35bee8aSNamhyung Kimconfig ISA_DMA_API
1009a35bee8aSNamhyung Kim	bool
1010a35bee8aSNamhyung Kim
101109663335SYoichi Yuasaconfig GENERIC_GPIO
101209663335SYoichi Yuasa	bool
101309663335SYoichi Yuasa
1014465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1015465aaed0SDavid Daney	bool
1016465aaed0SDavid Daney
10175e83d430SRalf Baechle#
10186b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
10195e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
10205e83d430SRalf Baechle# choice statement should be more obvious to the user.
10215e83d430SRalf Baechle#
10225e83d430SRalf Baechlechoice
10236b2aac42SMasanari Iida	prompt "Endianness selection"
10241da177e4SLinus Torvalds	help
10251da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
10265e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
10273cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
10285e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
10293dde6ad8SDavid Sterba	  one or the other endianness.
10305e83d430SRalf Baechle
10315e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
10325e83d430SRalf Baechle	bool "Big endian"
10335e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
10345e83d430SRalf Baechle
10355e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
10365e83d430SRalf Baechle	bool "Little endian"
10375e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
10385e83d430SRalf Baechle	help
10395e83d430SRalf Baechle
10405e83d430SRalf Baechleendchoice
10415e83d430SRalf Baechle
104222b0763aSDavid Daneyconfig EXPORT_UASM
104322b0763aSDavid Daney	bool
104422b0763aSDavid Daney
10452116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
10462116245eSRalf Baechle	bool
10472116245eSRalf Baechle
10485e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
10495e83d430SRalf Baechle	bool
10505e83d430SRalf Baechle
10515e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
10525e83d430SRalf Baechle	bool
10531da177e4SLinus Torvalds
10549cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
10559cffd154SDavid Daney	bool
10569cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
10579cffd154SDavid Daney	default y
10589cffd154SDavid Daney
1059aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1060aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1061aa1762f4SDavid Daney
10621da177e4SLinus Torvaldsconfig IRQ_CPU
10631da177e4SLinus Torvalds	bool
10641da177e4SLinus Torvalds
10651da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
10661da177e4SLinus Torvalds	bool
10671da177e4SLinus Torvalds
10689267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
10699267a30dSMarc St-Jean	bool
10709267a30dSMarc St-Jean
10719267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
10729267a30dSMarc St-Jean	bool
10739267a30dSMarc St-Jean
10748420fd00SAtsushi Nemotoconfig IRQ_TXX9
10758420fd00SAtsushi Nemoto	bool
10768420fd00SAtsushi Nemoto
1077d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1078d5ab1a69SYoichi Yuasa	bool
1079d5ab1a69SYoichi Yuasa
108039b8d525SRalf Baechleconfig IRQ_GIC
108139b8d525SRalf Baechle	bool
108239b8d525SRalf Baechle
10831da177e4SLinus Torvaldsconfig MIPS_BOARDS_GEN
10841da177e4SLinus Torvalds	bool
10851da177e4SLinus Torvalds
1086252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
10871da177e4SLinus Torvalds	bool
10881da177e4SLinus Torvalds
10899267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
10909267a30dSMarc St-Jean	bool
10919267a30dSMarc St-Jean
1092a83860c2SRalf Baechleconfig SOC_EMMA2RH
1093a83860c2SRalf Baechle	bool
1094a83860c2SRalf Baechle	select CEVT_R4K
1095a83860c2SRalf Baechle	select CSRC_R4K
1096a83860c2SRalf Baechle	select DMA_NONCOHERENT
1097a83860c2SRalf Baechle	select IRQ_CPU
1098a83860c2SRalf Baechle	select SWAP_IO_SPACE
1099a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1100a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1101a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1102a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1103a83860c2SRalf Baechle
1104edb6310aSDaniel Lairdconfig SOC_PNX833X
1105edb6310aSDaniel Laird	bool
1106edb6310aSDaniel Laird	select CEVT_R4K
1107edb6310aSDaniel Laird	select CSRC_R4K
1108edb6310aSDaniel Laird	select IRQ_CPU
1109edb6310aSDaniel Laird	select DMA_NONCOHERENT
1110edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1111edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1112edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1113edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1114edb6310aSDaniel Laird	select GENERIC_GPIO
1115edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1116edb6310aSDaniel Laird
1117edb6310aSDaniel Lairdconfig SOC_PNX8335
1118edb6310aSDaniel Laird	bool
1119edb6310aSDaniel Laird	select SOC_PNX833X
1120edb6310aSDaniel Laird
11211da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
11221da177e4SLinus Torvalds	bool
11231da177e4SLinus Torvalds
1124e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1125e2defae5SThomas Bogendoerfer	bool
1126e2defae5SThomas Bogendoerfer
11275b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
11285b438c44SThomas Bogendoerfer	bool
11295b438c44SThomas Bogendoerfer
1130e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1131e2defae5SThomas Bogendoerfer	bool
1132e2defae5SThomas Bogendoerfer
1133e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1134e2defae5SThomas Bogendoerfer	bool
1135e2defae5SThomas Bogendoerfer
1136e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1137e2defae5SThomas Bogendoerfer	bool
1138e2defae5SThomas Bogendoerfer
1139e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1140e2defae5SThomas Bogendoerfer	bool
1141e2defae5SThomas Bogendoerfer
1142e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1143e2defae5SThomas Bogendoerfer	bool
1144e2defae5SThomas Bogendoerfer
11450e2794b0SRalf Baechleconfig FW_ARC32
11465e83d430SRalf Baechle	bool
11475e83d430SRalf Baechle
1148aaa9fad3SPaul Bolleconfig FW_SNIPROM
1149231a35d3SThomas Bogendoerfer	bool
1150231a35d3SThomas Bogendoerfer
11511da177e4SLinus Torvaldsconfig BOOT_ELF32
11521da177e4SLinus Torvalds	bool
11531da177e4SLinus Torvalds
11541da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
11551da177e4SLinus Torvalds	int
1156c7088755SRalf Baechle	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
11570db2b74eSRalf Baechle	default "6" if MIPS_CPU_SCACHE
1158a86c7f72SDavid Daney	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
11591da177e4SLinus Torvalds	default "5"
11601da177e4SLinus Torvalds
11611da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
11621da177e4SLinus Torvalds	bool
11631da177e4SLinus Torvalds
11641da177e4SLinus Torvaldsconfig ARC_CONSOLE
11651da177e4SLinus Torvalds	bool "ARC console support"
1166e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
11671da177e4SLinus Torvalds
11681da177e4SLinus Torvaldsconfig ARC_MEMORY
11691da177e4SLinus Torvalds	bool
117014b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
11711da177e4SLinus Torvalds	default y
11721da177e4SLinus Torvalds
11731da177e4SLinus Torvaldsconfig ARC_PROMLIB
11741da177e4SLinus Torvalds	bool
1175e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
11761da177e4SLinus Torvalds	default y
11771da177e4SLinus Torvalds
11780e2794b0SRalf Baechleconfig FW_ARC64
11791da177e4SLinus Torvalds	bool
11801da177e4SLinus Torvalds
11811da177e4SLinus Torvaldsconfig BOOT_ELF64
11821da177e4SLinus Torvalds	bool
11831da177e4SLinus Torvalds
11841da177e4SLinus Torvaldsmenu "CPU selection"
11851da177e4SLinus Torvalds
11861da177e4SLinus Torvaldschoice
11871da177e4SLinus Torvalds	prompt "CPU type"
11881da177e4SLinus Torvalds	default CPU_R4X00
11891da177e4SLinus Torvalds
11903702bba5SWu Zhangjinconfig CPU_LOONGSON2E
11913702bba5SWu Zhangjin	bool "Loongson 2E"
11923702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
11933702bba5SWu Zhangjin	select CPU_LOONGSON2
11942a21c730SFuxin Zhang	help
11952a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
11962a21c730SFuxin Zhang	  with many extensions.
11972a21c730SFuxin Zhang
119825985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
11996f7a251aSWu Zhangjin	  bonito64.
12006f7a251aSWu Zhangjin
12016f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
12026f7a251aSWu Zhangjin	bool "Loongson 2F"
12036f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
12046f7a251aSWu Zhangjin	select CPU_LOONGSON2
1205c197da91SArnaud Patard	select GENERIC_GPIO
1206c197da91SArnaud Patard	select ARCH_REQUIRE_GPIOLIB
12076f7a251aSWu Zhangjin	help
12086f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
12096f7a251aSWu Zhangjin	  with many extensions.
12106f7a251aSWu Zhangjin
12116f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
12126f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
12136f7a251aSWu Zhangjin	  Loongson2E.
12146f7a251aSWu Zhangjin
1215ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1216ca585cf9SKelvin Cheung	bool "Loongson 1B"
1217ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1218ca585cf9SKelvin Cheung	select CPU_LOONGSON1
1219ca585cf9SKelvin Cheung	help
1220ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1221ca585cf9SKelvin Cheung	  release 2 instruction set.
1222ca585cf9SKelvin Cheung
12236e760c8dSRalf Baechleconfig CPU_MIPS32_R1
12246e760c8dSRalf Baechle	bool "MIPS32 Release 1"
12257cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
12266e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1227797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1228ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12296e760c8dSRalf Baechle	help
12305e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
12311e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
12321e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
12331e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
12341e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
12351e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
12361e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
12371e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
12381e5f1caaSRalf Baechle	  performance.
12391e5f1caaSRalf Baechle
12401e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
12411e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
12427cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
12431e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1244797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1245ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12461e5f1caaSRalf Baechle	help
12475e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
12486e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
12496e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
12506e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
12516e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
12521da177e4SLinus Torvalds
12536e760c8dSRalf Baechleconfig CPU_MIPS64_R1
12546e760c8dSRalf Baechle	bool "MIPS64 Release 1"
12557cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1256797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1257ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1258ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1259ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12609cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
12616e760c8dSRalf Baechle	help
12626e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
12636e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
12646e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
12656e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
12666e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
12671e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
12681e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
12691e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
12701e5f1caaSRalf Baechle	  performance.
12711e5f1caaSRalf Baechle
12721e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
12731e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
12747cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1275797798c1SRalf Baechle	select CPU_HAS_PREFETCH
12761e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
12771e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1278ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12799cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
12801e5f1caaSRalf Baechle	help
12811e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
12821e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
12831e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
12841e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
12851e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
12861da177e4SLinus Torvalds
12871da177e4SLinus Torvaldsconfig CPU_R3000
12881da177e4SLinus Torvalds	bool "R3000"
12897cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1290f7062ddbSRalf Baechle	select CPU_HAS_WB
1291ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1292797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
12931da177e4SLinus Torvalds	help
12941da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
12951da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
12961da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
12971da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
12981da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
12991da177e4SLinus Torvalds	  try to recompile with R3000.
13001da177e4SLinus Torvalds
13011da177e4SLinus Torvaldsconfig CPU_TX39XX
13021da177e4SLinus Torvalds	bool "R39XX"
13037cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1304ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
13051da177e4SLinus Torvalds
13061da177e4SLinus Torvaldsconfig CPU_VR41XX
13071da177e4SLinus Torvalds	bool "R41xx"
13087cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1309ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1310ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
13111da177e4SLinus Torvalds	help
13125e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
13131da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
13141da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
13151da177e4SLinus Torvalds	  processor or vice versa.
13161da177e4SLinus Torvalds
13171da177e4SLinus Torvaldsconfig CPU_R4300
13181da177e4SLinus Torvalds	bool "R4300"
13197cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1320ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1321ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
13221da177e4SLinus Torvalds	help
13231da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
13241da177e4SLinus Torvalds
13251da177e4SLinus Torvaldsconfig CPU_R4X00
13261da177e4SLinus Torvalds	bool "R4x00"
13277cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1328ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1329ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1330970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13311da177e4SLinus Torvalds	help
13321da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
13331da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
13341da177e4SLinus Torvalds
13351da177e4SLinus Torvaldsconfig CPU_TX49XX
13361da177e4SLinus Torvalds	bool "R49XX"
13377cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1338de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1339ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1340ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1341970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13421da177e4SLinus Torvalds
13431da177e4SLinus Torvaldsconfig CPU_R5000
13441da177e4SLinus Torvalds	bool "R5000"
13457cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1346ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1347ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1348970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13491da177e4SLinus Torvalds	help
13501da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
13511da177e4SLinus Torvalds
13521da177e4SLinus Torvaldsconfig CPU_R5432
13531da177e4SLinus Torvalds	bool "R5432"
13547cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
13555e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
13565e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1357970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13581da177e4SLinus Torvalds
1359542c1020SShinya Kuribayashiconfig CPU_R5500
1360542c1020SShinya Kuribayashi	bool "R5500"
1361542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1362542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1363542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
13649cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1365542c1020SShinya Kuribayashi	help
1366542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1367542c1020SShinya Kuribayashi	  instruction set.
1368542c1020SShinya Kuribayashi
13691da177e4SLinus Torvaldsconfig CPU_R6000
13701da177e4SLinus Torvalds	bool "R6000"
13717cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R6000
1372ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
13731da177e4SLinus Torvalds	help
13741da177e4SLinus Torvalds	  MIPS Technologies R6000 and R6000A series processors.  Note these
1375c09b47d8SChris Dearman	  processors are extremely rare and the support for them is incomplete.
13761da177e4SLinus Torvalds
13771da177e4SLinus Torvaldsconfig CPU_NEVADA
13781da177e4SLinus Torvalds	bool "RM52xx"
13797cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1380ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1381ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1382970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
13831da177e4SLinus Torvalds	help
13841da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
13851da177e4SLinus Torvalds
13861da177e4SLinus Torvaldsconfig CPU_R8000
13871da177e4SLinus Torvalds	bool "R8000"
13887cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
13895e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1390ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
13911da177e4SLinus Torvalds	help
13921da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
13931da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
13941da177e4SLinus Torvalds
13951da177e4SLinus Torvaldsconfig CPU_R10000
13961da177e4SLinus Torvalds	bool "R10000"
13977cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
13985e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1399ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1400ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1401797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1402970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14031da177e4SLinus Torvalds	help
14041da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
14051da177e4SLinus Torvalds
14061da177e4SLinus Torvaldsconfig CPU_RM7000
14071da177e4SLinus Torvalds	bool "RM7000"
14087cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
14095e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1410ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1411ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1412797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1413970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14141da177e4SLinus Torvalds
14151da177e4SLinus Torvaldsconfig CPU_SB1
14161da177e4SLinus Torvalds	bool "SB1"
14177cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1418ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1419ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1420797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1421970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14220004a9dfSRalf Baechle	select WEAK_ORDERING
14231da177e4SLinus Torvalds
1424a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1425a86c7f72SDavid Daney	bool "Cavium Octeon processor"
14265e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
14277ee91de4SYoichi Yuasa	select ARCH_SPARSEMEM_ENABLE
1428a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1429a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1430a86c7f72SDavid Daney	select SYS_SUPPORTS_SMP
1431a86c7f72SDavid Daney	select NR_CPUS_DEFAULT_16
1432a86c7f72SDavid Daney	select WEAK_ORDERING
1433a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
14349cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14357ed18152SDavid Daney	select LIBFDT
14367ed18152SDavid Daney	select USE_OF
1437a86c7f72SDavid Daney	help
1438a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1439a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1440a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1441a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1442a86c7f72SDavid Daney
1443c1c0c461SKevin Cernekeeconfig CPU_BMIPS3300
1444c1c0c461SKevin Cernekee	bool "BMIPS3300"
1445c1c0c461SKevin Cernekee	depends on SYS_HAS_CPU_BMIPS3300
14461bbb6c1bSKevin Cernekee	select CPU_BMIPS
1447c1c0c461SKevin Cernekee	help
1448c1c0c461SKevin Cernekee	  Broadcom BMIPS3300 processors.
1449c1c0c461SKevin Cernekee
1450c1c0c461SKevin Cernekeeconfig CPU_BMIPS4350
1451c1c0c461SKevin Cernekee	bool "BMIPS4350"
1452c1c0c461SKevin Cernekee	depends on SYS_HAS_CPU_BMIPS4350
14531bbb6c1bSKevin Cernekee	select CPU_BMIPS
1454c1c0c461SKevin Cernekee	select SYS_SUPPORTS_SMP
1455c1c0c461SKevin Cernekee	select SYS_SUPPORTS_HOTPLUG_CPU
1456c1c0c461SKevin Cernekee	help
1457c1c0c461SKevin Cernekee	  Broadcom BMIPS4350 ("VIPER") processors.
1458c1c0c461SKevin Cernekee
1459c1c0c461SKevin Cernekeeconfig CPU_BMIPS4380
1460c1c0c461SKevin Cernekee	bool "BMIPS4380"
1461c1c0c461SKevin Cernekee	depends on SYS_HAS_CPU_BMIPS4380
14621bbb6c1bSKevin Cernekee	select CPU_BMIPS
1463c1c0c461SKevin Cernekee	select SYS_SUPPORTS_SMP
1464c1c0c461SKevin Cernekee	select SYS_SUPPORTS_HOTPLUG_CPU
1465c1c0c461SKevin Cernekee	help
1466c1c0c461SKevin Cernekee	  Broadcom BMIPS4380 processors.
1467c1c0c461SKevin Cernekee
1468c1c0c461SKevin Cernekeeconfig CPU_BMIPS5000
1469c1c0c461SKevin Cernekee	bool "BMIPS5000"
1470c1c0c461SKevin Cernekee	depends on SYS_HAS_CPU_BMIPS5000
14711bbb6c1bSKevin Cernekee	select CPU_BMIPS
1472c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
14731bbb6c1bSKevin Cernekee	select MIPS_CPU_SCACHE
1474c1c0c461SKevin Cernekee	select SYS_SUPPORTS_SMP
1475c1c0c461SKevin Cernekee	select SYS_SUPPORTS_HOTPLUG_CPU
1476c1c0c461SKevin Cernekee	help
1477c1c0c461SKevin Cernekee	  Broadcom BMIPS5000 processors.
1478c1c0c461SKevin Cernekee
14797f058e85SJayachandran Cconfig CPU_XLR
14807f058e85SJayachandran C	bool "Netlogic XLR SoC"
14817f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
14827f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
14837f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
14847f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1485970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
14867f058e85SJayachandran C	select WEAK_ORDERING
14877f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
14887f058e85SJayachandran C	help
14897f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
14901c773ea4SJayachandran C
14911c773ea4SJayachandran Cconfig CPU_XLP
14921c773ea4SJayachandran C	bool "Netlogic XLP SoC"
14931c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
14941c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
14951c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
14961c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
14971c773ea4SJayachandran C	select WEAK_ORDERING
14981c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
14991c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1500d6504846SJayachandran C	select CPU_MIPSR2
15011c773ea4SJayachandran C	help
15021c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
15031da177e4SLinus Torvaldsendchoice
15041da177e4SLinus Torvalds
1505622844bfSWu Zhangjinif CPU_LOONGSON2F
1506622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1507622844bfSWu Zhangjin	bool
1508622844bfSWu Zhangjin
1509622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1510622844bfSWu Zhangjin	bool
1511622844bfSWu Zhangjin
1512622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1513622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1514622844bfSWu Zhangjin	default y
1515622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1516622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1517622844bfSWu Zhangjin	help
1518622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1519622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1520622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1521622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1522622844bfSWu Zhangjin
1523622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1524622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1525622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1526622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1527622844bfSWu Zhangjin	  systems.
1528622844bfSWu Zhangjin
1529622844bfSWu Zhangjin	  If unsure, please say Y.
1530622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1531622844bfSWu Zhangjin
15321b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
15331b93b3c3SWu Zhangjin	bool
15341b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
15351b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
15361b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1537fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
15381b93b3c3SWu Zhangjin
15391b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
15401b93b3c3SWu Zhangjin	bool
15411b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
15421b93b3c3SWu Zhangjin
15433702bba5SWu Zhangjinconfig CPU_LOONGSON2
15443702bba5SWu Zhangjin	bool
15453702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
15463702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
15473702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1548970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15493702bba5SWu Zhangjin
1550ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1551ca585cf9SKelvin Cheung	bool
1552ca585cf9SKelvin Cheung	select CPU_MIPS32
1553ca585cf9SKelvin Cheung	select CPU_MIPSR2
1554ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1555ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1556ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1557ca585cf9SKelvin Cheung
15581bbb6c1bSKevin Cernekeeconfig CPU_BMIPS
15591bbb6c1bSKevin Cernekee	bool
15601bbb6c1bSKevin Cernekee	select CPU_MIPS32
15611bbb6c1bSKevin Cernekee	select CPU_SUPPORTS_32BIT_KERNEL
15621bbb6c1bSKevin Cernekee	select DMA_NONCOHERENT
15631bbb6c1bSKevin Cernekee	select IRQ_CPU
15641bbb6c1bSKevin Cernekee	select SWAP_IO_SPACE
15651bbb6c1bSKevin Cernekee	select WEAK_ORDERING
15661bbb6c1bSKevin Cernekee
15673702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
15682a21c730SFuxin Zhang	bool
15692a21c730SFuxin Zhang
15706f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
15716f7a251aSWu Zhangjin	bool
157255045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
157355045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
157422f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
15756f7a251aSWu Zhangjin
1576ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1577ca585cf9SKelvin Cheung	bool
1578ca585cf9SKelvin Cheung
15797cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
15807cf8053bSRalf Baechle	bool
15817cf8053bSRalf Baechle
15827cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
15837cf8053bSRalf Baechle	bool
15847cf8053bSRalf Baechle
15857cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
15867cf8053bSRalf Baechle	bool
15877cf8053bSRalf Baechle
15887cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
15897cf8053bSRalf Baechle	bool
15907cf8053bSRalf Baechle
15917cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
15927cf8053bSRalf Baechle	bool
15937cf8053bSRalf Baechle
15947cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
15957cf8053bSRalf Baechle	bool
15967cf8053bSRalf Baechle
15977cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
15987cf8053bSRalf Baechle	bool
15997cf8053bSRalf Baechle
16007cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
16017cf8053bSRalf Baechle	bool
16027cf8053bSRalf Baechle
16037cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
16047cf8053bSRalf Baechle	bool
16057cf8053bSRalf Baechle
16067cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
16077cf8053bSRalf Baechle	bool
16087cf8053bSRalf Baechle
16097cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
16107cf8053bSRalf Baechle	bool
16117cf8053bSRalf Baechle
16127cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
16137cf8053bSRalf Baechle	bool
16147cf8053bSRalf Baechle
1615542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1616542c1020SShinya Kuribayashi	bool
1617542c1020SShinya Kuribayashi
16187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R6000
16197cf8053bSRalf Baechle	bool
16207cf8053bSRalf Baechle
16217cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
16227cf8053bSRalf Baechle	bool
16237cf8053bSRalf Baechle
16247cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
16257cf8053bSRalf Baechle	bool
16267cf8053bSRalf Baechle
16277cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
16287cf8053bSRalf Baechle	bool
16297cf8053bSRalf Baechle
16307cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
16317cf8053bSRalf Baechle	bool
16327cf8053bSRalf Baechle
16337cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
16347cf8053bSRalf Baechle	bool
16357cf8053bSRalf Baechle
16365e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
16375e683389SDavid Daney	bool
16385e683389SDavid Daney
1639c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS3300
1640c1c0c461SKevin Cernekee	bool
1641c1c0c461SKevin Cernekee
1642c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1643c1c0c461SKevin Cernekee	bool
1644c1c0c461SKevin Cernekee
1645c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1646c1c0c461SKevin Cernekee	bool
1647c1c0c461SKevin Cernekee
1648c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1649c1c0c461SKevin Cernekee	bool
1650c1c0c461SKevin Cernekee
16517f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
16527f058e85SJayachandran C	bool
16537f058e85SJayachandran C
16541c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
16551c773ea4SJayachandran C	bool
16561c773ea4SJayachandran C
165717099b11SRalf Baechle#
165817099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
165917099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
166017099b11SRalf Baechle#
16610004a9dfSRalf Baechleconfig WEAK_ORDERING
16620004a9dfSRalf Baechle	bool
166317099b11SRalf Baechle
166417099b11SRalf Baechle#
166517099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
166617099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
166717099b11SRalf Baechle#
166817099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
166917099b11SRalf Baechle	bool
16705e83d430SRalf Baechleendmenu
16715e83d430SRalf Baechle
16725e83d430SRalf Baechle#
16735e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
16745e83d430SRalf Baechle#
16755e83d430SRalf Baechleconfig CPU_MIPS32
16765e83d430SRalf Baechle	bool
16775e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
16785e83d430SRalf Baechle
16795e83d430SRalf Baechleconfig CPU_MIPS64
16805e83d430SRalf Baechle	bool
16815e83d430SRalf Baechle	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
16825e83d430SRalf Baechle
16835e83d430SRalf Baechle#
1684c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
16855e83d430SRalf Baechle#
16865e83d430SRalf Baechleconfig CPU_MIPSR1
16875e83d430SRalf Baechle	bool
16885e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
16895e83d430SRalf Baechle
16905e83d430SRalf Baechleconfig CPU_MIPSR2
16915e83d430SRalf Baechle	bool
1692a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
16935e83d430SRalf Baechle
16945e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
16955e83d430SRalf Baechle	bool
16965e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
16975e83d430SRalf Baechle	bool
16985e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
16995e83d430SRalf Baechle	bool
17005e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
17015e83d430SRalf Baechle	bool
170255045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
170355045ff5SWu Zhangjin	bool
170455045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
170555045ff5SWu Zhangjin	bool
17069cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
17079cffd154SDavid Daney	bool
170822f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
170922f1fdfdSWu Zhangjin	bool
171082622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
171182622284SDavid Daney	bool
1712d6504846SJayachandran C	default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
17135e83d430SRalf Baechle
17148192c9eaSDavid Daney#
17158192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
17168192c9eaSDavid Daney#
17178192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
17188192c9eaSDavid Daney       bool
1719f839490aSDavid Daney       default y if CPU_MIPSR1 || CPU_MIPSR2
17208192c9eaSDavid Daney
17215e83d430SRalf Baechlemenu "Kernel type"
17225e83d430SRalf Baechle
17235e83d430SRalf Baechlechoice
17245e83d430SRalf Baechle	prompt "Kernel code model"
17255e83d430SRalf Baechle	help
17265e83d430SRalf Baechle	  You should only select this option if you have a workload that
17275e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
17285e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
17295e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
17305e83d430SRalf Baechle
17315e83d430SRalf Baechleconfig 32BIT
17325e83d430SRalf Baechle	bool "32-bit kernel"
17335e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
17345e83d430SRalf Baechle	select TRAD_SIGNALS
17355e83d430SRalf Baechle	help
17365e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
17375e83d430SRalf Baechleconfig 64BIT
17385e83d430SRalf Baechle	bool "64-bit kernel"
17395e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1740dbda6ac0SRalf Baechle	select HAVE_SYSCALL_WRAPPERS
17415e83d430SRalf Baechle	help
17425e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
17435e83d430SRalf Baechle
17445e83d430SRalf Baechleendchoice
17455e83d430SRalf Baechle
17461da177e4SLinus Torvaldschoice
17471da177e4SLinus Torvalds	prompt "Kernel page size"
17481da177e4SLinus Torvalds	default PAGE_SIZE_4KB
17491da177e4SLinus Torvalds
17501da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
17511da177e4SLinus Torvalds	bool "4kB"
1752315fe625SWu Zhangjin	depends on !CPU_LOONGSON2
17531da177e4SLinus Torvalds	help
17541da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
17551da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
17561da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
17571da177e4SLinus Torvalds	 recommended for low memory systems.
17581da177e4SLinus Torvalds
17591da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
17601da177e4SLinus Torvalds	bool "8kB"
17617d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
17621da177e4SLinus Torvalds	help
17631da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
17641da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
1765c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
1766c52399beSRalf Baechle	  suitable Linux distribution to support this.
17671da177e4SLinus Torvalds
17681da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
17691da177e4SLinus Torvalds	bool "16kB"
1770714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
17711da177e4SLinus Torvalds	help
17721da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
17731da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
1774714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
1775714bfad6SRalf Baechle	  Linux distribution to support this.
17761da177e4SLinus Torvalds
1777c52399beSRalf Baechleconfig PAGE_SIZE_32KB
1778c52399beSRalf Baechle	bool "32kB"
1779c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
1780c52399beSRalf Baechle	help
1781c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
1782c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
1783c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
1784c52399beSRalf Baechle	  distribution to support this.
1785c52399beSRalf Baechle
17861da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
17871da177e4SLinus Torvalds	bool "64kB"
17887d60717eSKees Cook	depends on !CPU_R3000 && !CPU_TX39XX
17891da177e4SLinus Torvalds	help
17901da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
17911da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
17921da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
1793714bfad6SRalf Baechle	  writing this option is still high experimental.
17941da177e4SLinus Torvalds
17951da177e4SLinus Torvaldsendchoice
17961da177e4SLinus Torvalds
1797c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
1798c9bace7cSDavid Daney	int "Maximum zone order"
179985f993b8SDavid Daney	range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB
180085f993b8SDavid Daney	default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB
180185f993b8SDavid Daney	range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB
180285f993b8SDavid Daney	default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB
180385f993b8SDavid Daney	range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB
180485f993b8SDavid Daney	default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB
1805c9bace7cSDavid Daney	range 11 64
1806c9bace7cSDavid Daney	default "11"
1807c9bace7cSDavid Daney	help
1808c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
1809c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
1810c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
1811c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
1812c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
1813c9bace7cSDavid Daney	  increase this value.
1814c9bace7cSDavid Daney
1815c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
1816c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
1817c9bace7cSDavid Daney
1818c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
1819c9bace7cSDavid Daney	  when choosing a value for this option.
1820c9bace7cSDavid Daney
18211da177e4SLinus Torvaldsconfig BOARD_SCACHE
18221da177e4SLinus Torvalds	bool
18231da177e4SLinus Torvalds
18241da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
18251da177e4SLinus Torvalds	bool
18261da177e4SLinus Torvalds	select BOARD_SCACHE
18271da177e4SLinus Torvalds
18289318c51aSChris Dearman#
18299318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
18309318c51aSChris Dearman#
18319318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
18329318c51aSChris Dearman	bool
18339318c51aSChris Dearman	select BOARD_SCACHE
18349318c51aSChris Dearman
18351da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
18361da177e4SLinus Torvalds	bool
18371da177e4SLinus Torvalds	select BOARD_SCACHE
18381da177e4SLinus Torvalds
18391da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
18401da177e4SLinus Torvalds	bool
18411da177e4SLinus Torvalds	select BOARD_SCACHE
18421da177e4SLinus Torvalds
18431da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
18441da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
18451da177e4SLinus Torvalds	depends on CPU_SB1
18461da177e4SLinus Torvalds	help
18471da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
18481da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
18491da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
18501da177e4SLinus Torvalds
18511da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
1852c8094b53SRalf Baechle	bool
18531da177e4SLinus Torvalds
18543165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
18553165c846SFlorian Fainelli	bool
18563165c846SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
18573165c846SFlorian Fainelli
185891405eb6SFlorian Fainelliconfig CPU_R4K_FPU
185991405eb6SFlorian Fainelli	bool
186091405eb6SFlorian Fainelli	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
186191405eb6SFlorian Fainelli
186262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
186362cedc4fSFlorian Fainelli	bool
186462cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
186562cedc4fSFlorian Fainelli
1866340ee4b9SRalf Baechlechoice
1867340ee4b9SRalf Baechle	prompt "MIPS MT options"
1868f41ae0b2SRalf Baechle
1869f41ae0b2SRalf Baechleconfig MIPS_MT_DISABLED
1870f41ae0b2SRalf Baechle	bool "Disable multithreading support."
1871f41ae0b2SRalf Baechle	help
1872f41ae0b2SRalf Baechle	  Use this option if your workload can't take advantage of
1873f41ae0b2SRalf Baechle	  MIPS hardware multithreading support.  On systems that don't have
1874f41ae0b2SRalf Baechle	  the option of an MT-enabled processor this option will be the only
1875f41ae0b2SRalf Baechle	  option in this menu.
1876340ee4b9SRalf Baechle
187759d6ab86SRalf Baechleconfig MIPS_MT_SMP
187859d6ab86SRalf Baechle	bool "Use 1 TC on each available VPE for SMP"
187959d6ab86SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
188059d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
1881d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
188259d6ab86SRalf Baechle	select MIPS_MT
1883f510aa3bSRalf Baechle	select NR_CPUS_DEFAULT_2
188459d6ab86SRalf Baechle	select SMP
18850ab7aefcSRalf Baechle	select SYS_SUPPORTS_SCHED_SMT if SMP
188659d6ab86SRalf Baechle	select SYS_SUPPORTS_SMP
188787353d8aSRalf Baechle	select SMP_UP
1888399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
188959d6ab86SRalf Baechle	help
189025f12b33SRalf Baechle	  This is a kernel model which is known a VSMP but lately has been
189125f12b33SRalf Baechle	  marketesed into SMVP.
189225f12b33SRalf Baechle	  Virtual SMP uses the processor's VPEs  to implement virtual
189325f12b33SRalf Baechle	  processors. In currently available configuration of the 34K processor
189425f12b33SRalf Baechle	  this allows for a dual processor. Both processors will share the same
189525f12b33SRalf Baechle	  primary caches; each will obtain the half of the TLB for it's own
189625f12b33SRalf Baechle	  exclusive use. For a layman this model can be described as similar to
189725f12b33SRalf Baechle	  what Intel calls Hyperthreading.
189825f12b33SRalf Baechle
189925f12b33SRalf Baechle	  For further information see http://www.linux-mips.org/wiki/34K#VSMP
190059d6ab86SRalf Baechle
190141c594abSRalf Baechleconfig MIPS_MT_SMTC
190241c594abSRalf Baechle	bool "SMTC: Use all TCs on all VPEs for SMP"
1903f41ae0b2SRalf Baechle	depends on CPU_MIPS32_R2
1904f41ae0b2SRalf Baechle	#depends on CPU_MIPS64_R2		# once there is hardware ...
1905f41ae0b2SRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
1906f7062ddbSRalf Baechle	select CPU_MIPSR2_IRQ_VI
1907d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
1908f41ae0b2SRalf Baechle	select MIPS_MT
1909130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_8
191041c594abSRalf Baechle	select SMP
191173b76c78SRalf Baechle	select SYS_SUPPORTS_SMP
191287353d8aSRalf Baechle	select SMP_UP
1913f41ae0b2SRalf Baechle	help
1914f41ae0b2SRalf Baechle	  This is a kernel model which is known a SMTC or lately has been
1915f41ae0b2SRalf Baechle	  marketesed into SMVP.
191625f12b33SRalf Baechle	  is presenting the available TC's of the core as processors to Linux.
191725f12b33SRalf Baechle	  On currently available 34K processors this means a Linux system will
191825f12b33SRalf Baechle	  see up to 5 processors. The implementation of the SMTC kernel differs
191925f12b33SRalf Baechle	  significantly from VSMP and cannot efficiently coexist in the same
192025f12b33SRalf Baechle	  kernel binary so the choice between VSMP and SMTC is a compile time
192125f12b33SRalf Baechle	  decision.
192225f12b33SRalf Baechle
192325f12b33SRalf Baechle	  For further information see http://www.linux-mips.org/wiki/34K#SMTC
192441c594abSRalf Baechle
1925340ee4b9SRalf Baechleendchoice
1926340ee4b9SRalf Baechle
1927f41ae0b2SRalf Baechleconfig MIPS_MT
1928f41ae0b2SRalf Baechle	bool
1929f41ae0b2SRalf Baechle
19300ab7aefcSRalf Baechleconfig SCHED_SMT
19310ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
19320ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
19330ab7aefcSRalf Baechle	default n
19340ab7aefcSRalf Baechle	help
19350ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
19360ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
19370ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
19380ab7aefcSRalf Baechle
19390ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
19400ab7aefcSRalf Baechle	bool
19410ab7aefcSRalf Baechle
1942f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
1943f41ae0b2SRalf Baechle	bool
1944f41ae0b2SRalf Baechle
1945f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
1946f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
1947f088fc84SRalf Baechle	default y
194807cc0c9eSRalf Baechle	depends on MIPS_MT_SMP || MIPS_MT_SMTC
194907cc0c9eSRalf Baechle
195007cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
195107cc0c9eSRalf Baechle	bool "VPE loader support."
195207cc0c9eSRalf Baechle	depends on SYS_SUPPORTS_MULTITHREADING
195307cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
195407cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
195507cc0c9eSRalf Baechle	select MIPS_MT
195607cc0c9eSRalf Baechle	help
195707cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
195807cc0c9eSRalf Baechle	  onto another VPE and running it.
1959f088fc84SRalf Baechle
19600db34215SKevin D. Kissellconfig MIPS_MT_SMTC_IM_BACKSTOP
19610db34215SKevin D. Kissell	bool "Use per-TC register bits as backstop for inhibited IM bits"
19620db34215SKevin D. Kissell	depends on MIPS_MT_SMTC
19638531a35eSKevin D. Kissell	default n
19640db34215SKevin D. Kissell	help
19650db34215SKevin D. Kissell	  To support multiple TC microthreads acting as "CPUs" within
19660db34215SKevin D. Kissell	  a VPE, VPE-wide interrupt mask bits must be specially manipulated
19670db34215SKevin D. Kissell	  during interrupt handling. To support legacy drivers and interrupt
19680db34215SKevin D. Kissell	  controller management code, SMTC has a "backstop" to track and
19690db34215SKevin D. Kissell	  if necessary restore the interrupt mask. This has some performance
19708531a35eSKevin D. Kissell	  impact on interrupt service overhead.
19710db34215SKevin D. Kissell
1972f571eff0SKevin D. Kissellconfig MIPS_MT_SMTC_IRQAFF
1973f571eff0SKevin D. Kissell	bool "Support IRQ affinity API"
1974f571eff0SKevin D. Kissell	depends on MIPS_MT_SMTC
1975f571eff0SKevin D. Kissell	default n
1976f571eff0SKevin D. Kissell	help
1977f571eff0SKevin D. Kissell	  Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1978f571eff0SKevin D. Kissell	  for SMTC Linux kernel. Requires platform support, of which
1979f571eff0SKevin D. Kissell	  an example can be found in the MIPS kernel i8259 and Malta
19808531a35eSKevin D. Kissell	  platform code.  Adds some overhead to interrupt dispatch, and
19818531a35eSKevin D. Kissell	  should be used only if you know what you are doing.
1982f571eff0SKevin D. Kissell
1983e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
1984e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
1985e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
1986e01402b1SRalf Baechle	default y
1987e01402b1SRalf Baechle	help
1988e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
1989e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
1990e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
1991e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
1992e01402b1SRalf Baechle
1993e01402b1SRalf Baechle# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1994e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
1995e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
1996e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
19975e83d430SRalf Baechle	help
1998e01402b1SRalf Baechle
19994a16ff4cSRalf Baechleconfig MIPS_CMP
20004a16ff4cSRalf Baechle	bool "MIPS CMP framework support"
20014a16ff4cSRalf Baechle	depends on SYS_SUPPORTS_MIPS_CMP
2002eb9b5141STim Anderson	select SYNC_R4K
20034a16ff4cSRalf Baechle	select SYS_SUPPORTS_SMP
20044a16ff4cSRalf Baechle	select SYS_SUPPORTS_SCHED_SMT if SMP
20054a16ff4cSRalf Baechle	select WEAK_ORDERING
20064a16ff4cSRalf Baechle	default n
20074a16ff4cSRalf Baechle	help
20084a16ff4cSRalf Baechle	  This is a placeholder option for the GCMP work. It will need to
20094a16ff4cSRalf Baechle	  be handled differently...
20104a16ff4cSRalf Baechle
20111da177e4SLinus Torvaldsconfig SB1_PASS_1_WORKAROUNDS
20121da177e4SLinus Torvalds	bool
20131da177e4SLinus Torvalds	depends on CPU_SB1_PASS_1
20141da177e4SLinus Torvalds	default y
20151da177e4SLinus Torvalds
20161da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
20171da177e4SLinus Torvalds	bool
20181da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
20191da177e4SLinus Torvalds	default y
20201da177e4SLinus Torvalds
20211da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
20221da177e4SLinus Torvalds	bool
20231da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
20241da177e4SLinus Torvalds	default y
20251da177e4SLinus Torvalds
20261da177e4SLinus Torvaldsconfig 64BIT_PHYS_ADDR
2027d806cb2bSRalf Baechle	bool
20281da177e4SLinus Torvalds
202960ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
203060ec6571Spascal@pabr.org       def_bool 64BIT_PHYS_ADDR
203160ec6571Spascal@pabr.org
20329693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
20339693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
20349693a853SFranck Bui-Huu	bool "Support for the SmartMIPS ASE"
20359693a853SFranck Bui-Huu	help
20369693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
20379693a853SFranck Bui-Huu	  increased security at both hardware and software level for
20389693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
20399693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
20409693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
20419693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
20429693a853SFranck Bui-Huu	  here.
20439693a853SFranck Bui-Huu
2044*bce86083SSteven J. Hillconfig CPU_MICROMIPS
2045*bce86083SSteven J. Hill	depends on SYS_SUPPORTS_MICROMIPS
2046*bce86083SSteven J. Hill	bool "Build kernel using microMIPS ISA"
2047*bce86083SSteven J. Hill	help
2048*bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2049*bce86083SSteven J. Hill	  microMIPS ISA
2050*bce86083SSteven J. Hill
20511da177e4SLinus Torvaldsconfig CPU_HAS_WB
2052f7062ddbSRalf Baechle	bool
2053e01402b1SRalf Baechle
2054df0ac8a4SKevin Cernekeeconfig XKS01
2055df0ac8a4SKevin Cernekee	bool
2056df0ac8a4SKevin Cernekee
2057f41ae0b2SRalf Baechle#
2058f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2059f41ae0b2SRalf Baechle#
2060e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2061f41ae0b2SRalf Baechle	bool
2062e01402b1SRalf Baechle
2063f41ae0b2SRalf Baechle#
2064f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2065f41ae0b2SRalf Baechle#
2066e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2067f41ae0b2SRalf Baechle	bool
2068e01402b1SRalf Baechle
20691da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
20701da177e4SLinus Torvalds	bool
20711da177e4SLinus Torvalds	depends on !CPU_R3000
20721da177e4SLinus Torvalds	default y
20731da177e4SLinus Torvalds
20741da177e4SLinus Torvalds#
207520d60d99SMaciej W. Rozycki# CPU non-features
207620d60d99SMaciej W. Rozycki#
207720d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
207820d60d99SMaciej W. Rozycki	bool
207920d60d99SMaciej W. Rozycki
208020d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
208120d60d99SMaciej W. Rozycki	bool
208220d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
208320d60d99SMaciej W. Rozycki
208420d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
208520d60d99SMaciej W. Rozycki	bool
208620d60d99SMaciej W. Rozycki
208720d60d99SMaciej W. Rozycki#
20881da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
20891da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
20901da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
20911da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
20921da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
20931da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
20941da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
20951da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2096797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2097797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2098797798c1SRalf Baechle#   support.
20991da177e4SLinus Torvalds#
21001da177e4SLinus Torvaldsconfig HIGHMEM
21011da177e4SLinus Torvalds	bool "High Memory Support"
2102797798c1SRalf Baechle	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
2103797798c1SRalf Baechle
2104797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2105797798c1SRalf Baechle	bool
2106797798c1SRalf Baechle
2107797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2108797798c1SRalf Baechle	bool
21091da177e4SLinus Torvalds
21109693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
21119693a853SFranck Bui-Huu	bool
21129693a853SFranck Bui-Huu
2113a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2114a6a4834cSSteven J. Hill	bool
2115a6a4834cSSteven J. Hill
2116b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2117b4819b59SYoichi Yuasa	def_bool y
2118f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2119b4819b59SYoichi Yuasa
2120d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2121d8cb4e11SRalf Baechle	bool
2122d8cb4e11SRalf Baechle	default y if SGI_IP27
2123d8cb4e11SRalf Baechle	help
21243dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2125d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2126d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2127d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2128d8cb4e11SRalf Baechle
2129b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2130b1c6cd42SAtsushi Nemoto	bool
21317de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
213231473747SAtsushi Nemoto
2133d8cb4e11SRalf Baechleconfig NUMA
2134d8cb4e11SRalf Baechle	bool "NUMA Support"
2135d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2136d8cb4e11SRalf Baechle	help
2137d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2138d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2139d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2140d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2141d8cb4e11SRalf Baechle	  disabled.
2142d8cb4e11SRalf Baechle
2143d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2144d8cb4e11SRalf Baechle	bool
2145d8cb4e11SRalf Baechle
2146c80d79d7SYasunori Gotoconfig NODES_SHIFT
2147c80d79d7SYasunori Goto	int
2148c80d79d7SYasunori Goto	default "6"
2149c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2150c80d79d7SYasunori Goto
215114f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
215214f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
21534be3d2f3SZi Shen Lim	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
215414f70012SDeng-Cheng Zhu	default y
215514f70012SDeng-Cheng Zhu	help
215614f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
215714f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
215814f70012SDeng-Cheng Zhu
2159b4819b59SYoichi Yuasasource "mm/Kconfig"
2160b4819b59SYoichi Yuasa
21611da177e4SLinus Torvaldsconfig SMP
21621da177e4SLinus Torvalds	bool "Multi-Processing support"
2163e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
21642f304c0aSJens Axboe	select USE_GENERIC_SMP_HELPERS
2165e73ea273SRalf Baechle	help
21661da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
21671da177e4SLinus Torvalds	  a system with only one CPU, like most personal computers, say N. If
21681da177e4SLinus Torvalds	  you have a system with more than one CPU, say Y.
21691da177e4SLinus Torvalds
21701da177e4SLinus Torvalds	  If you say N here, the kernel will run on single and multiprocessor
21711da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
21721da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
21731da177e4SLinus Torvalds	  singleprocessor machines. On a singleprocessor machine, the kernel
21741da177e4SLinus Torvalds	  will run faster if you say N here.
21751da177e4SLinus Torvalds
21761da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
21771da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
21781da177e4SLinus Torvalds
217903502faaSAdrian Bunk	  See also the SMP-HOWTO available at
218003502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
21811da177e4SLinus Torvalds
21821da177e4SLinus Torvalds	  If you don't know what to do here, say N.
21831da177e4SLinus Torvalds
218487353d8aSRalf Baechleconfig SMP_UP
218587353d8aSRalf Baechle	bool
218687353d8aSRalf Baechle
21874a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
21884a16ff4cSRalf Baechle	bool
21894a16ff4cSRalf Baechle
2190e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2191e73ea273SRalf Baechle	bool
2192e73ea273SRalf Baechle
219372ede9b1SAtsushi Nemotoconfig NR_CPUS_DEFAULT_1
219472ede9b1SAtsushi Nemoto	bool
219572ede9b1SAtsushi Nemoto
2196130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_2
2197130e2fb7SRalf Baechle	bool
2198130e2fb7SRalf Baechle
2199130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2200130e2fb7SRalf Baechle	bool
2201130e2fb7SRalf Baechle
2202130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2203130e2fb7SRalf Baechle	bool
2204130e2fb7SRalf Baechle
2205130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2206130e2fb7SRalf Baechle	bool
2207130e2fb7SRalf Baechle
2208130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2209130e2fb7SRalf Baechle	bool
2210130e2fb7SRalf Baechle
2211130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2212130e2fb7SRalf Baechle	bool
2213130e2fb7SRalf Baechle
22141da177e4SLinus Torvaldsconfig NR_CPUS
22151da177e4SLinus Torvalds	int "Maximum number of CPUs (2-64)"
221672ede9b1SAtsushi Nemoto	range 1 64 if NR_CPUS_DEFAULT_1
22171da177e4SLinus Torvalds	depends on SMP
221872ede9b1SAtsushi Nemoto	default "1" if NR_CPUS_DEFAULT_1
2219130e2fb7SRalf Baechle	default "2" if NR_CPUS_DEFAULT_2
2220130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2221130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2222130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2223130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2224130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
22251da177e4SLinus Torvalds	help
22261da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
22271da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
22281da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
222972ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
223072ede9b1SAtsushi Nemoto	  and 2 for all others.
22311da177e4SLinus Torvalds
22321da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
223372ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
223472ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
223572ede9b1SAtsushi Nemoto	  power of two.
22361da177e4SLinus Torvalds
2237399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2238399aaa25SAl Cooper	bool
2239399aaa25SAl Cooper
22401723b4a3SAtsushi Nemoto#
22411723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
22421723b4a3SAtsushi Nemoto#
22431723b4a3SAtsushi Nemoto
22441723b4a3SAtsushi Nemotochoice
22451723b4a3SAtsushi Nemoto	prompt "Timer frequency"
22461723b4a3SAtsushi Nemoto	default HZ_250
22471723b4a3SAtsushi Nemoto	help
22481723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
22491723b4a3SAtsushi Nemoto
22501723b4a3SAtsushi Nemoto	config HZ_48
22510f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
22521723b4a3SAtsushi Nemoto
22531723b4a3SAtsushi Nemoto	config HZ_100
22541723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
22551723b4a3SAtsushi Nemoto
22561723b4a3SAtsushi Nemoto	config HZ_128
22571723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
22581723b4a3SAtsushi Nemoto
22591723b4a3SAtsushi Nemoto	config HZ_250
22601723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
22611723b4a3SAtsushi Nemoto
22621723b4a3SAtsushi Nemoto	config HZ_256
22631723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
22641723b4a3SAtsushi Nemoto
22651723b4a3SAtsushi Nemoto	config HZ_1000
22661723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
22671723b4a3SAtsushi Nemoto
22681723b4a3SAtsushi Nemoto	config HZ_1024
22691723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
22701723b4a3SAtsushi Nemoto
22711723b4a3SAtsushi Nemotoendchoice
22721723b4a3SAtsushi Nemoto
22731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
22741723b4a3SAtsushi Nemoto	bool
22751723b4a3SAtsushi Nemoto
22761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
22771723b4a3SAtsushi Nemoto	bool
22781723b4a3SAtsushi Nemoto
22791723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
22801723b4a3SAtsushi Nemoto	bool
22811723b4a3SAtsushi Nemoto
22821723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
22831723b4a3SAtsushi Nemoto	bool
22841723b4a3SAtsushi Nemoto
22851723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
22861723b4a3SAtsushi Nemoto	bool
22871723b4a3SAtsushi Nemoto
22881723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
22891723b4a3SAtsushi Nemoto	bool
22901723b4a3SAtsushi Nemoto
22911723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
22921723b4a3SAtsushi Nemoto	bool
22931723b4a3SAtsushi Nemoto
22941723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
22951723b4a3SAtsushi Nemoto	bool
22961723b4a3SAtsushi Nemoto	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
22971723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
22981723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
22991723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
23001723b4a3SAtsushi Nemoto
23011723b4a3SAtsushi Nemotoconfig HZ
23021723b4a3SAtsushi Nemoto	int
23031723b4a3SAtsushi Nemoto	default 48 if HZ_48
23041723b4a3SAtsushi Nemoto	default 100 if HZ_100
23051723b4a3SAtsushi Nemoto	default 128 if HZ_128
23061723b4a3SAtsushi Nemoto	default 250 if HZ_250
23071723b4a3SAtsushi Nemoto	default 256 if HZ_256
23081723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
23091723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
23101723b4a3SAtsushi Nemoto
2311e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
23121da177e4SLinus Torvalds
2313ea6e942bSAtsushi Nemotoconfig KEXEC
23147d60717eSKees Cook	bool "Kexec system call"
2315ea6e942bSAtsushi Nemoto	help
2316ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2317ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
23183dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2319ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2320ea6e942bSAtsushi Nemoto
232101dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2322ea6e942bSAtsushi Nemoto
2323ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2324ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2325ea6e942bSAtsushi Nemoto	  initially work for you.  It may help to enable device hotplugging
2326ea6e942bSAtsushi Nemoto	  support.  As of this writing the exact hardware interface is
2327ea6e942bSAtsushi Nemoto	  strongly in flux, so no good recommendation can be made.
2328ea6e942bSAtsushi Nemoto
23297aa1c8f4SRalf Baechleconfig CRASH_DUMP
23307aa1c8f4SRalf Baechle	  bool "Kernel crash dumps"
23317aa1c8f4SRalf Baechle	  help
23327aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
23337aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
23347aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
23357aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
23367aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
23377aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
23387aa1c8f4SRalf Baechle	  PHYSICAL_START.
23397aa1c8f4SRalf Baechle
23407aa1c8f4SRalf Baechleconfig PHYSICAL_START
23417aa1c8f4SRalf Baechle	  hex "Physical address where the kernel is loaded"
23427aa1c8f4SRalf Baechle	  default "0xffffffff84000000" if 64BIT
23437aa1c8f4SRalf Baechle	  default "0x84000000" if 32BIT
23447aa1c8f4SRalf Baechle	  depends on CRASH_DUMP
23457aa1c8f4SRalf Baechle	  help
23467aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
23477aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
23487aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
23497aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
23507aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
23517aa1c8f4SRalf Baechle
2352ea6e942bSAtsushi Nemotoconfig SECCOMP
2353ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2354293c5bd1SRalf Baechle	depends on PROC_FS
2355ea6e942bSAtsushi Nemoto	default y
2356ea6e942bSAtsushi Nemoto	help
2357ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2358ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2359ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2360ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2361ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2362ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2363ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2364ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2365ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2366ea6e942bSAtsushi Nemoto
2367ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2368ea6e942bSAtsushi Nemoto
2369f2ffa5abSDezhong Diaoconfig USE_OF
23700b3e06fdSJonas Gorski	bool
2371f2ffa5abSDezhong Diao	select OF
2372e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2373abd2363fSGrant Likely	select IRQ_DOMAIN
2374f2ffa5abSDezhong Diao
23755e83d430SRalf Baechleendmenu
23765e83d430SRalf Baechle
23771df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
23781df0f0ffSAtsushi Nemoto	bool
23791df0f0ffSAtsushi Nemoto	default y
23801df0f0ffSAtsushi Nemoto
23811df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
23821df0f0ffSAtsushi Nemoto	bool
23831df0f0ffSAtsushi Nemoto	default y
23841df0f0ffSAtsushi Nemoto
2385b6c3539bSRalf Baechlesource "init/Kconfig"
2386b6c3539bSRalf Baechle
2387dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2388dc52ddc0SMatt Helsley
23891da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
23901da177e4SLinus Torvalds
23915e83d430SRalf Baechleconfig HW_HAS_EISA
23925e83d430SRalf Baechle	bool
23931da177e4SLinus Torvaldsconfig HW_HAS_PCI
23941da177e4SLinus Torvalds	bool
23951da177e4SLinus Torvalds
23961da177e4SLinus Torvaldsconfig PCI
23971da177e4SLinus Torvalds	bool "Support for PCI controller"
23981da177e4SLinus Torvalds	depends on HW_HAS_PCI
2399abb4ae46SRalf Baechle	select PCI_DOMAINS
2400eab90291SMichael S. Tsirkin	select GENERIC_PCI_IOMAP
24010f3b3956SMichael S. Tsirkin	select NO_GENERIC_PCI_IOPORT_MAP
24021da177e4SLinus Torvalds	help
24031da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
24041da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
24051da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
24061da177e4SLinus Torvalds	  say Y, otherwise N.
24071da177e4SLinus Torvalds
24081da177e4SLinus Torvaldsconfig PCI_DOMAINS
24091da177e4SLinus Torvalds	bool
24101da177e4SLinus Torvalds
24111da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
24121da177e4SLinus Torvalds
24133f787ca4SJonas Gorskisource "drivers/pci/pcie/Kconfig"
24143f787ca4SJonas Gorski
24151da177e4SLinus Torvalds#
24161da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
24171da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
24181da177e4SLinus Torvalds# users to choose the right thing ...
24191da177e4SLinus Torvalds#
24201da177e4SLinus Torvaldsconfig ISA
24211da177e4SLinus Torvalds	bool
24221da177e4SLinus Torvalds
24231da177e4SLinus Torvaldsconfig EISA
24241da177e4SLinus Torvalds	bool "EISA support"
24255e83d430SRalf Baechle	depends on HW_HAS_EISA
24261da177e4SLinus Torvalds	select ISA
2427aa414dffSRalf Baechle	select GENERIC_ISA_DMA
24281da177e4SLinus Torvalds	---help---
24291da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
24301da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
24311da177e4SLinus Torvalds
24321da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
24331da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
24341da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
24351da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
24361da177e4SLinus Torvalds
24371da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
24381da177e4SLinus Torvalds
24391da177e4SLinus Torvalds	  Otherwise, say N.
24401da177e4SLinus Torvalds
24411da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
24421da177e4SLinus Torvalds
24431da177e4SLinus Torvaldsconfig TC
24441da177e4SLinus Torvalds	bool "TURBOchannel support"
24451da177e4SLinus Torvalds	depends on MACH_DECSTATION
24461da177e4SLinus Torvalds	help
244750a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
244850a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
244950a23e6eSJustin P. Mattock	  at:
245050a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
245150a23e6eSJustin P. Mattock	  and:
245250a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
245350a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
245450a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
24551da177e4SLinus Torvalds
24561da177e4SLinus Torvaldsconfig MMU
24571da177e4SLinus Torvalds	bool
24581da177e4SLinus Torvalds	default y
24591da177e4SLinus Torvalds
2460d865bea4SRalf Baechleconfig I8253
2461d865bea4SRalf Baechle	bool
2462798778b8SRussell King	select CLKSRC_I8253
24632d02612fSThomas Gleixner	select CLKEVT_I8253
24649726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
2465d865bea4SRalf Baechle
2466cce335aeSRalf Baechleconfig ZONE_DMA32
2467cce335aeSRalf Baechle	bool
2468cce335aeSRalf Baechle
24691da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
24701da177e4SLinus Torvalds
24711da177e4SLinus Torvaldssource "drivers/pci/hotplug/Kconfig"
24721da177e4SLinus Torvalds
2473388b78adSAlexandre Bounineconfig RAPIDIO
2474388b78adSAlexandre Bounine	bool "RapidIO support"
2475388b78adSAlexandre Bounine	depends on PCI
2476388b78adSAlexandre Bounine	default n
2477388b78adSAlexandre Bounine	help
2478388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
2479388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
2480388b78adSAlexandre Bounine
2481388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
2482388b78adSAlexandre Bounine
24831da177e4SLinus Torvaldsendmenu
24841da177e4SLinus Torvalds
24851da177e4SLinus Torvaldsmenu "Executable file formats"
24861da177e4SLinus Torvalds
24871da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
24881da177e4SLinus Torvalds
24891da177e4SLinus Torvaldsconfig TRAD_SIGNALS
24901da177e4SLinus Torvalds	bool
24911da177e4SLinus Torvalds
24921da177e4SLinus Torvaldsconfig MIPS32_COMPAT
24931da177e4SLinus Torvalds	bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2494875d43e7SRalf Baechle	depends on 64BIT
24951da177e4SLinus Torvalds	help
24961da177e4SLinus Torvalds	  Select this option if you want Linux/MIPS 32-bit binary
24971da177e4SLinus Torvalds	  compatibility. Since all software available for Linux/MIPS is
24981da177e4SLinus Torvalds	  currently 32-bit you should say Y here.
24991da177e4SLinus Torvalds
25001da177e4SLinus Torvaldsconfig COMPAT
25011da177e4SLinus Torvalds	bool
25021da177e4SLinus Torvalds	depends on MIPS32_COMPAT
250348b25c43SChris Metcalf	select ARCH_WANT_OLD_COMPAT_IPC
25041da177e4SLinus Torvalds	default y
25051da177e4SLinus Torvalds
250605e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
250705e43966SAtsushi Nemoto	bool
250805e43966SAtsushi Nemoto	depends on COMPAT && SYSVIPC
250905e43966SAtsushi Nemoto	default y
251005e43966SAtsushi Nemoto
25111da177e4SLinus Torvaldsconfig MIPS32_O32
25121da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
25131da177e4SLinus Torvalds	depends on MIPS32_COMPAT
25141da177e4SLinus Torvalds	help
25151da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
25161da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
25171da177e4SLinus Torvalds	  existing binaries are in this format.
25181da177e4SLinus Torvalds
25191da177e4SLinus Torvalds	  If unsure, say Y.
25201da177e4SLinus Torvalds
25211da177e4SLinus Torvaldsconfig MIPS32_N32
25221da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
25231da177e4SLinus Torvalds	depends on MIPS32_COMPAT
25241da177e4SLinus Torvalds	help
25251da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
25261da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
25271da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
25281da177e4SLinus Torvalds	  cases.
25291da177e4SLinus Torvalds
25301da177e4SLinus Torvalds	  If unsure, say N.
25311da177e4SLinus Torvalds
25321da177e4SLinus Torvaldsconfig BINFMT_ELF32
25331da177e4SLinus Torvalds	bool
25341da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
25351da177e4SLinus Torvalds
25362116245eSRalf Baechleendmenu
25371da177e4SLinus Torvalds
25382116245eSRalf Baechlemenu "Power management options"
2539952fa954SRodolfo Giometti
2540363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
2541363c55caSWu Zhangjin	def_bool y
25423f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2543363c55caSWu Zhangjin
2544f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
2545f4cb5700SJohannes Berg	def_bool y
25463f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2547f4cb5700SJohannes Berg
25482116245eSRalf Baechlesource "kernel/power/Kconfig"
2549952fa954SRodolfo Giometti
25501da177e4SLinus Torvaldsendmenu
25511da177e4SLinus Torvalds
25529726b43aSWu Zhangjinsource "arch/mips/kernel/cpufreq/Kconfig"
25539726b43aSWu Zhangjin
2554d5950b43SSam Ravnborgsource "net/Kconfig"
2555d5950b43SSam Ravnborg
25561da177e4SLinus Torvaldssource "drivers/Kconfig"
25571da177e4SLinus Torvalds
255898cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
255998cdee0eSRalf Baechle
25601da177e4SLinus Torvaldssource "fs/Kconfig"
25611da177e4SLinus Torvalds
25621da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
25631da177e4SLinus Torvalds
25641da177e4SLinus Torvaldssource "security/Kconfig"
25651da177e4SLinus Torvalds
25661da177e4SLinus Torvaldssource "crypto/Kconfig"
25671da177e4SLinus Torvalds
25681da177e4SLinus Torvaldssource "lib/Kconfig"
2569