xref: /linux/arch/mips/Kconfig (revision a3f143106596d739e7fbc4b84c96b1475247d876)
11da177e4SLinus Torvaldsconfig MIPS
21da177e4SLinus Torvalds	bool
31da177e4SLinus Torvalds	default y
412597988SMatt Redfearn	select ARCH_BINFMT_ELF_STATE
512597988SMatt Redfearn	select ARCH_CLOCKSOURCE_DATA
612597988SMatt Redfearn	select ARCH_DISCARD_MEMBLOCK
712597988SMatt Redfearn	select ARCH_HAS_ELF_RANDOMIZE
812597988SMatt Redfearn	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9a862a426SMark Salter	select ARCH_MIGHT_HAVE_PC_PARPORT
10393c1262SMark Salter	select ARCH_MIGHT_HAVE_PC_SERIO
1112597988SMatt Redfearn	select ARCH_SUPPORTS_UPROBES
121ee3630aSRalf Baechle	select ARCH_USE_BUILTIN_BSWAP
1312597988SMatt Redfearn	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
1425da4e9dSPaul Burton	select ARCH_USE_QUEUED_RWLOCKS
150b17c967SPaul Burton	select ARCH_USE_QUEUED_SPINLOCKS
1612597988SMatt Redfearn	select ARCH_WANT_IPC_PARSE_VERSION
1712597988SMatt Redfearn	select BUILDTIME_EXTABLE_SORT
1812597988SMatt Redfearn	select CLONE_BACKWARDS
1912597988SMatt Redfearn	select CPU_PM if CPU_IDLE
2012597988SMatt Redfearn	select GENERIC_ATOMIC64 if !64BIT
2112597988SMatt Redfearn	select GENERIC_CLOCKEVENTS
2212597988SMatt Redfearn	select GENERIC_CMOS_UPDATE
2312597988SMatt Redfearn	select GENERIC_CPU_AUTOPROBE
2412597988SMatt Redfearn	select GENERIC_IRQ_PROBE
2512597988SMatt Redfearn	select GENERIC_IRQ_SHOW
2612597988SMatt Redfearn	select GENERIC_PCI_IOMAP
2712597988SMatt Redfearn	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
2812597988SMatt Redfearn	select GENERIC_SMP_IDLE_THREAD
2912597988SMatt Redfearn	select GENERIC_TIME_VSYSCALL
3012597988SMatt Redfearn	select HANDLE_DOMAIN_IRQ
3112597988SMatt Redfearn	select HAVE_ARCH_JUMP_LABEL
3288547001SJason Wessel	select HAVE_ARCH_KGDB
33109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_BITS if MMU
34109c32ffSMatt Redfearn	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
35490b004fSMarkos Chandras	select HAVE_ARCH_SECCOMP_FILTER
36c0ff3c53SRalf Baechle	select HAVE_ARCH_TRACEHOOK
3712597988SMatt Redfearn	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
38f381bf6dSDavid Daney	select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
39f381bf6dSDavid Daney	select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
4012597988SMatt Redfearn	select HAVE_CC_STACKPROTECTOR
4112597988SMatt Redfearn	select HAVE_CONTEXT_TRACKING
4212597988SMatt Redfearn	select HAVE_COPY_THREAD_TLS
4364575f91SWu Zhangjin	select HAVE_C_RECORDMCOUNT
4412597988SMatt Redfearn	select HAVE_DEBUG_KMEMLEAK
4512597988SMatt Redfearn	select HAVE_DEBUG_STACKOVERFLOW
4612597988SMatt Redfearn	select HAVE_DMA_API_DEBUG
4712597988SMatt Redfearn	select HAVE_DMA_CONTIGUOUS
4812597988SMatt Redfearn	select HAVE_DYNAMIC_FTRACE
4912597988SMatt Redfearn	select HAVE_EXIT_THREAD
5012597988SMatt Redfearn	select HAVE_FTRACE_MCOUNT_RECORD
5129c5d346SWu Zhangjin	select HAVE_FUNCTION_GRAPH_TRACER
5212597988SMatt Redfearn	select HAVE_FUNCTION_TRACER
5312597988SMatt Redfearn	select HAVE_GENERIC_DMA_COHERENT
5412597988SMatt Redfearn	select HAVE_IDE
5512597988SMatt Redfearn	select HAVE_IRQ_EXIT_ON_IRQ_STACK
5612597988SMatt Redfearn	select HAVE_IRQ_TIME_ACCOUNTING
57c1bf207dSDavid Daney	select HAVE_KPROBES
58c1bf207dSDavid Daney	select HAVE_KRETPROBES
599d15ffc8STejun Heo	select HAVE_MEMBLOCK
609d15ffc8STejun Heo	select HAVE_MEMBLOCK_NODE_MAP
61786d35d4SDavid Howells	select HAVE_MOD_ARCH_SPECIFIC
6242a0bb3fSPetr Mladek	select HAVE_NMI
6312597988SMatt Redfearn	select HAVE_OPROFILE
6412597988SMatt Redfearn	select HAVE_PERF_EVENTS
6508bccf43SMarcin Nowakowski	select HAVE_REGS_AND_STACK_ACCESS_API
6612597988SMatt Redfearn	select HAVE_SYSCALL_TRACEPOINTS
67*a3f14310SBen Hutchings	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
6812597988SMatt Redfearn	select IRQ_FORCED_THREADING
6912597988SMatt Redfearn	select MODULES_USE_ELF_RELA if MODULES && 64BIT
7012597988SMatt Redfearn	select MODULES_USE_ELF_REL if MODULES
7112597988SMatt Redfearn	select PERF_USE_VMALLOC
7212597988SMatt Redfearn	select RTC_LIB if !MACH_LOONGSON64
7312597988SMatt Redfearn	select SYSCTL_EXCEPTION_TRACE
7412597988SMatt Redfearn	select VIRT_TO_BUS
751da177e4SLinus Torvalds
761da177e4SLinus Torvaldsmenu "Machine selection"
771da177e4SLinus Torvalds
785e83d430SRalf Baechlechoice
795e83d430SRalf Baechle	prompt "System type"
80d41e6858SMatt Redfearn	default MIPS_GENERIC
811da177e4SLinus Torvalds
82eed0eabdSPaul Burtonconfig MIPS_GENERIC
83eed0eabdSPaul Burton	bool "Generic board-agnostic MIPS kernel"
84eed0eabdSPaul Burton	select BOOT_RAW
85eed0eabdSPaul Burton	select BUILTIN_DTB
86eed0eabdSPaul Burton	select CEVT_R4K
87eed0eabdSPaul Burton	select CLKSRC_MIPS_GIC
88eed0eabdSPaul Burton	select COMMON_CLK
89eed0eabdSPaul Burton	select CPU_MIPSR2_IRQ_VI
90eed0eabdSPaul Burton	select CPU_MIPSR2_IRQ_EI
91eed0eabdSPaul Burton	select CSRC_R4K
92eed0eabdSPaul Burton	select DMA_PERDEV_COHERENT
93eed0eabdSPaul Burton	select HW_HAS_PCI
94eed0eabdSPaul Burton	select IRQ_MIPS_CPU
95eed0eabdSPaul Burton	select LIBFDT
96eed0eabdSPaul Burton	select MIPS_CPU_SCACHE
97eed0eabdSPaul Burton	select MIPS_GIC
98eed0eabdSPaul Burton	select MIPS_L1_CACHE_SHIFT_7
99eed0eabdSPaul Burton	select NO_EXCEPT_FILL
100eed0eabdSPaul Burton	select PCI_DRIVERS_GENERIC
101eed0eabdSPaul Burton	select PINCTRL
102eed0eabdSPaul Burton	select SMP_UP if SMP
103a3078e59SMatt Redfearn	select SWAP_IO_SPACE
104eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R1
105eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R2
106eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS32_R6
107eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R1
108eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R2
109eed0eabdSPaul Burton	select SYS_HAS_CPU_MIPS64_R6
110eed0eabdSPaul Burton	select SYS_SUPPORTS_32BIT_KERNEL
111eed0eabdSPaul Burton	select SYS_SUPPORTS_64BIT_KERNEL
112eed0eabdSPaul Burton	select SYS_SUPPORTS_BIG_ENDIAN
113eed0eabdSPaul Burton	select SYS_SUPPORTS_HIGHMEM
114eed0eabdSPaul Burton	select SYS_SUPPORTS_LITTLE_ENDIAN
115eed0eabdSPaul Burton	select SYS_SUPPORTS_MICROMIPS
116eed0eabdSPaul Burton	select SYS_SUPPORTS_MIPS_CPS
117eed0eabdSPaul Burton	select SYS_SUPPORTS_MIPS16
118eed0eabdSPaul Burton	select SYS_SUPPORTS_MULTITHREADING
119eed0eabdSPaul Burton	select SYS_SUPPORTS_RELOCATABLE
120eed0eabdSPaul Burton	select SYS_SUPPORTS_SMARTMIPS
121eed0eabdSPaul Burton	select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
122eed0eabdSPaul Burton	select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
123eed0eabdSPaul Burton	select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
124eed0eabdSPaul Burton	select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
125eed0eabdSPaul Burton	select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
126eed0eabdSPaul Burton	select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
127eed0eabdSPaul Burton	select USE_OF
128eed0eabdSPaul Burton	help
129eed0eabdSPaul Burton	  Select this to build a kernel which aims to support multiple boards,
130eed0eabdSPaul Burton	  generally using a flattened device tree passed from the bootloader
131eed0eabdSPaul Burton	  using the boot protocol defined in the UHI (Unified Hosting
132eed0eabdSPaul Burton	  Interface) specification.
133eed0eabdSPaul Burton
13442a4f17dSManuel Laussconfig MIPS_ALCHEMY
135c3543e25SYoichi Yuasa	bool "Alchemy processor based machines"
13634adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
137f772cdb2SRalf Baechle	select CEVT_R4K
138d7ea335cSSteven J. Hill	select CSRC_R4K
13967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
14088e9a93cSManuel Lauss	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
14142a4f17dSManuel Lauss	select SYS_HAS_CPU_MIPS32_R1
14242a4f17dSManuel Lauss	select SYS_SUPPORTS_32BIT_KERNEL
14342a4f17dSManuel Lauss	select SYS_SUPPORTS_APM_EMULATION
144d30a2b47SLinus Walleij	select GPIOLIB
1451b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
14647440229SManuel Lauss	select COMMON_CLK
1471da177e4SLinus Torvalds
1487ca5dc14SFlorian Fainelliconfig AR7
1497ca5dc14SFlorian Fainelli	bool "Texas Instruments AR7"
1507ca5dc14SFlorian Fainelli	select BOOT_ELF32
1517ca5dc14SFlorian Fainelli	select DMA_NONCOHERENT
1527ca5dc14SFlorian Fainelli	select CEVT_R4K
1537ca5dc14SFlorian Fainelli	select CSRC_R4K
15467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1557ca5dc14SFlorian Fainelli	select NO_EXCEPT_FILL
1567ca5dc14SFlorian Fainelli	select SWAP_IO_SPACE
1577ca5dc14SFlorian Fainelli	select SYS_HAS_CPU_MIPS32_R1
1587ca5dc14SFlorian Fainelli	select SYS_HAS_EARLY_PRINTK
1597ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_32BIT_KERNEL
1607ca5dc14SFlorian Fainelli	select SYS_SUPPORTS_LITTLE_ENDIAN
161377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1621b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT_UART16550
163d30a2b47SLinus Walleij	select GPIOLIB
1647ca5dc14SFlorian Fainelli	select VLYNQ
1658551fb64SYoichi Yuasa	select HAVE_CLK
1667ca5dc14SFlorian Fainelli	help
1677ca5dc14SFlorian Fainelli	  Support for the Texas Instruments AR7 System-on-a-Chip
1687ca5dc14SFlorian Fainelli	  family: TNETD7100, 7200 and 7300.
1697ca5dc14SFlorian Fainelli
17043cc739fSSergey Ryazanovconfig ATH25
17143cc739fSSergey Ryazanov	bool "Atheros AR231x/AR531x SoC support"
17243cc739fSSergey Ryazanov	select CEVT_R4K
17343cc739fSSergey Ryazanov	select CSRC_R4K
17443cc739fSSergey Ryazanov	select DMA_NONCOHERENT
17567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1761753e74eSSergey Ryazanov	select IRQ_DOMAIN
17743cc739fSSergey Ryazanov	select SYS_HAS_CPU_MIPS32_R1
17843cc739fSSergey Ryazanov	select SYS_SUPPORTS_BIG_ENDIAN
17943cc739fSSergey Ryazanov	select SYS_SUPPORTS_32BIT_KERNEL
1808aaa7278SSergey Ryazanov	select SYS_HAS_EARLY_PRINTK
18143cc739fSSergey Ryazanov	help
18243cc739fSSergey Ryazanov	  Support for Atheros AR231x and Atheros AR531x based boards
18343cc739fSSergey Ryazanov
184d4a67d9dSGabor Juhosconfig ATH79
185d4a67d9dSGabor Juhos	bool "Atheros AR71XX/AR724X/AR913X based boards"
186ff591a91SAlban Bedel	select ARCH_HAS_RESET_CONTROLLER
187d4a67d9dSGabor Juhos	select BOOT_RAW
188d4a67d9dSGabor Juhos	select CEVT_R4K
189d4a67d9dSGabor Juhos	select CSRC_R4K
190d4a67d9dSGabor Juhos	select DMA_NONCOHERENT
191d30a2b47SLinus Walleij	select GPIOLIB
19294638067SGabor Juhos	select HAVE_CLK
193411520afSAlban Bedel	select COMMON_CLK
1942c4f1ac5SGabor Juhos	select CLKDEV_LOOKUP
19567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1960aabf1a4SGabor Juhos	select MIPS_MACHINE
197d4a67d9dSGabor Juhos	select SYS_HAS_CPU_MIPS32_R2
198d4a67d9dSGabor Juhos	select SYS_HAS_EARLY_PRINTK
199d4a67d9dSGabor Juhos	select SYS_SUPPORTS_32BIT_KERNEL
200d4a67d9dSGabor Juhos	select SYS_SUPPORTS_BIG_ENDIAN
201377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
202b3f0a250SAlban Bedel	select SYS_SUPPORTS_ZBOOT_UART_PROM
20303c8c407SAlban Bedel	select USE_OF
204d4a67d9dSGabor Juhos	help
205d4a67d9dSGabor Juhos	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
206d4a67d9dSGabor Juhos
2075f2d4459SKevin Cernekeeconfig BMIPS_GENERIC
2085f2d4459SKevin Cernekee	bool "Broadcom Generic BMIPS kernel"
209d666cd02SKevin Cernekee	select BOOT_RAW
210d666cd02SKevin Cernekee	select NO_EXCEPT_FILL
211d666cd02SKevin Cernekee	select USE_OF
212d666cd02SKevin Cernekee	select CEVT_R4K
213d666cd02SKevin Cernekee	select CSRC_R4K
214d666cd02SKevin Cernekee	select SYNC_R4K
215d666cd02SKevin Cernekee	select COMMON_CLK
216c7c42ec2SSimon Arlott	select BCM6345_L1_IRQ
21760b858f2SKevin Cernekee	select BCM7038_L1_IRQ
21860b858f2SKevin Cernekee	select BCM7120_L2_IRQ
21960b858f2SKevin Cernekee	select BRCMSTB_L2_IRQ
22067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
22160b858f2SKevin Cernekee	select DMA_NONCOHERENT
222d666cd02SKevin Cernekee	select SYS_SUPPORTS_32BIT_KERNEL
22360b858f2SKevin Cernekee	select SYS_SUPPORTS_LITTLE_ENDIAN
224d666cd02SKevin Cernekee	select SYS_SUPPORTS_BIG_ENDIAN
225d666cd02SKevin Cernekee	select SYS_SUPPORTS_HIGHMEM
22660b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS32_3300
22760b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4350
22860b858f2SKevin Cernekee	select SYS_HAS_CPU_BMIPS4380
229d666cd02SKevin Cernekee	select SYS_HAS_CPU_BMIPS5000
230d666cd02SKevin Cernekee	select SWAP_IO_SPACE
23160b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
23260b858f2SKevin Cernekee	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
23360b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
23460b858f2SKevin Cernekee	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
2354dc4704cSJustin Chen	select HARDIRQS_SW_RESEND
236d666cd02SKevin Cernekee	help
2375f2d4459SKevin Cernekee	  Build a generic DT-based kernel image that boots on select
2385f2d4459SKevin Cernekee	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
2395f2d4459SKevin Cernekee	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
2405f2d4459SKevin Cernekee	  must be set appropriately for your board.
241d666cd02SKevin Cernekee
2421c0c13ebSAurelien Jarnoconfig BCM47XX
243c619366eSFlorian Fainelli	bool "Broadcom BCM47XX based boards"
244fe08f8c2SHauke Mehrtens	select BOOT_RAW
24542f77542SRalf Baechle	select CEVT_R4K
246940f6b48SRalf Baechle	select CSRC_R4K
2471c0c13ebSAurelien Jarno	select DMA_NONCOHERENT
2481c0c13ebSAurelien Jarno	select HW_HAS_PCI
24967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
250314878d2SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R1
251dd54deddSHauke Mehrtens	select NO_EXCEPT_FILL
2521c0c13ebSAurelien Jarno	select SYS_SUPPORTS_32BIT_KERNEL
2531c0c13ebSAurelien Jarno	select SYS_SUPPORTS_LITTLE_ENDIAN
254377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
25525e5fb97SAurelien Jarno	select SYS_HAS_EARLY_PRINTK
256e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
257c949c0bcSRafał Miłecki	select GPIOLIB
258c949c0bcSRafał Miłecki	select LEDS_GPIO_REGISTER
259f6e734a8SRafał Miłecki	select BCM47XX_NVRAM
2602ab71a02SRafał Miłecki	select BCM47XX_SPROM
2611c0c13ebSAurelien Jarno	help
2621c0c13ebSAurelien Jarno	 Support for BCM47XX based boards
2631c0c13ebSAurelien Jarno
264e7300d04SMaxime Bizonconfig BCM63XX
265e7300d04SMaxime Bizon	bool "Broadcom BCM63XX based boards"
266ae8de61cSFlorian Fainelli	select BOOT_RAW
267e7300d04SMaxime Bizon	select CEVT_R4K
268e7300d04SMaxime Bizon	select CSRC_R4K
269fc264022SJonas Gorski	select SYNC_R4K
270e7300d04SMaxime Bizon	select DMA_NONCOHERENT
27167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
272e7300d04SMaxime Bizon	select SYS_SUPPORTS_32BIT_KERNEL
273e7300d04SMaxime Bizon	select SYS_SUPPORTS_BIG_ENDIAN
274e7300d04SMaxime Bizon	select SYS_HAS_EARLY_PRINTK
275e7300d04SMaxime Bizon	select SWAP_IO_SPACE
276d30a2b47SLinus Walleij	select GPIOLIB
2773e82eeebSYoichi Yuasa	select HAVE_CLK
278af2418beSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
279c5af3c2dSJonas Gorski	select CLKDEV_LOOKUP
280e7300d04SMaxime Bizon	help
281e7300d04SMaxime Bizon	 Support for BCM63XX based boards
282e7300d04SMaxime Bizon
2831da177e4SLinus Torvaldsconfig MIPS_COBALT
2843fa986faSMartin Michlmayr	bool "Cobalt Server"
28542f77542SRalf Baechle	select CEVT_R4K
286940f6b48SRalf Baechle	select CSRC_R4K
2871097c6acSYoichi Yuasa	select CEVT_GT641XX
2881da177e4SLinus Torvalds	select DMA_NONCOHERENT
2891da177e4SLinus Torvalds	select HW_HAS_PCI
290d865bea4SRalf Baechle	select I8253
2911da177e4SLinus Torvalds	select I8259
29267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
293d5ab1a69SYoichi Yuasa	select IRQ_GT641XX
294252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
295e25bfc92SYoichi Yuasa	select PCI
2967cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
2970a22e0d4SYoichi Yuasa	select SYS_HAS_EARLY_PRINTK
298ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
2990e8774b6SFlorian Fainelli	select SYS_SUPPORTS_64BIT_KERNEL
3005e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
301e6086557SRalf Baechle	select USE_GENERIC_EARLY_PRINTK_8250
3021da177e4SLinus Torvalds
3031da177e4SLinus Torvaldsconfig MACH_DECSTATION
3043fa986faSMartin Michlmayr	bool "DECstations"
3051da177e4SLinus Torvalds	select BOOT_ELF32
3066457d9fcSYoichi Yuasa	select CEVT_DS1287
30781d10badSMaciej W. Rozycki	select CEVT_R4K if CPU_R4X00
3084247417dSYoichi Yuasa	select CSRC_IOASIC
30981d10badSMaciej W. Rozycki	select CSRC_R4K if CPU_R4X00
31020d60d99SMaciej W. Rozycki	select CPU_DADDI_WORKAROUNDS if 64BIT
31120d60d99SMaciej W. Rozycki	select CPU_R4000_WORKAROUNDS if 64BIT
31220d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS if 64BIT
3131da177e4SLinus Torvalds	select DMA_NONCOHERENT
314ce816fa8SUwe Kleine-König	select NO_IOPORT_MAP
31567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
3167cf8053bSRalf Baechle	select SYS_HAS_CPU_R3000
3177cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
318ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
3197d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3205e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
3211723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_128HZ
3221723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_256HZ
3231723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_1024HZ
324930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
3255e83d430SRalf Baechle	help
3261da177e4SLinus Torvalds	  This enables support for DEC's MIPS based workstations.  For details
3271da177e4SLinus Torvalds	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
3281da177e4SLinus Torvalds	  DECstation porting pages on <http://decstation.unix-ag.org/>.
3291da177e4SLinus Torvalds
3301da177e4SLinus Torvalds	  If you have one of the following DECstation Models you definitely
3311da177e4SLinus Torvalds	  want to choose R4xx0 for the CPU Type:
3321da177e4SLinus Torvalds
3331da177e4SLinus Torvalds		DECstation 5000/50
3341da177e4SLinus Torvalds		DECstation 5000/150
3351da177e4SLinus Torvalds		DECstation 5000/260
3361da177e4SLinus Torvalds		DECsystem 5900/260
3371da177e4SLinus Torvalds
3381da177e4SLinus Torvalds	  otherwise choose R3000.
3391da177e4SLinus Torvalds
3405e83d430SRalf Baechleconfig MACH_JAZZ
3413fa986faSMartin Michlmayr	bool "Jazz family of machines"
3420e2794b0SRalf Baechle	select FW_ARC
3430e2794b0SRalf Baechle	select FW_ARC32
3445e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
34542f77542SRalf Baechle	select CEVT_R4K
346940f6b48SRalf Baechle	select CSRC_R4K
347e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
3485e83d430SRalf Baechle	select GENERIC_ISA_DMA
3498a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
35067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
351d865bea4SRalf Baechle	select I8253
3525e83d430SRalf Baechle	select I8259
3535e83d430SRalf Baechle	select ISA
3547cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
3555e83d430SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
3567d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
3571723b4a3SAtsushi Nemoto	select SYS_SUPPORTS_100HZ
3581da177e4SLinus Torvalds	help
3595e83d430SRalf Baechle	 This a family of machines based on the MIPS R4030 chipset which was
3605e83d430SRalf Baechle	 used by several vendors to build RISC/os and Windows NT workstations.
361692105b8SMatt LaPlante	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
3625e83d430SRalf Baechle	 Olivetti M700-10 workstations.
3635e83d430SRalf Baechle
364de361e8bSPaul Burtonconfig MACH_INGENIC
365de361e8bSPaul Burton	bool "Ingenic SoC based machines"
3665ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_32BIT_KERNEL
3675ebabe59SLars-Peter Clausen	select SYS_SUPPORTS_LITTLE_ENDIAN
368f9c9affcSLluís Batlle i Rossell	select SYS_SUPPORTS_ZBOOT_UART16550
3695ebabe59SLars-Peter Clausen	select DMA_NONCOHERENT
37067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
37137b4c3caSPaul Cercueil	select PINCTRL
372d30a2b47SLinus Walleij	select GPIOLIB
373ff1930c6SPaul Burton	select COMMON_CLK
37483bc7692SLars-Peter Clausen	select GENERIC_IRQ_CHIP
375ffb1843dSPaul Burton	select BUILTIN_DTB
376ffb1843dSPaul Burton	select USE_OF
3776ec127fbSPaul Burton	select LIBFDT
3785ebabe59SLars-Peter Clausen
379171bb2f1SJohn Crispinconfig LANTIQ
380171bb2f1SJohn Crispin	bool "Lantiq based platforms"
381171bb2f1SJohn Crispin	select DMA_NONCOHERENT
38267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
383171bb2f1SJohn Crispin	select CEVT_R4K
384171bb2f1SJohn Crispin	select CSRC_R4K
385171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
386171bb2f1SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
387171bb2f1SJohn Crispin	select SYS_SUPPORTS_BIG_ENDIAN
388171bb2f1SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
389377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
390171bb2f1SJohn Crispin	select SYS_SUPPORTS_MULTITHREADING
391171bb2f1SJohn Crispin	select SYS_HAS_EARLY_PRINTK
392d30a2b47SLinus Walleij	select GPIOLIB
393171bb2f1SJohn Crispin	select SWAP_IO_SPACE
394171bb2f1SJohn Crispin	select BOOT_RAW
395287e3f3fSJohn Crispin	select CLKDEV_LOOKUP
396a0392222SJohn Crispin	select USE_OF
3973f8c50c9SJohn Crispin	select PINCTRL
3983f8c50c9SJohn Crispin	select PINCTRL_LANTIQ
399c530781cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
400c530781cSJohn Crispin	select RESET_CONTROLLER
401171bb2f1SJohn Crispin
4021f21d2bdSBrian Murphyconfig LASAT
4031f21d2bdSBrian Murphy	bool "LASAT Networks platforms"
40442f77542SRalf Baechle	select CEVT_R4K
40516f0bbbcSRalf Baechle	select CRC32
406940f6b48SRalf Baechle	select CSRC_R4K
4071f21d2bdSBrian Murphy	select DMA_NONCOHERENT
4081f21d2bdSBrian Murphy	select SYS_HAS_EARLY_PRINTK
4091f21d2bdSBrian Murphy	select HW_HAS_PCI
41067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4111f21d2bdSBrian Murphy	select PCI_GT64XXX_PCI0
4121f21d2bdSBrian Murphy	select MIPS_NILE4
4131f21d2bdSBrian Murphy	select R5000_CPU_SCACHE
4141f21d2bdSBrian Murphy	select SYS_HAS_CPU_R5000
4151f21d2bdSBrian Murphy	select SYS_SUPPORTS_32BIT_KERNEL
4161f21d2bdSBrian Murphy	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
4171f21d2bdSBrian Murphy	select SYS_SUPPORTS_LITTLE_ENDIAN
4181f21d2bdSBrian Murphy
41930ad29bbSHuacai Chenconfig MACH_LOONGSON32
42030ad29bbSHuacai Chen	bool "Loongson-1 family of machines"
421c7e8c668SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
422ade299d8SYoichi Yuasa	help
42330ad29bbSHuacai Chen	  This enables support for the Loongson-1 family of machines.
42485749d24SWu Zhangjin
42530ad29bbSHuacai Chen	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
42630ad29bbSHuacai Chen	  the Institute of Computing Technology (ICT), Chinese Academy of
42730ad29bbSHuacai Chen	  Sciences (CAS).
428ade299d8SYoichi Yuasa
42930ad29bbSHuacai Chenconfig MACH_LOONGSON64
43030ad29bbSHuacai Chen	bool "Loongson-2/3 family of machines"
431ca585cf9SKelvin Cheung	select SYS_SUPPORTS_ZBOOT
432ca585cf9SKelvin Cheung	help
43330ad29bbSHuacai Chen	  This enables the support of Loongson-2/3 family of machines.
434ca585cf9SKelvin Cheung
43530ad29bbSHuacai Chen	  Loongson-2 is a family of single-core CPUs and Loongson-3 is a
43630ad29bbSHuacai Chen	  family of multi-core CPUs. They are both 64-bit general-purpose
43730ad29bbSHuacai Chen	  MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
43830ad29bbSHuacai Chen	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
43930ad29bbSHuacai Chen	  in the People's Republic of China. The chief architect is Professor
44030ad29bbSHuacai Chen	  Weiwu Hu.
441ca585cf9SKelvin Cheung
4426a438309SAndrew Brestickerconfig MACH_PISTACHIO
4436a438309SAndrew Bresticker	bool "IMG Pistachio SoC based boards"
4446a438309SAndrew Bresticker	select BOOT_ELF32
4456a438309SAndrew Bresticker	select BOOT_RAW
4466a438309SAndrew Bresticker	select CEVT_R4K
4476a438309SAndrew Bresticker	select CLKSRC_MIPS_GIC
4486a438309SAndrew Bresticker	select COMMON_CLK
4496a438309SAndrew Bresticker	select CSRC_R4K
450645c7827SZubair Lutfullah Kakakhel	select DMA_NONCOHERENT
451d30a2b47SLinus Walleij	select GPIOLIB
45267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4536a438309SAndrew Bresticker	select LIBFDT
4546a438309SAndrew Bresticker	select MFD_SYSCON
4556a438309SAndrew Bresticker	select MIPS_CPU_SCACHE
4566a438309SAndrew Bresticker	select MIPS_GIC
4576a438309SAndrew Bresticker	select PINCTRL
4586a438309SAndrew Bresticker	select REGULATOR
4596a438309SAndrew Bresticker	select SYS_HAS_CPU_MIPS32_R2
4606a438309SAndrew Bresticker	select SYS_SUPPORTS_32BIT_KERNEL
4616a438309SAndrew Bresticker	select SYS_SUPPORTS_LITTLE_ENDIAN
4626a438309SAndrew Bresticker	select SYS_SUPPORTS_MIPS_CPS
4636a438309SAndrew Bresticker	select SYS_SUPPORTS_MULTITHREADING
46441cc07beSMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
4656a438309SAndrew Bresticker	select SYS_SUPPORTS_ZBOOT
466018f62eeSEzequiel Garcia	select SYS_HAS_EARLY_PRINTK
467018f62eeSEzequiel Garcia	select USE_GENERIC_EARLY_PRINTK_8250
4686a438309SAndrew Bresticker	select USE_OF
4696a438309SAndrew Bresticker	help
4706a438309SAndrew Bresticker	  This enables support for the IMG Pistachio SoC platform.
4716a438309SAndrew Bresticker
4721da177e4SLinus Torvaldsconfig MIPS_MALTA
4733fa986faSMartin Michlmayr	bool "MIPS Malta board"
47461ed242dSRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
4751da177e4SLinus Torvalds	select BOOT_ELF32
476fa71c960SRalf Baechle	select BOOT_RAW
477e8823d26SPaul Burton	select BUILTIN_DTB
47842f77542SRalf Baechle	select CEVT_R4K
479940f6b48SRalf Baechle	select CSRC_R4K
480fa5635a2SAndrew Bresticker	select CLKSRC_MIPS_GIC
48142b002abSGuenter Roeck	select COMMON_CLK
482885014bcSFelix Fietkau	select DMA_MAYBE_COHERENT
4831da177e4SLinus Torvalds	select GENERIC_ISA_DMA
4848a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
48567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
4868a19b8f1SAndrew Bresticker	select MIPS_GIC
4871da177e4SLinus Torvalds	select HW_HAS_PCI
488d865bea4SRalf Baechle	select I8253
4891da177e4SLinus Torvalds	select I8259
4905e83d430SRalf Baechle	select MIPS_BONITO64
4919318c51aSChris Dearman	select MIPS_CPU_SCACHE
492a7ef1eadSKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
493252161ecSYoichi Yuasa	select PCI_GT64XXX_PCI0
4945e83d430SRalf Baechle	select MIPS_MSC
495ecafe3e9SPaul Burton	select SMP_UP if SMP
4961da177e4SLinus Torvalds	select SWAP_IO_SPACE
4977cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
4987cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS32_R2
499bfc3c5a6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R3_5
500c5b36783SSteven J. Hill	select SYS_HAS_CPU_MIPS32_R5
501575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS32_R6
5027cf8053bSRalf Baechle	select SYS_HAS_CPU_MIPS64_R1
5035d9fbed1SLeonid Yegoshin	select SYS_HAS_CPU_MIPS64_R2
504575509b6SMarkos Chandras	select SYS_HAS_CPU_MIPS64_R6
5057cf8053bSRalf Baechle	select SYS_HAS_CPU_NEVADA
5067cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
507ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
508ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
5095e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
510c5b36783SSteven J. Hill	select SYS_SUPPORTS_HIGHMEM
5115e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
512424ebcdfSMaciej W. Rozycki	select SYS_SUPPORTS_MICROMIPS
5130365070fSTim Anderson	select SYS_SUPPORTS_MIPS_CMP
514e56b6aa6SPaul Burton	select SYS_SUPPORTS_MIPS_CPS
515377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
516f41ae0b2SRalf Baechle	select SYS_SUPPORTS_MULTITHREADING
5179693a853SFranck Bui-Huu	select SYS_SUPPORTS_SMARTMIPS
5181b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
5198c530ea3SMatt Redfearn	select SYS_SUPPORTS_RELOCATABLE
520e8823d26SPaul Burton	select USE_OF
52138ec82feSPaul Burton	select LIBFDT
522abcc82b1SJames Hogan	select ZONE_DMA32 if 64BIT
523e81a8c7dSPaul Burton	select BUILTIN_DTB
524e81a8c7dSPaul Burton	select LIBFDT
5251da177e4SLinus Torvalds	help
526f638d197SMaciej W. Rozycki	  This enables support for the MIPS Technologies Malta evaluation
5271da177e4SLinus Torvalds	  board.
5281da177e4SLinus Torvalds
5292572f00dSJoshua Hendersonconfig MACH_PIC32
5302572f00dSJoshua Henderson	bool "Microchip PIC32 Family"
5312572f00dSJoshua Henderson	help
5322572f00dSJoshua Henderson	  This enables support for the Microchip PIC32 family of platforms.
5332572f00dSJoshua Henderson
5342572f00dSJoshua Henderson	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
5352572f00dSJoshua Henderson	  microcontrollers.
5362572f00dSJoshua Henderson
537a83860c2SRalf Baechleconfig NEC_MARKEINS
538a83860c2SRalf Baechle	bool "NEC EMMA2RH Mark-eins board"
539a83860c2SRalf Baechle	select SOC_EMMA2RH
540a83860c2SRalf Baechle	select HW_HAS_PCI
541a83860c2SRalf Baechle	help
542a83860c2SRalf Baechle	  This enables support for the NEC Electronics Mark-eins boards.
543ade299d8SYoichi Yuasa
5445e83d430SRalf Baechleconfig MACH_VR41XX
54574142d65SYoichi Yuasa	bool "NEC VR4100 series based machines"
54642f77542SRalf Baechle	select CEVT_R4K
547940f6b48SRalf Baechle	select CSRC_R4K
5487cf8053bSRalf Baechle	select SYS_HAS_CPU_VR41XX
549377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
550d30a2b47SLinus Walleij	select GPIOLIB
5515e83d430SRalf Baechle
552edb6310aSDaniel Lairdconfig NXP_STB220
553edb6310aSDaniel Laird	bool "NXP STB220 board"
554edb6310aSDaniel Laird	select SOC_PNX833X
555edb6310aSDaniel Laird	help
556edb6310aSDaniel Laird	 Support for NXP Semiconductors STB220 Development Board.
557edb6310aSDaniel Laird
558edb6310aSDaniel Lairdconfig NXP_STB225
559edb6310aSDaniel Laird	bool "NXP 225 board"
560edb6310aSDaniel Laird	select SOC_PNX833X
561edb6310aSDaniel Laird	select SOC_PNX8335
562edb6310aSDaniel Laird	help
563edb6310aSDaniel Laird	 Support for NXP Semiconductors STB225 Development Board.
564edb6310aSDaniel Laird
5659267a30dSMarc St-Jeanconfig PMC_MSP
5669267a30dSMarc St-Jean	bool "PMC-Sierra MSP chipsets"
56739d30c13SAnoop P A	select CEVT_R4K
56839d30c13SAnoop P A	select CSRC_R4K
5699267a30dSMarc St-Jean	select DMA_NONCOHERENT
5709267a30dSMarc St-Jean	select SWAP_IO_SPACE
5719267a30dSMarc St-Jean	select NO_EXCEPT_FILL
5729267a30dSMarc St-Jean	select BOOT_RAW
5739267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R1
5749267a30dSMarc St-Jean	select SYS_HAS_CPU_MIPS32_R2
5759267a30dSMarc St-Jean	select SYS_SUPPORTS_32BIT_KERNEL
5769267a30dSMarc St-Jean	select SYS_SUPPORTS_BIG_ENDIAN
577377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
57867e38cf2SRalf Baechle	select IRQ_MIPS_CPU
5799267a30dSMarc St-Jean	select SERIAL_8250
5809267a30dSMarc St-Jean	select SERIAL_8250_CONSOLE
5819296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_MMIO
5829296d94dSFlorian Fainelli	select USB_EHCI_BIG_ENDIAN_DESC
5839267a30dSMarc St-Jean	help
5849267a30dSMarc St-Jean	  This adds support for the PMC-Sierra family of Multi-Service
5859267a30dSMarc St-Jean	  Processor System-On-A-Chips.  These parts include a number
5869267a30dSMarc St-Jean	  of integrated peripherals, interfaces and DSPs in addition to
5879267a30dSMarc St-Jean	  a variety of MIPS cores.
5889267a30dSMarc St-Jean
589ae2b5bb6SJohn Crispinconfig RALINK
590ae2b5bb6SJohn Crispin	bool "Ralink based machines"
591ae2b5bb6SJohn Crispin	select CEVT_R4K
592ae2b5bb6SJohn Crispin	select CSRC_R4K
593ae2b5bb6SJohn Crispin	select BOOT_RAW
594ae2b5bb6SJohn Crispin	select DMA_NONCOHERENT
59567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
596ae2b5bb6SJohn Crispin	select USE_OF
597ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R1
598ae2b5bb6SJohn Crispin	select SYS_HAS_CPU_MIPS32_R2
599ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_32BIT_KERNEL
600ae2b5bb6SJohn Crispin	select SYS_SUPPORTS_LITTLE_ENDIAN
601377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
602ae2b5bb6SJohn Crispin	select SYS_HAS_EARLY_PRINTK
603ae2b5bb6SJohn Crispin	select CLKDEV_LOOKUP
6042a153f1cSJohn Crispin	select ARCH_HAS_RESET_CONTROLLER
6052a153f1cSJohn Crispin	select RESET_CONTROLLER
606ae2b5bb6SJohn Crispin
6071da177e4SLinus Torvaldsconfig SGI_IP22
6083fa986faSMartin Michlmayr	bool "SGI IP22 (Indy/Indigo2)"
6090e2794b0SRalf Baechle	select FW_ARC
6100e2794b0SRalf Baechle	select FW_ARC32
6111da177e4SLinus Torvalds	select BOOT_ELF32
61242f77542SRalf Baechle	select CEVT_R4K
613940f6b48SRalf Baechle	select CSRC_R4K
614e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
6151da177e4SLinus Torvalds	select DMA_NONCOHERENT
6165e83d430SRalf Baechle	select HW_HAS_EISA
617d865bea4SRalf Baechle	select I8253
61868de4803SThomas Bogendoerfer	select I8259
6191da177e4SLinus Torvalds	select IP22_CPU_SCACHE
62067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
621aa414dffSRalf Baechle	select GENERIC_ISA_DMA_SUPPORT_BROKEN
622e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
623e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
62436e5c21dSThomas Bogendoerfer	select SGI_HAS_HAL2
625e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
626e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
627e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
6281da177e4SLinus Torvalds	select SWAP_IO_SPACE
6297cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
6307cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
6312b5e63f6SMartin Michlmayr	#
6322b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6332b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6342b5e63f6SMartin Michlmayr	#
6352b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6362b5e63f6SMartin Michlmayr	# for a more details discussion
6372b5e63f6SMartin Michlmayr	#
6382b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
639ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
640ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6415e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
642930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6431da177e4SLinus Torvalds	help
6441da177e4SLinus Torvalds	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
6451da177e4SLinus Torvalds	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
6461da177e4SLinus Torvalds	  that runs on these, say Y here.
6471da177e4SLinus Torvalds
6481da177e4SLinus Torvaldsconfig SGI_IP27
6493fa986faSMartin Michlmayr	bool "SGI IP27 (Origin200/2000)"
6500e2794b0SRalf Baechle	select FW_ARC
6510e2794b0SRalf Baechle	select FW_ARC64
6525e83d430SRalf Baechle	select BOOT_ELF64
653e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
654634286f1SRalf Baechle	select DMA_COHERENT
65536a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
6561da177e4SLinus Torvalds	select HW_HAS_PCI
657130e2fb7SRalf Baechle	select NR_CPUS_DEFAULT_64
6587cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000
659ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
6605e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
661d8cb4e11SRalf Baechle	select SYS_SUPPORTS_NUMA
6621a5c5de1SRalf Baechle	select SYS_SUPPORTS_SMP
663930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
6641da177e4SLinus Torvalds	help
6651da177e4SLinus Torvalds	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
6661da177e4SLinus Torvalds	  workstations.  To compile a Linux kernel that runs on these, say Y
6671da177e4SLinus Torvalds	  here.
6681da177e4SLinus Torvalds
669e2defae5SThomas Bogendoerferconfig SGI_IP28
6707d60717eSKees Cook	bool "SGI IP28 (Indigo2 R10k)"
6710e2794b0SRalf Baechle	select FW_ARC
6720e2794b0SRalf Baechle	select FW_ARC64
673e2defae5SThomas Bogendoerfer	select BOOT_ELF64
674e2defae5SThomas Bogendoerfer	select CEVT_R4K
675e2defae5SThomas Bogendoerfer	select CSRC_R4K
676e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION
677e2defae5SThomas Bogendoerfer	select DMA_NONCOHERENT
678e2defae5SThomas Bogendoerfer	select GENERIC_ISA_DMA_SUPPORT_BROKEN
67967e38cf2SRalf Baechle	select IRQ_MIPS_CPU
680e2defae5SThomas Bogendoerfer	select HW_HAS_EISA
681e2defae5SThomas Bogendoerfer	select I8253
682e2defae5SThomas Bogendoerfer	select I8259
683e2defae5SThomas Bogendoerfer	select SGI_HAS_I8042
684e2defae5SThomas Bogendoerfer	select SGI_HAS_INDYDOG
6855b438c44SThomas Bogendoerfer	select SGI_HAS_HAL2
686e2defae5SThomas Bogendoerfer	select SGI_HAS_SEEQ
687e2defae5SThomas Bogendoerfer	select SGI_HAS_WD93
688e2defae5SThomas Bogendoerfer	select SGI_HAS_ZILOG
689e2defae5SThomas Bogendoerfer	select SWAP_IO_SPACE
690e2defae5SThomas Bogendoerfer	select SYS_HAS_CPU_R10000
6912b5e63f6SMartin Michlmayr	#
6922b5e63f6SMartin Michlmayr	# Disable EARLY_PRINTK for now since it leads to overwritten prom
6932b5e63f6SMartin Michlmayr	# memory during early boot on some machines.
6942b5e63f6SMartin Michlmayr	#
6952b5e63f6SMartin Michlmayr	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
6962b5e63f6SMartin Michlmayr	# for a more details discussion
6972b5e63f6SMartin Michlmayr	#
6982b5e63f6SMartin Michlmayr	# select SYS_HAS_EARLY_PRINTK
699e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_64BIT_KERNEL
700e2defae5SThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
701dc24d68dSThomas Bogendoerfer	select MIPS_L1_CACHE_SHIFT_7
702e2defae5SThomas Bogendoerfer      help
703e2defae5SThomas Bogendoerfer        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
704e2defae5SThomas Bogendoerfer        kernel that runs on these, say Y here.
705e2defae5SThomas Bogendoerfer
7061da177e4SLinus Torvaldsconfig SGI_IP32
707cfd2afc0SRalf Baechle	bool "SGI IP32 (O2)"
7080e2794b0SRalf Baechle	select FW_ARC
7090e2794b0SRalf Baechle	select FW_ARC32
7101da177e4SLinus Torvalds	select BOOT_ELF32
71142f77542SRalf Baechle	select CEVT_R4K
712940f6b48SRalf Baechle	select CSRC_R4K
7131da177e4SLinus Torvalds	select DMA_NONCOHERENT
7141da177e4SLinus Torvalds	select HW_HAS_PCI
71567e38cf2SRalf Baechle	select IRQ_MIPS_CPU
7161da177e4SLinus Torvalds	select R5000_CPU_SCACHE
7171da177e4SLinus Torvalds	select RM7000_CPU_SCACHE
7187cf8053bSRalf Baechle	select SYS_HAS_CPU_R5000
7197cf8053bSRalf Baechle	select SYS_HAS_CPU_R10000 if BROKEN
7207cf8053bSRalf Baechle	select SYS_HAS_CPU_RM7000
721dd2f18feSRalf Baechle	select SYS_HAS_CPU_NEVADA
722ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_64BIT_KERNEL
7235e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7241da177e4SLinus Torvalds	help
7251da177e4SLinus Torvalds	  If you want this kernel to run on SGI O2 workstation, say Y here.
7261da177e4SLinus Torvalds
727ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE
728ade299d8SYoichi Yuasa	bool "Sibyte BCM91120C-CRhine"
7295e83d430SRalf Baechle	select BOOT_ELF32
7305e83d430SRalf Baechle	select DMA_COHERENT
7315e83d430SRalf Baechle	select SIBYTE_BCM1120
7325e83d430SRalf Baechle	select SWAP_IO_SPACE
7337cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7345e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7355e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7365e83d430SRalf Baechle
737ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL
738ade299d8SYoichi Yuasa	bool "Sibyte BCM91120x-Carmel"
7395e83d430SRalf Baechle	select BOOT_ELF32
7405e83d430SRalf Baechle	select DMA_COHERENT
7415e83d430SRalf Baechle	select SIBYTE_BCM1120
7425e83d430SRalf Baechle	select SWAP_IO_SPACE
7437cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7445e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7455e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7465e83d430SRalf Baechle
7475e83d430SRalf Baechleconfig SIBYTE_CRHONE
7483fa986faSMartin Michlmayr	bool "Sibyte BCM91125C-CRhone"
7495e83d430SRalf Baechle	select BOOT_ELF32
7505e83d430SRalf Baechle	select DMA_COHERENT
7515e83d430SRalf Baechle	select SIBYTE_BCM1125
7525e83d430SRalf Baechle	select SWAP_IO_SPACE
7537cf8053bSRalf Baechle	select SYS_HAS_CPU_SB1
7545e83d430SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
7555e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
7565e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
7575e83d430SRalf Baechle
758ade299d8SYoichi Yuasaconfig SIBYTE_RHONE
759ade299d8SYoichi Yuasa	bool "Sibyte BCM91125E-Rhone"
760ade299d8SYoichi Yuasa	select BOOT_ELF32
761ade299d8SYoichi Yuasa	select DMA_COHERENT
762ade299d8SYoichi Yuasa	select SIBYTE_BCM1125H
763ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
764ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
765ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
766ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
767ade299d8SYoichi Yuasa
768ade299d8SYoichi Yuasaconfig SIBYTE_SWARM
769ade299d8SYoichi Yuasa	bool "Sibyte BCM91250A-SWARM"
770ade299d8SYoichi Yuasa	select BOOT_ELF32
771ade299d8SYoichi Yuasa	select DMA_COHERENT
772fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
773ade299d8SYoichi Yuasa	select SIBYTE_SB1250
774ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
775ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
776ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
777ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
778ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
779cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
780ade299d8SYoichi Yuasa
781ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR
782ade299d8SYoichi Yuasa	bool "Sibyte BCM91250C2-LittleSur"
783ade299d8SYoichi Yuasa	select BOOT_ELF32
784ade299d8SYoichi Yuasa	select DMA_COHERENT
785fcf3ca4cSSebastian Andrzej Siewior	select HAVE_PATA_PLATFORM
786ade299d8SYoichi Yuasa	select SIBYTE_SB1250
787ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
788ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
789ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
790ade299d8SYoichi Yuasa	select SYS_SUPPORTS_HIGHMEM
791ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
792ade299d8SYoichi Yuasa
793ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA
794ade299d8SYoichi Yuasa	bool "Sibyte BCM91250E-Sentosa"
795ade299d8SYoichi Yuasa	select BOOT_ELF32
796ade299d8SYoichi Yuasa	select DMA_COHERENT
797ade299d8SYoichi Yuasa	select SIBYTE_SB1250
798ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
799ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
800ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
801ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
802ade299d8SYoichi Yuasa
803ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR
804ade299d8SYoichi Yuasa	bool "Sibyte BCM91480B-BigSur"
805ade299d8SYoichi Yuasa	select BOOT_ELF32
806ade299d8SYoichi Yuasa	select DMA_COHERENT
807ade299d8SYoichi Yuasa	select NR_CPUS_DEFAULT_4
808ade299d8SYoichi Yuasa	select SIBYTE_BCM1x80
809ade299d8SYoichi Yuasa	select SWAP_IO_SPACE
810ade299d8SYoichi Yuasa	select SYS_HAS_CPU_SB1
811ade299d8SYoichi Yuasa	select SYS_SUPPORTS_BIG_ENDIAN
812651194f8SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
813ade299d8SYoichi Yuasa	select SYS_SUPPORTS_LITTLE_ENDIAN
814cce335aeSRalf Baechle	select ZONE_DMA32 if 64BIT
815ade299d8SYoichi Yuasa
81614b36af4SThomas Bogendoerferconfig SNI_RM
81714b36af4SThomas Bogendoerfer	bool "SNI RM200/300/400"
8180e2794b0SRalf Baechle	select FW_ARC if CPU_LITTLE_ENDIAN
8190e2794b0SRalf Baechle	select FW_ARC32 if CPU_LITTLE_ENDIAN
820aaa9fad3SPaul Bolle	select FW_SNIPROM if CPU_BIG_ENDIAN
8215e83d430SRalf Baechle	select ARCH_MAY_HAVE_PC_FDC
8225e83d430SRalf Baechle	select BOOT_ELF32
82342f77542SRalf Baechle	select CEVT_R4K
824940f6b48SRalf Baechle	select CSRC_R4K
825e2defae5SThomas Bogendoerfer	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
8265e83d430SRalf Baechle	select DMA_NONCOHERENT
8275e83d430SRalf Baechle	select GENERIC_ISA_DMA
8288a118c38SRalf Baechle	select HAVE_PCSPKR_PLATFORM
8295e83d430SRalf Baechle	select HW_HAS_EISA
8305e83d430SRalf Baechle	select HW_HAS_PCI
83167e38cf2SRalf Baechle	select IRQ_MIPS_CPU
832d865bea4SRalf Baechle	select I8253
8335e83d430SRalf Baechle	select I8259
8345e83d430SRalf Baechle	select ISA
8354a0312fcSThomas Bogendoerfer	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
8367cf8053bSRalf Baechle	select SYS_HAS_CPU_R4X00
8374a0312fcSThomas Bogendoerfer	select SYS_HAS_CPU_R5000
838c066a32aSThomas Bogendoerfer	select SYS_HAS_CPU_R10000
8394a0312fcSThomas Bogendoerfer	select R5000_CPU_SCACHE
84036a88530SRalf Baechle	select SYS_HAS_EARLY_PRINTK
841ed5ba2fbSYoichi Yuasa	select SYS_SUPPORTS_32BIT_KERNEL
8427d60717eSKees Cook	select SYS_SUPPORTS_64BIT_KERNEL
8434a0312fcSThomas Bogendoerfer	select SYS_SUPPORTS_BIG_ENDIAN
8445e83d430SRalf Baechle	select SYS_SUPPORTS_HIGHMEM
8455e83d430SRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
8461da177e4SLinus Torvalds	help
84714b36af4SThomas Bogendoerfer	  The SNI RM200/300/400 are MIPS-based machines manufactured by
84814b36af4SThomas Bogendoerfer	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
8495e83d430SRalf Baechle	  Technology and now in turn merged with Fujitsu.  Say Y here to
8505e83d430SRalf Baechle	  support this machine type.
8511da177e4SLinus Torvalds
852edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX
853edcaf1a6SAtsushi Nemoto	bool "Toshiba TX39 series based machines"
8545e83d430SRalf Baechle
855edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX
856edcaf1a6SAtsushi Nemoto	bool "Toshiba TX49 series based machines"
85723fbee9dSRalf Baechle
85873b4390fSRalf Baechleconfig MIKROTIK_RB532
85973b4390fSRalf Baechle	bool "Mikrotik RB532 boards"
86073b4390fSRalf Baechle	select CEVT_R4K
86173b4390fSRalf Baechle	select CSRC_R4K
86273b4390fSRalf Baechle	select DMA_NONCOHERENT
86373b4390fSRalf Baechle	select HW_HAS_PCI
86467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
86573b4390fSRalf Baechle	select SYS_HAS_CPU_MIPS32_R1
86673b4390fSRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
86773b4390fSRalf Baechle	select SYS_SUPPORTS_LITTLE_ENDIAN
86873b4390fSRalf Baechle	select SWAP_IO_SPACE
86973b4390fSRalf Baechle	select BOOT_RAW
870d30a2b47SLinus Walleij	select GPIOLIB
871930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_4
87273b4390fSRalf Baechle	help
87373b4390fSRalf Baechle	  Support the Mikrotik(tm) RouterBoard 532 series,
87473b4390fSRalf Baechle	  based on the IDT RC32434 SoC.
87573b4390fSRalf Baechle
8769ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC
8779ddebc46SDavid Daney	bool "Cavium Networks Octeon SoC based boards"
878a86c7f72SDavid Daney	select CEVT_R4K
87934adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
880a86c7f72SDavid Daney	select DMA_COHERENT
881a86c7f72SDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
882a86c7f72SDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
883f65aad41SRalf Baechle	select EDAC_SUPPORT
884b01aec9bSBorislav Petkov	select EDAC_ATOMIC_SCRUB
88573569d87SDavid Daney	select SYS_SUPPORTS_LITTLE_ENDIAN
88673569d87SDavid Daney	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
887a86c7f72SDavid Daney	select SYS_HAS_EARLY_PRINTK
8885e683389SDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
889e8635b48SDavid Daney	select HW_HAS_PCI
890f00e001eSDavid Daney	select ZONE_DMA32
891465aaed0SDavid Daney	select HOLES_IN_ZONE
892d30a2b47SLinus Walleij	select GPIOLIB
8936e511163SDavid Daney	select LIBFDT
8946e511163SDavid Daney	select USE_OF
8956e511163SDavid Daney	select ARCH_SPARSEMEM_ENABLE
8966e511163SDavid Daney	select SYS_SUPPORTS_SMP
8977820b84bSDavid Daney	select NR_CPUS_DEFAULT_64
8987820b84bSDavid Daney	select MIPS_NR_CPU_NR_MAP_1024
899e326479fSAndrew Bresticker	select BUILTIN_DTB
9008c1e6b14SDavid Daney	select MTD_COMPLEX_MAPPINGS
9013ff72be4SSteven J. Hill	select SYS_SUPPORTS_RELOCATABLE
902a86c7f72SDavid Daney	help
903a86c7f72SDavid Daney	  This option supports all of the Octeon reference boards from Cavium
904a86c7f72SDavid Daney	  Networks. It builds a kernel that dynamically determines the Octeon
905a86c7f72SDavid Daney	  CPU type and supports all known board reference implementations.
906a86c7f72SDavid Daney	  Some of the supported boards are:
907a86c7f72SDavid Daney		EBT3000
908a86c7f72SDavid Daney		EBH3000
909a86c7f72SDavid Daney		EBH3100
910a86c7f72SDavid Daney		Thunder
911a86c7f72SDavid Daney		Kodama
912a86c7f72SDavid Daney		Hikari
913a86c7f72SDavid Daney	  Say Y here for most Octeon reference boards.
914a86c7f72SDavid Daney
9157f058e85SJayachandran Cconfig NLM_XLR_BOARD
9167f058e85SJayachandran C	bool "Netlogic XLR/XLS based systems"
9177f058e85SJayachandran C	select BOOT_ELF32
9187f058e85SJayachandran C	select NLM_COMMON
9197f058e85SJayachandran C	select SYS_HAS_CPU_XLR
9207f058e85SJayachandran C	select SYS_SUPPORTS_SMP
9217f058e85SJayachandran C	select HW_HAS_PCI
9227f058e85SJayachandran C	select SWAP_IO_SPACE
9237f058e85SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9247f058e85SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
92534adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
9267f058e85SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9277f058e85SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9287f058e85SJayachandran C	select DMA_COHERENT
9297f058e85SJayachandran C	select NR_CPUS_DEFAULT_32
9307f058e85SJayachandran C	select CEVT_R4K
9317f058e85SJayachandran C	select CSRC_R4K
93267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
933b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9347f058e85SJayachandran C	select SYNC_R4K
9357f058e85SJayachandran C	select SYS_HAS_EARLY_PRINTK
9368f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9378f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9387f058e85SJayachandran C	help
9397f058e85SJayachandran C	  Support for systems based on Netlogic XLR and XLS processors.
9407f058e85SJayachandran C	  Say Y here if you have a XLR or XLS based board.
9417f058e85SJayachandran C
9421c773ea4SJayachandran Cconfig NLM_XLP_BOARD
9431c773ea4SJayachandran C	bool "Netlogic XLP based systems"
9441c773ea4SJayachandran C	select BOOT_ELF32
9451c773ea4SJayachandran C	select NLM_COMMON
9461c773ea4SJayachandran C	select SYS_HAS_CPU_XLP
9471c773ea4SJayachandran C	select SYS_SUPPORTS_SMP
9481c773ea4SJayachandran C	select HW_HAS_PCI
9491c773ea4SJayachandran C	select SYS_SUPPORTS_32BIT_KERNEL
9501c773ea4SJayachandran C	select SYS_SUPPORTS_64BIT_KERNEL
95134adb28dSRalf Baechle	select ARCH_PHYS_ADDR_T_64BIT
952d30a2b47SLinus Walleij	select GPIOLIB
9531c773ea4SJayachandran C	select SYS_SUPPORTS_BIG_ENDIAN
9541c773ea4SJayachandran C	select SYS_SUPPORTS_LITTLE_ENDIAN
9551c773ea4SJayachandran C	select SYS_SUPPORTS_HIGHMEM
9561c773ea4SJayachandran C	select DMA_COHERENT
9571c773ea4SJayachandran C	select NR_CPUS_DEFAULT_32
9581c773ea4SJayachandran C	select CEVT_R4K
9591c773ea4SJayachandran C	select CSRC_R4K
96067e38cf2SRalf Baechle	select IRQ_MIPS_CPU
961b97215fdSJayachandran C	select ZONE_DMA32 if 64BIT
9621c773ea4SJayachandran C	select SYNC_R4K
9631c773ea4SJayachandran C	select SYS_HAS_EARLY_PRINTK
9642f6528e1SJayachandran C	select USE_OF
9658f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT
9668f0b0430SJayachandran C	select SYS_SUPPORTS_ZBOOT_UART16550
9671c773ea4SJayachandran C	help
9681c773ea4SJayachandran C	  This board is based on Netlogic XLP Processor.
9691c773ea4SJayachandran C	  Say Y here if you have a XLP based board.
9701c773ea4SJayachandran C
9719bc463beSDavid Daneyconfig MIPS_PARAVIRT
9729bc463beSDavid Daney	bool "Para-Virtualized guest system"
9739bc463beSDavid Daney	select CEVT_R4K
9749bc463beSDavid Daney	select CSRC_R4K
9759bc463beSDavid Daney	select DMA_COHERENT
9769bc463beSDavid Daney	select SYS_SUPPORTS_64BIT_KERNEL
9779bc463beSDavid Daney	select SYS_SUPPORTS_32BIT_KERNEL
9789bc463beSDavid Daney	select SYS_SUPPORTS_BIG_ENDIAN
9799bc463beSDavid Daney	select SYS_SUPPORTS_SMP
9809bc463beSDavid Daney	select NR_CPUS_DEFAULT_4
9819bc463beSDavid Daney	select SYS_HAS_EARLY_PRINTK
9829bc463beSDavid Daney	select SYS_HAS_CPU_MIPS32_R2
9839bc463beSDavid Daney	select SYS_HAS_CPU_MIPS64_R2
9849bc463beSDavid Daney	select SYS_HAS_CPU_CAVIUM_OCTEON
9859bc463beSDavid Daney	select HW_HAS_PCI
9869bc463beSDavid Daney	select SWAP_IO_SPACE
9879bc463beSDavid Daney	help
9889bc463beSDavid Daney	  This option supports guest running under ????
9899bc463beSDavid Daney
9901da177e4SLinus Torvaldsendchoice
9911da177e4SLinus Torvalds
992e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig"
9933b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig"
994d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig"
995a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig"
996e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig"
9978945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig"
998eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig"
9995e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig"
10005ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig"
10018ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig"
10021f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig"
10032572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig"
1004af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig"
10050f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig"
1006ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig"
100729c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig"
100838b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig"
100922b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig"
10105e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig"
1011a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig"
101230ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig"
101330ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig"
10147f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig"
1015ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig"
101638b18f72SRalf Baechle
10175e83d430SRalf Baechleendmenu
10185e83d430SRalf Baechle
10191da177e4SLinus Torvaldsconfig RWSEM_GENERIC_SPINLOCK
10201da177e4SLinus Torvalds	bool
10211da177e4SLinus Torvalds	default y
10221da177e4SLinus Torvalds
10231da177e4SLinus Torvaldsconfig RWSEM_XCHGADD_ALGORITHM
10241da177e4SLinus Torvalds	bool
10251da177e4SLinus Torvalds
10263c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT
10273c9ee7efSAkinobu Mita	bool
10283c9ee7efSAkinobu Mita	default y
10293c9ee7efSAkinobu Mita
10301da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY
10311da177e4SLinus Torvalds	bool
10321da177e4SLinus Torvalds	default y
10331da177e4SLinus Torvalds
1034ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER
10351cc89038SAtsushi Nemoto	bool
10361cc89038SAtsushi Nemoto	default y
10371cc89038SAtsushi Nemoto
10381da177e4SLinus Torvalds#
10391da177e4SLinus Torvalds# Select some configuration options automatically based on user selections.
10401da177e4SLinus Torvalds#
10410e2794b0SRalf Baechleconfig FW_ARC
10421da177e4SLinus Torvalds	bool
10431da177e4SLinus Torvalds
104461ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC
104561ed242dSRalf Baechle	bool
104661ed242dSRalf Baechle
10479267a30dSMarc St-Jeanconfig BOOT_RAW
10489267a30dSMarc St-Jean	bool
10499267a30dSMarc St-Jean
1050217dd11eSRalf Baechleconfig CEVT_BCM1480
1051217dd11eSRalf Baechle	bool
1052217dd11eSRalf Baechle
10536457d9fcSYoichi Yuasaconfig CEVT_DS1287
10546457d9fcSYoichi Yuasa	bool
10556457d9fcSYoichi Yuasa
10561097c6acSYoichi Yuasaconfig CEVT_GT641XX
10571097c6acSYoichi Yuasa	bool
10581097c6acSYoichi Yuasa
105942f77542SRalf Baechleconfig CEVT_R4K
106042f77542SRalf Baechle	bool
106142f77542SRalf Baechle
1062217dd11eSRalf Baechleconfig CEVT_SB1250
1063217dd11eSRalf Baechle	bool
1064217dd11eSRalf Baechle
1065229f773eSAtsushi Nemotoconfig CEVT_TXX9
1066229f773eSAtsushi Nemoto	bool
1067229f773eSAtsushi Nemoto
1068217dd11eSRalf Baechleconfig CSRC_BCM1480
1069217dd11eSRalf Baechle	bool
1070217dd11eSRalf Baechle
10714247417dSYoichi Yuasaconfig CSRC_IOASIC
10724247417dSYoichi Yuasa	bool
10734247417dSYoichi Yuasa
1074940f6b48SRalf Baechleconfig CSRC_R4K
1075940f6b48SRalf Baechle	bool
1076940f6b48SRalf Baechle
1077217dd11eSRalf Baechleconfig CSRC_SB1250
1078217dd11eSRalf Baechle	bool
1079217dd11eSRalf Baechle
1080a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL
1081a7f4df4eSAlex Smith	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1082a7f4df4eSAlex Smith
1083a9aec7feSAtsushi Nemotoconfig GPIO_TXX9
1084d30a2b47SLinus Walleij	select GPIOLIB
1085a9aec7feSAtsushi Nemoto	bool
1086a9aec7feSAtsushi Nemoto
10870e2794b0SRalf Baechleconfig FW_CFE
1088df78b5c8SAurelien Jarno	bool
1089df78b5c8SAurelien Jarno
10904bafad92SFUJITA Tomonoriconfig ARCH_DMA_ADDR_T_64BIT
109134adb28dSRalf Baechle	def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
10924bafad92SFUJITA Tomonori
109340e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES
109440e084a5SRalf Baechle	bool
109540e084a5SRalf Baechle
1096885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT
1097885014bcSFelix Fietkau	select DMA_NONCOHERENT
1098885014bcSFelix Fietkau	bool
1099885014bcSFelix Fietkau
110020d33064SPaul Burtonconfig DMA_PERDEV_COHERENT
110120d33064SPaul Burton	bool
110220d33064SPaul Burton	select DMA_MAYBE_COHERENT
110320d33064SPaul Burton
11041da177e4SLinus Torvaldsconfig DMA_COHERENT
11051da177e4SLinus Torvalds	bool
11061da177e4SLinus Torvalds
11071da177e4SLinus Torvaldsconfig DMA_NONCOHERENT
11081da177e4SLinus Torvalds	bool
1109e1e02b32SFUJITA Tomonori	select NEED_DMA_MAP_STATE
11104ce588cdSRalf Baechle
1111e1e02b32SFUJITA Tomonoriconfig NEED_DMA_MAP_STATE
11124ce588cdSRalf Baechle	bool
11131da177e4SLinus Torvalds
111436a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK
11151da177e4SLinus Torvalds	bool
11161da177e4SLinus Torvalds
11171b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU
1118dbb74540SRalf Baechle	bool
1119dbb74540SRalf Baechle
11201da177e4SLinus Torvaldsconfig MIPS_BONITO64
11211da177e4SLinus Torvalds	bool
11221da177e4SLinus Torvalds
11231da177e4SLinus Torvaldsconfig MIPS_MSC
11241da177e4SLinus Torvalds	bool
11251da177e4SLinus Torvalds
11261f21d2bdSBrian Murphyconfig MIPS_NILE4
11271f21d2bdSBrian Murphy	bool
11281f21d2bdSBrian Murphy
112939b8d525SRalf Baechleconfig SYNC_R4K
113039b8d525SRalf Baechle	bool
113139b8d525SRalf Baechle
1132487d70d0SGabor Juhosconfig MIPS_MACHINE
1133487d70d0SGabor Juhos	def_bool n
1134487d70d0SGabor Juhos
1135ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP
1136d388d685SMaciej W. Rozycki	def_bool n
1137d388d685SMaciej W. Rozycki
11384e0748f5SMarkos Chandrasconfig GENERIC_CSUM
11394e0748f5SMarkos Chandras	bool
11404e0748f5SMarkos Chandras
11418313da30SRalf Baechleconfig GENERIC_ISA_DMA
11428313da30SRalf Baechle	bool
11438313da30SRalf Baechle	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1144a35bee8aSNamhyung Kim	select ISA_DMA_API
11458313da30SRalf Baechle
1146aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN
1147aa414dffSRalf Baechle	bool
11488313da30SRalf Baechle	select GENERIC_ISA_DMA
1149aa414dffSRalf Baechle
1150a35bee8aSNamhyung Kimconfig ISA_DMA_API
1151a35bee8aSNamhyung Kim	bool
1152a35bee8aSNamhyung Kim
1153465aaed0SDavid Daneyconfig HOLES_IN_ZONE
1154465aaed0SDavid Daney	bool
1155465aaed0SDavid Daney
11568c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE
11578c530ea3SMatt Redfearn	bool
11588c530ea3SMatt Redfearn	help
11598c530ea3SMatt Redfearn	 Selected if the platform supports relocating the kernel.
11608c530ea3SMatt Redfearn	 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
11618c530ea3SMatt Redfearn	 to allow access to command line and entropy sources.
11628c530ea3SMatt Redfearn
1163f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT
1164f381bf6dSDavid Daney	def_bool y
1165f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_CBPF_JIT
1166f381bf6dSDavid Daney
1167f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT
1168f381bf6dSDavid Daney	def_bool y
1169f381bf6dSDavid Daney	depends on BPF_JIT && HAVE_EBPF_JIT
1170f381bf6dSDavid Daney
1171f381bf6dSDavid Daney
11725e83d430SRalf Baechle#
11736b2aac42SMasanari Iida# Endianness selection.  Sufficiently obscure so many users don't know what to
11745e83d430SRalf Baechle# answer,so we try hard to limit the available choices.  Also the use of a
11755e83d430SRalf Baechle# choice statement should be more obvious to the user.
11765e83d430SRalf Baechle#
11775e83d430SRalf Baechlechoice
11786b2aac42SMasanari Iida	prompt "Endianness selection"
11791da177e4SLinus Torvalds	help
11801da177e4SLinus Torvalds	  Some MIPS machines can be configured for either little or big endian
11815e83d430SRalf Baechle	  byte order. These modes require different kernels and a different
11823cb2fcccSMatt LaPlante	  Linux distribution.  In general there is one preferred byteorder for a
11835e83d430SRalf Baechle	  particular system but some systems are just as commonly used in the
11843dde6ad8SDavid Sterba	  one or the other endianness.
11855e83d430SRalf Baechle
11865e83d430SRalf Baechleconfig CPU_BIG_ENDIAN
11875e83d430SRalf Baechle	bool "Big endian"
11885e83d430SRalf Baechle	depends on SYS_SUPPORTS_BIG_ENDIAN
11895e83d430SRalf Baechle
11905e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN
11915e83d430SRalf Baechle	bool "Little endian"
11925e83d430SRalf Baechle	depends on SYS_SUPPORTS_LITTLE_ENDIAN
11935e83d430SRalf Baechle
11945e83d430SRalf Baechleendchoice
11955e83d430SRalf Baechle
119622b0763aSDavid Daneyconfig EXPORT_UASM
119722b0763aSDavid Daney	bool
119822b0763aSDavid Daney
11992116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION
12002116245eSRalf Baechle	bool
12012116245eSRalf Baechle
12025e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN
12035e83d430SRalf Baechle	bool
12045e83d430SRalf Baechle
12055e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN
12065e83d430SRalf Baechle	bool
12071da177e4SLinus Torvalds
12089cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS
12099cffd154SDavid Daney	bool
12109cffd154SDavid Daney	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
12119cffd154SDavid Daney	default y
12129cffd154SDavid Daney
1213aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT
1214aa1762f4SDavid Daney	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1215aa1762f4SDavid Daney
12161da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K
12171da177e4SLinus Torvalds	bool
12181da177e4SLinus Torvalds
12199267a30dSMarc St-Jeanconfig IRQ_MSP_SLP
12209267a30dSMarc St-Jean	bool
12219267a30dSMarc St-Jean
12229267a30dSMarc St-Jeanconfig IRQ_MSP_CIC
12239267a30dSMarc St-Jean	bool
12249267a30dSMarc St-Jean
12258420fd00SAtsushi Nemotoconfig IRQ_TXX9
12268420fd00SAtsushi Nemoto	bool
12278420fd00SAtsushi Nemoto
1228d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX
1229d5ab1a69SYoichi Yuasa	bool
1230d5ab1a69SYoichi Yuasa
1231252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0
12321da177e4SLinus Torvalds	bool
12331da177e4SLinus Torvalds
12349267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL
12359267a30dSMarc St-Jean	bool
12369267a30dSMarc St-Jean
1237a83860c2SRalf Baechleconfig SOC_EMMA2RH
1238a83860c2SRalf Baechle	bool
1239a83860c2SRalf Baechle	select CEVT_R4K
1240a83860c2SRalf Baechle	select CSRC_R4K
1241a83860c2SRalf Baechle	select DMA_NONCOHERENT
124267e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1243a83860c2SRalf Baechle	select SWAP_IO_SPACE
1244a83860c2SRalf Baechle	select SYS_HAS_CPU_R5500
1245a83860c2SRalf Baechle	select SYS_SUPPORTS_32BIT_KERNEL
1246a83860c2SRalf Baechle	select SYS_SUPPORTS_64BIT_KERNEL
1247a83860c2SRalf Baechle	select SYS_SUPPORTS_BIG_ENDIAN
1248a83860c2SRalf Baechle
1249edb6310aSDaniel Lairdconfig SOC_PNX833X
1250edb6310aSDaniel Laird	bool
1251edb6310aSDaniel Laird	select CEVT_R4K
1252edb6310aSDaniel Laird	select CSRC_R4K
125367e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1254edb6310aSDaniel Laird	select DMA_NONCOHERENT
1255edb6310aSDaniel Laird	select SYS_HAS_CPU_MIPS32_R2
1256edb6310aSDaniel Laird	select SYS_SUPPORTS_32BIT_KERNEL
1257edb6310aSDaniel Laird	select SYS_SUPPORTS_LITTLE_ENDIAN
1258edb6310aSDaniel Laird	select SYS_SUPPORTS_BIG_ENDIAN
1259377cb1b6SRalf Baechle	select SYS_SUPPORTS_MIPS16
1260edb6310aSDaniel Laird	select CPU_MIPSR2_IRQ_VI
1261edb6310aSDaniel Laird
1262edb6310aSDaniel Lairdconfig SOC_PNX8335
1263edb6310aSDaniel Laird	bool
1264edb6310aSDaniel Laird	select SOC_PNX833X
1265edb6310aSDaniel Laird
1266a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM
1267a7e07b1aSMarkos Chandras	bool
1268a7e07b1aSMarkos Chandras
12691da177e4SLinus Torvaldsconfig SWAP_IO_SPACE
12701da177e4SLinus Torvalds	bool
12711da177e4SLinus Torvalds
1272e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG
1273e2defae5SThomas Bogendoerfer	bool
1274e2defae5SThomas Bogendoerfer
12755b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2
12765b438c44SThomas Bogendoerfer	bool
12775b438c44SThomas Bogendoerfer
1278e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ
1279e2defae5SThomas Bogendoerfer	bool
1280e2defae5SThomas Bogendoerfer
1281e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93
1282e2defae5SThomas Bogendoerfer	bool
1283e2defae5SThomas Bogendoerfer
1284e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG
1285e2defae5SThomas Bogendoerfer	bool
1286e2defae5SThomas Bogendoerfer
1287e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042
1288e2defae5SThomas Bogendoerfer	bool
1289e2defae5SThomas Bogendoerfer
1290e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION
1291e2defae5SThomas Bogendoerfer	bool
1292e2defae5SThomas Bogendoerfer
12930e2794b0SRalf Baechleconfig FW_ARC32
12945e83d430SRalf Baechle	bool
12955e83d430SRalf Baechle
1296aaa9fad3SPaul Bolleconfig FW_SNIPROM
1297231a35d3SThomas Bogendoerfer	bool
1298231a35d3SThomas Bogendoerfer
12991da177e4SLinus Torvaldsconfig BOOT_ELF32
13001da177e4SLinus Torvalds	bool
13011da177e4SLinus Torvalds
1302930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4
1303930beb5aSFlorian Fainelli	bool
1304930beb5aSFlorian Fainelli
1305930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5
1306930beb5aSFlorian Fainelli	bool
1307930beb5aSFlorian Fainelli
1308930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6
1309930beb5aSFlorian Fainelli	bool
1310930beb5aSFlorian Fainelli
1311930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7
1312930beb5aSFlorian Fainelli	bool
1313930beb5aSFlorian Fainelli
13141da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT
13151da177e4SLinus Torvalds	int
1316a4c0201eSFlorian Fainelli	default "7" if MIPS_L1_CACHE_SHIFT_7
13175432eeb6SKevin Cernekee	default "6" if MIPS_L1_CACHE_SHIFT_6
13185432eeb6SKevin Cernekee	default "5" if MIPS_L1_CACHE_SHIFT_5
13195432eeb6SKevin Cernekee	default "4" if MIPS_L1_CACHE_SHIFT_4
13201da177e4SLinus Torvalds	default "5"
13211da177e4SLinus Torvalds
13221da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT
13231da177e4SLinus Torvalds	bool
13241da177e4SLinus Torvalds
13251da177e4SLinus Torvaldsconfig ARC_CONSOLE
13261da177e4SLinus Torvalds	bool "ARC console support"
1327e2defae5SThomas Bogendoerfer	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
13281da177e4SLinus Torvalds
13291da177e4SLinus Torvaldsconfig ARC_MEMORY
13301da177e4SLinus Torvalds	bool
133114b36af4SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP32
13321da177e4SLinus Torvalds	default y
13331da177e4SLinus Torvalds
13341da177e4SLinus Torvaldsconfig ARC_PROMLIB
13351da177e4SLinus Torvalds	bool
1336e2defae5SThomas Bogendoerfer	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
13371da177e4SLinus Torvalds	default y
13381da177e4SLinus Torvalds
13390e2794b0SRalf Baechleconfig FW_ARC64
13401da177e4SLinus Torvalds	bool
13411da177e4SLinus Torvalds
13421da177e4SLinus Torvaldsconfig BOOT_ELF64
13431da177e4SLinus Torvalds	bool
13441da177e4SLinus Torvalds
13451da177e4SLinus Torvaldsmenu "CPU selection"
13461da177e4SLinus Torvalds
13471da177e4SLinus Torvaldschoice
13481da177e4SLinus Torvalds	prompt "CPU type"
13491da177e4SLinus Torvalds	default CPU_R4X00
13501da177e4SLinus Torvalds
13510e476d91SHuacai Chenconfig CPU_LOONGSON3
13520e476d91SHuacai Chen	bool "Loongson 3 CPU"
13530e476d91SHuacai Chen	depends on SYS_HAS_CPU_LOONGSON3
13540e476d91SHuacai Chen	select CPU_SUPPORTS_64BIT_KERNEL
13550e476d91SHuacai Chen	select CPU_SUPPORTS_HIGHMEM
13560e476d91SHuacai Chen	select CPU_SUPPORTS_HUGEPAGES
13570e476d91SHuacai Chen	select WEAK_ORDERING
13580e476d91SHuacai Chen	select WEAK_REORDERING_BEYOND_LLSC
1359b2edcfc8SHuacai Chen	select MIPS_PGD_C0_CONTEXT
136017c99d94SHuacai Chen	select MIPS_L1_CACHE_SHIFT_6
1361d30a2b47SLinus Walleij	select GPIOLIB
13620e476d91SHuacai Chen	help
13630e476d91SHuacai Chen		The Loongson 3 processor implements the MIPS64R2 instruction
13640e476d91SHuacai Chen		set with many extensions.
13650e476d91SHuacai Chen
13661e820da3SHuacai Chenconfig LOONGSON3_ENHANCEMENT
13671e820da3SHuacai Chen	bool "New Loongson 3 CPU Enhancements"
13681e820da3SHuacai Chen	default n
13691e820da3SHuacai Chen	select CPU_MIPSR2
13701e820da3SHuacai Chen	select CPU_HAS_PREFETCH
13711e820da3SHuacai Chen	depends on CPU_LOONGSON3
13721e820da3SHuacai Chen	help
13731e820da3SHuacai Chen	  New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
13741e820da3SHuacai Chen	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
13751e820da3SHuacai Chen	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
13761e820da3SHuacai Chen	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
13771e820da3SHuacai Chen	  Fast TLB refill support, etc.
13781e820da3SHuacai Chen
13791e820da3SHuacai Chen	  This option enable those enhancements which are not probed at run
13801e820da3SHuacai Chen	  time. If you want a generic kernel to run on all Loongson 3 machines,
13811e820da3SHuacai Chen	  please say 'N' here. If you want a high-performance kernel to run on
13821e820da3SHuacai Chen	  new Loongson 3 machines only, please say 'Y' here.
13831e820da3SHuacai Chen
13843702bba5SWu Zhangjinconfig CPU_LOONGSON2E
13853702bba5SWu Zhangjin	bool "Loongson 2E"
13863702bba5SWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2E
13873702bba5SWu Zhangjin	select CPU_LOONGSON2
13882a21c730SFuxin Zhang	help
13892a21c730SFuxin Zhang	  The Loongson 2E processor implements the MIPS III instruction set
13902a21c730SFuxin Zhang	  with many extensions.
13912a21c730SFuxin Zhang
139225985edcSLucas De Marchi	  It has an internal FPGA northbridge, which is compatible to
13936f7a251aSWu Zhangjin	  bonito64.
13946f7a251aSWu Zhangjin
13956f7a251aSWu Zhangjinconfig CPU_LOONGSON2F
13966f7a251aSWu Zhangjin	bool "Loongson 2F"
13976f7a251aSWu Zhangjin	depends on SYS_HAS_CPU_LOONGSON2F
13986f7a251aSWu Zhangjin	select CPU_LOONGSON2
1399d30a2b47SLinus Walleij	select GPIOLIB
14006f7a251aSWu Zhangjin	help
14016f7a251aSWu Zhangjin	  The Loongson 2F processor implements the MIPS III instruction set
14026f7a251aSWu Zhangjin	  with many extensions.
14036f7a251aSWu Zhangjin
14046f7a251aSWu Zhangjin	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
14056f7a251aSWu Zhangjin	  have a similar programming interface with FPGA northbridge used in
14066f7a251aSWu Zhangjin	  Loongson2E.
14076f7a251aSWu Zhangjin
1408ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B
1409ca585cf9SKelvin Cheung	bool "Loongson 1B"
1410ca585cf9SKelvin Cheung	depends on SYS_HAS_CPU_LOONGSON1B
1411ca585cf9SKelvin Cheung	select CPU_LOONGSON1
14129ec88b60SKelvin Cheung	select LEDS_GPIO_REGISTER
1413ca585cf9SKelvin Cheung	help
1414ca585cf9SKelvin Cheung	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1415ca585cf9SKelvin Cheung	  release 2 instruction set.
1416ca585cf9SKelvin Cheung
141712e3280bSYang Lingconfig CPU_LOONGSON1C
141812e3280bSYang Ling	bool "Loongson 1C"
141912e3280bSYang Ling	depends on SYS_HAS_CPU_LOONGSON1C
142012e3280bSYang Ling	select CPU_LOONGSON1
142112e3280bSYang Ling	select LEDS_GPIO_REGISTER
142212e3280bSYang Ling	help
142312e3280bSYang Ling	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
142412e3280bSYang Ling	  release 2 instruction set.
142512e3280bSYang Ling
14266e760c8dSRalf Baechleconfig CPU_MIPS32_R1
14276e760c8dSRalf Baechle	bool "MIPS32 Release 1"
14287cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R1
14296e760c8dSRalf Baechle	select CPU_HAS_PREFETCH
1430797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1431ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14326e760c8dSRalf Baechle	help
14335e83d430SRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14341e5f1caaSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14351e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14361e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
14371e5f1caaSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14381e5f1caaSRalf Baechle	  Release 2 of the MIPS32 architecture is available since several
14391e5f1caaSRalf Baechle	  years so chances are you even have a MIPS32 Release 2 processor
14401e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS32_R2 instead for better
14411e5f1caaSRalf Baechle	  performance.
14421e5f1caaSRalf Baechle
14431e5f1caaSRalf Baechleconfig CPU_MIPS32_R2
14441e5f1caaSRalf Baechle	bool "MIPS32 Release 2"
14457cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS32_R2
14461e5f1caaSRalf Baechle	select CPU_HAS_PREFETCH
1447797798c1SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
1448ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1449a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
14502235a54dSSanjay Lal	select HAVE_KVM
14511e5f1caaSRalf Baechle	help
14525e83d430SRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
14536e760c8dSRalf Baechle	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
14546e760c8dSRalf Baechle	  MIPS processor are based on a MIPS32 processor.  If you know the
14556e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14566e760c8dSRalf Baechle	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
14571da177e4SLinus Torvalds
14587fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6
1459674d10e2SMarkos Chandras	bool "MIPS32 Release 6"
14607fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R6
14617fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
14627fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
14637fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
14647fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
14654e0748f5SMarkos Chandras	select GENERIC_CSUM
14667fd08ca5SLeonid Yegoshin	select HAVE_KVM
14677fd08ca5SLeonid Yegoshin	select MIPS_O32_FP64_SUPPORT
14687fd08ca5SLeonid Yegoshin	help
14697fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
14707fd08ca5SLeonid Yegoshin	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
14717fd08ca5SLeonid Yegoshin	  family, are based on a MIPS32r6 processor. If you own an older
14727fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
14737fd08ca5SLeonid Yegoshin
14746e760c8dSRalf Baechleconfig CPU_MIPS64_R1
14756e760c8dSRalf Baechle	bool "MIPS64 Release 1"
14767cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R1
1477797798c1SRalf Baechle	select CPU_HAS_PREFETCH
1478ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1479ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1480ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
14819cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
14826e760c8dSRalf Baechle	help
14836e760c8dSRalf Baechle	  Choose this option to build a kernel for release 1 or later of the
14846e760c8dSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
14856e760c8dSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
14866e760c8dSRalf Baechle	  specific type of processor in your system, choose those that one
14876e760c8dSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
14881e5f1caaSRalf Baechle	  Release 2 of the MIPS64 architecture is available since several
14891e5f1caaSRalf Baechle	  years so chances are you even have a MIPS64 Release 2 processor
14901e5f1caaSRalf Baechle	  in which case you should choose CPU_MIPS64_R2 instead for better
14911e5f1caaSRalf Baechle	  performance.
14921e5f1caaSRalf Baechle
14931e5f1caaSRalf Baechleconfig CPU_MIPS64_R2
14941e5f1caaSRalf Baechle	bool "MIPS64 Release 2"
14957cf8053bSRalf Baechle	depends on SYS_HAS_CPU_MIPS64_R2
1496797798c1SRalf Baechle	select CPU_HAS_PREFETCH
14971e5f1caaSRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
14981e5f1caaSRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1499ec28f306SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15009cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1501a5e9a69eSPaul Burton	select CPU_SUPPORTS_MSA
150240a2df49SJames Hogan	select HAVE_KVM
15031e5f1caaSRalf Baechle	help
15041e5f1caaSRalf Baechle	  Choose this option to build a kernel for release 2 or later of the
15051e5f1caaSRalf Baechle	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
15061e5f1caaSRalf Baechle	  MIPS processor are based on a MIPS64 processor.  If you know the
15071e5f1caaSRalf Baechle	  specific type of processor in your system, choose those that one
15081e5f1caaSRalf Baechle	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
15091da177e4SLinus Torvalds
15107fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6
1511674d10e2SMarkos Chandras	bool "MIPS64 Release 6"
15127fd08ca5SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS64_R6
15137fd08ca5SLeonid Yegoshin	select CPU_HAS_PREFETCH
15147fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_32BIT_KERNEL
15157fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_64BIT_KERNEL
15167fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_HIGHMEM
15177fd08ca5SLeonid Yegoshin	select CPU_SUPPORTS_MSA
15184e0748f5SMarkos Chandras	select GENERIC_CSUM
15192e6c7747SJames Hogan	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
152040a2df49SJames Hogan	select HAVE_KVM
15217fd08ca5SLeonid Yegoshin	help
15227fd08ca5SLeonid Yegoshin	  Choose this option to build a kernel for release 6 or later of the
15237fd08ca5SLeonid Yegoshin	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
15247fd08ca5SLeonid Yegoshin	  family, are based on a MIPS64r6 processor. If you own an older
15257fd08ca5SLeonid Yegoshin	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
15267fd08ca5SLeonid Yegoshin
15271da177e4SLinus Torvaldsconfig CPU_R3000
15281da177e4SLinus Torvalds	bool "R3000"
15297cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R3000
1530f7062ddbSRalf Baechle	select CPU_HAS_WB
1531ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1532797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
15331da177e4SLinus Torvalds	help
15341da177e4SLinus Torvalds	  Please make sure to pick the right CPU type. Linux/MIPS is not
15351da177e4SLinus Torvalds	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
15361da177e4SLinus Torvalds	  *not* work on R4000 machines and vice versa.  However, since most
15371da177e4SLinus Torvalds	  of the supported machines have an R4000 (or similar) CPU, R4x00
15381da177e4SLinus Torvalds	  might be a safe bet.  If the resulting kernel does not work,
15391da177e4SLinus Torvalds	  try to recompile with R3000.
15401da177e4SLinus Torvalds
15411da177e4SLinus Torvaldsconfig CPU_TX39XX
15421da177e4SLinus Torvalds	bool "R39XX"
15437cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX39XX
1544ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
15451da177e4SLinus Torvalds
15461da177e4SLinus Torvaldsconfig CPU_VR41XX
15471da177e4SLinus Torvalds	bool "R41xx"
15487cf8053bSRalf Baechle	depends on SYS_HAS_CPU_VR41XX
1549ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1550ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15511da177e4SLinus Torvalds	help
15525e83d430SRalf Baechle	  The options selects support for the NEC VR4100 series of processors.
15531da177e4SLinus Torvalds	  Only choose this option if you have one of these processors as a
15541da177e4SLinus Torvalds	  kernel built with this option will not run on any other type of
15551da177e4SLinus Torvalds	  processor or vice versa.
15561da177e4SLinus Torvalds
15571da177e4SLinus Torvaldsconfig CPU_R4300
15581da177e4SLinus Torvalds	bool "R4300"
15597cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4300
1560ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1561ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
15621da177e4SLinus Torvalds	help
15631da177e4SLinus Torvalds	  MIPS Technologies R4300-series processors.
15641da177e4SLinus Torvalds
15651da177e4SLinus Torvaldsconfig CPU_R4X00
15661da177e4SLinus Torvalds	bool "R4x00"
15677cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R4X00
1568ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1569ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1570970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15711da177e4SLinus Torvalds	help
15721da177e4SLinus Torvalds	  MIPS Technologies R4000-series processors other than 4300, including
15731da177e4SLinus Torvalds	  the R4000, R4400, R4600, and 4700.
15741da177e4SLinus Torvalds
15751da177e4SLinus Torvaldsconfig CPU_TX49XX
15761da177e4SLinus Torvalds	bool "R49XX"
15777cf8053bSRalf Baechle	depends on SYS_HAS_CPU_TX49XX
1578de862b48SAtsushi Nemoto	select CPU_HAS_PREFETCH
1579ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1580ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1581970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15821da177e4SLinus Torvalds
15831da177e4SLinus Torvaldsconfig CPU_R5000
15841da177e4SLinus Torvalds	bool "R5000"
15857cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5000
1586ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1587ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1588970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15891da177e4SLinus Torvalds	help
15901da177e4SLinus Torvalds	  MIPS Technologies R5000-series processors other than the Nevada.
15911da177e4SLinus Torvalds
15921da177e4SLinus Torvaldsconfig CPU_R5432
15931da177e4SLinus Torvalds	bool "R5432"
15947cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R5432
15955e83d430SRalf Baechle	select CPU_SUPPORTS_32BIT_KERNEL
15965e83d430SRalf Baechle	select CPU_SUPPORTS_64BIT_KERNEL
1597970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
15981da177e4SLinus Torvalds
1599542c1020SShinya Kuribayashiconfig CPU_R5500
1600542c1020SShinya Kuribayashi	bool "R5500"
1601542c1020SShinya Kuribayashi	depends on SYS_HAS_CPU_R5500
1602542c1020SShinya Kuribayashi	select CPU_SUPPORTS_32BIT_KERNEL
1603542c1020SShinya Kuribayashi	select CPU_SUPPORTS_64BIT_KERNEL
16049cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1605542c1020SShinya Kuribayashi	help
1606542c1020SShinya Kuribayashi	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1607542c1020SShinya Kuribayashi	  instruction set.
1608542c1020SShinya Kuribayashi
16091da177e4SLinus Torvaldsconfig CPU_NEVADA
16101da177e4SLinus Torvalds	bool "RM52xx"
16117cf8053bSRalf Baechle	depends on SYS_HAS_CPU_NEVADA
1612ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1613ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1614970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16151da177e4SLinus Torvalds	help
16161da177e4SLinus Torvalds	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
16171da177e4SLinus Torvalds
16181da177e4SLinus Torvaldsconfig CPU_R8000
16191da177e4SLinus Torvalds	bool "R8000"
16207cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R8000
16215e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1622ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
16231da177e4SLinus Torvalds	help
16241da177e4SLinus Torvalds	  MIPS Technologies R8000 processors.  Note these processors are
16251da177e4SLinus Torvalds	  uncommon and the support for them is incomplete.
16261da177e4SLinus Torvalds
16271da177e4SLinus Torvaldsconfig CPU_R10000
16281da177e4SLinus Torvalds	bool "R10000"
16297cf8053bSRalf Baechle	depends on SYS_HAS_CPU_R10000
16305e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1631ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1632ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1633797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1634970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16351da177e4SLinus Torvalds	help
16361da177e4SLinus Torvalds	  MIPS Technologies R10000-series processors.
16371da177e4SLinus Torvalds
16381da177e4SLinus Torvaldsconfig CPU_RM7000
16391da177e4SLinus Torvalds	bool "RM7000"
16407cf8053bSRalf Baechle	depends on SYS_HAS_CPU_RM7000
16415e83d430SRalf Baechle	select CPU_HAS_PREFETCH
1642ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1643ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1644797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1645970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16461da177e4SLinus Torvalds
16471da177e4SLinus Torvaldsconfig CPU_SB1
16481da177e4SLinus Torvalds	bool "SB1"
16497cf8053bSRalf Baechle	depends on SYS_HAS_CPU_SB1
1650ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_32BIT_KERNEL
1651ed5ba2fbSYoichi Yuasa	select CPU_SUPPORTS_64BIT_KERNEL
1652797798c1SRalf Baechle	select CPU_SUPPORTS_HIGHMEM
1653970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
16540004a9dfSRalf Baechle	select WEAK_ORDERING
16551da177e4SLinus Torvalds
1656a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON
1657a86c7f72SDavid Daney	bool "Cavium Octeon processor"
16585e683389SDavid Daney	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1659a86c7f72SDavid Daney	select CPU_HAS_PREFETCH
1660a86c7f72SDavid Daney	select CPU_SUPPORTS_64BIT_KERNEL
1661a86c7f72SDavid Daney	select WEAK_ORDERING
1662a86c7f72SDavid Daney	select CPU_SUPPORTS_HIGHMEM
16639cffd154SDavid Daney	select CPU_SUPPORTS_HUGEPAGES
1664df115f3eSBen Hutchings	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1665df115f3eSBen Hutchings	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1666930beb5aSFlorian Fainelli	select MIPS_L1_CACHE_SHIFT_7
16670ae3abcdSJames Hogan	select HAVE_KVM
1668a86c7f72SDavid Daney	help
1669a86c7f72SDavid Daney	  The Cavium Octeon processor is a highly integrated chip containing
1670a86c7f72SDavid Daney	  many ethernet hardware widgets for networking tasks. The processor
1671a86c7f72SDavid Daney	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1672a86c7f72SDavid Daney	  Full details can be found at http://www.caviumnetworks.com.
1673a86c7f72SDavid Daney
1674cd746249SJonas Gorskiconfig CPU_BMIPS
1675cd746249SJonas Gorski	bool "Broadcom BMIPS"
1676cd746249SJonas Gorski	depends on SYS_HAS_CPU_BMIPS
1677cd746249SJonas Gorski	select CPU_MIPS32
1678fe7f62c0SJonas Gorski	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1679cd746249SJonas Gorski	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1680cd746249SJonas Gorski	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1681cd746249SJonas Gorski	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1682cd746249SJonas Gorski	select CPU_SUPPORTS_32BIT_KERNEL
1683cd746249SJonas Gorski	select DMA_NONCOHERENT
168467e38cf2SRalf Baechle	select IRQ_MIPS_CPU
1685cd746249SJonas Gorski	select SWAP_IO_SPACE
1686cd746249SJonas Gorski	select WEAK_ORDERING
1687c1c0c461SKevin Cernekee	select CPU_SUPPORTS_HIGHMEM
168869aaf9c8SJonas Gorski	select CPU_HAS_PREFETCH
1689a8d709b0SMarkus Mayer	select CPU_SUPPORTS_CPUFREQ
1690a8d709b0SMarkus Mayer	select MIPS_EXTERNAL_TIMER
1691c1c0c461SKevin Cernekee	help
1692fe7f62c0SJonas Gorski	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1693c1c0c461SKevin Cernekee
16947f058e85SJayachandran Cconfig CPU_XLR
16957f058e85SJayachandran C	bool "Netlogic XLR SoC"
16967f058e85SJayachandran C	depends on SYS_HAS_CPU_XLR
16977f058e85SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
16987f058e85SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
16997f058e85SJayachandran C	select CPU_SUPPORTS_HIGHMEM
1700970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
17017f058e85SJayachandran C	select WEAK_ORDERING
17027f058e85SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
17037f058e85SJayachandran C	help
17047f058e85SJayachandran C	  Netlogic Microsystems XLR/XLS processors.
17051c773ea4SJayachandran C
17061c773ea4SJayachandran Cconfig CPU_XLP
17071c773ea4SJayachandran C	bool "Netlogic XLP SoC"
17081c773ea4SJayachandran C	depends on SYS_HAS_CPU_XLP
17091c773ea4SJayachandran C	select CPU_SUPPORTS_32BIT_KERNEL
17101c773ea4SJayachandran C	select CPU_SUPPORTS_64BIT_KERNEL
17111c773ea4SJayachandran C	select CPU_SUPPORTS_HIGHMEM
17121c773ea4SJayachandran C	select WEAK_ORDERING
17131c773ea4SJayachandran C	select WEAK_REORDERING_BEYOND_LLSC
17141c773ea4SJayachandran C	select CPU_HAS_PREFETCH
1715d6504846SJayachandran C	select CPU_MIPSR2
1716ddba6833SPrem Mallappa	select CPU_SUPPORTS_HUGEPAGES
17172db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
17181c773ea4SJayachandran C	help
17191c773ea4SJayachandran C	  Netlogic Microsystems XLP processors.
17201da177e4SLinus Torvaldsendchoice
17211da177e4SLinus Torvalds
1722a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES
1723a6e18781SLeonid Yegoshin	bool "MIPS32 Release 3.5 Features"
1724a6e18781SLeonid Yegoshin	depends on SYS_HAS_CPU_MIPS32_R3_5
17257fd08ca5SLeonid Yegoshin	depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1726a6e18781SLeonid Yegoshin	help
1727a6e18781SLeonid Yegoshin	  Choose this option to build a kernel for release 2 or later of the
1728a6e18781SLeonid Yegoshin	  MIPS32 architecture including features from the 3.5 release such as
1729a6e18781SLeonid Yegoshin	  support for Enhanced Virtual Addressing (EVA).
1730a6e18781SLeonid Yegoshin
1731a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA
1732a6e18781SLeonid Yegoshin	bool "Enhanced Virtual Addressing (EVA)"
1733a6e18781SLeonid Yegoshin	depends on CPU_MIPS32_3_5_FEATURES
1734a6e18781SLeonid Yegoshin	select EVA
1735a6e18781SLeonid Yegoshin	default y
1736a6e18781SLeonid Yegoshin	help
1737a6e18781SLeonid Yegoshin	  Choose this option if you want to enable the Enhanced Virtual
1738a6e18781SLeonid Yegoshin	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1739a6e18781SLeonid Yegoshin	  One of its primary benefits is an increase in the maximum size
1740a6e18781SLeonid Yegoshin	  of lowmem (up to 3GB). If unsure, say 'N' here.
1741a6e18781SLeonid Yegoshin
1742c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES
1743c5b36783SSteven J. Hill	bool "MIPS32 Release 5 Features"
1744c5b36783SSteven J. Hill	depends on SYS_HAS_CPU_MIPS32_R5
1745c5b36783SSteven J. Hill	depends on CPU_MIPS32_R2
1746c5b36783SSteven J. Hill	help
1747c5b36783SSteven J. Hill	  Choose this option to build a kernel for release 2 or later of the
1748c5b36783SSteven J. Hill	  MIPS32 architecture including features from release 5 such as
1749c5b36783SSteven J. Hill	  support for Extended Physical Addressing (XPA).
1750c5b36783SSteven J. Hill
1751c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA
1752c5b36783SSteven J. Hill	bool "Extended Physical Addressing (XPA)"
1753c5b36783SSteven J. Hill	depends on CPU_MIPS32_R5_FEATURES
1754c5b36783SSteven J. Hill	depends on !EVA
1755c5b36783SSteven J. Hill	depends on !PAGE_SIZE_4KB
1756c5b36783SSteven J. Hill	depends on SYS_SUPPORTS_HIGHMEM
1757c5b36783SSteven J. Hill	select XPA
1758c5b36783SSteven J. Hill	select HIGHMEM
1759c5b36783SSteven J. Hill	select ARCH_PHYS_ADDR_T_64BIT
1760c5b36783SSteven J. Hill	default n
1761c5b36783SSteven J. Hill	help
1762c5b36783SSteven J. Hill	  Choose this option if you want to enable the Extended Physical
1763c5b36783SSteven J. Hill	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1764c5b36783SSteven J. Hill	  benefit is to increase physical addressing equal to or greater
1765c5b36783SSteven J. Hill	  than 40 bits. Note that this has the side effect of turning on
1766c5b36783SSteven J. Hill	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1767c5b36783SSteven J. Hill	  If unsure, say 'N' here.
1768c5b36783SSteven J. Hill
1769622844bfSWu Zhangjinif CPU_LOONGSON2F
1770622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS
1771622844bfSWu Zhangjin	bool
1772622844bfSWu Zhangjin
1773622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS
1774622844bfSWu Zhangjin	bool
1775622844bfSWu Zhangjin
1776622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS
1777622844bfSWu Zhangjin	bool "Loongson 2F Workarounds"
1778622844bfSWu Zhangjin	default y
1779622844bfSWu Zhangjin	select CPU_NOP_WORKAROUNDS
1780622844bfSWu Zhangjin	select CPU_JUMP_WORKAROUNDS
1781622844bfSWu Zhangjin	help
1782622844bfSWu Zhangjin	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1783622844bfSWu Zhangjin	  require workarounds.  Without workarounds the system may hang
1784622844bfSWu Zhangjin	  unexpectedly.  For more information please refer to the gas
1785622844bfSWu Zhangjin	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1786622844bfSWu Zhangjin
1787622844bfSWu Zhangjin	  Loongson 2F03 and later have fixed these issues and no workarounds
1788622844bfSWu Zhangjin	  are needed.  The workarounds have no significant side effect on them
1789622844bfSWu Zhangjin	  but may decrease the performance of the system so this option should
1790622844bfSWu Zhangjin	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1791622844bfSWu Zhangjin	  systems.
1792622844bfSWu Zhangjin
1793622844bfSWu Zhangjin	  If unsure, please say Y.
1794622844bfSWu Zhangjinendif # CPU_LOONGSON2F
1795622844bfSWu Zhangjin
17961b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT
17971b93b3c3SWu Zhangjin	bool
17981b93b3c3SWu Zhangjin	select HAVE_KERNEL_GZIP
17991b93b3c3SWu Zhangjin	select HAVE_KERNEL_BZIP2
180031c4867dSFlorian Fainelli	select HAVE_KERNEL_LZ4
18011b93b3c3SWu Zhangjin	select HAVE_KERNEL_LZMA
1802fe1d45e0SWu Zhangjin	select HAVE_KERNEL_LZO
18034e23eb63SFlorian Fainelli	select HAVE_KERNEL_XZ
18041b93b3c3SWu Zhangjin
18051b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550
18061b93b3c3SWu Zhangjin	bool
18071b93b3c3SWu Zhangjin	select SYS_SUPPORTS_ZBOOT
18081b93b3c3SWu Zhangjin
1809dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM
1810dbb98314SAlban Bedel	bool
1811dbb98314SAlban Bedel	select SYS_SUPPORTS_ZBOOT
1812dbb98314SAlban Bedel
18133702bba5SWu Zhangjinconfig CPU_LOONGSON2
18143702bba5SWu Zhangjin	bool
18153702bba5SWu Zhangjin	select CPU_SUPPORTS_32BIT_KERNEL
18163702bba5SWu Zhangjin	select CPU_SUPPORTS_64BIT_KERNEL
18173702bba5SWu Zhangjin	select CPU_SUPPORTS_HIGHMEM
1818970d032fSRalf Baechle	select CPU_SUPPORTS_HUGEPAGES
18193702bba5SWu Zhangjin
1820ca585cf9SKelvin Cheungconfig CPU_LOONGSON1
1821ca585cf9SKelvin Cheung	bool
1822ca585cf9SKelvin Cheung	select CPU_MIPS32
1823ca585cf9SKelvin Cheung	select CPU_MIPSR2
1824ca585cf9SKelvin Cheung	select CPU_HAS_PREFETCH
1825ca585cf9SKelvin Cheung	select CPU_SUPPORTS_32BIT_KERNEL
1826ca585cf9SKelvin Cheung	select CPU_SUPPORTS_HIGHMEM
1827f29ad10dSKelvin Cheung	select CPU_SUPPORTS_CPUFREQ
1828ca585cf9SKelvin Cheung
1829fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300
183004fa8bf7SJonas Gorski	select SMP_UP if SMP
18311bbb6c1bSKevin Cernekee	bool
1832cd746249SJonas Gorski
1833cd746249SJonas Gorskiconfig CPU_BMIPS4350
1834cd746249SJonas Gorski	bool
1835cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1836cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1837cd746249SJonas Gorski
1838cd746249SJonas Gorskiconfig CPU_BMIPS4380
1839cd746249SJonas Gorski	bool
1840bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_6
1841cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1842cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1843b4720809SFlorian Fainelli	select CPU_HAS_RIXI
1844cd746249SJonas Gorski
1845cd746249SJonas Gorskiconfig CPU_BMIPS5000
1846cd746249SJonas Gorski	bool
1847cd746249SJonas Gorski	select MIPS_CPU_SCACHE
1848bbf2ba67SKevin Cernekee	select MIPS_L1_CACHE_SHIFT_7
1849cd746249SJonas Gorski	select SYS_SUPPORTS_SMP
1850cd746249SJonas Gorski	select SYS_SUPPORTS_HOTPLUG_CPU
1851b4720809SFlorian Fainelli	select CPU_HAS_RIXI
18521bbb6c1bSKevin Cernekee
18530e476d91SHuacai Chenconfig SYS_HAS_CPU_LOONGSON3
18540e476d91SHuacai Chen	bool
18550e476d91SHuacai Chen	select CPU_SUPPORTS_CPUFREQ
1856b2edcfc8SHuacai Chen	select CPU_HAS_RIXI
18570e476d91SHuacai Chen
18583702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E
18592a21c730SFuxin Zhang	bool
18602a21c730SFuxin Zhang
18616f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F
18626f7a251aSWu Zhangjin	bool
186355045ff5SWu Zhangjin	select CPU_SUPPORTS_CPUFREQ
186455045ff5SWu Zhangjin	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
186522f1fdfdSWu Zhangjin	select CPU_SUPPORTS_UNCACHED_ACCELERATED
18666f7a251aSWu Zhangjin
1867ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B
1868ca585cf9SKelvin Cheung	bool
1869ca585cf9SKelvin Cheung
187012e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C
187112e3280bSYang Ling	bool
187212e3280bSYang Ling
18737cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1
18747cf8053bSRalf Baechle	bool
18757cf8053bSRalf Baechle
18767cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2
18777cf8053bSRalf Baechle	bool
18787cf8053bSRalf Baechle
1879a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5
1880a6e18781SLeonid Yegoshin	bool
1881a6e18781SLeonid Yegoshin
1882c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5
1883c5b36783SSteven J. Hill	bool
1884c5b36783SSteven J. Hill
18857fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6
18867fd08ca5SLeonid Yegoshin	bool
18877fd08ca5SLeonid Yegoshin
18887cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1
18897cf8053bSRalf Baechle	bool
18907cf8053bSRalf Baechle
18917cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2
18927cf8053bSRalf Baechle	bool
18937cf8053bSRalf Baechle
18947fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6
18957fd08ca5SLeonid Yegoshin	bool
18967fd08ca5SLeonid Yegoshin
18977cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000
18987cf8053bSRalf Baechle	bool
18997cf8053bSRalf Baechle
19007cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX
19017cf8053bSRalf Baechle	bool
19027cf8053bSRalf Baechle
19037cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX
19047cf8053bSRalf Baechle	bool
19057cf8053bSRalf Baechle
19067cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4300
19077cf8053bSRalf Baechle	bool
19087cf8053bSRalf Baechle
19097cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00
19107cf8053bSRalf Baechle	bool
19117cf8053bSRalf Baechle
19127cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX
19137cf8053bSRalf Baechle	bool
19147cf8053bSRalf Baechle
19157cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000
19167cf8053bSRalf Baechle	bool
19177cf8053bSRalf Baechle
19187cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5432
19197cf8053bSRalf Baechle	bool
19207cf8053bSRalf Baechle
1921542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500
1922542c1020SShinya Kuribayashi	bool
1923542c1020SShinya Kuribayashi
19247cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA
19257cf8053bSRalf Baechle	bool
19267cf8053bSRalf Baechle
19277cf8053bSRalf Baechleconfig SYS_HAS_CPU_R8000
19287cf8053bSRalf Baechle	bool
19297cf8053bSRalf Baechle
19307cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000
19317cf8053bSRalf Baechle	bool
19327cf8053bSRalf Baechle
19337cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000
19347cf8053bSRalf Baechle	bool
19357cf8053bSRalf Baechle
19367cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1
19377cf8053bSRalf Baechle	bool
19387cf8053bSRalf Baechle
19395e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON
19405e683389SDavid Daney	bool
19415e683389SDavid Daney
1942cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS
1943c1c0c461SKevin Cernekee	bool
1944c1c0c461SKevin Cernekee
1945fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300
1946c1c0c461SKevin Cernekee	bool
1947cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1948c1c0c461SKevin Cernekee
1949c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350
1950c1c0c461SKevin Cernekee	bool
1951cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1952c1c0c461SKevin Cernekee
1953c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380
1954c1c0c461SKevin Cernekee	bool
1955cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1956c1c0c461SKevin Cernekee
1957c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000
1958c1c0c461SKevin Cernekee	bool
1959cd746249SJonas Gorski	select SYS_HAS_CPU_BMIPS
1960c1c0c461SKevin Cernekee
19617f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR
19627f058e85SJayachandran C	bool
19637f058e85SJayachandran C
19641c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP
19651c773ea4SJayachandran C	bool
19661c773ea4SJayachandran C
1967b6911bbaSPaul Burtonconfig MIPS_MALTA_PM
1968b6911bbaSPaul Burton	depends on MIPS_MALTA
1969b6911bbaSPaul Burton	depends on PCI
1970b6911bbaSPaul Burton	bool
1971b6911bbaSPaul Burton	default y
1972b6911bbaSPaul Burton
197317099b11SRalf Baechle#
197417099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W
197517099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
197617099b11SRalf Baechle#
19770004a9dfSRalf Baechleconfig WEAK_ORDERING
19780004a9dfSRalf Baechle	bool
197917099b11SRalf Baechle
198017099b11SRalf Baechle#
198117099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC
198217099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
198317099b11SRalf Baechle#
198417099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC
198517099b11SRalf Baechle	bool
19865e83d430SRalf Baechleendmenu
19875e83d430SRalf Baechle
19885e83d430SRalf Baechle#
19895e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture
19905e83d430SRalf Baechle#
19915e83d430SRalf Baechleconfig CPU_MIPS32
19925e83d430SRalf Baechle	bool
19937fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
19945e83d430SRalf Baechle
19955e83d430SRalf Baechleconfig CPU_MIPS64
19965e83d430SRalf Baechle	bool
19977fd08ca5SLeonid Yegoshin	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
19985e83d430SRalf Baechle
19995e83d430SRalf Baechle#
2000c09b47d8SChris Dearman# These two indicate the revision of the architecture, either Release 1 or Release 2
20015e83d430SRalf Baechle#
20025e83d430SRalf Baechleconfig CPU_MIPSR1
20035e83d430SRalf Baechle	bool
20045e83d430SRalf Baechle	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
20055e83d430SRalf Baechle
20065e83d430SRalf Baechleconfig CPU_MIPSR2
20075e83d430SRalf Baechle	bool
2008a86c7f72SDavid Daney	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
20098256b17eSFlorian Fainelli	select CPU_HAS_RIXI
2010a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20115e83d430SRalf Baechle
20127fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6
20137fd08ca5SLeonid Yegoshin	bool
20147fd08ca5SLeonid Yegoshin	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
20158256b17eSFlorian Fainelli	select CPU_HAS_RIXI
201687321fddSPaul Burton	select HAVE_ARCH_BITREVERSE
20172db003a5SPaul Burton	select MIPS_ASID_BITS_VARIABLE
2018a7e07b1aSMarkos Chandras	select MIPS_SPRAM
20195e83d430SRalf Baechle
2020a6e18781SLeonid Yegoshinconfig EVA
2021a6e18781SLeonid Yegoshin	bool
2022a6e18781SLeonid Yegoshin
2023c5b36783SSteven J. Hillconfig XPA
2024c5b36783SSteven J. Hill	bool
2025c5b36783SSteven J. Hill
20265e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL
20275e83d430SRalf Baechle	bool
20285e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL
20295e83d430SRalf Baechle	bool
20305e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL
20315e83d430SRalf Baechle	bool
20325e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL
20335e83d430SRalf Baechle	bool
203455045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ
203555045ff5SWu Zhangjin	bool
203655045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG
203755045ff5SWu Zhangjin	bool
20389cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES
20399cffd154SDavid Daney	bool
204022f1fdfdSWu Zhangjinconfig CPU_SUPPORTS_UNCACHED_ACCELERATED
204122f1fdfdSWu Zhangjin	bool
204282622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT
204382622284SDavid Daney	bool
2044cebf8c0fSPaul Burton	default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
20455e83d430SRalf Baechle
20468192c9eaSDavid Daney#
20478192c9eaSDavid Daney# Set to y for ptrace access to watch registers.
20488192c9eaSDavid Daney#
20498192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS
20508192c9eaSDavid Daney       bool
2051679eb637SJames Hogan       default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
20528192c9eaSDavid Daney
20535e83d430SRalf Baechlemenu "Kernel type"
20545e83d430SRalf Baechle
20555e83d430SRalf Baechlechoice
20565e83d430SRalf Baechle	prompt "Kernel code model"
20575e83d430SRalf Baechle	help
20585e83d430SRalf Baechle	  You should only select this option if you have a workload that
20595e83d430SRalf Baechle	  actually benefits from 64-bit processing or if your machine has
20605e83d430SRalf Baechle	  large memory.  You will only be presented a single option in this
20615e83d430SRalf Baechle	  menu if your system does not support both 32-bit and 64-bit kernels.
20625e83d430SRalf Baechle
20635e83d430SRalf Baechleconfig 32BIT
20645e83d430SRalf Baechle	bool "32-bit kernel"
20655e83d430SRalf Baechle	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
20665e83d430SRalf Baechle	select TRAD_SIGNALS
20675e83d430SRalf Baechle	help
20685e83d430SRalf Baechle	  Select this option if you want to build a 32-bit kernel.
2069f17c4ca3SRalf Baechle
20705e83d430SRalf Baechleconfig 64BIT
20715e83d430SRalf Baechle	bool "64-bit kernel"
20725e83d430SRalf Baechle	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
20735e83d430SRalf Baechle	help
20745e83d430SRalf Baechle	  Select this option if you want to build a 64-bit kernel.
20755e83d430SRalf Baechle
20765e83d430SRalf Baechleendchoice
20775e83d430SRalf Baechle
20782235a54dSSanjay Lalconfig KVM_GUEST
20792235a54dSSanjay Lal	bool "KVM Guest Kernel"
2080f2a5b1d7SJames Hogan	depends on BROKEN_ON_SMP
20812235a54dSSanjay Lal	help
2082caa1faa7SJames Hogan	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2083caa1faa7SJames Hogan	  mode.
20842235a54dSSanjay Lal
2085eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ
2086eda3d33cSJames Hogan	int "Count/Compare Timer Frequency (MHz)"
20872235a54dSSanjay Lal	depends on KVM_GUEST
2088eda3d33cSJames Hogan	default 100
20892235a54dSSanjay Lal	help
2090eda3d33cSJames Hogan	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2091eda3d33cSJames Hogan	  emulation when determining guest CPU Frequency. Instead, the guest's
2092eda3d33cSJames Hogan	  timer frequency is specified directly.
20932235a54dSSanjay Lal
20941e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48
20951e321fa9SLeonid Yegoshin	bool "48 bits virtual memory"
20961e321fa9SLeonid Yegoshin	depends on 64BIT
20971e321fa9SLeonid Yegoshin	help
20983377e227SAlex Belits	  Support a maximum at least 48 bits of application virtual
20993377e227SAlex Belits	  memory.  Default is 40 bits or less, depending on the CPU.
21003377e227SAlex Belits	  For page sizes 16k and above, this option results in a small
21013377e227SAlex Belits	  memory overhead for page tables.  For 4k page size, a fourth
21023377e227SAlex Belits	  level of page tables is added which imposes both a memory
21033377e227SAlex Belits	  overhead as well as slower TLB fault handling.
21043377e227SAlex Belits
21051e321fa9SLeonid Yegoshin	  If unsure, say N.
21061e321fa9SLeonid Yegoshin
21071da177e4SLinus Torvaldschoice
21081da177e4SLinus Torvalds	prompt "Kernel page size"
21091da177e4SLinus Torvalds	default PAGE_SIZE_4KB
21101da177e4SLinus Torvalds
21111da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB
21121da177e4SLinus Torvalds	bool "4kB"
21130e476d91SHuacai Chen	depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
21141da177e4SLinus Torvalds	help
21151da177e4SLinus Torvalds	 This option select the standard 4kB Linux page size.  On some
21161da177e4SLinus Torvalds	 R3000-family processors this is the only available page size.  Using
21171da177e4SLinus Torvalds	 4kB page size will minimize memory consumption and is therefore
21181da177e4SLinus Torvalds	 recommended for low memory systems.
21191da177e4SLinus Torvalds
21201da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB
21211da177e4SLinus Torvalds	bool "8kB"
21227d60717eSKees Cook	depends on CPU_R8000 || CPU_CAVIUM_OCTEON
21231e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
21241da177e4SLinus Torvalds	help
21251da177e4SLinus Torvalds	  Using 8kB page size will result in higher performance kernel at
21261da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available
2127c52399beSRalf Baechle	  only on R8000 and cnMIPS processors.  Note that you will need a
2128c52399beSRalf Baechle	  suitable Linux distribution to support this.
21291da177e4SLinus Torvalds
21301da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB
21311da177e4SLinus Torvalds	bool "16kB"
2132714bfad6SRalf Baechle	depends on !CPU_R3000 && !CPU_TX39XX
21331da177e4SLinus Torvalds	help
21341da177e4SLinus Torvalds	  Using 16kB page size will result in higher performance kernel at
21351da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
2136714bfad6SRalf Baechle	  all non-R3000 family processors.  Note that you will need a suitable
2137714bfad6SRalf Baechle	  Linux distribution to support this.
21381da177e4SLinus Torvalds
2139c52399beSRalf Baechleconfig PAGE_SIZE_32KB
2140c52399beSRalf Baechle	bool "32kB"
2141c52399beSRalf Baechle	depends on CPU_CAVIUM_OCTEON
21421e321fa9SLeonid Yegoshin	depends on !MIPS_VA_BITS_48
2143c52399beSRalf Baechle	help
2144c52399beSRalf Baechle	  Using 32kB page size will result in higher performance kernel at
2145c52399beSRalf Baechle	  the price of higher memory consumption.  This option is available
2146c52399beSRalf Baechle	  only on cnMIPS cores.  Note that you will need a suitable Linux
2147c52399beSRalf Baechle	  distribution to support this.
2148c52399beSRalf Baechle
21491da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB
21501da177e4SLinus Torvalds	bool "64kB"
21513b2db173SPaul Burton	depends on !CPU_R3000 && !CPU_TX39XX
21521da177e4SLinus Torvalds	help
21531da177e4SLinus Torvalds	  Using 64kB page size will result in higher performance kernel at
21541da177e4SLinus Torvalds	  the price of higher memory consumption.  This option is available on
21551da177e4SLinus Torvalds	  all non-R3000 family processor.  Not that at the time of this
2156714bfad6SRalf Baechle	  writing this option is still high experimental.
21571da177e4SLinus Torvalds
21581da177e4SLinus Torvaldsendchoice
21591da177e4SLinus Torvalds
2160c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER
2161c9bace7cSDavid Daney	int "Maximum zone order"
2162e4362d1eSAlex Smith	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2163e4362d1eSAlex Smith	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2164e4362d1eSAlex Smith	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2165e4362d1eSAlex Smith	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2166e4362d1eSAlex Smith	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2167e4362d1eSAlex Smith	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2168c9bace7cSDavid Daney	range 11 64
2169c9bace7cSDavid Daney	default "11"
2170c9bace7cSDavid Daney	help
2171c9bace7cSDavid Daney	  The kernel memory allocator divides physically contiguous memory
2172c9bace7cSDavid Daney	  blocks into "zones", where each zone is a power of two number of
2173c9bace7cSDavid Daney	  pages.  This option selects the largest power of two that the kernel
2174c9bace7cSDavid Daney	  keeps in the memory allocator.  If you need to allocate very large
2175c9bace7cSDavid Daney	  blocks of physically contiguous memory, then you may need to
2176c9bace7cSDavid Daney	  increase this value.
2177c9bace7cSDavid Daney
2178c9bace7cSDavid Daney	  This config option is actually maximum order plus one. For example,
2179c9bace7cSDavid Daney	  a value of 11 means that the largest free memory block is 2^10 pages.
2180c9bace7cSDavid Daney
2181c9bace7cSDavid Daney	  The page size is not necessarily 4KB.  Keep this in mind
2182c9bace7cSDavid Daney	  when choosing a value for this option.
2183c9bace7cSDavid Daney
21841da177e4SLinus Torvaldsconfig BOARD_SCACHE
21851da177e4SLinus Torvalds	bool
21861da177e4SLinus Torvalds
21871da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE
21881da177e4SLinus Torvalds	bool
21891da177e4SLinus Torvalds	select BOARD_SCACHE
21901da177e4SLinus Torvalds
21919318c51aSChris Dearman#
21929318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches
21939318c51aSChris Dearman#
21949318c51aSChris Dearmanconfig MIPS_CPU_SCACHE
21959318c51aSChris Dearman	bool
21969318c51aSChris Dearman	select BOARD_SCACHE
21979318c51aSChris Dearman
21981da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE
21991da177e4SLinus Torvalds	bool
22001da177e4SLinus Torvalds	select BOARD_SCACHE
22011da177e4SLinus Torvalds
22021da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE
22031da177e4SLinus Torvalds	bool
22041da177e4SLinus Torvalds	select BOARD_SCACHE
22051da177e4SLinus Torvalds
22061da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS
22071da177e4SLinus Torvalds	bool "Use DMA to clear/copy pages"
22081da177e4SLinus Torvalds	depends on CPU_SB1
22091da177e4SLinus Torvalds	help
22101da177e4SLinus Torvalds	  Instead of using the CPU to zero and copy pages, use a Data Mover
22111da177e4SLinus Torvalds	  channel.  These DMA channels are otherwise unused by the standard
22121da177e4SLinus Torvalds	  SiByte Linux port.  Seems to give a small performance benefit.
22131da177e4SLinus Torvalds
22141da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH
2215c8094b53SRalf Baechle	bool
22161da177e4SLinus Torvalds
22173165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB
22183165c846SFlorian Fainelli	bool
22193b2db173SPaul Burton	default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
22203165c846SFlorian Fainelli
222191405eb6SFlorian Fainelliconfig CPU_R4K_FPU
222291405eb6SFlorian Fainelli	bool
2223a2aea699SPaul Burton	default y if !(CPU_R3000 || CPU_TX39XX)
222491405eb6SFlorian Fainelli
222562cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB
222662cedc4fSFlorian Fainelli	bool
222762cedc4fSFlorian Fainelli	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
222862cedc4fSFlorian Fainelli
222959d6ab86SRalf Baechleconfig MIPS_MT_SMP
2230a92b7f87SMarkos Chandras	bool "MIPS MT SMP support (1 TC on each available VPE)"
22315cbf9688SPaul Burton	default y
2232527f1028SPaul Burton	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
223359d6ab86SRalf Baechle	select CPU_MIPSR2_IRQ_VI
2234d725cf38SChris Dearman	select CPU_MIPSR2_IRQ_EI
2235c080faa5SSteven J. Hill	select SYNC_R4K
223659d6ab86SRalf Baechle	select MIPS_MT
223759d6ab86SRalf Baechle	select SMP
223887353d8aSRalf Baechle	select SMP_UP
2239c080faa5SSteven J. Hill	select SYS_SUPPORTS_SMP
2240c080faa5SSteven J. Hill	select SYS_SUPPORTS_SCHED_SMT
2241399aaa25SAl Cooper	select MIPS_PERF_SHARED_TC_COUNTERS
224259d6ab86SRalf Baechle	help
2243c080faa5SSteven J. Hill	  This is a kernel model which is known as SMVP. This is supported
2244c080faa5SSteven J. Hill	  on cores with the MT ASE and uses the available VPEs to implement
2245c080faa5SSteven J. Hill	  virtual processors which supports SMP. This is equivalent to the
2246c080faa5SSteven J. Hill	  Intel Hyperthreading feature. For further information go to
2247c080faa5SSteven J. Hill	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
224859d6ab86SRalf Baechle
2249f41ae0b2SRalf Baechleconfig MIPS_MT
2250f41ae0b2SRalf Baechle	bool
2251f41ae0b2SRalf Baechle
22520ab7aefcSRalf Baechleconfig SCHED_SMT
22530ab7aefcSRalf Baechle	bool "SMT (multithreading) scheduler support"
22540ab7aefcSRalf Baechle	depends on SYS_SUPPORTS_SCHED_SMT
22550ab7aefcSRalf Baechle	default n
22560ab7aefcSRalf Baechle	help
22570ab7aefcSRalf Baechle	  SMT scheduler support improves the CPU scheduler's decision making
22580ab7aefcSRalf Baechle	  when dealing with MIPS MT enabled cores at a cost of slightly
22590ab7aefcSRalf Baechle	  increased overhead in some places. If unsure say N here.
22600ab7aefcSRalf Baechle
22610ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT
22620ab7aefcSRalf Baechle	bool
22630ab7aefcSRalf Baechle
2264f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING
2265f41ae0b2SRalf Baechle	bool
2266f41ae0b2SRalf Baechle
2267f088fc84SRalf Baechleconfig MIPS_MT_FPAFF
2268f088fc84SRalf Baechle	bool "Dynamic FPU affinity for FP-intensive threads"
2269f088fc84SRalf Baechle	default y
2270b633648cSRalf Baechle	depends on MIPS_MT_SMP
227107cc0c9eSRalf Baechle
2272b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR
2273b0a668fbSLeonid Yegoshin	bool "MIPS R2-to-R6 emulator"
22749eaa9a82SPaul Burton	depends on CPU_MIPSR6
2275b0a668fbSLeonid Yegoshin	default y
2276b0a668fbSLeonid Yegoshin	help
2277b0a668fbSLeonid Yegoshin	  Choose this option if you want to run non-R6 MIPS userland code.
2278b0a668fbSLeonid Yegoshin	  Even if you say 'Y' here, the emulator will still be disabled by
227907edf0d4SMarkos Chandras	  default. You can enable it using the 'mipsr2emu' kernel option.
2280b0a668fbSLeonid Yegoshin	  The only reason this is a build-time option is to save ~14K from the
2281b0a668fbSLeonid Yegoshin	  final kernel image.
2282b0a668fbSLeonid Yegoshin
228307cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER
228407cc0c9eSRalf Baechle	bool "VPE loader support."
2285704e6460SMarkos Chandras	depends on SYS_SUPPORTS_MULTITHREADING && MODULES
228607cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_VI
228707cc0c9eSRalf Baechle	select CPU_MIPSR2_IRQ_EI
228807cc0c9eSRalf Baechle	select MIPS_MT
228907cc0c9eSRalf Baechle	help
229007cc0c9eSRalf Baechle	  Includes a loader for loading an elf relocatable object
229107cc0c9eSRalf Baechle	  onto another VPE and running it.
2292f088fc84SRalf Baechle
229317a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP
229417a1d523SDeng-Cheng Zhu	bool
229517a1d523SDeng-Cheng Zhu	default "y"
229617a1d523SDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && MIPS_CMP
229717a1d523SDeng-Cheng Zhu
22981a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT
22991a2a6d7eSDeng-Cheng Zhu	bool
23001a2a6d7eSDeng-Cheng Zhu	default "y"
23011a2a6d7eSDeng-Cheng Zhu	depends on MIPS_VPE_LOADER && !MIPS_CMP
23021a2a6d7eSDeng-Cheng Zhu
2303e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM
2304e01402b1SRalf Baechle	bool "Load VPE program into memory hidden from linux"
2305e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
2306e01402b1SRalf Baechle	default y
2307e01402b1SRalf Baechle	help
2308e01402b1SRalf Baechle	  The loader can use memory that is present but has been hidden from
2309e01402b1SRalf Baechle	  Linux using the kernel command line option "mem=xxMB". It's up to
2310e01402b1SRalf Baechle	  you to ensure the amount you put in the option and the space your
2311e01402b1SRalf Baechle	  program requires is less or equal to the amount physically present.
2312e01402b1SRalf Baechle
2313e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API
2314e01402b1SRalf Baechle	bool "Enable support for AP/SP API (RTLX)"
2315e01402b1SRalf Baechle	depends on MIPS_VPE_LOADER
23165e83d430SRalf Baechle	help
2317e01402b1SRalf Baechle
2318da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP
2319da615cf6SDeng-Cheng Zhu	bool
2320da615cf6SDeng-Cheng Zhu	default "y"
2321da615cf6SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && MIPS_CMP
2322da615cf6SDeng-Cheng Zhu
23232c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT
23242c973ef0SDeng-Cheng Zhu	bool
23252c973ef0SDeng-Cheng Zhu	default "y"
23262c973ef0SDeng-Cheng Zhu	depends on MIPS_VPE_APSP_API && !MIPS_CMP
23272c973ef0SDeng-Cheng Zhu
23284a16ff4cSRalf Baechleconfig MIPS_CMP
23295cac93b3SPaul Burton	bool "MIPS CMP framework support (DEPRECATED)"
23305676319cSMarkos Chandras	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2331b10b43baSMarkos Chandras	select SMP
2332eb9b5141STim Anderson	select SYNC_R4K
2333b10b43baSMarkos Chandras	select SYS_SUPPORTS_SMP
23344a16ff4cSRalf Baechle	select WEAK_ORDERING
23354a16ff4cSRalf Baechle	default n
23364a16ff4cSRalf Baechle	help
2337044505c7SPaul Burton	  Select this if you are using a bootloader which implements the "CMP
2338044505c7SPaul Burton	  framework" protocol (ie. YAMON) and want your kernel to make use of
2339044505c7SPaul Burton	  its ability to start secondary CPUs.
23404a16ff4cSRalf Baechle
23415cac93b3SPaul Burton	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
23425cac93b3SPaul Burton	  instead of this.
23435cac93b3SPaul Burton
23440ee958e1SPaul Burtonconfig MIPS_CPS
23450ee958e1SPaul Burton	bool "MIPS Coherent Processing System support"
23465a3e7c02SPaul Burton	depends on SYS_SUPPORTS_MIPS_CPS
23470ee958e1SPaul Burton	select MIPS_CM
23481d8f1f5aSPaul Burton	select MIPS_CPS_PM if HOTPLUG_CPU
23490ee958e1SPaul Burton	select SMP
23500ee958e1SPaul Burton	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
23511d8f1f5aSPaul Burton	select SYS_SUPPORTS_HOTPLUG_CPU
2352c8b7712cSPaul Burton	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
23530ee958e1SPaul Burton	select SYS_SUPPORTS_SMP
23540ee958e1SPaul Burton	select WEAK_ORDERING
23550ee958e1SPaul Burton	help
23560ee958e1SPaul Burton	  Select this if you wish to run an SMP kernel across multiple cores
23570ee958e1SPaul Burton	  within a MIPS Coherent Processing System. When this option is
23580ee958e1SPaul Burton	  enabled the kernel will probe for other cores and boot them with
23590ee958e1SPaul Burton	  no external assistance. It is safe to enable this when hardware
23600ee958e1SPaul Burton	  support is unavailable.
23610ee958e1SPaul Burton
23623179d37eSPaul Burtonconfig MIPS_CPS_PM
236339a59593SMarkos Chandras	depends on MIPS_CPS
23643179d37eSPaul Burton	bool
23653179d37eSPaul Burton
23669f98f3ddSPaul Burtonconfig MIPS_CM
23679f98f3ddSPaul Burton	bool
23683c9b4166SPaul Burton	select MIPS_CPC
23699f98f3ddSPaul Burton
23709c38cf44SPaul Burtonconfig MIPS_CPC
23719c38cf44SPaul Burton	bool
23722600990eSRalf Baechle
23731da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS
23741da177e4SLinus Torvalds	bool
23751da177e4SLinus Torvalds	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
23761da177e4SLinus Torvalds	default y
23771da177e4SLinus Torvalds
23781da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS
23791da177e4SLinus Torvalds	bool
23801da177e4SLinus Torvalds	depends on CPU_SB1 && CPU_SB1_PASS_2
23811da177e4SLinus Torvalds	default y
23821da177e4SLinus Torvalds
23832235a54dSSanjay Lal
238460ec6571Spascal@pabr.orgconfig ARCH_PHYS_ADDR_T_64BIT
238534adb28dSRalf Baechle       bool
238660ec6571Spascal@pabr.org
23879e2b5372SMarkos Chandraschoice
23889e2b5372SMarkos Chandras	prompt "SmartMIPS or microMIPS ASE support"
23899e2b5372SMarkos Chandras
23909e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
23919e2b5372SMarkos Chandras	bool "None"
23929e2b5372SMarkos Chandras	help
23939e2b5372SMarkos Chandras	  Select this if you want neither microMIPS nor SmartMIPS support
23949e2b5372SMarkos Chandras
23959693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS
23969693a853SFranck Bui-Huu	depends on SYS_SUPPORTS_SMARTMIPS
23979e2b5372SMarkos Chandras	bool "SmartMIPS"
23989693a853SFranck Bui-Huu	help
23999693a853SFranck Bui-Huu	  SmartMIPS is a extension of the MIPS32 architecture aimed at
24009693a853SFranck Bui-Huu	  increased security at both hardware and software level for
24019693a853SFranck Bui-Huu	  smartcards.  Enabling this option will allow proper use of the
24029693a853SFranck Bui-Huu	  SmartMIPS instructions by Linux applications.  However a kernel with
24039693a853SFranck Bui-Huu	  this option will not work on a MIPS core without SmartMIPS core.  If
24049693a853SFranck Bui-Huu	  you don't know you probably don't have SmartMIPS and should say N
24059693a853SFranck Bui-Huu	  here.
24069693a853SFranck Bui-Huu
2407bce86083SSteven J. Hillconfig CPU_MICROMIPS
24087fd08ca5SLeonid Yegoshin	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
24099e2b5372SMarkos Chandras	bool "microMIPS"
2410bce86083SSteven J. Hill	help
2411bce86083SSteven J. Hill	  When this option is enabled the kernel will be built using the
2412bce86083SSteven J. Hill	  microMIPS ISA
2413bce86083SSteven J. Hill
24149e2b5372SMarkos Chandrasendchoice
24159e2b5372SMarkos Chandras
2416a5e9a69eSPaul Burtonconfig CPU_HAS_MSA
24170ce3417eSPaul Burton	bool "Support for the MIPS SIMD Architecture"
2418a5e9a69eSPaul Burton	depends on CPU_SUPPORTS_MSA
24192a6cb669SPaul Burton	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2420a5e9a69eSPaul Burton	help
2421a5e9a69eSPaul Burton	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2422a5e9a69eSPaul Burton	  and a set of SIMD instructions to operate on them. When this option
24231db1af84SPaul Burton	  is enabled the kernel will support allocating & switching MSA
24241db1af84SPaul Burton	  vector register contexts. If you know that your kernel will only be
24251db1af84SPaul Burton	  running on CPUs which do not support MSA or that your userland will
24261db1af84SPaul Burton	  not be making use of it then you may wish to say N here to reduce
24271db1af84SPaul Burton	  the size & complexity of your kernel.
2428a5e9a69eSPaul Burton
2429a5e9a69eSPaul Burton	  If unsure, say Y.
2430a5e9a69eSPaul Burton
24311da177e4SLinus Torvaldsconfig CPU_HAS_WB
2432f7062ddbSRalf Baechle	bool
2433e01402b1SRalf Baechle
2434df0ac8a4SKevin Cernekeeconfig XKS01
2435df0ac8a4SKevin Cernekee	bool
2436df0ac8a4SKevin Cernekee
24378256b17eSFlorian Fainelliconfig CPU_HAS_RIXI
24388256b17eSFlorian Fainelli	bool
24398256b17eSFlorian Fainelli
2440f41ae0b2SRalf Baechle#
2441f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature
2442f41ae0b2SRalf Baechle#
2443e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI
2444f41ae0b2SRalf Baechle	bool
2445e01402b1SRalf Baechle
2446f41ae0b2SRalf Baechle#
2447f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature
2448f41ae0b2SRalf Baechle#
2449e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI
2450f41ae0b2SRalf Baechle	bool
2451e01402b1SRalf Baechle
24521da177e4SLinus Torvaldsconfig CPU_HAS_SYNC
24531da177e4SLinus Torvalds	bool
24541da177e4SLinus Torvalds	depends on !CPU_R3000
24551da177e4SLinus Torvalds	default y
24561da177e4SLinus Torvalds
24571da177e4SLinus Torvalds#
245820d60d99SMaciej W. Rozycki# CPU non-features
245920d60d99SMaciej W. Rozycki#
246020d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS
246120d60d99SMaciej W. Rozycki	bool
246220d60d99SMaciej W. Rozycki
246320d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS
246420d60d99SMaciej W. Rozycki	bool
246520d60d99SMaciej W. Rozycki	select CPU_R4400_WORKAROUNDS
246620d60d99SMaciej W. Rozycki
246720d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS
246820d60d99SMaciej W. Rozycki	bool
246920d60d99SMaciej W. Rozycki
24704edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT
24714edf00a4SPaul Burton	int
24724edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
24734edf00a4SPaul Burton	default 4 if CPU_R8000
24744edf00a4SPaul Burton	default 0
24754edf00a4SPaul Burton
24764edf00a4SPaul Burtonconfig MIPS_ASID_BITS
24774edf00a4SPaul Burton	int
24782db003a5SPaul Burton	default 0 if MIPS_ASID_BITS_VARIABLE
24794edf00a4SPaul Burton	default 6 if CPU_R3000 || CPU_TX39XX
24804edf00a4SPaul Burton	default 8
24814edf00a4SPaul Burton
24822db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE
24832db003a5SPaul Burton	bool
24842db003a5SPaul Burton
248520d60d99SMaciej W. Rozycki#
24861da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel.
24871da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed
24881da177e4SLinus Torvalds#   caches such as R3000, SB1, R7000 or those that look like they're virtually
24891da177e4SLinus Torvalds#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
24901da177e4SLinus Torvalds#   moment we protect the user and offer the highmem option only on machines
24911da177e4SLinus Torvalds#   where it's known to be safe.  This will not offer highmem on a few systems
24921da177e4SLinus Torvalds#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
24931da177e4SLinus Torvalds#   indexed CPUs but we're playing safe.
2494797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2495797798c1SRalf Baechle#   know they might have memory configurations that could make use of highmem
2496797798c1SRalf Baechle#   support.
24971da177e4SLinus Torvalds#
24981da177e4SLinus Torvaldsconfig HIGHMEM
24991da177e4SLinus Torvalds	bool "High Memory Support"
2500a6e18781SLeonid Yegoshin	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2501797798c1SRalf Baechle
2502797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM
2503797798c1SRalf Baechle	bool
2504797798c1SRalf Baechle
2505797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM
2506797798c1SRalf Baechle	bool
25071da177e4SLinus Torvalds
25089693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS
25099693a853SFranck Bui-Huu	bool
25109693a853SFranck Bui-Huu
2511a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS
2512a6a4834cSSteven J. Hill	bool
2513a6a4834cSSteven J. Hill
2514377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16
2515377cb1b6SRalf Baechle	bool
2516377cb1b6SRalf Baechle	help
2517377cb1b6SRalf Baechle	  This option must be set if a kernel might be executed on a MIPS16-
2518377cb1b6SRalf Baechle	  enabled CPU even if MIPS16 is not actually being used.  In other
2519377cb1b6SRalf Baechle	  words, it makes the kernel MIPS16-tolerant.
2520377cb1b6SRalf Baechle
2521a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA
2522a5e9a69eSPaul Burton	bool
2523a5e9a69eSPaul Burton
2524b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE
2525b4819b59SYoichi Yuasa	def_bool y
2526f133f22dSWu Zhangjin	depends on !NUMA && !CPU_LOONGSON2
2527b4819b59SYoichi Yuasa
2528d8cb4e11SRalf Baechleconfig ARCH_DISCONTIGMEM_ENABLE
2529d8cb4e11SRalf Baechle	bool
2530d8cb4e11SRalf Baechle	default y if SGI_IP27
2531d8cb4e11SRalf Baechle	help
25323dde6ad8SDavid Sterba	  Say Y to support efficient handling of discontiguous physical memory,
2533d8cb4e11SRalf Baechle	  for architectures which are either NUMA (Non-Uniform Memory Access)
2534d8cb4e11SRalf Baechle	  or have huge holes in the physical address space for other reasons.
2535d8cb4e11SRalf Baechle	  See <file:Documentation/vm/numa> for more.
2536d8cb4e11SRalf Baechle
2537b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE
2538b1c6cd42SAtsushi Nemoto	bool
25397de58fabSAtsushi Nemoto	select SPARSEMEM_STATIC
254031473747SAtsushi Nemoto
2541d8cb4e11SRalf Baechleconfig NUMA
2542d8cb4e11SRalf Baechle	bool "NUMA Support"
2543d8cb4e11SRalf Baechle	depends on SYS_SUPPORTS_NUMA
2544d8cb4e11SRalf Baechle	help
2545d8cb4e11SRalf Baechle	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2546d8cb4e11SRalf Baechle	  Access).  This option improves performance on systems with more
2547d8cb4e11SRalf Baechle	  than two nodes; on two node systems it is generally better to
2548d8cb4e11SRalf Baechle	  leave it disabled; on single node systems disable this option
2549d8cb4e11SRalf Baechle	  disabled.
2550d8cb4e11SRalf Baechle
2551d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA
2552d8cb4e11SRalf Baechle	bool
2553d8cb4e11SRalf Baechle
25548c530ea3SMatt Redfearnconfig RELOCATABLE
25558c530ea3SMatt Redfearn	bool "Relocatable kernel"
25563ff72be4SSteven J. Hill	depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
25578c530ea3SMatt Redfearn	help
25588c530ea3SMatt Redfearn	  This builds a kernel image that retains relocation information
25598c530ea3SMatt Redfearn	  so it can be loaded someplace besides the default 1MB.
25608c530ea3SMatt Redfearn	  The relocations make the kernel binary about 15% larger,
25618c530ea3SMatt Redfearn	  but are discarded at runtime
25628c530ea3SMatt Redfearn
2563069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE
2564069fd766SMatt Redfearn	hex "Relocation table size"
2565069fd766SMatt Redfearn	depends on RELOCATABLE
2566069fd766SMatt Redfearn	range 0x0 0x01000000
2567069fd766SMatt Redfearn	default "0x00100000"
2568069fd766SMatt Redfearn	---help---
2569069fd766SMatt Redfearn	  A table of relocation data will be appended to the kernel binary
2570069fd766SMatt Redfearn	  and parsed at boot to fix up the relocated kernel.
2571069fd766SMatt Redfearn
2572069fd766SMatt Redfearn	  This option allows the amount of space reserved for the table to be
2573069fd766SMatt Redfearn	  adjusted, although the default of 1Mb should be ok in most cases.
2574069fd766SMatt Redfearn
2575069fd766SMatt Redfearn	  The build will fail and a valid size suggested if this is too small.
2576069fd766SMatt Redfearn
2577069fd766SMatt Redfearn	  If unsure, leave at the default value.
2578069fd766SMatt Redfearn
2579405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE
2580405bc8fdSMatt Redfearn	bool "Randomize the address of the kernel image"
2581405bc8fdSMatt Redfearn	depends on RELOCATABLE
2582405bc8fdSMatt Redfearn	---help---
2583405bc8fdSMatt Redfearn	   Randomizes the physical and virtual address at which the
2584405bc8fdSMatt Redfearn	   kernel image is loaded, as a security feature that
2585405bc8fdSMatt Redfearn	   deters exploit attempts relying on knowledge of the location
2586405bc8fdSMatt Redfearn	   of kernel internals.
2587405bc8fdSMatt Redfearn
2588405bc8fdSMatt Redfearn	   Entropy is generated using any coprocessor 0 registers available.
2589405bc8fdSMatt Redfearn
2590405bc8fdSMatt Redfearn	   The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2591405bc8fdSMatt Redfearn
2592405bc8fdSMatt Redfearn	   If unsure, say N.
2593405bc8fdSMatt Redfearn
2594405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET
2595405bc8fdSMatt Redfearn	hex "Maximum kASLR offset" if EXPERT
2596405bc8fdSMatt Redfearn	depends on RANDOMIZE_BASE
2597405bc8fdSMatt Redfearn	range 0x0 0x40000000 if EVA || 64BIT
2598405bc8fdSMatt Redfearn	range 0x0 0x08000000
2599405bc8fdSMatt Redfearn	default "0x01000000"
2600405bc8fdSMatt Redfearn	---help---
2601405bc8fdSMatt Redfearn	  When kASLR is active, this provides the maximum offset that will
2602405bc8fdSMatt Redfearn	  be applied to the kernel image. It should be set according to the
2603405bc8fdSMatt Redfearn	  amount of physical RAM available in the target system minus
2604405bc8fdSMatt Redfearn	  PHYSICAL_START and must be a power of 2.
2605405bc8fdSMatt Redfearn
2606405bc8fdSMatt Redfearn	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2607405bc8fdSMatt Redfearn	  EVA or 64-bit. The default is 16Mb.
2608405bc8fdSMatt Redfearn
2609c80d79d7SYasunori Gotoconfig NODES_SHIFT
2610c80d79d7SYasunori Goto	int
2611c80d79d7SYasunori Goto	default "6"
2612c80d79d7SYasunori Goto	depends on NEED_MULTIPLE_NODES
2613c80d79d7SYasunori Goto
261414f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS
261514f70012SDeng-Cheng Zhu	bool "Enable hardware performance counter support for perf events"
261623021b2bSYang Shi	depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
261714f70012SDeng-Cheng Zhu	default y
261814f70012SDeng-Cheng Zhu	help
261914f70012SDeng-Cheng Zhu	  Enable hardware performance counter support for perf events. If
262014f70012SDeng-Cheng Zhu	  disabled, perf events will use software events only.
262114f70012SDeng-Cheng Zhu
2622b4819b59SYoichi Yuasasource "mm/Kconfig"
2623b4819b59SYoichi Yuasa
26241da177e4SLinus Torvaldsconfig SMP
26251da177e4SLinus Torvalds	bool "Multi-Processing support"
2626e73ea273SRalf Baechle	depends on SYS_SUPPORTS_SMP
2627e73ea273SRalf Baechle	help
26281da177e4SLinus Torvalds	  This enables support for systems with more than one CPU. If you have
26294a474157SRobert Graffham	  a system with only one CPU, say N. If you have a system with more
26304a474157SRobert Graffham	  than one CPU, say Y.
26311da177e4SLinus Torvalds
26324a474157SRobert Graffham	  If you say N here, the kernel will run on uni- and multiprocessor
26331da177e4SLinus Torvalds	  machines, but will use only one CPU of a multiprocessor machine. If
26341da177e4SLinus Torvalds	  you say Y here, the kernel will run on many, but not all,
26354a474157SRobert Graffham	  uniprocessor machines. On a uniprocessor machine, the kernel
26361da177e4SLinus Torvalds	  will run faster if you say N here.
26371da177e4SLinus Torvalds
26381da177e4SLinus Torvalds	  People using multiprocessor machines who say Y here should also say
26391da177e4SLinus Torvalds	  Y to "Enhanced Real Time Clock Support", below.
26401da177e4SLinus Torvalds
264103502faaSAdrian Bunk	  See also the SMP-HOWTO available at
264203502faaSAdrian Bunk	  <http://www.tldp.org/docs.html#howto>.
26431da177e4SLinus Torvalds
26441da177e4SLinus Torvalds	  If you don't know what to do here, say N.
26451da177e4SLinus Torvalds
26467840d618SMatt Redfearnconfig HOTPLUG_CPU
26477840d618SMatt Redfearn	bool "Support for hot-pluggable CPUs"
26487840d618SMatt Redfearn	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
26497840d618SMatt Redfearn	help
26507840d618SMatt Redfearn	  Say Y here to allow turning CPUs off and on. CPUs can be
26517840d618SMatt Redfearn	  controlled through /sys/devices/system/cpu.
26527840d618SMatt Redfearn	  (Note: power management support will enable this option
26537840d618SMatt Redfearn	    automatically on SMP systems. )
26547840d618SMatt Redfearn	  Say N if you want to disable CPU hotplug.
26557840d618SMatt Redfearn
265687353d8aSRalf Baechleconfig SMP_UP
265787353d8aSRalf Baechle	bool
265887353d8aSRalf Baechle
26594a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP
26604a16ff4cSRalf Baechle	bool
26614a16ff4cSRalf Baechle
26620ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS
26630ee958e1SPaul Burton	bool
26640ee958e1SPaul Burton
2665e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP
2666e73ea273SRalf Baechle	bool
2667e73ea273SRalf Baechle
2668130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4
2669130e2fb7SRalf Baechle	bool
2670130e2fb7SRalf Baechle
2671130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8
2672130e2fb7SRalf Baechle	bool
2673130e2fb7SRalf Baechle
2674130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16
2675130e2fb7SRalf Baechle	bool
2676130e2fb7SRalf Baechle
2677130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32
2678130e2fb7SRalf Baechle	bool
2679130e2fb7SRalf Baechle
2680130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64
2681130e2fb7SRalf Baechle	bool
2682130e2fb7SRalf Baechle
26831da177e4SLinus Torvaldsconfig NR_CPUS
2684a91796a9SJayachandran C	int "Maximum number of CPUs (2-256)"
2685a91796a9SJayachandran C	range 2 256
26861da177e4SLinus Torvalds	depends on SMP
2687130e2fb7SRalf Baechle	default "4" if NR_CPUS_DEFAULT_4
2688130e2fb7SRalf Baechle	default "8" if NR_CPUS_DEFAULT_8
2689130e2fb7SRalf Baechle	default "16" if NR_CPUS_DEFAULT_16
2690130e2fb7SRalf Baechle	default "32" if NR_CPUS_DEFAULT_32
2691130e2fb7SRalf Baechle	default "64" if NR_CPUS_DEFAULT_64
26921da177e4SLinus Torvalds	help
26931da177e4SLinus Torvalds	  This allows you to specify the maximum number of CPUs which this
26941da177e4SLinus Torvalds	  kernel will support.  The maximum supported value is 32 for 32-bit
26951da177e4SLinus Torvalds	  kernel and 64 for 64-bit kernels; the minimum value which makes
269672ede9b1SAtsushi Nemoto	  sense is 1 for Qemu (useful only for kernel debugging purposes)
269772ede9b1SAtsushi Nemoto	  and 2 for all others.
26981da177e4SLinus Torvalds
26991da177e4SLinus Torvalds	  This is purely to save memory - each supported CPU adds
270072ede9b1SAtsushi Nemoto	  approximately eight kilobytes to the kernel image.  For best
270172ede9b1SAtsushi Nemoto	  performance should round up your number of processors to the next
270272ede9b1SAtsushi Nemoto	  power of two.
27031da177e4SLinus Torvalds
2704399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS
2705399aaa25SAl Cooper	bool
2706399aaa25SAl Cooper
27077820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024
27087820b84bSDavid Daney	bool
27097820b84bSDavid Daney
27107820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP
27117820b84bSDavid Daney	int
27127820b84bSDavid Daney	depends on SMP
27137820b84bSDavid Daney	default 1024 if MIPS_NR_CPU_NR_MAP_1024
27147820b84bSDavid Daney	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
27157820b84bSDavid Daney
27161723b4a3SAtsushi Nemoto#
27171723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration
27181723b4a3SAtsushi Nemoto#
27191723b4a3SAtsushi Nemoto
27201723b4a3SAtsushi Nemotochoice
27211723b4a3SAtsushi Nemoto	prompt "Timer frequency"
27221723b4a3SAtsushi Nemoto	default HZ_250
27231723b4a3SAtsushi Nemoto	help
27241723b4a3SAtsushi Nemoto	 Allows the configuration of the timer frequency.
27251723b4a3SAtsushi Nemoto
272667596573SPaul Burton	config HZ_24
272767596573SPaul Burton		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
272867596573SPaul Burton
27291723b4a3SAtsushi Nemoto	config HZ_48
27300f873585SRalf Baechle		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
27311723b4a3SAtsushi Nemoto
27321723b4a3SAtsushi Nemoto	config HZ_100
27331723b4a3SAtsushi Nemoto		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
27341723b4a3SAtsushi Nemoto
27351723b4a3SAtsushi Nemoto	config HZ_128
27361723b4a3SAtsushi Nemoto		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
27371723b4a3SAtsushi Nemoto
27381723b4a3SAtsushi Nemoto	config HZ_250
27391723b4a3SAtsushi Nemoto		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
27401723b4a3SAtsushi Nemoto
27411723b4a3SAtsushi Nemoto	config HZ_256
27421723b4a3SAtsushi Nemoto		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
27431723b4a3SAtsushi Nemoto
27441723b4a3SAtsushi Nemoto	config HZ_1000
27451723b4a3SAtsushi Nemoto		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
27461723b4a3SAtsushi Nemoto
27471723b4a3SAtsushi Nemoto	config HZ_1024
27481723b4a3SAtsushi Nemoto		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
27491723b4a3SAtsushi Nemoto
27501723b4a3SAtsushi Nemotoendchoice
27511723b4a3SAtsushi Nemoto
275267596573SPaul Burtonconfig SYS_SUPPORTS_24HZ
275367596573SPaul Burton	bool
275467596573SPaul Burton
27551723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ
27561723b4a3SAtsushi Nemoto	bool
27571723b4a3SAtsushi Nemoto
27581723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ
27591723b4a3SAtsushi Nemoto	bool
27601723b4a3SAtsushi Nemoto
27611723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ
27621723b4a3SAtsushi Nemoto	bool
27631723b4a3SAtsushi Nemoto
27641723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ
27651723b4a3SAtsushi Nemoto	bool
27661723b4a3SAtsushi Nemoto
27671723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ
27681723b4a3SAtsushi Nemoto	bool
27691723b4a3SAtsushi Nemoto
27701723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ
27711723b4a3SAtsushi Nemoto	bool
27721723b4a3SAtsushi Nemoto
27731723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ
27741723b4a3SAtsushi Nemoto	bool
27751723b4a3SAtsushi Nemoto
27761723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ
27771723b4a3SAtsushi Nemoto	bool
277867596573SPaul Burton	default y if !SYS_SUPPORTS_24HZ && \
277967596573SPaul Burton		     !SYS_SUPPORTS_48HZ && \
278067596573SPaul Burton		     !SYS_SUPPORTS_100HZ && \
278167596573SPaul Burton		     !SYS_SUPPORTS_128HZ && \
278267596573SPaul Burton		     !SYS_SUPPORTS_250HZ && \
278367596573SPaul Burton		     !SYS_SUPPORTS_256HZ && \
278467596573SPaul Burton		     !SYS_SUPPORTS_1000HZ && \
27851723b4a3SAtsushi Nemoto		     !SYS_SUPPORTS_1024HZ
27861723b4a3SAtsushi Nemoto
27871723b4a3SAtsushi Nemotoconfig HZ
27881723b4a3SAtsushi Nemoto	int
278967596573SPaul Burton	default 24 if HZ_24
27901723b4a3SAtsushi Nemoto	default 48 if HZ_48
27911723b4a3SAtsushi Nemoto	default 100 if HZ_100
27921723b4a3SAtsushi Nemoto	default 128 if HZ_128
27931723b4a3SAtsushi Nemoto	default 250 if HZ_250
27941723b4a3SAtsushi Nemoto	default 256 if HZ_256
27951723b4a3SAtsushi Nemoto	default 1000 if HZ_1000
27961723b4a3SAtsushi Nemoto	default 1024 if HZ_1024
27971723b4a3SAtsushi Nemoto
279896685b17SDeng-Cheng Zhuconfig SCHED_HRTICK
279996685b17SDeng-Cheng Zhu	def_bool HIGH_RES_TIMERS
280096685b17SDeng-Cheng Zhu
2801e80de850SRalf Baechlesource "kernel/Kconfig.preempt"
28021da177e4SLinus Torvalds
2803ea6e942bSAtsushi Nemotoconfig KEXEC
28047d60717eSKees Cook	bool "Kexec system call"
28052965faa5SDave Young	select KEXEC_CORE
2806ea6e942bSAtsushi Nemoto	help
2807ea6e942bSAtsushi Nemoto	  kexec is a system call that implements the ability to shutdown your
2808ea6e942bSAtsushi Nemoto	  current kernel, and to start another kernel.  It is like a reboot
28093dde6ad8SDavid Sterba	  but it is independent of the system firmware.   And like a reboot
2810ea6e942bSAtsushi Nemoto	  you can start any kernel with it, not just Linux.
2811ea6e942bSAtsushi Nemoto
281201dd2fbfSMatt LaPlante	  The name comes from the similarity to the exec system call.
2813ea6e942bSAtsushi Nemoto
2814ea6e942bSAtsushi Nemoto	  It is an ongoing process to be certain the hardware in a machine
2815ea6e942bSAtsushi Nemoto	  is properly shutdown, so do not be surprised if this code does not
2816bf220695SGeert Uytterhoeven	  initially work for you.  As of this writing the exact hardware
2817bf220695SGeert Uytterhoeven	  interface is strongly in flux, so no good recommendation can be
2818bf220695SGeert Uytterhoeven	  made.
2819ea6e942bSAtsushi Nemoto
28207aa1c8f4SRalf Baechleconfig CRASH_DUMP
28217aa1c8f4SRalf Baechle	bool "Kernel crash dumps"
28227aa1c8f4SRalf Baechle	help
28237aa1c8f4SRalf Baechle	  Generate crash dump after being started by kexec.
28247aa1c8f4SRalf Baechle	  This should be normally only set in special crash dump kernels
28257aa1c8f4SRalf Baechle	  which are loaded in the main kernel with kexec-tools into
28267aa1c8f4SRalf Baechle	  a specially reserved region and then later executed after
28277aa1c8f4SRalf Baechle	  a crash by kdump/kexec. The crash dump kernel must be compiled
28287aa1c8f4SRalf Baechle	  to a memory address not used by the main kernel or firmware using
28297aa1c8f4SRalf Baechle	  PHYSICAL_START.
28307aa1c8f4SRalf Baechle
28317aa1c8f4SRalf Baechleconfig PHYSICAL_START
28327aa1c8f4SRalf Baechle	hex "Physical address where the kernel is loaded"
28337aa1c8f4SRalf Baechle	default "0xffffffff84000000" if 64BIT
28347aa1c8f4SRalf Baechle	default "0x84000000" if 32BIT
28357aa1c8f4SRalf Baechle	depends on CRASH_DUMP
28367aa1c8f4SRalf Baechle	help
28377aa1c8f4SRalf Baechle	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
28387aa1c8f4SRalf Baechle	  If you plan to use kernel for capturing the crash dump change
28397aa1c8f4SRalf Baechle	  this value to start of the reserved region (the "X" value as
28407aa1c8f4SRalf Baechle	  specified in the "crashkernel=YM@XM" command line boot parameter
28417aa1c8f4SRalf Baechle	  passed to the panic-ed kernel).
28427aa1c8f4SRalf Baechle
2843ea6e942bSAtsushi Nemotoconfig SECCOMP
2844ea6e942bSAtsushi Nemoto	bool "Enable seccomp to safely compute untrusted bytecode"
2845293c5bd1SRalf Baechle	depends on PROC_FS
2846ea6e942bSAtsushi Nemoto	default y
2847ea6e942bSAtsushi Nemoto	help
2848ea6e942bSAtsushi Nemoto	  This kernel feature is useful for number crunching applications
2849ea6e942bSAtsushi Nemoto	  that may need to compute untrusted bytecode during their
2850ea6e942bSAtsushi Nemoto	  execution. By using pipes or other transports made available to
2851ea6e942bSAtsushi Nemoto	  the process as file descriptors supporting the read/write
2852ea6e942bSAtsushi Nemoto	  syscalls, it's possible to isolate those applications in
2853ea6e942bSAtsushi Nemoto	  their own address space using seccomp. Once seccomp is
2854ea6e942bSAtsushi Nemoto	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2855ea6e942bSAtsushi Nemoto	  and the task is only allowed to execute a few safe syscalls
2856ea6e942bSAtsushi Nemoto	  defined by each seccomp mode.
2857ea6e942bSAtsushi Nemoto
2858ea6e942bSAtsushi Nemoto	  If unsure, say Y. Only embedded should say N here.
2859ea6e942bSAtsushi Nemoto
2860597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT
28610ce3417eSPaul Burton	bool "Support for O32 binaries using 64-bit FP"
2862597ce172SPaul Burton	depends on 32BIT || MIPS32_O32
2863597ce172SPaul Burton	help
2864597ce172SPaul Burton	  When this is enabled, the kernel will support use of 64-bit floating
2865597ce172SPaul Burton	  point registers with binaries using the O32 ABI along with the
2866597ce172SPaul Burton	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2867597ce172SPaul Burton	  32-bit MIPS systems this support is at the cost of increasing the
2868597ce172SPaul Burton	  size and complexity of the compiled FPU emulator. Thus if you are
2869597ce172SPaul Burton	  running a MIPS32 system and know that none of your userland binaries
2870597ce172SPaul Burton	  will require 64-bit floating point, you may wish to reduce the size
2871597ce172SPaul Burton	  of your kernel & potentially improve FP emulation performance by
2872597ce172SPaul Burton	  saying N here.
2873597ce172SPaul Burton
287406e2e882SPaul Burton	  Although binutils currently supports use of this flag the details
287506e2e882SPaul Burton	  concerning its effect upon the O32 ABI in userland are still being
287606e2e882SPaul Burton	  worked on. In order to avoid userland becoming dependant upon current
287706e2e882SPaul Burton	  behaviour before the details have been finalised, this option should
287806e2e882SPaul Burton	  be considered experimental and only enabled by those working upon
287906e2e882SPaul Burton	  said details.
288006e2e882SPaul Burton
288106e2e882SPaul Burton	  If unsure, say N.
2882597ce172SPaul Burton
2883f2ffa5abSDezhong Diaoconfig USE_OF
28840b3e06fdSJonas Gorski	bool
2885f2ffa5abSDezhong Diao	select OF
2886e6ce1324SStephen Neuendorffer	select OF_EARLY_FLATTREE
2887abd2363fSGrant Likely	select IRQ_DOMAIN
2888f2ffa5abSDezhong Diao
28897fafb068SAndrew Brestickerconfig BUILTIN_DTB
28907fafb068SAndrew Bresticker	bool
28917fafb068SAndrew Bresticker
28921da8f179SJonas Gorskichoice
28935b24d52cSJonas Gorski	prompt "Kernel appended dtb support" if USE_OF
28941da8f179SJonas Gorski	default MIPS_NO_APPENDED_DTB
28951da8f179SJonas Gorski
28961da8f179SJonas Gorski	config MIPS_NO_APPENDED_DTB
28971da8f179SJonas Gorski		bool "None"
28981da8f179SJonas Gorski		help
28991da8f179SJonas Gorski		  Do not enable appended dtb support.
29001da8f179SJonas Gorski
290187db537dSAaro Koskinen	config MIPS_ELF_APPENDED_DTB
290287db537dSAaro Koskinen		bool "vmlinux"
290387db537dSAaro Koskinen		help
290487db537dSAaro Koskinen		  With this option, the boot code will look for a device tree binary
290587db537dSAaro Koskinen		  DTB) included in the vmlinux ELF section .appended_dtb. By default
290687db537dSAaro Koskinen		  it is empty and the DTB can be appended using binutils command
290787db537dSAaro Koskinen		  objcopy:
290887db537dSAaro Koskinen
290987db537dSAaro Koskinen		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
291087db537dSAaro Koskinen
291187db537dSAaro Koskinen		  This is meant as a backward compatiblity convenience for those
291287db537dSAaro Koskinen		  systems with a bootloader that can't be upgraded to accommodate
291387db537dSAaro Koskinen		  the documented boot protocol using a device tree.
291487db537dSAaro Koskinen
29151da8f179SJonas Gorski	config MIPS_RAW_APPENDED_DTB
2916b8f54f2cSJonas Gorski		bool "vmlinux.bin or vmlinuz.bin"
29171da8f179SJonas Gorski		help
29181da8f179SJonas Gorski		  With this option, the boot code will look for a device tree binary
2919b8f54f2cSJonas Gorski		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
29201da8f179SJonas Gorski		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
29211da8f179SJonas Gorski
29221da8f179SJonas Gorski		  This is meant as a backward compatibility convenience for those
29231da8f179SJonas Gorski		  systems with a bootloader that can't be upgraded to accommodate
29241da8f179SJonas Gorski		  the documented boot protocol using a device tree.
29251da8f179SJonas Gorski
29261da8f179SJonas Gorski		  Beware that there is very little in terms of protection against
29271da8f179SJonas Gorski		  this option being confused by leftover garbage in memory that might
29281da8f179SJonas Gorski		  look like a DTB header after a reboot if no actual DTB is appended
29291da8f179SJonas Gorski		  to vmlinux.bin.  Do not leave this option active in a production kernel
29301da8f179SJonas Gorski		  if you don't intend to always append a DTB.
29311da8f179SJonas Gorskiendchoice
29321da8f179SJonas Gorski
29332024972eSJonas Gorskichoice
29342024972eSJonas Gorski	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
29352bcef9b4SJonas Gorski	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
29363f5f0a44SPaul Burton					 !MIPS_MALTA && \
29372bcef9b4SJonas Gorski					 !CAVIUM_OCTEON_SOC
29382024972eSJonas Gorski	default MIPS_CMDLINE_FROM_BOOTLOADER
29392024972eSJonas Gorski
29402024972eSJonas Gorski	config MIPS_CMDLINE_FROM_DTB
29412024972eSJonas Gorski		depends on USE_OF
29422024972eSJonas Gorski		bool "Dtb kernel arguments if available"
29432024972eSJonas Gorski
29442024972eSJonas Gorski	config MIPS_CMDLINE_DTB_EXTEND
29452024972eSJonas Gorski		depends on USE_OF
29462024972eSJonas Gorski		bool "Extend dtb kernel arguments with bootloader arguments"
29472024972eSJonas Gorski
29482024972eSJonas Gorski	config MIPS_CMDLINE_FROM_BOOTLOADER
29492024972eSJonas Gorski		bool "Bootloader kernel arguments if available"
2950ed47e153SRabin Vincent
2951ed47e153SRabin Vincent	config MIPS_CMDLINE_BUILTIN_EXTEND
2952ed47e153SRabin Vincent		depends on CMDLINE_BOOL
2953ed47e153SRabin Vincent		bool "Extend builtin kernel arguments with bootloader arguments"
29542024972eSJonas Gorskiendchoice
29552024972eSJonas Gorski
29565e83d430SRalf Baechleendmenu
29575e83d430SRalf Baechle
29581df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT
29591df0f0ffSAtsushi Nemoto	bool
29601df0f0ffSAtsushi Nemoto	default y
29611df0f0ffSAtsushi Nemoto
29621df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT
29631df0f0ffSAtsushi Nemoto	bool
29641df0f0ffSAtsushi Nemoto	default y
29651df0f0ffSAtsushi Nemoto
2966e1e16115SAaro Koskinenconfig HAVE_LATENCYTOP_SUPPORT
2967e1e16115SAaro Koskinen	bool
2968e1e16115SAaro Koskinen	default y
2969e1e16115SAaro Koskinen
2970a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS
2971a728ab52SKirill A. Shutemov	int
29723377e227SAlex Belits	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2973a728ab52SKirill A. Shutemov	default 3 if 64BIT && !PAGE_SIZE_64KB
2974a728ab52SKirill A. Shutemov	default 2
2975a728ab52SKirill A. Shutemov
2976b6c3539bSRalf Baechlesource "init/Kconfig"
2977b6c3539bSRalf Baechle
2978dc52ddc0SMatt Helsleysource "kernel/Kconfig.freezer"
2979dc52ddc0SMatt Helsley
29801da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
29811da177e4SLinus Torvalds
29825e83d430SRalf Baechleconfig HW_HAS_EISA
29835e83d430SRalf Baechle	bool
29841da177e4SLinus Torvaldsconfig HW_HAS_PCI
29851da177e4SLinus Torvalds	bool
29861da177e4SLinus Torvalds
29871da177e4SLinus Torvaldsconfig PCI
29881da177e4SLinus Torvalds	bool "Support for PCI controller"
29891da177e4SLinus Torvalds	depends on HW_HAS_PCI
2990abb4ae46SRalf Baechle	select PCI_DOMAINS
29911da177e4SLinus Torvalds	help
29921da177e4SLinus Torvalds	  Find out whether you have a PCI motherboard. PCI is the name of a
29931da177e4SLinus Torvalds	  bus system, i.e. the way the CPU talks to the other stuff inside
29941da177e4SLinus Torvalds	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
29951da177e4SLinus Torvalds	  say Y, otherwise N.
29961da177e4SLinus Torvalds
29970e476d91SHuacai Chenconfig HT_PCI
29980e476d91SHuacai Chen	bool "Support for HT-linked PCI"
29990e476d91SHuacai Chen	default y
30000e476d91SHuacai Chen	depends on CPU_LOONGSON3
30010e476d91SHuacai Chen	select PCI
30020e476d91SHuacai Chen	select PCI_DOMAINS
30030e476d91SHuacai Chen	help
30040e476d91SHuacai Chen	  Loongson family machines use Hyper-Transport bus for inter-core
30050e476d91SHuacai Chen	  connection and device connection. The PCI bus is a subordinate
30060e476d91SHuacai Chen	  linked at HT. Choose Y for Loongson-3 based machines.
30070e476d91SHuacai Chen
30081da177e4SLinus Torvaldsconfig PCI_DOMAINS
30091da177e4SLinus Torvalds	bool
30101da177e4SLinus Torvalds
301188555b48SPaul Burtonconfig PCI_DOMAINS_GENERIC
301288555b48SPaul Burton	bool
301388555b48SPaul Burton
3014c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC
301587dd9a4dSPaul Burton	select PCI_DOMAINS_GENERIC if PCI_DOMAINS
3016c5611df9SPaul Burton	bool
3017c5611df9SPaul Burton
3018c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY
3019c5611df9SPaul Burton	def_bool !PCI_DRIVERS_GENERIC
3020c5611df9SPaul Burton	select NO_GENERIC_PCI_IOPORT_MAP
3021c5611df9SPaul Burton
30221da177e4SLinus Torvaldssource "drivers/pci/Kconfig"
30231da177e4SLinus Torvalds
30241da177e4SLinus Torvalds#
30251da177e4SLinus Torvalds# ISA support is now enabled via select.  Too many systems still have the one
30261da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect
30271da177e4SLinus Torvalds# users to choose the right thing ...
30281da177e4SLinus Torvalds#
30291da177e4SLinus Torvaldsconfig ISA
30301da177e4SLinus Torvalds	bool
30311da177e4SLinus Torvalds
30321da177e4SLinus Torvaldsconfig EISA
30331da177e4SLinus Torvalds	bool "EISA support"
30345e83d430SRalf Baechle	depends on HW_HAS_EISA
30351da177e4SLinus Torvalds	select ISA
3036aa414dffSRalf Baechle	select GENERIC_ISA_DMA
30371da177e4SLinus Torvalds	---help---
30381da177e4SLinus Torvalds	  The Extended Industry Standard Architecture (EISA) bus was
30391da177e4SLinus Torvalds	  developed as an open alternative to the IBM MicroChannel bus.
30401da177e4SLinus Torvalds
30411da177e4SLinus Torvalds	  The EISA bus provided some of the features of the IBM MicroChannel
30421da177e4SLinus Torvalds	  bus while maintaining backward compatibility with cards made for
30431da177e4SLinus Torvalds	  the older ISA bus.  The EISA bus saw limited use between 1988 and
30441da177e4SLinus Torvalds	  1995 when it was made obsolete by the PCI bus.
30451da177e4SLinus Torvalds
30461da177e4SLinus Torvalds	  Say Y here if you are building a kernel for an EISA-based machine.
30471da177e4SLinus Torvalds
30481da177e4SLinus Torvalds	  Otherwise, say N.
30491da177e4SLinus Torvalds
30501da177e4SLinus Torvaldssource "drivers/eisa/Kconfig"
30511da177e4SLinus Torvalds
30521da177e4SLinus Torvaldsconfig TC
30531da177e4SLinus Torvalds	bool "TURBOchannel support"
30541da177e4SLinus Torvalds	depends on MACH_DECSTATION
30551da177e4SLinus Torvalds	help
305650a23e6eSJustin P. Mattock	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
305750a23e6eSJustin P. Mattock	  processors.  TURBOchannel programming specifications are available
305850a23e6eSJustin P. Mattock	  at:
305950a23e6eSJustin P. Mattock	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
306050a23e6eSJustin P. Mattock	  and:
306150a23e6eSJustin P. Mattock	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
306250a23e6eSJustin P. Mattock	  Linux driver support status is documented at:
306350a23e6eSJustin P. Mattock	  <http://www.linux-mips.org/wiki/DECstation>
30641da177e4SLinus Torvalds
30651da177e4SLinus Torvaldsconfig MMU
30661da177e4SLinus Torvalds	bool
30671da177e4SLinus Torvalds	default y
30681da177e4SLinus Torvalds
3069109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN
3070109c32ffSMatt Redfearn	default 12 if 64BIT
3071109c32ffSMatt Redfearn	default 8
3072109c32ffSMatt Redfearn
3073109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX
3074109c32ffSMatt Redfearn	default 18 if 64BIT
3075109c32ffSMatt Redfearn	default 15
3076109c32ffSMatt Redfearn
3077109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN
3078109c32ffSMatt Redfearn       default 8
3079109c32ffSMatt Redfearn
3080109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX
3081109c32ffSMatt Redfearn       default 15
3082109c32ffSMatt Redfearn
3083d865bea4SRalf Baechleconfig I8253
3084d865bea4SRalf Baechle	bool
3085798778b8SRussell King	select CLKSRC_I8253
30862d02612fSThomas Gleixner	select CLKEVT_I8253
30879726b43aSWu Zhangjin	select MIPS_EXTERNAL_TIMER
3088d865bea4SRalf Baechle
3089e05eb3f8SRalf Baechleconfig ZONE_DMA
3090e05eb3f8SRalf Baechle	bool
3091e05eb3f8SRalf Baechle
3092cce335aeSRalf Baechleconfig ZONE_DMA32
3093cce335aeSRalf Baechle	bool
3094cce335aeSRalf Baechle
30951da177e4SLinus Torvaldssource "drivers/pcmcia/Kconfig"
30961da177e4SLinus Torvalds
3097388b78adSAlexandre Bounineconfig RAPIDIO
309856abde72SAlexandre Bounine	tristate "RapidIO support"
3099388b78adSAlexandre Bounine	depends on PCI
3100388b78adSAlexandre Bounine	default n
3101388b78adSAlexandre Bounine	help
3102388b78adSAlexandre Bounine	  If you say Y here, the kernel will include drivers and
3103388b78adSAlexandre Bounine	  infrastructure code to support RapidIO interconnect devices.
3104388b78adSAlexandre Bounine
3105388b78adSAlexandre Bouninesource "drivers/rapidio/Kconfig"
3106388b78adSAlexandre Bounine
31071da177e4SLinus Torvaldsendmenu
31081da177e4SLinus Torvalds
31091da177e4SLinus Torvaldsmenu "Executable file formats"
31101da177e4SLinus Torvalds
31111da177e4SLinus Torvaldssource "fs/Kconfig.binfmt"
31121da177e4SLinus Torvalds
31131da177e4SLinus Torvaldsconfig TRAD_SIGNALS
31141da177e4SLinus Torvalds	bool
31151da177e4SLinus Torvalds
31161da177e4SLinus Torvaldsconfig MIPS32_COMPAT
311778aaf956SRalf Baechle	bool
31181da177e4SLinus Torvalds
31191da177e4SLinus Torvaldsconfig COMPAT
31201da177e4SLinus Torvalds	bool
31211da177e4SLinus Torvalds
312205e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT
312305e43966SAtsushi Nemoto	bool
312405e43966SAtsushi Nemoto
31251da177e4SLinus Torvaldsconfig MIPS32_O32
31261da177e4SLinus Torvalds	bool "Kernel support for o32 binaries"
312778aaf956SRalf Baechle	depends on 64BIT
312878aaf956SRalf Baechle	select ARCH_WANT_OLD_COMPAT_IPC
312978aaf956SRalf Baechle	select COMPAT
313078aaf956SRalf Baechle	select MIPS32_COMPAT
313178aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
31321da177e4SLinus Torvalds	help
31331da177e4SLinus Torvalds	  Select this option if you want to run o32 binaries.  These are pure
31341da177e4SLinus Torvalds	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
31351da177e4SLinus Torvalds	  existing binaries are in this format.
31361da177e4SLinus Torvalds
31371da177e4SLinus Torvalds	  If unsure, say Y.
31381da177e4SLinus Torvalds
31391da177e4SLinus Torvaldsconfig MIPS32_N32
31401da177e4SLinus Torvalds	bool "Kernel support for n32 binaries"
3141c22eacfeSRalf Baechle	depends on 64BIT
314278aaf956SRalf Baechle	select COMPAT
314378aaf956SRalf Baechle	select MIPS32_COMPAT
314478aaf956SRalf Baechle	select SYSVIPC_COMPAT if SYSVIPC
31451da177e4SLinus Torvalds	help
31461da177e4SLinus Torvalds	  Select this option if you want to run n32 binaries.  These are
31471da177e4SLinus Torvalds	  64-bit binaries using 32-bit quantities for addressing and certain
31481da177e4SLinus Torvalds	  data that would normally be 64-bit.  They are used in special
31491da177e4SLinus Torvalds	  cases.
31501da177e4SLinus Torvalds
31511da177e4SLinus Torvalds	  If unsure, say N.
31521da177e4SLinus Torvalds
31531da177e4SLinus Torvaldsconfig BINFMT_ELF32
31541da177e4SLinus Torvalds	bool
31551da177e4SLinus Torvalds	default y if MIPS32_O32 || MIPS32_N32
3156f43edca7SRalf Baechle	select ELFCORE
31571da177e4SLinus Torvalds
31582116245eSRalf Baechleendmenu
31591da177e4SLinus Torvalds
31602116245eSRalf Baechlemenu "Power management options"
3161952fa954SRodolfo Giometti
3162363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE
3163363c55caSWu Zhangjin	def_bool y
31643f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3165363c55caSWu Zhangjin
3166f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE
3167f4cb5700SJohannes Berg	def_bool y
31683f5b3e17SRalf Baechle	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3169f4cb5700SJohannes Berg
31702116245eSRalf Baechlesource "kernel/power/Kconfig"
3171952fa954SRodolfo Giometti
31721da177e4SLinus Torvaldsendmenu
31731da177e4SLinus Torvalds
31747a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER
31757a998935SViresh Kumar	bool
31767a998935SViresh Kumar
31777a998935SViresh Kumarmenu "CPU Power Management"
3178c095ebafSPaul Burton
3179c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
31807a998935SViresh Kumarsource "drivers/cpufreq/Kconfig"
31817a998935SViresh Kumarendif
31829726b43aSWu Zhangjin
3183c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig"
3184c095ebafSPaul Burton
3185c095ebafSPaul Burtonendmenu
3186c095ebafSPaul Burton
3187d5950b43SSam Ravnborgsource "net/Kconfig"
3188d5950b43SSam Ravnborg
31891da177e4SLinus Torvaldssource "drivers/Kconfig"
31901da177e4SLinus Torvalds
319198cdee0eSRalf Baechlesource "drivers/firmware/Kconfig"
319298cdee0eSRalf Baechle
31931da177e4SLinus Torvaldssource "fs/Kconfig"
31941da177e4SLinus Torvalds
31951da177e4SLinus Torvaldssource "arch/mips/Kconfig.debug"
31961da177e4SLinus Torvalds
31971da177e4SLinus Torvaldssource "security/Kconfig"
31981da177e4SLinus Torvalds
31991da177e4SLinus Torvaldssource "crypto/Kconfig"
32001da177e4SLinus Torvalds
32011da177e4SLinus Torvaldssource "lib/Kconfig"
32022235a54dSSanjay Lal
32032235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig"
3204