1b2441318SGreg Kroah-Hartman# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvaldsconfig MIPS 31da177e4SLinus Torvalds bool 41da177e4SLinus Torvalds default y 5942fa985SYury Norov select ARCH_32BIT_OFF_T if !64BIT 6ea6a3737SPaul Burton select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT 712597988SMatt Redfearn select ARCH_CLOCKSOURCE_DATA 834c01e41SAlexander Lobakin select ARCH_HAS_FORTIFY_SOURCE 934c01e41SAlexander Lobakin select ARCH_HAS_KCOV 1034c01e41SAlexander Lobakin select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) 1112597988SMatt Redfearn select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 121e35918aSHassan Naveed select ARCH_HAS_UBSAN_SANITIZE_ALL 1312597988SMatt Redfearn select ARCH_SUPPORTS_UPROBES 141ee3630aSRalf Baechle select ARCH_USE_BUILTIN_BSWAP 1512597988SMatt Redfearn select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 1625da4e9dSPaul Burton select ARCH_USE_QUEUED_RWLOCKS 170b17c967SPaul Burton select ARCH_USE_QUEUED_SPINLOCKS 189035bd29SAlexandre Ghiti select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 1912597988SMatt Redfearn select ARCH_WANT_IPC_PARSE_VERSION 2010916706SShile Zhang select BUILDTIME_TABLE_SORT 2112597988SMatt Redfearn select CLONE_BACKWARDS 2257eeacedSPaul Burton select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) 2312597988SMatt Redfearn select CPU_PM if CPU_IDLE 2412597988SMatt Redfearn select GENERIC_ATOMIC64 if !64BIT 2512597988SMatt Redfearn select GENERIC_CLOCKEVENTS 2612597988SMatt Redfearn select GENERIC_CMOS_UPDATE 2712597988SMatt Redfearn select GENERIC_CPU_AUTOPROBE 2824640f23SVincenzo Frascino select GENERIC_GETTIMEOFDAY 29b962aeb0SPaul Burton select GENERIC_IOMAP 3012597988SMatt Redfearn select GENERIC_IRQ_PROBE 3112597988SMatt Redfearn select GENERIC_IRQ_SHOW 326630a8e5SChristoph Hellwig select GENERIC_ISA_DMA if EISA 33740129b3SAntony Pavlov select GENERIC_LIB_ASHLDI3 34740129b3SAntony Pavlov select GENERIC_LIB_ASHRDI3 35740129b3SAntony Pavlov select GENERIC_LIB_CMPDI2 36740129b3SAntony Pavlov select GENERIC_LIB_LSHRDI3 37740129b3SAntony Pavlov select GENERIC_LIB_UCMPDI2 3812597988SMatt Redfearn select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 3912597988SMatt Redfearn select GENERIC_SMP_IDLE_THREAD 4012597988SMatt Redfearn select GENERIC_TIME_VSYSCALL 41446f062bSChristoph Hellwig select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT 4212597988SMatt Redfearn select HANDLE_DOMAIN_IRQ 43906d441fSPaul Burton select HAVE_ARCH_COMPILER_H 4412597988SMatt Redfearn select HAVE_ARCH_JUMP_LABEL 4588547001SJason Wessel select HAVE_ARCH_KGDB 46109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_BITS if MMU 47109c32ffSMatt Redfearn select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 48490b004fSMarkos Chandras select HAVE_ARCH_SECCOMP_FILTER 49c0ff3c53SRalf Baechle select HAVE_ARCH_TRACEHOOK 5045e03e62SDaniel Silsby select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES 512ff2b7ecSMasahiro Yamada select HAVE_ASM_MODVERSIONS 5236366e36SPaul Burton select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS 5312597988SMatt Redfearn select HAVE_CONTEXT_TRACKING 5412597988SMatt Redfearn select HAVE_COPY_THREAD_TLS 5564575f91SWu Zhangjin select HAVE_C_RECORDMCOUNT 5612597988SMatt Redfearn select HAVE_DEBUG_KMEMLEAK 5712597988SMatt Redfearn select HAVE_DEBUG_STACKOVERFLOW 5812597988SMatt Redfearn select HAVE_DMA_CONTIGUOUS 5912597988SMatt Redfearn select HAVE_DYNAMIC_FTRACE 6034c01e41SAlexander Lobakin select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 6112597988SMatt Redfearn select HAVE_EXIT_THREAD 6267a929e0SChristoph Hellwig select HAVE_FAST_GUP 6312597988SMatt Redfearn select HAVE_FTRACE_MCOUNT_RECORD 6429c5d346SWu Zhangjin select HAVE_FUNCTION_GRAPH_TRACER 6512597988SMatt Redfearn select HAVE_FUNCTION_TRACER 6634c01e41SAlexander Lobakin select HAVE_GCC_PLUGINS 6734c01e41SAlexander Lobakin select HAVE_GENERIC_VDSO 6812597988SMatt Redfearn select HAVE_IDE 69b3a428b4SHassan Naveed select HAVE_IOREMAP_PROT 7012597988SMatt Redfearn select HAVE_IRQ_EXIT_ON_IRQ_STACK 7112597988SMatt Redfearn select HAVE_IRQ_TIME_ACCOUNTING 72c1bf207dSDavid Daney select HAVE_KPROBES 73c1bf207dSDavid Daney select HAVE_KRETPROBES 74c0436b50SPaul Burton select HAVE_LD_DEAD_CODE_DATA_ELIMINATION 759d15ffc8STejun Heo select HAVE_MEMBLOCK_NODE_MAP 76786d35d4SDavid Howells select HAVE_MOD_ARCH_SPECIFIC 7742a0bb3fSPetr Mladek select HAVE_NMI 7812597988SMatt Redfearn select HAVE_OPROFILE 7912597988SMatt Redfearn select HAVE_PERF_EVENTS 8008bccf43SMarcin Nowakowski select HAVE_REGS_AND_STACK_ACCESS_API 819ea141adSPaul Burton select HAVE_RSEQ 8216c0f03fSHassan Naveed select HAVE_SPARSE_SYSCALL_NR 83d148eac0SMasahiro Yamada select HAVE_STACKPROTECTOR 8412597988SMatt Redfearn select HAVE_SYSCALL_TRACEPOINTS 85a3f14310SBen Hutchings select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 8612597988SMatt Redfearn select IRQ_FORCED_THREADING 876630a8e5SChristoph Hellwig select ISA if EISA 8812597988SMatt Redfearn select MODULES_USE_ELF_REL if MODULES 8934c01e41SAlexander Lobakin select MODULES_USE_ELF_RELA if MODULES && 64BIT 9012597988SMatt Redfearn select PERF_USE_VMALLOC 9105a0a344SArnd Bergmann select RTC_LIB 9212597988SMatt Redfearn select SYSCTL_EXCEPTION_TRACE 9312597988SMatt Redfearn select VIRT_TO_BUS 941da177e4SLinus Torvalds 951da177e4SLinus Torvaldsmenu "Machine selection" 961da177e4SLinus Torvalds 975e83d430SRalf Baechlechoice 985e83d430SRalf Baechle prompt "System type" 99d41e6858SMatt Redfearn default MIPS_GENERIC 1001da177e4SLinus Torvalds 101eed0eabdSPaul Burtonconfig MIPS_GENERIC 102eed0eabdSPaul Burton bool "Generic board-agnostic MIPS kernel" 103eed0eabdSPaul Burton select BOOT_RAW 104eed0eabdSPaul Burton select BUILTIN_DTB 105eed0eabdSPaul Burton select CEVT_R4K 106eed0eabdSPaul Burton select CLKSRC_MIPS_GIC 107eed0eabdSPaul Burton select COMMON_CLK 108eed0eabdSPaul Burton select CPU_MIPSR2_IRQ_EI 10934c01e41SAlexander Lobakin select CPU_MIPSR2_IRQ_VI 110eed0eabdSPaul Burton select CSRC_R4K 111eed0eabdSPaul Burton select DMA_PERDEV_COHERENT 112eb01d42aSChristoph Hellwig select HAVE_PCI 113eed0eabdSPaul Burton select IRQ_MIPS_CPU 1140211d49eSPaul Burton select MIPS_AUTO_PFN_OFFSET 115eed0eabdSPaul Burton select MIPS_CPU_SCACHE 116eed0eabdSPaul Burton select MIPS_GIC 117eed0eabdSPaul Burton select MIPS_L1_CACHE_SHIFT_7 118eed0eabdSPaul Burton select NO_EXCEPT_FILL 119eed0eabdSPaul Burton select PCI_DRIVERS_GENERIC 120eed0eabdSPaul Burton select SMP_UP if SMP 121a3078e59SMatt Redfearn select SWAP_IO_SPACE 122eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R1 123eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R2 124eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS32_R6 125eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R1 126eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R2 127eed0eabdSPaul Burton select SYS_HAS_CPU_MIPS64_R6 128eed0eabdSPaul Burton select SYS_SUPPORTS_32BIT_KERNEL 129eed0eabdSPaul Burton select SYS_SUPPORTS_64BIT_KERNEL 130eed0eabdSPaul Burton select SYS_SUPPORTS_BIG_ENDIAN 131eed0eabdSPaul Burton select SYS_SUPPORTS_HIGHMEM 132eed0eabdSPaul Burton select SYS_SUPPORTS_LITTLE_ENDIAN 133eed0eabdSPaul Burton select SYS_SUPPORTS_MICROMIPS 134eed0eabdSPaul Burton select SYS_SUPPORTS_MIPS16 13534c01e41SAlexander Lobakin select SYS_SUPPORTS_MIPS_CPS 136eed0eabdSPaul Burton select SYS_SUPPORTS_MULTITHREADING 137eed0eabdSPaul Burton select SYS_SUPPORTS_RELOCATABLE 138eed0eabdSPaul Burton select SYS_SUPPORTS_SMARTMIPS 13934c01e41SAlexander Lobakin select UHI_BOOT 1402e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1412e6522c5SCorentin Labbe select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1422e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1432e6522c5SCorentin Labbe select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1442e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 1452e6522c5SCorentin Labbe select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 146eed0eabdSPaul Burton select USE_OF 147eed0eabdSPaul Burton help 148eed0eabdSPaul Burton Select this to build a kernel which aims to support multiple boards, 149eed0eabdSPaul Burton generally using a flattened device tree passed from the bootloader 150eed0eabdSPaul Burton using the boot protocol defined in the UHI (Unified Hosting 151eed0eabdSPaul Burton Interface) specification. 152eed0eabdSPaul Burton 15342a4f17dSManuel Laussconfig MIPS_ALCHEMY 154c3543e25SYoichi Yuasa bool "Alchemy processor based machines" 155d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 156f772cdb2SRalf Baechle select CEVT_R4K 157d7ea335cSSteven J. Hill select CSRC_R4K 15867e38cf2SRalf Baechle select IRQ_MIPS_CPU 15988e9a93cSManuel Lauss select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is 16042a4f17dSManuel Lauss select SYS_HAS_CPU_MIPS32_R1 16142a4f17dSManuel Lauss select SYS_SUPPORTS_32BIT_KERNEL 16242a4f17dSManuel Lauss select SYS_SUPPORTS_APM_EMULATION 163d30a2b47SLinus Walleij select GPIOLIB 1641b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 16547440229SManuel Lauss select COMMON_CLK 1661da177e4SLinus Torvalds 1677ca5dc14SFlorian Fainelliconfig AR7 1687ca5dc14SFlorian Fainelli bool "Texas Instruments AR7" 1697ca5dc14SFlorian Fainelli select BOOT_ELF32 1707ca5dc14SFlorian Fainelli select DMA_NONCOHERENT 1717ca5dc14SFlorian Fainelli select CEVT_R4K 1727ca5dc14SFlorian Fainelli select CSRC_R4K 17367e38cf2SRalf Baechle select IRQ_MIPS_CPU 1747ca5dc14SFlorian Fainelli select NO_EXCEPT_FILL 1757ca5dc14SFlorian Fainelli select SWAP_IO_SPACE 1767ca5dc14SFlorian Fainelli select SYS_HAS_CPU_MIPS32_R1 1777ca5dc14SFlorian Fainelli select SYS_HAS_EARLY_PRINTK 1787ca5dc14SFlorian Fainelli select SYS_SUPPORTS_32BIT_KERNEL 1797ca5dc14SFlorian Fainelli select SYS_SUPPORTS_LITTLE_ENDIAN 180377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1811b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT_UART16550 182d30a2b47SLinus Walleij select GPIOLIB 1837ca5dc14SFlorian Fainelli select VLYNQ 1848551fb64SYoichi Yuasa select HAVE_CLK 1857ca5dc14SFlorian Fainelli help 1867ca5dc14SFlorian Fainelli Support for the Texas Instruments AR7 System-on-a-Chip 1877ca5dc14SFlorian Fainelli family: TNETD7100, 7200 and 7300. 1887ca5dc14SFlorian Fainelli 18943cc739fSSergey Ryazanovconfig ATH25 19043cc739fSSergey Ryazanov bool "Atheros AR231x/AR531x SoC support" 19143cc739fSSergey Ryazanov select CEVT_R4K 19243cc739fSSergey Ryazanov select CSRC_R4K 19343cc739fSSergey Ryazanov select DMA_NONCOHERENT 19467e38cf2SRalf Baechle select IRQ_MIPS_CPU 1951753e74eSSergey Ryazanov select IRQ_DOMAIN 19643cc739fSSergey Ryazanov select SYS_HAS_CPU_MIPS32_R1 19743cc739fSSergey Ryazanov select SYS_SUPPORTS_BIG_ENDIAN 19843cc739fSSergey Ryazanov select SYS_SUPPORTS_32BIT_KERNEL 1998aaa7278SSergey Ryazanov select SYS_HAS_EARLY_PRINTK 20043cc739fSSergey Ryazanov help 20143cc739fSSergey Ryazanov Support for Atheros AR231x and Atheros AR531x based boards 20243cc739fSSergey Ryazanov 203d4a67d9dSGabor Juhosconfig ATH79 204d4a67d9dSGabor Juhos bool "Atheros AR71XX/AR724X/AR913X based boards" 205ff591a91SAlban Bedel select ARCH_HAS_RESET_CONTROLLER 206d4a67d9dSGabor Juhos select BOOT_RAW 207d4a67d9dSGabor Juhos select CEVT_R4K 208d4a67d9dSGabor Juhos select CSRC_R4K 209d4a67d9dSGabor Juhos select DMA_NONCOHERENT 210d30a2b47SLinus Walleij select GPIOLIB 211a08227a2SJohn Crispin select PINCTRL 21294638067SGabor Juhos select HAVE_CLK 213411520afSAlban Bedel select COMMON_CLK 2142c4f1ac5SGabor Juhos select CLKDEV_LOOKUP 21567e38cf2SRalf Baechle select IRQ_MIPS_CPU 216d4a67d9dSGabor Juhos select SYS_HAS_CPU_MIPS32_R2 217d4a67d9dSGabor Juhos select SYS_HAS_EARLY_PRINTK 218d4a67d9dSGabor Juhos select SYS_SUPPORTS_32BIT_KERNEL 219d4a67d9dSGabor Juhos select SYS_SUPPORTS_BIG_ENDIAN 220377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 221b3f0a250SAlban Bedel select SYS_SUPPORTS_ZBOOT_UART_PROM 22203c8c407SAlban Bedel select USE_OF 22353d473fcSAlban Bedel select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 224d4a67d9dSGabor Juhos help 225d4a67d9dSGabor Juhos Support for the Atheros AR71XX/AR724X/AR913X SoCs. 226d4a67d9dSGabor Juhos 2275f2d4459SKevin Cernekeeconfig BMIPS_GENERIC 2285f2d4459SKevin Cernekee bool "Broadcom Generic BMIPS kernel" 229d59098a0SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 230d59098a0SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 231d666cd02SKevin Cernekee select BOOT_RAW 232d666cd02SKevin Cernekee select NO_EXCEPT_FILL 233d666cd02SKevin Cernekee select USE_OF 234d666cd02SKevin Cernekee select CEVT_R4K 235d666cd02SKevin Cernekee select CSRC_R4K 236d666cd02SKevin Cernekee select SYNC_R4K 237d666cd02SKevin Cernekee select COMMON_CLK 238c7c42ec2SSimon Arlott select BCM6345_L1_IRQ 23960b858f2SKevin Cernekee select BCM7038_L1_IRQ 24060b858f2SKevin Cernekee select BCM7120_L2_IRQ 24160b858f2SKevin Cernekee select BRCMSTB_L2_IRQ 24267e38cf2SRalf Baechle select IRQ_MIPS_CPU 24360b858f2SKevin Cernekee select DMA_NONCOHERENT 244d666cd02SKevin Cernekee select SYS_SUPPORTS_32BIT_KERNEL 24560b858f2SKevin Cernekee select SYS_SUPPORTS_LITTLE_ENDIAN 246d666cd02SKevin Cernekee select SYS_SUPPORTS_BIG_ENDIAN 247d666cd02SKevin Cernekee select SYS_SUPPORTS_HIGHMEM 24860b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS32_3300 24960b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4350 25060b858f2SKevin Cernekee select SYS_HAS_CPU_BMIPS4380 251d666cd02SKevin Cernekee select SYS_HAS_CPU_BMIPS5000 252d666cd02SKevin Cernekee select SWAP_IO_SPACE 25360b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 25460b858f2SKevin Cernekee select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 25560b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 25660b858f2SKevin Cernekee select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 2574dc4704cSJustin Chen select HARDIRQS_SW_RESEND 258d666cd02SKevin Cernekee help 2595f2d4459SKevin Cernekee Build a generic DT-based kernel image that boots on select 2605f2d4459SKevin Cernekee BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 2615f2d4459SKevin Cernekee box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 2625f2d4459SKevin Cernekee must be set appropriately for your board. 263d666cd02SKevin Cernekee 2641c0c13ebSAurelien Jarnoconfig BCM47XX 265c619366eSFlorian Fainelli bool "Broadcom BCM47XX based boards" 266fe08f8c2SHauke Mehrtens select BOOT_RAW 26742f77542SRalf Baechle select CEVT_R4K 268940f6b48SRalf Baechle select CSRC_R4K 2691c0c13ebSAurelien Jarno select DMA_NONCOHERENT 270eb01d42aSChristoph Hellwig select HAVE_PCI 27167e38cf2SRalf Baechle select IRQ_MIPS_CPU 272314878d2SMarkos Chandras select SYS_HAS_CPU_MIPS32_R1 273dd54deddSHauke Mehrtens select NO_EXCEPT_FILL 2741c0c13ebSAurelien Jarno select SYS_SUPPORTS_32BIT_KERNEL 2751c0c13ebSAurelien Jarno select SYS_SUPPORTS_LITTLE_ENDIAN 276377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 2776507831fSAaro Koskinen select SYS_SUPPORTS_ZBOOT 27825e5fb97SAurelien Jarno select SYS_HAS_EARLY_PRINTK 279e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 280c949c0bcSRafał Miłecki select GPIOLIB 281c949c0bcSRafał Miłecki select LEDS_GPIO_REGISTER 282f6e734a8SRafał Miłecki select BCM47XX_NVRAM 2832ab71a02SRafał Miłecki select BCM47XX_SPROM 284dfe00495SMatt Redfearn select BCM47XX_SSB if !BCM47XX_BCMA 2851c0c13ebSAurelien Jarno help 2861c0c13ebSAurelien Jarno Support for BCM47XX based boards 2871c0c13ebSAurelien Jarno 288e7300d04SMaxime Bizonconfig BCM63XX 289e7300d04SMaxime Bizon bool "Broadcom BCM63XX based boards" 290ae8de61cSFlorian Fainelli select BOOT_RAW 291e7300d04SMaxime Bizon select CEVT_R4K 292e7300d04SMaxime Bizon select CSRC_R4K 293fc264022SJonas Gorski select SYNC_R4K 294e7300d04SMaxime Bizon select DMA_NONCOHERENT 29567e38cf2SRalf Baechle select IRQ_MIPS_CPU 296e7300d04SMaxime Bizon select SYS_SUPPORTS_32BIT_KERNEL 297e7300d04SMaxime Bizon select SYS_SUPPORTS_BIG_ENDIAN 298e7300d04SMaxime Bizon select SYS_HAS_EARLY_PRINTK 299e7300d04SMaxime Bizon select SWAP_IO_SPACE 300d30a2b47SLinus Walleij select GPIOLIB 3013e82eeebSYoichi Yuasa select HAVE_CLK 302af2418beSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 303c5af3c2dSJonas Gorski select CLKDEV_LOOKUP 304e7300d04SMaxime Bizon help 305e7300d04SMaxime Bizon Support for BCM63XX based boards 306e7300d04SMaxime Bizon 3071da177e4SLinus Torvaldsconfig MIPS_COBALT 3083fa986faSMartin Michlmayr bool "Cobalt Server" 30942f77542SRalf Baechle select CEVT_R4K 310940f6b48SRalf Baechle select CSRC_R4K 3111097c6acSYoichi Yuasa select CEVT_GT641XX 3121da177e4SLinus Torvalds select DMA_NONCOHERENT 313eb01d42aSChristoph Hellwig select FORCE_PCI 314d865bea4SRalf Baechle select I8253 3151da177e4SLinus Torvalds select I8259 31667e38cf2SRalf Baechle select IRQ_MIPS_CPU 317d5ab1a69SYoichi Yuasa select IRQ_GT641XX 318252161ecSYoichi Yuasa select PCI_GT64XXX_PCI0 3197cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 3200a22e0d4SYoichi Yuasa select SYS_HAS_EARLY_PRINTK 321ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3220e8774b6SFlorian Fainelli select SYS_SUPPORTS_64BIT_KERNEL 3235e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 324e6086557SRalf Baechle select USE_GENERIC_EARLY_PRINTK_8250 3251da177e4SLinus Torvalds 3261da177e4SLinus Torvaldsconfig MACH_DECSTATION 3273fa986faSMartin Michlmayr bool "DECstations" 3281da177e4SLinus Torvalds select BOOT_ELF32 3296457d9fcSYoichi Yuasa select CEVT_DS1287 33081d10badSMaciej W. Rozycki select CEVT_R4K if CPU_R4X00 3314247417dSYoichi Yuasa select CSRC_IOASIC 33281d10badSMaciej W. Rozycki select CSRC_R4K if CPU_R4X00 33320d60d99SMaciej W. Rozycki select CPU_DADDI_WORKAROUNDS if 64BIT 33420d60d99SMaciej W. Rozycki select CPU_R4000_WORKAROUNDS if 64BIT 33520d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS if 64BIT 3361da177e4SLinus Torvalds select DMA_NONCOHERENT 337ce816fa8SUwe Kleine-König select NO_IOPORT_MAP 33867e38cf2SRalf Baechle select IRQ_MIPS_CPU 3397cf8053bSRalf Baechle select SYS_HAS_CPU_R3000 3407cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 341ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 3427d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3435e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 3441723b4a3SAtsushi Nemoto select SYS_SUPPORTS_128HZ 3451723b4a3SAtsushi Nemoto select SYS_SUPPORTS_256HZ 3461723b4a3SAtsushi Nemoto select SYS_SUPPORTS_1024HZ 347930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 3485e83d430SRalf Baechle help 3491da177e4SLinus Torvalds This enables support for DEC's MIPS based workstations. For details 3501da177e4SLinus Torvalds see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 3511da177e4SLinus Torvalds DECstation porting pages on <http://decstation.unix-ag.org/>. 3521da177e4SLinus Torvalds 3531da177e4SLinus Torvalds If you have one of the following DECstation Models you definitely 3541da177e4SLinus Torvalds want to choose R4xx0 for the CPU Type: 3551da177e4SLinus Torvalds 3561da177e4SLinus Torvalds DECstation 5000/50 3571da177e4SLinus Torvalds DECstation 5000/150 3581da177e4SLinus Torvalds DECstation 5000/260 3591da177e4SLinus Torvalds DECsystem 5900/260 3601da177e4SLinus Torvalds 3611da177e4SLinus Torvalds otherwise choose R3000. 3621da177e4SLinus Torvalds 3635e83d430SRalf Baechleconfig MACH_JAZZ 3643fa986faSMartin Michlmayr bool "Jazz family of machines" 36539b2d756SThomas Bogendoerfer select ARC_MEMORY 36639b2d756SThomas Bogendoerfer select ARC_PROMLIB 367a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 3687a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 3690e2794b0SRalf Baechle select FW_ARC 3700e2794b0SRalf Baechle select FW_ARC32 3715e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 37242f77542SRalf Baechle select CEVT_R4K 373940f6b48SRalf Baechle select CSRC_R4K 374e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 3755e83d430SRalf Baechle select GENERIC_ISA_DMA 3768a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 37767e38cf2SRalf Baechle select IRQ_MIPS_CPU 378d865bea4SRalf Baechle select I8253 3795e83d430SRalf Baechle select I8259 3805e83d430SRalf Baechle select ISA 3817cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 3825e83d430SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 3837d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 3841723b4a3SAtsushi Nemoto select SYS_SUPPORTS_100HZ 3851da177e4SLinus Torvalds help 3865e83d430SRalf Baechle This a family of machines based on the MIPS R4030 chipset which was 3875e83d430SRalf Baechle used by several vendors to build RISC/os and Windows NT workstations. 388692105b8SMatt LaPlante Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 3895e83d430SRalf Baechle Olivetti M700-10 workstations. 3905e83d430SRalf Baechle 391de361e8bSPaul Burtonconfig MACH_INGENIC 392de361e8bSPaul Burton bool "Ingenic SoC based machines" 3935ebabe59SLars-Peter Clausen select SYS_SUPPORTS_32BIT_KERNEL 3945ebabe59SLars-Peter Clausen select SYS_SUPPORTS_LITTLE_ENDIAN 395f9c9affcSLluís Batlle i Rossell select SYS_SUPPORTS_ZBOOT_UART16550 396b35d2653SDaniel Silsby select CPU_SUPPORTS_HUGEPAGES 3975ebabe59SLars-Peter Clausen select DMA_NONCOHERENT 39867e38cf2SRalf Baechle select IRQ_MIPS_CPU 39937b4c3caSPaul Cercueil select PINCTRL 400d30a2b47SLinus Walleij select GPIOLIB 401ff1930c6SPaul Burton select COMMON_CLK 40283bc7692SLars-Peter Clausen select GENERIC_IRQ_CHIP 40315205fc0SPaul Cercueil select BUILTIN_DTB if MIPS_NO_APPENDED_DTB 404ffb1843dSPaul Burton select USE_OF 4055ebabe59SLars-Peter Clausen 406171bb2f1SJohn Crispinconfig LANTIQ 407171bb2f1SJohn Crispin bool "Lantiq based platforms" 408171bb2f1SJohn Crispin select DMA_NONCOHERENT 40967e38cf2SRalf Baechle select IRQ_MIPS_CPU 410171bb2f1SJohn Crispin select CEVT_R4K 411171bb2f1SJohn Crispin select CSRC_R4K 412171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 413171bb2f1SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 414171bb2f1SJohn Crispin select SYS_SUPPORTS_BIG_ENDIAN 415171bb2f1SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 416377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 417171bb2f1SJohn Crispin select SYS_SUPPORTS_MULTITHREADING 418f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 419171bb2f1SJohn Crispin select SYS_HAS_EARLY_PRINTK 420d30a2b47SLinus Walleij select GPIOLIB 421171bb2f1SJohn Crispin select SWAP_IO_SPACE 422171bb2f1SJohn Crispin select BOOT_RAW 423287e3f3fSJohn Crispin select CLKDEV_LOOKUP 424a0392222SJohn Crispin select USE_OF 4253f8c50c9SJohn Crispin select PINCTRL 4263f8c50c9SJohn Crispin select PINCTRL_LANTIQ 427c530781cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 428c530781cSJohn Crispin select RESET_CONTROLLER 429171bb2f1SJohn Crispin 4301f21d2bdSBrian Murphyconfig LASAT 4311f21d2bdSBrian Murphy bool "LASAT Networks platforms" 43242f77542SRalf Baechle select CEVT_R4K 43316f0bbbcSRalf Baechle select CRC32 434940f6b48SRalf Baechle select CSRC_R4K 4351f21d2bdSBrian Murphy select DMA_NONCOHERENT 4361f21d2bdSBrian Murphy select SYS_HAS_EARLY_PRINTK 437eb01d42aSChristoph Hellwig select HAVE_PCI 43867e38cf2SRalf Baechle select IRQ_MIPS_CPU 4391f21d2bdSBrian Murphy select PCI_GT64XXX_PCI0 4401f21d2bdSBrian Murphy select MIPS_NILE4 4411f21d2bdSBrian Murphy select R5000_CPU_SCACHE 4421f21d2bdSBrian Murphy select SYS_HAS_CPU_R5000 4431f21d2bdSBrian Murphy select SYS_SUPPORTS_32BIT_KERNEL 4441f21d2bdSBrian Murphy select SYS_SUPPORTS_64BIT_KERNEL if BROKEN 4451f21d2bdSBrian Murphy select SYS_SUPPORTS_LITTLE_ENDIAN 4461f21d2bdSBrian Murphy 44730ad29bbSHuacai Chenconfig MACH_LOONGSON32 448caed1d1bSHuacai Chen bool "Loongson 32-bit family of machines" 449c7e8c668SWu Zhangjin select SYS_SUPPORTS_ZBOOT 450ade299d8SYoichi Yuasa help 45130ad29bbSHuacai Chen This enables support for the Loongson-1 family of machines. 45285749d24SWu Zhangjin 45330ad29bbSHuacai Chen Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 45430ad29bbSHuacai Chen the Institute of Computing Technology (ICT), Chinese Academy of 45530ad29bbSHuacai Chen Sciences (CAS). 456ade299d8SYoichi Yuasa 45771e2f4ddSJiaxun Yangconfig MACH_LOONGSON2EF 45871e2f4ddSJiaxun Yang bool "Loongson-2E/F family of machines" 459ca585cf9SKelvin Cheung select SYS_SUPPORTS_ZBOOT 460ca585cf9SKelvin Cheung help 46171e2f4ddSJiaxun Yang This enables the support of early Loongson-2E/F family of machines. 462ca585cf9SKelvin Cheung 46371e2f4ddSJiaxun Yangconfig MACH_LOONGSON64 464caed1d1bSHuacai Chen bool "Loongson 64-bit family of machines" 4656fbde6b4SJiaxun Yang select ARCH_SPARSEMEM_ENABLE 4666fbde6b4SJiaxun Yang select ARCH_MIGHT_HAVE_PC_PARPORT 4676fbde6b4SJiaxun Yang select ARCH_MIGHT_HAVE_PC_SERIO 4686fbde6b4SJiaxun Yang select GENERIC_ISA_DMA_SUPPORT_BROKEN 4696fbde6b4SJiaxun Yang select BOOT_ELF32 4706fbde6b4SJiaxun Yang select BOARD_SCACHE 4716fbde6b4SJiaxun Yang select CSRC_R4K 4726fbde6b4SJiaxun Yang select CEVT_R4K 4736fbde6b4SJiaxun Yang select CPU_HAS_WB 4746fbde6b4SJiaxun Yang select FORCE_PCI 4756fbde6b4SJiaxun Yang select ISA 4766fbde6b4SJiaxun Yang select I8259 4776fbde6b4SJiaxun Yang select IRQ_MIPS_CPU 4786fbde6b4SJiaxun Yang select NR_CPUS_DEFAULT_4 4796fbde6b4SJiaxun Yang select USE_GENERIC_EARLY_PRINTK_8250 4806fbde6b4SJiaxun Yang select SYS_HAS_CPU_LOONGSON64 4816fbde6b4SJiaxun Yang select SYS_HAS_EARLY_PRINTK 4826fbde6b4SJiaxun Yang select SYS_SUPPORTS_SMP 4836fbde6b4SJiaxun Yang select SYS_SUPPORTS_HOTPLUG_CPU 4846fbde6b4SJiaxun Yang select SYS_SUPPORTS_NUMA 4856fbde6b4SJiaxun Yang select SYS_SUPPORTS_64BIT_KERNEL 4866fbde6b4SJiaxun Yang select SYS_SUPPORTS_HIGHMEM 4876fbde6b4SJiaxun Yang select SYS_SUPPORTS_LITTLE_ENDIAN 48871e2f4ddSJiaxun Yang select SYS_SUPPORTS_ZBOOT 4896fbde6b4SJiaxun Yang select ZONE_DMA32 4906fbde6b4SJiaxun Yang select NUMA 491*87fcfa7bSJiaxun Yang select COMMON_CLK 492*87fcfa7bSJiaxun Yang select USE_OF 493*87fcfa7bSJiaxun Yang select BUILTIN_DTB 49471e2f4ddSJiaxun Yang help 495caed1d1bSHuacai Chen This enables the support of Loongson-2/3 family of machines. 496caed1d1bSHuacai Chen 497caed1d1bSHuacai Chen Loongson-2 and Loongson-3 are 64-bit general-purpose processors with 498caed1d1bSHuacai Chen GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E 499caed1d1bSHuacai Chen and Loongson-2F which will be removed), developed by the Institute 500caed1d1bSHuacai Chen of Computing Technology (ICT), Chinese Academy of Sciences (CAS). 501ca585cf9SKelvin Cheung 5026a438309SAndrew Brestickerconfig MACH_PISTACHIO 5036a438309SAndrew Bresticker bool "IMG Pistachio SoC based boards" 5046a438309SAndrew Bresticker select BOOT_ELF32 5056a438309SAndrew Bresticker select BOOT_RAW 5066a438309SAndrew Bresticker select CEVT_R4K 5076a438309SAndrew Bresticker select CLKSRC_MIPS_GIC 5086a438309SAndrew Bresticker select COMMON_CLK 5096a438309SAndrew Bresticker select CSRC_R4K 510645c7827SZubair Lutfullah Kakakhel select DMA_NONCOHERENT 511d30a2b47SLinus Walleij select GPIOLIB 51267e38cf2SRalf Baechle select IRQ_MIPS_CPU 5136a438309SAndrew Bresticker select MFD_SYSCON 5146a438309SAndrew Bresticker select MIPS_CPU_SCACHE 5156a438309SAndrew Bresticker select MIPS_GIC 5166a438309SAndrew Bresticker select PINCTRL 5176a438309SAndrew Bresticker select REGULATOR 5186a438309SAndrew Bresticker select SYS_HAS_CPU_MIPS32_R2 5196a438309SAndrew Bresticker select SYS_SUPPORTS_32BIT_KERNEL 5206a438309SAndrew Bresticker select SYS_SUPPORTS_LITTLE_ENDIAN 5216a438309SAndrew Bresticker select SYS_SUPPORTS_MIPS_CPS 5226a438309SAndrew Bresticker select SYS_SUPPORTS_MULTITHREADING 52341cc07beSMatt Redfearn select SYS_SUPPORTS_RELOCATABLE 5246a438309SAndrew Bresticker select SYS_SUPPORTS_ZBOOT 525018f62eeSEzequiel Garcia select SYS_HAS_EARLY_PRINTK 526018f62eeSEzequiel Garcia select USE_GENERIC_EARLY_PRINTK_8250 5276a438309SAndrew Bresticker select USE_OF 5286a438309SAndrew Bresticker help 5296a438309SAndrew Bresticker This enables support for the IMG Pistachio SoC platform. 5306a438309SAndrew Bresticker 5311da177e4SLinus Torvaldsconfig MIPS_MALTA 5323fa986faSMartin Michlmayr bool "MIPS Malta board" 53361ed242dSRalf Baechle select ARCH_MAY_HAVE_PC_FDC 534a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 5357a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 5361da177e4SLinus Torvalds select BOOT_ELF32 537fa71c960SRalf Baechle select BOOT_RAW 538e8823d26SPaul Burton select BUILTIN_DTB 53942f77542SRalf Baechle select CEVT_R4K 540fa5635a2SAndrew Bresticker select CLKSRC_MIPS_GIC 54142b002abSGuenter Roeck select COMMON_CLK 54247bf2b03SMaksym Kokhan select CSRC_R4K 543885014bcSFelix Fietkau select DMA_MAYBE_COHERENT 5441da177e4SLinus Torvalds select GENERIC_ISA_DMA 5458a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 546eb01d42aSChristoph Hellwig select HAVE_PCI 547d865bea4SRalf Baechle select I8253 5481da177e4SLinus Torvalds select I8259 54947bf2b03SMaksym Kokhan select IRQ_MIPS_CPU 5505e83d430SRalf Baechle select MIPS_BONITO64 5519318c51aSChris Dearman select MIPS_CPU_SCACHE 55247bf2b03SMaksym Kokhan select MIPS_GIC 553a7ef1eadSKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 5545e83d430SRalf Baechle select MIPS_MSC 55547bf2b03SMaksym Kokhan select PCI_GT64XXX_PCI0 556ecafe3e9SPaul Burton select SMP_UP if SMP 5571da177e4SLinus Torvalds select SWAP_IO_SPACE 5587cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 5597cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS32_R2 560bfc3c5a6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R3_5 561c5b36783SSteven J. Hill select SYS_HAS_CPU_MIPS32_R5 562575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS32_R6 5637cf8053bSRalf Baechle select SYS_HAS_CPU_MIPS64_R1 5645d9fbed1SLeonid Yegoshin select SYS_HAS_CPU_MIPS64_R2 565575509b6SMarkos Chandras select SYS_HAS_CPU_MIPS64_R6 5667cf8053bSRalf Baechle select SYS_HAS_CPU_NEVADA 5677cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 568ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 569ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 5705e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 571c5b36783SSteven J. Hill select SYS_SUPPORTS_HIGHMEM 5725e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 573424ebcdfSMaciej W. Rozycki select SYS_SUPPORTS_MICROMIPS 57447bf2b03SMaksym Kokhan select SYS_SUPPORTS_MIPS16 5750365070fSTim Anderson select SYS_SUPPORTS_MIPS_CMP 576e56b6aa6SPaul Burton select SYS_SUPPORTS_MIPS_CPS 577f41ae0b2SRalf Baechle select SYS_SUPPORTS_MULTITHREADING 57847bf2b03SMaksym Kokhan select SYS_SUPPORTS_RELOCATABLE 5799693a853SFranck Bui-Huu select SYS_SUPPORTS_SMARTMIPS 580f35764e7SJames Hogan select SYS_SUPPORTS_VPE_LOADER 5811b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 582e8823d26SPaul Burton select USE_OF 583abcc82b1SJames Hogan select ZONE_DMA32 if 64BIT 5841da177e4SLinus Torvalds help 585f638d197SMaciej W. Rozycki This enables support for the MIPS Technologies Malta evaluation 5861da177e4SLinus Torvalds board. 5871da177e4SLinus Torvalds 5882572f00dSJoshua Hendersonconfig MACH_PIC32 5892572f00dSJoshua Henderson bool "Microchip PIC32 Family" 5902572f00dSJoshua Henderson help 5912572f00dSJoshua Henderson This enables support for the Microchip PIC32 family of platforms. 5922572f00dSJoshua Henderson 5932572f00dSJoshua Henderson Microchip PIC32 is a family of general-purpose 32 bit MIPS core 5942572f00dSJoshua Henderson microcontrollers. 5952572f00dSJoshua Henderson 596a83860c2SRalf Baechleconfig NEC_MARKEINS 597a83860c2SRalf Baechle bool "NEC EMMA2RH Mark-eins board" 598a83860c2SRalf Baechle select SOC_EMMA2RH 599eb01d42aSChristoph Hellwig select HAVE_PCI 600a83860c2SRalf Baechle help 601a83860c2SRalf Baechle This enables support for the NEC Electronics Mark-eins boards. 602ade299d8SYoichi Yuasa 6035e83d430SRalf Baechleconfig MACH_VR41XX 60474142d65SYoichi Yuasa bool "NEC VR4100 series based machines" 60542f77542SRalf Baechle select CEVT_R4K 606940f6b48SRalf Baechle select CSRC_R4K 6077cf8053bSRalf Baechle select SYS_HAS_CPU_VR41XX 608377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 609d30a2b47SLinus Walleij select GPIOLIB 6105e83d430SRalf Baechle 611edb6310aSDaniel Lairdconfig NXP_STB220 612edb6310aSDaniel Laird bool "NXP STB220 board" 613edb6310aSDaniel Laird select SOC_PNX833X 614edb6310aSDaniel Laird help 615edb6310aSDaniel Laird Support for NXP Semiconductors STB220 Development Board. 616edb6310aSDaniel Laird 617edb6310aSDaniel Lairdconfig NXP_STB225 618edb6310aSDaniel Laird bool "NXP 225 board" 619edb6310aSDaniel Laird select SOC_PNX833X 620edb6310aSDaniel Laird select SOC_PNX8335 621edb6310aSDaniel Laird help 622edb6310aSDaniel Laird Support for NXP Semiconductors STB225 Development Board. 623edb6310aSDaniel Laird 6249267a30dSMarc St-Jeanconfig PMC_MSP 6259267a30dSMarc St-Jean bool "PMC-Sierra MSP chipsets" 62639d30c13SAnoop P A select CEVT_R4K 62739d30c13SAnoop P A select CSRC_R4K 6289267a30dSMarc St-Jean select DMA_NONCOHERENT 6299267a30dSMarc St-Jean select SWAP_IO_SPACE 6309267a30dSMarc St-Jean select NO_EXCEPT_FILL 6319267a30dSMarc St-Jean select BOOT_RAW 6329267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R1 6339267a30dSMarc St-Jean select SYS_HAS_CPU_MIPS32_R2 6349267a30dSMarc St-Jean select SYS_SUPPORTS_32BIT_KERNEL 6359267a30dSMarc St-Jean select SYS_SUPPORTS_BIG_ENDIAN 636377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 63767e38cf2SRalf Baechle select IRQ_MIPS_CPU 6389267a30dSMarc St-Jean select SERIAL_8250 6399267a30dSMarc St-Jean select SERIAL_8250_CONSOLE 6409296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_MMIO 6419296d94dSFlorian Fainelli select USB_EHCI_BIG_ENDIAN_DESC 6429267a30dSMarc St-Jean help 6439267a30dSMarc St-Jean This adds support for the PMC-Sierra family of Multi-Service 6449267a30dSMarc St-Jean Processor System-On-A-Chips. These parts include a number 6459267a30dSMarc St-Jean of integrated peripherals, interfaces and DSPs in addition to 6469267a30dSMarc St-Jean a variety of MIPS cores. 6479267a30dSMarc St-Jean 648ae2b5bb6SJohn Crispinconfig RALINK 649ae2b5bb6SJohn Crispin bool "Ralink based machines" 650ae2b5bb6SJohn Crispin select CEVT_R4K 651ae2b5bb6SJohn Crispin select CSRC_R4K 652ae2b5bb6SJohn Crispin select BOOT_RAW 653ae2b5bb6SJohn Crispin select DMA_NONCOHERENT 65467e38cf2SRalf Baechle select IRQ_MIPS_CPU 655ae2b5bb6SJohn Crispin select USE_OF 656ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R1 657ae2b5bb6SJohn Crispin select SYS_HAS_CPU_MIPS32_R2 658ae2b5bb6SJohn Crispin select SYS_SUPPORTS_32BIT_KERNEL 659ae2b5bb6SJohn Crispin select SYS_SUPPORTS_LITTLE_ENDIAN 660377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 661ae2b5bb6SJohn Crispin select SYS_HAS_EARLY_PRINTK 662ae2b5bb6SJohn Crispin select CLKDEV_LOOKUP 6632a153f1cSJohn Crispin select ARCH_HAS_RESET_CONTROLLER 6642a153f1cSJohn Crispin select RESET_CONTROLLER 665ae2b5bb6SJohn Crispin 6661da177e4SLinus Torvaldsconfig SGI_IP22 6673fa986faSMartin Michlmayr bool "SGI IP22 (Indy/Indigo2)" 668c0de00b2SThomas Bogendoerfer select ARC_MEMORY 66939b2d756SThomas Bogendoerfer select ARC_PROMLIB 6700e2794b0SRalf Baechle select FW_ARC 6710e2794b0SRalf Baechle select FW_ARC32 6727a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 6731da177e4SLinus Torvalds select BOOT_ELF32 67442f77542SRalf Baechle select CEVT_R4K 675940f6b48SRalf Baechle select CSRC_R4K 676e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 6771da177e4SLinus Torvalds select DMA_NONCOHERENT 6786630a8e5SChristoph Hellwig select HAVE_EISA 679d865bea4SRalf Baechle select I8253 68068de4803SThomas Bogendoerfer select I8259 6811da177e4SLinus Torvalds select IP22_CPU_SCACHE 68267e38cf2SRalf Baechle select IRQ_MIPS_CPU 683aa414dffSRalf Baechle select GENERIC_ISA_DMA_SUPPORT_BROKEN 684e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 685e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 68636e5c21dSThomas Bogendoerfer select SGI_HAS_HAL2 687e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 688e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 689e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 6901da177e4SLinus Torvalds select SWAP_IO_SPACE 6917cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 6927cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 693c0de00b2SThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 694ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 695ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 6965e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 697930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 6981da177e4SLinus Torvalds help 6991da177e4SLinus Torvalds This are the SGI Indy, Challenge S and Indigo2, as well as certain 7001da177e4SLinus Torvalds OEM variants like the Tandem CMN B006S. To compile a Linux kernel 7011da177e4SLinus Torvalds that runs on these, say Y here. 7021da177e4SLinus Torvalds 7031da177e4SLinus Torvaldsconfig SGI_IP27 7043fa986faSMartin Michlmayr bool "SGI IP27 (Origin200/2000)" 70554aed4ddSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 706397dc00eSMike Rapoport select ARCH_SPARSEMEM_ENABLE 7070e2794b0SRalf Baechle select FW_ARC 7080e2794b0SRalf Baechle select FW_ARC64 709e9422427SThomas Bogendoerfer select ARC_CMDLINE_ONLY 7105e83d430SRalf Baechle select BOOT_ELF64 711e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 71236a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 713eb01d42aSChristoph Hellwig select HAVE_PCI 71469a07a41SThomas Bogendoerfer select IRQ_MIPS_CPU 715e6308b6dSThomas Bogendoerfer select IRQ_DOMAIN_HIERARCHY 716130e2fb7SRalf Baechle select NR_CPUS_DEFAULT_64 717a57140e9SThomas Bogendoerfer select PCI_DRIVERS_GENERIC 718a57140e9SThomas Bogendoerfer select PCI_XTALK_BRIDGE 7197cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 720ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 7215e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 722d8cb4e11SRalf Baechle select SYS_SUPPORTS_NUMA 7231a5c5de1SRalf Baechle select SYS_SUPPORTS_SMP 724930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 7251da177e4SLinus Torvalds help 7261da177e4SLinus Torvalds This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 7271da177e4SLinus Torvalds workstations. To compile a Linux kernel that runs on these, say Y 7281da177e4SLinus Torvalds here. 7291da177e4SLinus Torvalds 730e2defae5SThomas Bogendoerferconfig SGI_IP28 7317d60717eSKees Cook bool "SGI IP28 (Indigo2 R10k)" 732c0de00b2SThomas Bogendoerfer select ARC_MEMORY 73339b2d756SThomas Bogendoerfer select ARC_PROMLIB 7340e2794b0SRalf Baechle select FW_ARC 7350e2794b0SRalf Baechle select FW_ARC64 7367a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 737e2defae5SThomas Bogendoerfer select BOOT_ELF64 738e2defae5SThomas Bogendoerfer select CEVT_R4K 739e2defae5SThomas Bogendoerfer select CSRC_R4K 740e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION 741e2defae5SThomas Bogendoerfer select DMA_NONCOHERENT 742e2defae5SThomas Bogendoerfer select GENERIC_ISA_DMA_SUPPORT_BROKEN 74367e38cf2SRalf Baechle select IRQ_MIPS_CPU 7446630a8e5SChristoph Hellwig select HAVE_EISA 745e2defae5SThomas Bogendoerfer select I8253 746e2defae5SThomas Bogendoerfer select I8259 747e2defae5SThomas Bogendoerfer select SGI_HAS_I8042 748e2defae5SThomas Bogendoerfer select SGI_HAS_INDYDOG 7495b438c44SThomas Bogendoerfer select SGI_HAS_HAL2 750e2defae5SThomas Bogendoerfer select SGI_HAS_SEEQ 751e2defae5SThomas Bogendoerfer select SGI_HAS_WD93 752e2defae5SThomas Bogendoerfer select SGI_HAS_ZILOG 753e2defae5SThomas Bogendoerfer select SWAP_IO_SPACE 754e2defae5SThomas Bogendoerfer select SYS_HAS_CPU_R10000 755c0de00b2SThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 756e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 757e2defae5SThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 758dc24d68dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 759e2defae5SThomas Bogendoerfer help 760e2defae5SThomas Bogendoerfer This is the SGI Indigo2 with R10000 processor. To compile a Linux 761e2defae5SThomas Bogendoerfer kernel that runs on these, say Y here. 762e2defae5SThomas Bogendoerfer 7637505576dSThomas Bogendoerferconfig SGI_IP30 7647505576dSThomas Bogendoerfer bool "SGI IP30 (Octane/Octane2)" 7657505576dSThomas Bogendoerfer select ARCH_HAS_PHYS_TO_DMA 7667505576dSThomas Bogendoerfer select FW_ARC 7677505576dSThomas Bogendoerfer select FW_ARC64 7687505576dSThomas Bogendoerfer select BOOT_ELF64 7697505576dSThomas Bogendoerfer select CEVT_R4K 7707505576dSThomas Bogendoerfer select CSRC_R4K 7717505576dSThomas Bogendoerfer select SYNC_R4K if SMP 7727505576dSThomas Bogendoerfer select ZONE_DMA32 7737505576dSThomas Bogendoerfer select HAVE_PCI 7747505576dSThomas Bogendoerfer select IRQ_MIPS_CPU 7757505576dSThomas Bogendoerfer select IRQ_DOMAIN_HIERARCHY 7767505576dSThomas Bogendoerfer select NR_CPUS_DEFAULT_2 7777505576dSThomas Bogendoerfer select PCI_DRIVERS_GENERIC 7787505576dSThomas Bogendoerfer select PCI_XTALK_BRIDGE 7797505576dSThomas Bogendoerfer select SYS_HAS_EARLY_PRINTK 7807505576dSThomas Bogendoerfer select SYS_HAS_CPU_R10000 7817505576dSThomas Bogendoerfer select SYS_SUPPORTS_64BIT_KERNEL 7827505576dSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 7837505576dSThomas Bogendoerfer select SYS_SUPPORTS_SMP 7847505576dSThomas Bogendoerfer select MIPS_L1_CACHE_SHIFT_7 7857505576dSThomas Bogendoerfer select ARC_MEMORY 7867505576dSThomas Bogendoerfer help 7877505576dSThomas Bogendoerfer These are the SGI Octane and Octane2 graphics workstations. To 7887505576dSThomas Bogendoerfer compile a Linux kernel that runs on these, say Y here. 7897505576dSThomas Bogendoerfer 7901da177e4SLinus Torvaldsconfig SGI_IP32 791cfd2afc0SRalf Baechle bool "SGI IP32 (O2)" 79239b2d756SThomas Bogendoerfer select ARC_MEMORY 79339b2d756SThomas Bogendoerfer select ARC_PROMLIB 79403df8229SChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 7950e2794b0SRalf Baechle select FW_ARC 7960e2794b0SRalf Baechle select FW_ARC32 7971da177e4SLinus Torvalds select BOOT_ELF32 79842f77542SRalf Baechle select CEVT_R4K 799940f6b48SRalf Baechle select CSRC_R4K 8001da177e4SLinus Torvalds select DMA_NONCOHERENT 801eb01d42aSChristoph Hellwig select HAVE_PCI 80267e38cf2SRalf Baechle select IRQ_MIPS_CPU 8031da177e4SLinus Torvalds select R5000_CPU_SCACHE 8041da177e4SLinus Torvalds select RM7000_CPU_SCACHE 8057cf8053bSRalf Baechle select SYS_HAS_CPU_R5000 8067cf8053bSRalf Baechle select SYS_HAS_CPU_R10000 if BROKEN 8077cf8053bSRalf Baechle select SYS_HAS_CPU_RM7000 808dd2f18feSRalf Baechle select SYS_HAS_CPU_NEVADA 809ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_64BIT_KERNEL 8105e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8111da177e4SLinus Torvalds help 8121da177e4SLinus Torvalds If you want this kernel to run on SGI O2 workstation, say Y here. 8131da177e4SLinus Torvalds 814ade299d8SYoichi Yuasaconfig SIBYTE_CRHINE 815ade299d8SYoichi Yuasa bool "Sibyte BCM91120C-CRhine" 8165e83d430SRalf Baechle select BOOT_ELF32 8175e83d430SRalf Baechle select SIBYTE_BCM1120 8185e83d430SRalf Baechle select SWAP_IO_SPACE 8197cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8205e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8215e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8225e83d430SRalf Baechle 823ade299d8SYoichi Yuasaconfig SIBYTE_CARMEL 824ade299d8SYoichi Yuasa bool "Sibyte BCM91120x-Carmel" 8255e83d430SRalf Baechle select BOOT_ELF32 8265e83d430SRalf Baechle select SIBYTE_BCM1120 8275e83d430SRalf Baechle select SWAP_IO_SPACE 8287cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8295e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8305e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8315e83d430SRalf Baechle 8325e83d430SRalf Baechleconfig SIBYTE_CRHONE 8333fa986faSMartin Michlmayr bool "Sibyte BCM91125C-CRhone" 8345e83d430SRalf Baechle select BOOT_ELF32 8355e83d430SRalf Baechle select SIBYTE_BCM1125 8365e83d430SRalf Baechle select SWAP_IO_SPACE 8377cf8053bSRalf Baechle select SYS_HAS_CPU_SB1 8385e83d430SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 8395e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 8405e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 8415e83d430SRalf Baechle 842ade299d8SYoichi Yuasaconfig SIBYTE_RHONE 843ade299d8SYoichi Yuasa bool "Sibyte BCM91125E-Rhone" 844ade299d8SYoichi Yuasa select BOOT_ELF32 845ade299d8SYoichi Yuasa select SIBYTE_BCM1125H 846ade299d8SYoichi Yuasa select SWAP_IO_SPACE 847ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 848ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 849ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 850ade299d8SYoichi Yuasa 851ade299d8SYoichi Yuasaconfig SIBYTE_SWARM 852ade299d8SYoichi Yuasa bool "Sibyte BCM91250A-SWARM" 853ade299d8SYoichi Yuasa select BOOT_ELF32 854fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 855ade299d8SYoichi Yuasa select SIBYTE_SB1250 856ade299d8SYoichi Yuasa select SWAP_IO_SPACE 857ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 858ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 859ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 860ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 861cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 862e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 863ade299d8SYoichi Yuasa 864ade299d8SYoichi Yuasaconfig SIBYTE_LITTLESUR 865ade299d8SYoichi Yuasa bool "Sibyte BCM91250C2-LittleSur" 866ade299d8SYoichi Yuasa select BOOT_ELF32 867fcf3ca4cSSebastian Andrzej Siewior select HAVE_PATA_PLATFORM 868ade299d8SYoichi Yuasa select SIBYTE_SB1250 869ade299d8SYoichi Yuasa select SWAP_IO_SPACE 870ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 871ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 872ade299d8SYoichi Yuasa select SYS_SUPPORTS_HIGHMEM 873ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 874756d6d83SMaciej W. Rozycki select ZONE_DMA32 if 64BIT 875ade299d8SYoichi Yuasa 876ade299d8SYoichi Yuasaconfig SIBYTE_SENTOSA 877ade299d8SYoichi Yuasa bool "Sibyte BCM91250E-Sentosa" 878ade299d8SYoichi Yuasa select BOOT_ELF32 879ade299d8SYoichi Yuasa select SIBYTE_SB1250 880ade299d8SYoichi Yuasa select SWAP_IO_SPACE 881ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 882ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 883ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 884e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 885ade299d8SYoichi Yuasa 886ade299d8SYoichi Yuasaconfig SIBYTE_BIGSUR 887ade299d8SYoichi Yuasa bool "Sibyte BCM91480B-BigSur" 888ade299d8SYoichi Yuasa select BOOT_ELF32 889ade299d8SYoichi Yuasa select NR_CPUS_DEFAULT_4 890ade299d8SYoichi Yuasa select SIBYTE_BCM1x80 891ade299d8SYoichi Yuasa select SWAP_IO_SPACE 892ade299d8SYoichi Yuasa select SYS_HAS_CPU_SB1 893ade299d8SYoichi Yuasa select SYS_SUPPORTS_BIG_ENDIAN 894651194f8SRalf Baechle select SYS_SUPPORTS_HIGHMEM 895ade299d8SYoichi Yuasa select SYS_SUPPORTS_LITTLE_ENDIAN 896cce335aeSRalf Baechle select ZONE_DMA32 if 64BIT 897e4849affSMaciej W. Rozycki select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 898ade299d8SYoichi Yuasa 89914b36af4SThomas Bogendoerferconfig SNI_RM 90014b36af4SThomas Bogendoerfer bool "SNI RM200/300/400" 90139b2d756SThomas Bogendoerfer select ARC_MEMORY 90239b2d756SThomas Bogendoerfer select ARC_PROMLIB 9030e2794b0SRalf Baechle select FW_ARC if CPU_LITTLE_ENDIAN 9040e2794b0SRalf Baechle select FW_ARC32 if CPU_LITTLE_ENDIAN 905aaa9fad3SPaul Bolle select FW_SNIPROM if CPU_BIG_ENDIAN 9065e83d430SRalf Baechle select ARCH_MAY_HAVE_PC_FDC 907a211a082SRalf Baechle select ARCH_MIGHT_HAVE_PC_PARPORT 9087a407aa5SRalf Baechle select ARCH_MIGHT_HAVE_PC_SERIO 9095e83d430SRalf Baechle select BOOT_ELF32 91042f77542SRalf Baechle select CEVT_R4K 911940f6b48SRalf Baechle select CSRC_R4K 912e2defae5SThomas Bogendoerfer select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 9135e83d430SRalf Baechle select DMA_NONCOHERENT 9145e83d430SRalf Baechle select GENERIC_ISA_DMA 9156630a8e5SChristoph Hellwig select HAVE_EISA 9168a118c38SRalf Baechle select HAVE_PCSPKR_PLATFORM 917eb01d42aSChristoph Hellwig select HAVE_PCI 91867e38cf2SRalf Baechle select IRQ_MIPS_CPU 919d865bea4SRalf Baechle select I8253 9205e83d430SRalf Baechle select I8259 9215e83d430SRalf Baechle select ISA 9224a0312fcSThomas Bogendoerfer select SWAP_IO_SPACE if CPU_BIG_ENDIAN 9237cf8053bSRalf Baechle select SYS_HAS_CPU_R4X00 9244a0312fcSThomas Bogendoerfer select SYS_HAS_CPU_R5000 925c066a32aSThomas Bogendoerfer select SYS_HAS_CPU_R10000 9264a0312fcSThomas Bogendoerfer select R5000_CPU_SCACHE 92736a88530SRalf Baechle select SYS_HAS_EARLY_PRINTK 928ed5ba2fbSYoichi Yuasa select SYS_SUPPORTS_32BIT_KERNEL 9297d60717eSKees Cook select SYS_SUPPORTS_64BIT_KERNEL 9304a0312fcSThomas Bogendoerfer select SYS_SUPPORTS_BIG_ENDIAN 9315e83d430SRalf Baechle select SYS_SUPPORTS_HIGHMEM 9325e83d430SRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 9331da177e4SLinus Torvalds help 93414b36af4SThomas Bogendoerfer The SNI RM200/300/400 are MIPS-based machines manufactured by 93514b36af4SThomas Bogendoerfer Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 9365e83d430SRalf Baechle Technology and now in turn merged with Fujitsu. Say Y here to 9375e83d430SRalf Baechle support this machine type. 9381da177e4SLinus Torvalds 939edcaf1a6SAtsushi Nemotoconfig MACH_TX39XX 940edcaf1a6SAtsushi Nemoto bool "Toshiba TX39 series based machines" 9415e83d430SRalf Baechle 942edcaf1a6SAtsushi Nemotoconfig MACH_TX49XX 943edcaf1a6SAtsushi Nemoto bool "Toshiba TX49 series based machines" 94423fbee9dSRalf Baechle 94573b4390fSRalf Baechleconfig MIKROTIK_RB532 94673b4390fSRalf Baechle bool "Mikrotik RB532 boards" 94773b4390fSRalf Baechle select CEVT_R4K 94873b4390fSRalf Baechle select CSRC_R4K 94973b4390fSRalf Baechle select DMA_NONCOHERENT 950eb01d42aSChristoph Hellwig select HAVE_PCI 95167e38cf2SRalf Baechle select IRQ_MIPS_CPU 95273b4390fSRalf Baechle select SYS_HAS_CPU_MIPS32_R1 95373b4390fSRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 95473b4390fSRalf Baechle select SYS_SUPPORTS_LITTLE_ENDIAN 95573b4390fSRalf Baechle select SWAP_IO_SPACE 95673b4390fSRalf Baechle select BOOT_RAW 957d30a2b47SLinus Walleij select GPIOLIB 958930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_4 95973b4390fSRalf Baechle help 96073b4390fSRalf Baechle Support the Mikrotik(tm) RouterBoard 532 series, 96173b4390fSRalf Baechle based on the IDT RC32434 SoC. 96273b4390fSRalf Baechle 9639ddebc46SDavid Daneyconfig CAVIUM_OCTEON_SOC 9649ddebc46SDavid Daney bool "Cavium Networks Octeon SoC based boards" 965a86c7f72SDavid Daney select CEVT_R4K 966ea8c64acSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 9671753d50cSChristoph Hellwig select HAVE_RAPIDIO 968d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 969a86c7f72SDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 970a86c7f72SDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 971f65aad41SRalf Baechle select EDAC_SUPPORT 972b01aec9bSBorislav Petkov select EDAC_ATOMIC_SCRUB 97373569d87SDavid Daney select SYS_SUPPORTS_LITTLE_ENDIAN 97473569d87SDavid Daney select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 975a86c7f72SDavid Daney select SYS_HAS_EARLY_PRINTK 9765e683389SDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 977eb01d42aSChristoph Hellwig select HAVE_PCI 978f00e001eSDavid Daney select ZONE_DMA32 979465aaed0SDavid Daney select HOLES_IN_ZONE 980d30a2b47SLinus Walleij select GPIOLIB 9816e511163SDavid Daney select USE_OF 9826e511163SDavid Daney select ARCH_SPARSEMEM_ENABLE 9836e511163SDavid Daney select SYS_SUPPORTS_SMP 9847820b84bSDavid Daney select NR_CPUS_DEFAULT_64 9857820b84bSDavid Daney select MIPS_NR_CPU_NR_MAP_1024 986e326479fSAndrew Bresticker select BUILTIN_DTB 9878c1e6b14SDavid Daney select MTD_COMPLEX_MAPPINGS 98809230cbcSChristoph Hellwig select SWIOTLB 9893ff72be4SSteven J. Hill select SYS_SUPPORTS_RELOCATABLE 990a86c7f72SDavid Daney help 991a86c7f72SDavid Daney This option supports all of the Octeon reference boards from Cavium 992a86c7f72SDavid Daney Networks. It builds a kernel that dynamically determines the Octeon 993a86c7f72SDavid Daney CPU type and supports all known board reference implementations. 994a86c7f72SDavid Daney Some of the supported boards are: 995a86c7f72SDavid Daney EBT3000 996a86c7f72SDavid Daney EBH3000 997a86c7f72SDavid Daney EBH3100 998a86c7f72SDavid Daney Thunder 999a86c7f72SDavid Daney Kodama 1000a86c7f72SDavid Daney Hikari 1001a86c7f72SDavid Daney Say Y here for most Octeon reference boards. 1002a86c7f72SDavid Daney 10037f058e85SJayachandran Cconfig NLM_XLR_BOARD 10047f058e85SJayachandran C bool "Netlogic XLR/XLS based systems" 10057f058e85SJayachandran C select BOOT_ELF32 10067f058e85SJayachandran C select NLM_COMMON 10077f058e85SJayachandran C select SYS_HAS_CPU_XLR 10087f058e85SJayachandran C select SYS_SUPPORTS_SMP 1009eb01d42aSChristoph Hellwig select HAVE_PCI 10107f058e85SJayachandran C select SWAP_IO_SPACE 10117f058e85SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 10127f058e85SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 1013d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 10147f058e85SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 10157f058e85SJayachandran C select SYS_SUPPORTS_HIGHMEM 10167f058e85SJayachandran C select NR_CPUS_DEFAULT_32 10177f058e85SJayachandran C select CEVT_R4K 10187f058e85SJayachandran C select CSRC_R4K 101967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1020b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 10217f058e85SJayachandran C select SYNC_R4K 10227f058e85SJayachandran C select SYS_HAS_EARLY_PRINTK 10238f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 10248f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 10257f058e85SJayachandran C help 10267f058e85SJayachandran C Support for systems based on Netlogic XLR and XLS processors. 10277f058e85SJayachandran C Say Y here if you have a XLR or XLS based board. 10287f058e85SJayachandran C 10291c773ea4SJayachandran Cconfig NLM_XLP_BOARD 10301c773ea4SJayachandran C bool "Netlogic XLP based systems" 10311c773ea4SJayachandran C select BOOT_ELF32 10321c773ea4SJayachandran C select NLM_COMMON 10331c773ea4SJayachandran C select SYS_HAS_CPU_XLP 10341c773ea4SJayachandran C select SYS_SUPPORTS_SMP 1035eb01d42aSChristoph Hellwig select HAVE_PCI 10361c773ea4SJayachandran C select SYS_SUPPORTS_32BIT_KERNEL 10371c773ea4SJayachandran C select SYS_SUPPORTS_64BIT_KERNEL 1038d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1039d30a2b47SLinus Walleij select GPIOLIB 10401c773ea4SJayachandran C select SYS_SUPPORTS_BIG_ENDIAN 10411c773ea4SJayachandran C select SYS_SUPPORTS_LITTLE_ENDIAN 10421c773ea4SJayachandran C select SYS_SUPPORTS_HIGHMEM 10431c773ea4SJayachandran C select NR_CPUS_DEFAULT_32 10441c773ea4SJayachandran C select CEVT_R4K 10451c773ea4SJayachandran C select CSRC_R4K 104667e38cf2SRalf Baechle select IRQ_MIPS_CPU 1047b97215fdSJayachandran C select ZONE_DMA32 if 64BIT 10481c773ea4SJayachandran C select SYNC_R4K 10491c773ea4SJayachandran C select SYS_HAS_EARLY_PRINTK 10502f6528e1SJayachandran C select USE_OF 10518f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT 10528f0b0430SJayachandran C select SYS_SUPPORTS_ZBOOT_UART16550 10531c773ea4SJayachandran C help 10541c773ea4SJayachandran C This board is based on Netlogic XLP Processor. 10551c773ea4SJayachandran C Say Y here if you have a XLP based board. 10561c773ea4SJayachandran C 10579bc463beSDavid Daneyconfig MIPS_PARAVIRT 10589bc463beSDavid Daney bool "Para-Virtualized guest system" 10599bc463beSDavid Daney select CEVT_R4K 10609bc463beSDavid Daney select CSRC_R4K 10619bc463beSDavid Daney select SYS_SUPPORTS_64BIT_KERNEL 10629bc463beSDavid Daney select SYS_SUPPORTS_32BIT_KERNEL 10639bc463beSDavid Daney select SYS_SUPPORTS_BIG_ENDIAN 10649bc463beSDavid Daney select SYS_SUPPORTS_SMP 10659bc463beSDavid Daney select NR_CPUS_DEFAULT_4 10669bc463beSDavid Daney select SYS_HAS_EARLY_PRINTK 10679bc463beSDavid Daney select SYS_HAS_CPU_MIPS32_R2 10689bc463beSDavid Daney select SYS_HAS_CPU_MIPS64_R2 10699bc463beSDavid Daney select SYS_HAS_CPU_CAVIUM_OCTEON 1070eb01d42aSChristoph Hellwig select HAVE_PCI 10719bc463beSDavid Daney select SWAP_IO_SPACE 10729bc463beSDavid Daney help 10739bc463beSDavid Daney This option supports guest running under ???? 10749bc463beSDavid Daney 10751da177e4SLinus Torvaldsendchoice 10761da177e4SLinus Torvalds 1077e8c7c482SRalf Baechlesource "arch/mips/alchemy/Kconfig" 10783b12308fSSergey Ryazanovsource "arch/mips/ath25/Kconfig" 1079d4a67d9dSGabor Juhossource "arch/mips/ath79/Kconfig" 1080a656ffcbSHauke Mehrtenssource "arch/mips/bcm47xx/Kconfig" 1081e7300d04SMaxime Bizonsource "arch/mips/bcm63xx/Kconfig" 10828945e37eSKevin Cernekeesource "arch/mips/bmips/Kconfig" 1083eed0eabdSPaul Burtonsource "arch/mips/generic/Kconfig" 10845e83d430SRalf Baechlesource "arch/mips/jazz/Kconfig" 10855ebabe59SLars-Peter Clausensource "arch/mips/jz4740/Kconfig" 10868ec6d935SJohn Crispinsource "arch/mips/lantiq/Kconfig" 10871f21d2bdSBrian Murphysource "arch/mips/lasat/Kconfig" 10882572f00dSJoshua Hendersonsource "arch/mips/pic32/Kconfig" 1089af0cfb2cSEzequiel Garciasource "arch/mips/pistachio/Kconfig" 10900f3a05cbSRalf Baechlesource "arch/mips/pmcs-msp71xx/Kconfig" 1091ae2b5bb6SJohn Crispinsource "arch/mips/ralink/Kconfig" 109229c48699SRalf Baechlesource "arch/mips/sgi-ip27/Kconfig" 109338b18f72SRalf Baechlesource "arch/mips/sibyte/Kconfig" 109422b1d707SAtsushi Nemotosource "arch/mips/txx9/Kconfig" 10955e83d430SRalf Baechlesource "arch/mips/vr41xx/Kconfig" 1096a86c7f72SDavid Daneysource "arch/mips/cavium-octeon/Kconfig" 109771e2f4ddSJiaxun Yangsource "arch/mips/loongson2ef/Kconfig" 109830ad29bbSHuacai Chensource "arch/mips/loongson32/Kconfig" 109930ad29bbSHuacai Chensource "arch/mips/loongson64/Kconfig" 11007f058e85SJayachandran Csource "arch/mips/netlogic/Kconfig" 1101ae6e7e63SDavid Daneysource "arch/mips/paravirt/Kconfig" 110238b18f72SRalf Baechle 11035e83d430SRalf Baechleendmenu 11045e83d430SRalf Baechle 11053c9ee7efSAkinobu Mitaconfig GENERIC_HWEIGHT 11063c9ee7efSAkinobu Mita bool 11073c9ee7efSAkinobu Mita default y 11083c9ee7efSAkinobu Mita 11091da177e4SLinus Torvaldsconfig GENERIC_CALIBRATE_DELAY 11101da177e4SLinus Torvalds bool 11111da177e4SLinus Torvalds default y 11121da177e4SLinus Torvalds 1113ae1e9130SIngo Molnarconfig SCHED_OMIT_FRAME_POINTER 11141cc89038SAtsushi Nemoto bool 11151cc89038SAtsushi Nemoto default y 11161cc89038SAtsushi Nemoto 11171da177e4SLinus Torvalds# 11181da177e4SLinus Torvalds# Select some configuration options automatically based on user selections. 11191da177e4SLinus Torvalds# 11200e2794b0SRalf Baechleconfig FW_ARC 11211da177e4SLinus Torvalds bool 11221da177e4SLinus Torvalds 112361ed242dSRalf Baechleconfig ARCH_MAY_HAVE_PC_FDC 112461ed242dSRalf Baechle bool 112561ed242dSRalf Baechle 11269267a30dSMarc St-Jeanconfig BOOT_RAW 11279267a30dSMarc St-Jean bool 11289267a30dSMarc St-Jean 1129217dd11eSRalf Baechleconfig CEVT_BCM1480 1130217dd11eSRalf Baechle bool 1131217dd11eSRalf Baechle 11326457d9fcSYoichi Yuasaconfig CEVT_DS1287 11336457d9fcSYoichi Yuasa bool 11346457d9fcSYoichi Yuasa 11351097c6acSYoichi Yuasaconfig CEVT_GT641XX 11361097c6acSYoichi Yuasa bool 11371097c6acSYoichi Yuasa 113842f77542SRalf Baechleconfig CEVT_R4K 113942f77542SRalf Baechle bool 114042f77542SRalf Baechle 1141217dd11eSRalf Baechleconfig CEVT_SB1250 1142217dd11eSRalf Baechle bool 1143217dd11eSRalf Baechle 1144229f773eSAtsushi Nemotoconfig CEVT_TXX9 1145229f773eSAtsushi Nemoto bool 1146229f773eSAtsushi Nemoto 1147217dd11eSRalf Baechleconfig CSRC_BCM1480 1148217dd11eSRalf Baechle bool 1149217dd11eSRalf Baechle 11504247417dSYoichi Yuasaconfig CSRC_IOASIC 11514247417dSYoichi Yuasa bool 11524247417dSYoichi Yuasa 1153940f6b48SRalf Baechleconfig CSRC_R4K 1154940f6b48SRalf Baechle bool 1155940f6b48SRalf Baechle 1156217dd11eSRalf Baechleconfig CSRC_SB1250 1157217dd11eSRalf Baechle bool 1158217dd11eSRalf Baechle 1159a7f4df4eSAlex Smithconfig MIPS_CLOCK_VSYSCALL 1160a7f4df4eSAlex Smith def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1161a7f4df4eSAlex Smith 1162a9aec7feSAtsushi Nemotoconfig GPIO_TXX9 1163d30a2b47SLinus Walleij select GPIOLIB 1164a9aec7feSAtsushi Nemoto bool 1165a9aec7feSAtsushi Nemoto 11660e2794b0SRalf Baechleconfig FW_CFE 1167df78b5c8SAurelien Jarno bool 1168df78b5c8SAurelien Jarno 116940e084a5SRalf Baechleconfig ARCH_SUPPORTS_UPROBES 117040e084a5SRalf Baechle bool 117140e084a5SRalf Baechle 1172885014bcSFelix Fietkauconfig DMA_MAYBE_COHERENT 1173f3ecc0ffSChristoph Hellwig select ARCH_HAS_DMA_COHERENCE_H 1174885014bcSFelix Fietkau select DMA_NONCOHERENT 1175885014bcSFelix Fietkau bool 1176885014bcSFelix Fietkau 117720d33064SPaul Burtonconfig DMA_PERDEV_COHERENT 117820d33064SPaul Burton bool 1179347cb6afSChristoph Hellwig select ARCH_HAS_SETUP_DMA_OPS 11805748e1b3SChristoph Hellwig select DMA_NONCOHERENT 118120d33064SPaul Burton 11821da177e4SLinus Torvaldsconfig DMA_NONCOHERENT 11831da177e4SLinus Torvalds bool 1184db91427bSChristoph Hellwig # 1185db91427bSChristoph Hellwig # MIPS allows mixing "slightly different" Cacheability and Coherency 1186db91427bSChristoph Hellwig # Attribute bits. It is believed that the uncached access through 1187db91427bSChristoph Hellwig # KSEG1 and the implementation specific "uncached accelerated" used 1188db91427bSChristoph Hellwig # by pgprot_writcombine can be mixed, and the latter sometimes provides 1189db91427bSChristoph Hellwig # significant advantages. 1190db91427bSChristoph Hellwig # 1191419e2f18SChristoph Hellwig select ARCH_HAS_DMA_WRITE_COMBINE 1192f8c55dc6SChristoph Hellwig select ARCH_HAS_SYNC_DMA_FOR_DEVICE 11932ee7a4efSChristoph Hellwig select ARCH_HAS_UNCACHED_SEGMENT 119434dc0ea6SChristoph Hellwig select DMA_NONCOHERENT_MMAP 1195f8c55dc6SChristoph Hellwig select DMA_NONCOHERENT_CACHE_SYNC 119634dc0ea6SChristoph Hellwig select NEED_DMA_MAP_STATE 11974ce588cdSRalf Baechle 119836a88530SRalf Baechleconfig SYS_HAS_EARLY_PRINTK 11991da177e4SLinus Torvalds bool 12001da177e4SLinus Torvalds 12011b2bc75cSRalf Baechleconfig SYS_SUPPORTS_HOTPLUG_CPU 1202dbb74540SRalf Baechle bool 1203dbb74540SRalf Baechle 12041da177e4SLinus Torvaldsconfig MIPS_BONITO64 12051da177e4SLinus Torvalds bool 12061da177e4SLinus Torvalds 12071da177e4SLinus Torvaldsconfig MIPS_MSC 12081da177e4SLinus Torvalds bool 12091da177e4SLinus Torvalds 12101f21d2bdSBrian Murphyconfig MIPS_NILE4 12111f21d2bdSBrian Murphy bool 12121f21d2bdSBrian Murphy 121339b8d525SRalf Baechleconfig SYNC_R4K 121439b8d525SRalf Baechle bool 121539b8d525SRalf Baechle 1216487d70d0SGabor Juhosconfig MIPS_MACHINE 1217487d70d0SGabor Juhos def_bool n 1218487d70d0SGabor Juhos 1219ce816fa8SUwe Kleine-Königconfig NO_IOPORT_MAP 1220d388d685SMaciej W. Rozycki def_bool n 1221d388d685SMaciej W. Rozycki 12224e0748f5SMarkos Chandrasconfig GENERIC_CSUM 122318d84e2eSAlexander Lobakin def_bool CPU_NO_LOAD_STORE_LR 12244e0748f5SMarkos Chandras 12258313da30SRalf Baechleconfig GENERIC_ISA_DMA 12268313da30SRalf Baechle bool 12278313da30SRalf Baechle select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1228a35bee8aSNamhyung Kim select ISA_DMA_API 12298313da30SRalf Baechle 1230aa414dffSRalf Baechleconfig GENERIC_ISA_DMA_SUPPORT_BROKEN 1231aa414dffSRalf Baechle bool 12328313da30SRalf Baechle select GENERIC_ISA_DMA 1233aa414dffSRalf Baechle 1234a35bee8aSNamhyung Kimconfig ISA_DMA_API 1235a35bee8aSNamhyung Kim bool 1236a35bee8aSNamhyung Kim 1237465aaed0SDavid Daneyconfig HOLES_IN_ZONE 1238465aaed0SDavid Daney bool 1239465aaed0SDavid Daney 12408c530ea3SMatt Redfearnconfig SYS_SUPPORTS_RELOCATABLE 12418c530ea3SMatt Redfearn bool 12428c530ea3SMatt Redfearn help 12438c530ea3SMatt Redfearn Selected if the platform supports relocating the kernel. 12448c530ea3SMatt Redfearn The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 12458c530ea3SMatt Redfearn to allow access to command line and entropy sources. 12468c530ea3SMatt Redfearn 1247f381bf6dSDavid Daneyconfig MIPS_CBPF_JIT 1248f381bf6dSDavid Daney def_bool y 1249f381bf6dSDavid Daney depends on BPF_JIT && HAVE_CBPF_JIT 1250f381bf6dSDavid Daney 1251f381bf6dSDavid Daneyconfig MIPS_EBPF_JIT 1252f381bf6dSDavid Daney def_bool y 1253f381bf6dSDavid Daney depends on BPF_JIT && HAVE_EBPF_JIT 1254f381bf6dSDavid Daney 1255f381bf6dSDavid Daney 12565e83d430SRalf Baechle# 12576b2aac42SMasanari Iida# Endianness selection. Sufficiently obscure so many users don't know what to 12585e83d430SRalf Baechle# answer,so we try hard to limit the available choices. Also the use of a 12595e83d430SRalf Baechle# choice statement should be more obvious to the user. 12605e83d430SRalf Baechle# 12615e83d430SRalf Baechlechoice 12626b2aac42SMasanari Iida prompt "Endianness selection" 12631da177e4SLinus Torvalds help 12641da177e4SLinus Torvalds Some MIPS machines can be configured for either little or big endian 12655e83d430SRalf Baechle byte order. These modes require different kernels and a different 12663cb2fcccSMatt LaPlante Linux distribution. In general there is one preferred byteorder for a 12675e83d430SRalf Baechle particular system but some systems are just as commonly used in the 12683dde6ad8SDavid Sterba one or the other endianness. 12695e83d430SRalf Baechle 12705e83d430SRalf Baechleconfig CPU_BIG_ENDIAN 12715e83d430SRalf Baechle bool "Big endian" 12725e83d430SRalf Baechle depends on SYS_SUPPORTS_BIG_ENDIAN 12735e83d430SRalf Baechle 12745e83d430SRalf Baechleconfig CPU_LITTLE_ENDIAN 12755e83d430SRalf Baechle bool "Little endian" 12765e83d430SRalf Baechle depends on SYS_SUPPORTS_LITTLE_ENDIAN 12775e83d430SRalf Baechle 12785e83d430SRalf Baechleendchoice 12795e83d430SRalf Baechle 128022b0763aSDavid Daneyconfig EXPORT_UASM 128122b0763aSDavid Daney bool 128222b0763aSDavid Daney 12832116245eSRalf Baechleconfig SYS_SUPPORTS_APM_EMULATION 12842116245eSRalf Baechle bool 12852116245eSRalf Baechle 12865e83d430SRalf Baechleconfig SYS_SUPPORTS_BIG_ENDIAN 12875e83d430SRalf Baechle bool 12885e83d430SRalf Baechle 12895e83d430SRalf Baechleconfig SYS_SUPPORTS_LITTLE_ENDIAN 12905e83d430SRalf Baechle bool 12911da177e4SLinus Torvalds 12929cffd154SDavid Daneyconfig SYS_SUPPORTS_HUGETLBFS 12939cffd154SDavid Daney bool 129445e03e62SDaniel Silsby depends on CPU_SUPPORTS_HUGEPAGES 12959cffd154SDavid Daney default y 12969cffd154SDavid Daney 1297aa1762f4SDavid Daneyconfig MIPS_HUGE_TLB_SUPPORT 1298aa1762f4SDavid Daney def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1299aa1762f4SDavid Daney 13001da177e4SLinus Torvaldsconfig IRQ_CPU_RM7K 13011da177e4SLinus Torvalds bool 13021da177e4SLinus Torvalds 13039267a30dSMarc St-Jeanconfig IRQ_MSP_SLP 13049267a30dSMarc St-Jean bool 13059267a30dSMarc St-Jean 13069267a30dSMarc St-Jeanconfig IRQ_MSP_CIC 13079267a30dSMarc St-Jean bool 13089267a30dSMarc St-Jean 13098420fd00SAtsushi Nemotoconfig IRQ_TXX9 13108420fd00SAtsushi Nemoto bool 13118420fd00SAtsushi Nemoto 1312d5ab1a69SYoichi Yuasaconfig IRQ_GT641XX 1313d5ab1a69SYoichi Yuasa bool 1314d5ab1a69SYoichi Yuasa 1315252161ecSYoichi Yuasaconfig PCI_GT64XXX_PCI0 13161da177e4SLinus Torvalds bool 13171da177e4SLinus Torvalds 1318a57140e9SThomas Bogendoerferconfig PCI_XTALK_BRIDGE 1319a57140e9SThomas Bogendoerfer bool 1320a57140e9SThomas Bogendoerfer 13219267a30dSMarc St-Jeanconfig NO_EXCEPT_FILL 13229267a30dSMarc St-Jean bool 13239267a30dSMarc St-Jean 1324a83860c2SRalf Baechleconfig SOC_EMMA2RH 1325a83860c2SRalf Baechle bool 1326a83860c2SRalf Baechle select CEVT_R4K 1327a83860c2SRalf Baechle select CSRC_R4K 1328a83860c2SRalf Baechle select DMA_NONCOHERENT 132967e38cf2SRalf Baechle select IRQ_MIPS_CPU 1330a83860c2SRalf Baechle select SWAP_IO_SPACE 1331a83860c2SRalf Baechle select SYS_HAS_CPU_R5500 1332a83860c2SRalf Baechle select SYS_SUPPORTS_32BIT_KERNEL 1333a83860c2SRalf Baechle select SYS_SUPPORTS_64BIT_KERNEL 1334a83860c2SRalf Baechle select SYS_SUPPORTS_BIG_ENDIAN 1335a83860c2SRalf Baechle 1336edb6310aSDaniel Lairdconfig SOC_PNX833X 1337edb6310aSDaniel Laird bool 1338edb6310aSDaniel Laird select CEVT_R4K 1339edb6310aSDaniel Laird select CSRC_R4K 134067e38cf2SRalf Baechle select IRQ_MIPS_CPU 1341edb6310aSDaniel Laird select DMA_NONCOHERENT 1342edb6310aSDaniel Laird select SYS_HAS_CPU_MIPS32_R2 1343edb6310aSDaniel Laird select SYS_SUPPORTS_32BIT_KERNEL 1344edb6310aSDaniel Laird select SYS_SUPPORTS_LITTLE_ENDIAN 1345edb6310aSDaniel Laird select SYS_SUPPORTS_BIG_ENDIAN 1346377cb1b6SRalf Baechle select SYS_SUPPORTS_MIPS16 1347edb6310aSDaniel Laird select CPU_MIPSR2_IRQ_VI 1348edb6310aSDaniel Laird 1349edb6310aSDaniel Lairdconfig SOC_PNX8335 1350edb6310aSDaniel Laird bool 1351edb6310aSDaniel Laird select SOC_PNX833X 1352edb6310aSDaniel Laird 1353a7e07b1aSMarkos Chandrasconfig MIPS_SPRAM 1354a7e07b1aSMarkos Chandras bool 1355a7e07b1aSMarkos Chandras 13561da177e4SLinus Torvaldsconfig SWAP_IO_SPACE 13571da177e4SLinus Torvalds bool 13581da177e4SLinus Torvalds 1359e2defae5SThomas Bogendoerferconfig SGI_HAS_INDYDOG 1360e2defae5SThomas Bogendoerfer bool 1361e2defae5SThomas Bogendoerfer 13625b438c44SThomas Bogendoerferconfig SGI_HAS_HAL2 13635b438c44SThomas Bogendoerfer bool 13645b438c44SThomas Bogendoerfer 1365e2defae5SThomas Bogendoerferconfig SGI_HAS_SEEQ 1366e2defae5SThomas Bogendoerfer bool 1367e2defae5SThomas Bogendoerfer 1368e2defae5SThomas Bogendoerferconfig SGI_HAS_WD93 1369e2defae5SThomas Bogendoerfer bool 1370e2defae5SThomas Bogendoerfer 1371e2defae5SThomas Bogendoerferconfig SGI_HAS_ZILOG 1372e2defae5SThomas Bogendoerfer bool 1373e2defae5SThomas Bogendoerfer 1374e2defae5SThomas Bogendoerferconfig SGI_HAS_I8042 1375e2defae5SThomas Bogendoerfer bool 1376e2defae5SThomas Bogendoerfer 1377e2defae5SThomas Bogendoerferconfig DEFAULT_SGI_PARTITION 1378e2defae5SThomas Bogendoerfer bool 1379e2defae5SThomas Bogendoerfer 13800e2794b0SRalf Baechleconfig FW_ARC32 13815e83d430SRalf Baechle bool 13825e83d430SRalf Baechle 1383aaa9fad3SPaul Bolleconfig FW_SNIPROM 1384231a35d3SThomas Bogendoerfer bool 1385231a35d3SThomas Bogendoerfer 13861da177e4SLinus Torvaldsconfig BOOT_ELF32 13871da177e4SLinus Torvalds bool 13881da177e4SLinus Torvalds 1389930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_4 1390930beb5aSFlorian Fainelli bool 1391930beb5aSFlorian Fainelli 1392930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_5 1393930beb5aSFlorian Fainelli bool 1394930beb5aSFlorian Fainelli 1395930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_6 1396930beb5aSFlorian Fainelli bool 1397930beb5aSFlorian Fainelli 1398930beb5aSFlorian Fainelliconfig MIPS_L1_CACHE_SHIFT_7 1399930beb5aSFlorian Fainelli bool 1400930beb5aSFlorian Fainelli 14011da177e4SLinus Torvaldsconfig MIPS_L1_CACHE_SHIFT 14021da177e4SLinus Torvalds int 1403a4c0201eSFlorian Fainelli default "7" if MIPS_L1_CACHE_SHIFT_7 14045432eeb6SKevin Cernekee default "6" if MIPS_L1_CACHE_SHIFT_6 14055432eeb6SKevin Cernekee default "5" if MIPS_L1_CACHE_SHIFT_5 14065432eeb6SKevin Cernekee default "4" if MIPS_L1_CACHE_SHIFT_4 14071da177e4SLinus Torvalds default "5" 14081da177e4SLinus Torvalds 14091da177e4SLinus Torvaldsconfig HAVE_STD_PC_SERIAL_PORT 14101da177e4SLinus Torvalds bool 14111da177e4SLinus Torvalds 1412e9422427SThomas Bogendoerferconfig ARC_CMDLINE_ONLY 1413e9422427SThomas Bogendoerfer bool 1414e9422427SThomas Bogendoerfer 14151da177e4SLinus Torvaldsconfig ARC_CONSOLE 14161da177e4SLinus Torvalds bool "ARC console support" 1417e2defae5SThomas Bogendoerfer depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 14181da177e4SLinus Torvalds 14191da177e4SLinus Torvaldsconfig ARC_MEMORY 14201da177e4SLinus Torvalds bool 14211da177e4SLinus Torvalds 14221da177e4SLinus Torvaldsconfig ARC_PROMLIB 14231da177e4SLinus Torvalds bool 14241da177e4SLinus Torvalds 14250e2794b0SRalf Baechleconfig FW_ARC64 14261da177e4SLinus Torvalds bool 14271da177e4SLinus Torvalds 14281da177e4SLinus Torvaldsconfig BOOT_ELF64 14291da177e4SLinus Torvalds bool 14301da177e4SLinus Torvalds 14311da177e4SLinus Torvaldsmenu "CPU selection" 14321da177e4SLinus Torvalds 14331da177e4SLinus Torvaldschoice 14341da177e4SLinus Torvalds prompt "CPU type" 14351da177e4SLinus Torvalds default CPU_R4X00 14361da177e4SLinus Torvalds 1437268a2d60SJiaxun Yangconfig CPU_LOONGSON64 1438caed1d1bSHuacai Chen bool "Loongson 64-bit CPU" 1439268a2d60SJiaxun Yang depends on SYS_HAS_CPU_LOONGSON64 1440d3bc81beSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 144151522217SJiaxun Yang select CPU_MIPSR2 144251522217SJiaxun Yang select CPU_HAS_PREFETCH 14430e476d91SHuacai Chen select CPU_SUPPORTS_64BIT_KERNEL 14440e476d91SHuacai Chen select CPU_SUPPORTS_HIGHMEM 14450e476d91SHuacai Chen select CPU_SUPPORTS_HUGEPAGES 14467507445bSHuacai Chen select CPU_SUPPORTS_MSA 144751522217SJiaxun Yang select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT 144851522217SJiaxun Yang select CPU_MIPSR2_IRQ_VI 14490e476d91SHuacai Chen select WEAK_ORDERING 14500e476d91SHuacai Chen select WEAK_REORDERING_BEYOND_LLSC 14517507445bSHuacai Chen select MIPS_ASID_BITS_VARIABLE 1452b2edcfc8SHuacai Chen select MIPS_PGD_C0_CONTEXT 145317c99d94SHuacai Chen select MIPS_L1_CACHE_SHIFT_6 1454d30a2b47SLinus Walleij select GPIOLIB 145509230cbcSChristoph Hellwig select SWIOTLB 14560e476d91SHuacai Chen help 1457caed1d1bSHuacai Chen The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor 1458caed1d1bSHuacai Chen cores implements the MIPS64R2 instruction set with many extensions, 1459caed1d1bSHuacai Chen including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, 1460caed1d1bSHuacai Chen 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old 1461caed1d1bSHuacai Chen Loongson-2E/2F is not covered here and will be removed in future. 14620e476d91SHuacai Chen 1463caed1d1bSHuacai Chenconfig LOONGSON3_ENHANCEMENT 1464caed1d1bSHuacai Chen bool "New Loongson-3 CPU Enhancements" 14651e820da3SHuacai Chen default n 1466268a2d60SJiaxun Yang depends on CPU_LOONGSON64 14671e820da3SHuacai Chen help 1468caed1d1bSHuacai Chen New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A 14691e820da3SHuacai Chen R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 1470268a2d60SJiaxun Yang FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User 14711e820da3SHuacai Chen Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 14721e820da3SHuacai Chen Fast TLB refill support, etc. 14731e820da3SHuacai Chen 14741e820da3SHuacai Chen This option enable those enhancements which are not probed at run 14751e820da3SHuacai Chen time. If you want a generic kernel to run on all Loongson 3 machines, 14761e820da3SHuacai Chen please say 'N' here. If you want a high-performance kernel to run on 1477caed1d1bSHuacai Chen new Loongson-3 machines only, please say 'Y' here. 14781e820da3SHuacai Chen 1479e02e07e3SHuacai Chenconfig CPU_LOONGSON3_WORKAROUNDS 1480caed1d1bSHuacai Chen bool "Old Loongson-3 LLSC Workarounds" 1481e02e07e3SHuacai Chen default y if SMP 1482268a2d60SJiaxun Yang depends on CPU_LOONGSON64 1483e02e07e3SHuacai Chen help 1484caed1d1bSHuacai Chen Loongson-3 processors have the llsc issues which require workarounds. 1485e02e07e3SHuacai Chen Without workarounds the system may hang unexpectedly. 1486e02e07e3SHuacai Chen 1487caed1d1bSHuacai Chen Newer Loongson-3 will fix these issues and no workarounds are needed. 1488e02e07e3SHuacai Chen The workarounds have no significant side effect on them but may 1489e02e07e3SHuacai Chen decrease the performance of the system so this option should be 1490e02e07e3SHuacai Chen disabled unless the kernel is intended to be run on old systems. 1491e02e07e3SHuacai Chen 1492e02e07e3SHuacai Chen If unsure, please say Y. 1493e02e07e3SHuacai Chen 14943702bba5SWu Zhangjinconfig CPU_LOONGSON2E 14953702bba5SWu Zhangjin bool "Loongson 2E" 14963702bba5SWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2E 1497268a2d60SJiaxun Yang select CPU_LOONGSON2EF 14982a21c730SFuxin Zhang help 14992a21c730SFuxin Zhang The Loongson 2E processor implements the MIPS III instruction set 15002a21c730SFuxin Zhang with many extensions. 15012a21c730SFuxin Zhang 150225985edcSLucas De Marchi It has an internal FPGA northbridge, which is compatible to 15036f7a251aSWu Zhangjin bonito64. 15046f7a251aSWu Zhangjin 15056f7a251aSWu Zhangjinconfig CPU_LOONGSON2F 15066f7a251aSWu Zhangjin bool "Loongson 2F" 15076f7a251aSWu Zhangjin depends on SYS_HAS_CPU_LOONGSON2F 1508268a2d60SJiaxun Yang select CPU_LOONGSON2EF 1509d30a2b47SLinus Walleij select GPIOLIB 15106f7a251aSWu Zhangjin help 15116f7a251aSWu Zhangjin The Loongson 2F processor implements the MIPS III instruction set 15126f7a251aSWu Zhangjin with many extensions. 15136f7a251aSWu Zhangjin 15146f7a251aSWu Zhangjin Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 15156f7a251aSWu Zhangjin have a similar programming interface with FPGA northbridge used in 15166f7a251aSWu Zhangjin Loongson2E. 15176f7a251aSWu Zhangjin 1518ca585cf9SKelvin Cheungconfig CPU_LOONGSON1B 1519ca585cf9SKelvin Cheung bool "Loongson 1B" 1520ca585cf9SKelvin Cheung depends on SYS_HAS_CPU_LOONGSON1B 1521b2afb64cSHuacai Chen select CPU_LOONGSON32 15229ec88b60SKelvin Cheung select LEDS_GPIO_REGISTER 1523ca585cf9SKelvin Cheung help 1524ca585cf9SKelvin Cheung The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1525968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1526968dc5a0S谢致邦 (XIE Zhibang) instruction set. 1527ca585cf9SKelvin Cheung 152812e3280bSYang Lingconfig CPU_LOONGSON1C 152912e3280bSYang Ling bool "Loongson 1C" 153012e3280bSYang Ling depends on SYS_HAS_CPU_LOONGSON1C 1531b2afb64cSHuacai Chen select CPU_LOONGSON32 153212e3280bSYang Ling select LEDS_GPIO_REGISTER 153312e3280bSYang Ling help 153412e3280bSYang Ling The Loongson 1C is a 32-bit SoC, which implements the MIPS32 1535968dc5a0S谢致邦 (XIE Zhibang) Release 1 instruction set and part of the MIPS32 Release 2 1536968dc5a0S谢致邦 (XIE Zhibang) instruction set. 153712e3280bSYang Ling 15386e760c8dSRalf Baechleconfig CPU_MIPS32_R1 15396e760c8dSRalf Baechle bool "MIPS32 Release 1" 15407cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R1 15416e760c8dSRalf Baechle select CPU_HAS_PREFETCH 1542797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1543ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15446e760c8dSRalf Baechle help 15455e83d430SRalf Baechle Choose this option to build a kernel for release 1 or later of the 15461e5f1caaSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 15471e5f1caaSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 15481e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 15491e5f1caaSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 15501e5f1caaSRalf Baechle Release 2 of the MIPS32 architecture is available since several 15511e5f1caaSRalf Baechle years so chances are you even have a MIPS32 Release 2 processor 15521e5f1caaSRalf Baechle in which case you should choose CPU_MIPS32_R2 instead for better 15531e5f1caaSRalf Baechle performance. 15541e5f1caaSRalf Baechle 15551e5f1caaSRalf Baechleconfig CPU_MIPS32_R2 15561e5f1caaSRalf Baechle bool "MIPS32 Release 2" 15577cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS32_R2 15581e5f1caaSRalf Baechle select CPU_HAS_PREFETCH 1559797798c1SRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 1560ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1561a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 15622235a54dSSanjay Lal select HAVE_KVM 15631e5f1caaSRalf Baechle help 15645e83d430SRalf Baechle Choose this option to build a kernel for release 2 or later of the 15656e760c8dSRalf Baechle MIPS32 architecture. Most modern embedded systems with a 32-bit 15666e760c8dSRalf Baechle MIPS processor are based on a MIPS32 processor. If you know the 15676e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15686e760c8dSRalf Baechle otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 15691da177e4SLinus Torvalds 15707fd08ca5SLeonid Yegoshinconfig CPU_MIPS32_R6 1571674d10e2SMarkos Chandras bool "MIPS32 Release 6" 15727fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R6 15737fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 157418d84e2eSAlexander Lobakin select CPU_NO_LOAD_STORE_LR 15757fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 15767fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 15777fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 15787fd08ca5SLeonid Yegoshin select HAVE_KVM 15797fd08ca5SLeonid Yegoshin select MIPS_O32_FP64_SUPPORT 15807fd08ca5SLeonid Yegoshin help 15817fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 15827fd08ca5SLeonid Yegoshin MIPS32 architecture. New MIPS processors, starting with the Warrior 15837fd08ca5SLeonid Yegoshin family, are based on a MIPS32r6 processor. If you own an older 15847fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 15857fd08ca5SLeonid Yegoshin 15866e760c8dSRalf Baechleconfig CPU_MIPS64_R1 15876e760c8dSRalf Baechle bool "MIPS64 Release 1" 15887cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R1 1589797798c1SRalf Baechle select CPU_HAS_PREFETCH 1590ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1591ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1592ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 15939cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 15946e760c8dSRalf Baechle help 15956e760c8dSRalf Baechle Choose this option to build a kernel for release 1 or later of the 15966e760c8dSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 15976e760c8dSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 15986e760c8dSRalf Baechle specific type of processor in your system, choose those that one 15996e760c8dSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 16001e5f1caaSRalf Baechle Release 2 of the MIPS64 architecture is available since several 16011e5f1caaSRalf Baechle years so chances are you even have a MIPS64 Release 2 processor 16021e5f1caaSRalf Baechle in which case you should choose CPU_MIPS64_R2 instead for better 16031e5f1caaSRalf Baechle performance. 16041e5f1caaSRalf Baechle 16051e5f1caaSRalf Baechleconfig CPU_MIPS64_R2 16061e5f1caaSRalf Baechle bool "MIPS64 Release 2" 16077cf8053bSRalf Baechle depends on SYS_HAS_CPU_MIPS64_R2 1608797798c1SRalf Baechle select CPU_HAS_PREFETCH 16091e5f1caaSRalf Baechle select CPU_SUPPORTS_32BIT_KERNEL 16101e5f1caaSRalf Baechle select CPU_SUPPORTS_64BIT_KERNEL 1611ec28f306SRalf Baechle select CPU_SUPPORTS_HIGHMEM 16129cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1613a5e9a69eSPaul Burton select CPU_SUPPORTS_MSA 161440a2df49SJames Hogan select HAVE_KVM 16151e5f1caaSRalf Baechle help 16161e5f1caaSRalf Baechle Choose this option to build a kernel for release 2 or later of the 16171e5f1caaSRalf Baechle MIPS64 architecture. Many modern embedded systems with a 64-bit 16181e5f1caaSRalf Baechle MIPS processor are based on a MIPS64 processor. If you know the 16191e5f1caaSRalf Baechle specific type of processor in your system, choose those that one 16201e5f1caaSRalf Baechle otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 16211da177e4SLinus Torvalds 16227fd08ca5SLeonid Yegoshinconfig CPU_MIPS64_R6 1623674d10e2SMarkos Chandras bool "MIPS64 Release 6" 16247fd08ca5SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS64_R6 16257fd08ca5SLeonid Yegoshin select CPU_HAS_PREFETCH 162618d84e2eSAlexander Lobakin select CPU_NO_LOAD_STORE_LR 16277fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_32BIT_KERNEL 16287fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_64BIT_KERNEL 16297fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_HIGHMEM 1630afd375dcSPaul Burton select CPU_SUPPORTS_HUGEPAGES 16317fd08ca5SLeonid Yegoshin select CPU_SUPPORTS_MSA 16322e6c7747SJames Hogan select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 163340a2df49SJames Hogan select HAVE_KVM 16347fd08ca5SLeonid Yegoshin help 16357fd08ca5SLeonid Yegoshin Choose this option to build a kernel for release 6 or later of the 16367fd08ca5SLeonid Yegoshin MIPS64 architecture. New MIPS processors, starting with the Warrior 16377fd08ca5SLeonid Yegoshin family, are based on a MIPS64r6 processor. If you own an older 16387fd08ca5SLeonid Yegoshin processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 16397fd08ca5SLeonid Yegoshin 16401da177e4SLinus Torvaldsconfig CPU_R3000 16411da177e4SLinus Torvalds bool "R3000" 16427cf8053bSRalf Baechle depends on SYS_HAS_CPU_R3000 1643f7062ddbSRalf Baechle select CPU_HAS_WB 164454746829SPaul Burton select CPU_R3K_TLB 1645ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1646797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 16471da177e4SLinus Torvalds help 16481da177e4SLinus Torvalds Please make sure to pick the right CPU type. Linux/MIPS is not 16491da177e4SLinus Torvalds designed to be generic, i.e. Kernels compiled for R3000 CPUs will 16501da177e4SLinus Torvalds *not* work on R4000 machines and vice versa. However, since most 16511da177e4SLinus Torvalds of the supported machines have an R4000 (or similar) CPU, R4x00 16521da177e4SLinus Torvalds might be a safe bet. If the resulting kernel does not work, 16531da177e4SLinus Torvalds try to recompile with R3000. 16541da177e4SLinus Torvalds 16551da177e4SLinus Torvaldsconfig CPU_TX39XX 16561da177e4SLinus Torvalds bool "R39XX" 16577cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX39XX 1658ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 165954746829SPaul Burton select CPU_R3K_TLB 16601da177e4SLinus Torvalds 16611da177e4SLinus Torvaldsconfig CPU_VR41XX 16621da177e4SLinus Torvalds bool "R41xx" 16637cf8053bSRalf Baechle depends on SYS_HAS_CPU_VR41XX 1664ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1665ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 16661da177e4SLinus Torvalds help 16675e83d430SRalf Baechle The options selects support for the NEC VR4100 series of processors. 16681da177e4SLinus Torvalds Only choose this option if you have one of these processors as a 16691da177e4SLinus Torvalds kernel built with this option will not run on any other type of 16701da177e4SLinus Torvalds processor or vice versa. 16711da177e4SLinus Torvalds 16721da177e4SLinus Torvaldsconfig CPU_R4X00 16731da177e4SLinus Torvalds bool "R4x00" 16747cf8053bSRalf Baechle depends on SYS_HAS_CPU_R4X00 1675ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1676ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1677970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16781da177e4SLinus Torvalds help 16791da177e4SLinus Torvalds MIPS Technologies R4000-series processors other than 4300, including 16801da177e4SLinus Torvalds the R4000, R4400, R4600, and 4700. 16811da177e4SLinus Torvalds 16821da177e4SLinus Torvaldsconfig CPU_TX49XX 16831da177e4SLinus Torvalds bool "R49XX" 16847cf8053bSRalf Baechle depends on SYS_HAS_CPU_TX49XX 1685de862b48SAtsushi Nemoto select CPU_HAS_PREFETCH 1686ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1687ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1688970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16891da177e4SLinus Torvalds 16901da177e4SLinus Torvaldsconfig CPU_R5000 16911da177e4SLinus Torvalds bool "R5000" 16927cf8053bSRalf Baechle depends on SYS_HAS_CPU_R5000 1693ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1694ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1695970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 16961da177e4SLinus Torvalds help 16971da177e4SLinus Torvalds MIPS Technologies R5000-series processors other than the Nevada. 16981da177e4SLinus Torvalds 1699542c1020SShinya Kuribayashiconfig CPU_R5500 1700542c1020SShinya Kuribayashi bool "R5500" 1701542c1020SShinya Kuribayashi depends on SYS_HAS_CPU_R5500 1702542c1020SShinya Kuribayashi select CPU_SUPPORTS_32BIT_KERNEL 1703542c1020SShinya Kuribayashi select CPU_SUPPORTS_64BIT_KERNEL 17049cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1705542c1020SShinya Kuribayashi help 1706542c1020SShinya Kuribayashi NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1707542c1020SShinya Kuribayashi instruction set. 1708542c1020SShinya Kuribayashi 17091da177e4SLinus Torvaldsconfig CPU_NEVADA 17101da177e4SLinus Torvalds bool "RM52xx" 17117cf8053bSRalf Baechle depends on SYS_HAS_CPU_NEVADA 1712ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1713ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1714970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17151da177e4SLinus Torvalds help 17161da177e4SLinus Torvalds QED / PMC-Sierra RM52xx-series ("Nevada") processors. 17171da177e4SLinus Torvalds 17181da177e4SLinus Torvaldsconfig CPU_R10000 17191da177e4SLinus Torvalds bool "R10000" 17207cf8053bSRalf Baechle depends on SYS_HAS_CPU_R10000 17215e83d430SRalf Baechle select CPU_HAS_PREFETCH 1722ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1723ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1724797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1725970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17261da177e4SLinus Torvalds help 17271da177e4SLinus Torvalds MIPS Technologies R10000-series processors. 17281da177e4SLinus Torvalds 17291da177e4SLinus Torvaldsconfig CPU_RM7000 17301da177e4SLinus Torvalds bool "RM7000" 17317cf8053bSRalf Baechle depends on SYS_HAS_CPU_RM7000 17325e83d430SRalf Baechle select CPU_HAS_PREFETCH 1733ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1734ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1735797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1736970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17371da177e4SLinus Torvalds 17381da177e4SLinus Torvaldsconfig CPU_SB1 17391da177e4SLinus Torvalds bool "SB1" 17407cf8053bSRalf Baechle depends on SYS_HAS_CPU_SB1 1741ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_32BIT_KERNEL 1742ed5ba2fbSYoichi Yuasa select CPU_SUPPORTS_64BIT_KERNEL 1743797798c1SRalf Baechle select CPU_SUPPORTS_HIGHMEM 1744970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17450004a9dfSRalf Baechle select WEAK_ORDERING 17461da177e4SLinus Torvalds 1747a86c7f72SDavid Daneyconfig CPU_CAVIUM_OCTEON 1748a86c7f72SDavid Daney bool "Cavium Octeon processor" 17495e683389SDavid Daney depends on SYS_HAS_CPU_CAVIUM_OCTEON 1750a86c7f72SDavid Daney select CPU_HAS_PREFETCH 1751a86c7f72SDavid Daney select CPU_SUPPORTS_64BIT_KERNEL 1752a86c7f72SDavid Daney select WEAK_ORDERING 1753a86c7f72SDavid Daney select CPU_SUPPORTS_HIGHMEM 17549cffd154SDavid Daney select CPU_SUPPORTS_HUGEPAGES 1755df115f3eSBen Hutchings select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1756df115f3eSBen Hutchings select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1757930beb5aSFlorian Fainelli select MIPS_L1_CACHE_SHIFT_7 17580ae3abcdSJames Hogan select HAVE_KVM 1759a86c7f72SDavid Daney help 1760a86c7f72SDavid Daney The Cavium Octeon processor is a highly integrated chip containing 1761a86c7f72SDavid Daney many ethernet hardware widgets for networking tasks. The processor 1762a86c7f72SDavid Daney can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1763a86c7f72SDavid Daney Full details can be found at http://www.caviumnetworks.com. 1764a86c7f72SDavid Daney 1765cd746249SJonas Gorskiconfig CPU_BMIPS 1766cd746249SJonas Gorski bool "Broadcom BMIPS" 1767cd746249SJonas Gorski depends on SYS_HAS_CPU_BMIPS 1768cd746249SJonas Gorski select CPU_MIPS32 1769fe7f62c0SJonas Gorski select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1770cd746249SJonas Gorski select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1771cd746249SJonas Gorski select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1772cd746249SJonas Gorski select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1773cd746249SJonas Gorski select CPU_SUPPORTS_32BIT_KERNEL 1774cd746249SJonas Gorski select DMA_NONCOHERENT 177567e38cf2SRalf Baechle select IRQ_MIPS_CPU 1776cd746249SJonas Gorski select SWAP_IO_SPACE 1777cd746249SJonas Gorski select WEAK_ORDERING 1778c1c0c461SKevin Cernekee select CPU_SUPPORTS_HIGHMEM 177969aaf9c8SJonas Gorski select CPU_HAS_PREFETCH 1780a8d709b0SMarkus Mayer select CPU_SUPPORTS_CPUFREQ 1781a8d709b0SMarkus Mayer select MIPS_EXTERNAL_TIMER 1782c1c0c461SKevin Cernekee help 1783fe7f62c0SJonas Gorski Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1784c1c0c461SKevin Cernekee 17857f058e85SJayachandran Cconfig CPU_XLR 17867f058e85SJayachandran C bool "Netlogic XLR SoC" 17877f058e85SJayachandran C depends on SYS_HAS_CPU_XLR 17887f058e85SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 17897f058e85SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 17907f058e85SJayachandran C select CPU_SUPPORTS_HIGHMEM 1791970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 17927f058e85SJayachandran C select WEAK_ORDERING 17937f058e85SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 17947f058e85SJayachandran C help 17957f058e85SJayachandran C Netlogic Microsystems XLR/XLS processors. 17961c773ea4SJayachandran C 17971c773ea4SJayachandran Cconfig CPU_XLP 17981c773ea4SJayachandran C bool "Netlogic XLP SoC" 17991c773ea4SJayachandran C depends on SYS_HAS_CPU_XLP 18001c773ea4SJayachandran C select CPU_SUPPORTS_32BIT_KERNEL 18011c773ea4SJayachandran C select CPU_SUPPORTS_64BIT_KERNEL 18021c773ea4SJayachandran C select CPU_SUPPORTS_HIGHMEM 18031c773ea4SJayachandran C select WEAK_ORDERING 18041c773ea4SJayachandran C select WEAK_REORDERING_BEYOND_LLSC 18051c773ea4SJayachandran C select CPU_HAS_PREFETCH 1806d6504846SJayachandran C select CPU_MIPSR2 1807ddba6833SPrem Mallappa select CPU_SUPPORTS_HUGEPAGES 18082db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 18091c773ea4SJayachandran C help 18101c773ea4SJayachandran C Netlogic Microsystems XLP processors. 18111da177e4SLinus Torvaldsendchoice 18121da177e4SLinus Torvalds 1813a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_FEATURES 1814a6e18781SLeonid Yegoshin bool "MIPS32 Release 3.5 Features" 1815a6e18781SLeonid Yegoshin depends on SYS_HAS_CPU_MIPS32_R3_5 18167fd08ca5SLeonid Yegoshin depends on CPU_MIPS32_R2 || CPU_MIPS32_R6 1817a6e18781SLeonid Yegoshin help 1818a6e18781SLeonid Yegoshin Choose this option to build a kernel for release 2 or later of the 1819a6e18781SLeonid Yegoshin MIPS32 architecture including features from the 3.5 release such as 1820a6e18781SLeonid Yegoshin support for Enhanced Virtual Addressing (EVA). 1821a6e18781SLeonid Yegoshin 1822a6e18781SLeonid Yegoshinconfig CPU_MIPS32_3_5_EVA 1823a6e18781SLeonid Yegoshin bool "Enhanced Virtual Addressing (EVA)" 1824a6e18781SLeonid Yegoshin depends on CPU_MIPS32_3_5_FEATURES 1825a6e18781SLeonid Yegoshin select EVA 1826a6e18781SLeonid Yegoshin default y 1827a6e18781SLeonid Yegoshin help 1828a6e18781SLeonid Yegoshin Choose this option if you want to enable the Enhanced Virtual 1829a6e18781SLeonid Yegoshin Addressing (EVA) on your MIPS32 core (such as proAptiv). 1830a6e18781SLeonid Yegoshin One of its primary benefits is an increase in the maximum size 1831a6e18781SLeonid Yegoshin of lowmem (up to 3GB). If unsure, say 'N' here. 1832a6e18781SLeonid Yegoshin 1833c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_FEATURES 1834c5b36783SSteven J. Hill bool "MIPS32 Release 5 Features" 1835c5b36783SSteven J. Hill depends on SYS_HAS_CPU_MIPS32_R5 1836c5b36783SSteven J. Hill depends on CPU_MIPS32_R2 1837c5b36783SSteven J. Hill help 1838c5b36783SSteven J. Hill Choose this option to build a kernel for release 2 or later of the 1839c5b36783SSteven J. Hill MIPS32 architecture including features from release 5 such as 1840c5b36783SSteven J. Hill support for Extended Physical Addressing (XPA). 1841c5b36783SSteven J. Hill 1842c5b36783SSteven J. Hillconfig CPU_MIPS32_R5_XPA 1843c5b36783SSteven J. Hill bool "Extended Physical Addressing (XPA)" 1844c5b36783SSteven J. Hill depends on CPU_MIPS32_R5_FEATURES 1845c5b36783SSteven J. Hill depends on !EVA 1846c5b36783SSteven J. Hill depends on !PAGE_SIZE_4KB 1847c5b36783SSteven J. Hill depends on SYS_SUPPORTS_HIGHMEM 1848c5b36783SSteven J. Hill select XPA 1849c5b36783SSteven J. Hill select HIGHMEM 1850d4a451d5SChristoph Hellwig select PHYS_ADDR_T_64BIT 1851c5b36783SSteven J. Hill default n 1852c5b36783SSteven J. Hill help 1853c5b36783SSteven J. Hill Choose this option if you want to enable the Extended Physical 1854c5b36783SSteven J. Hill Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1855c5b36783SSteven J. Hill benefit is to increase physical addressing equal to or greater 1856c5b36783SSteven J. Hill than 40 bits. Note that this has the side effect of turning on 1857c5b36783SSteven J. Hill 64-bit addressing which in turn makes the PTEs 64-bit in size. 1858c5b36783SSteven J. Hill If unsure, say 'N' here. 1859c5b36783SSteven J. Hill 1860622844bfSWu Zhangjinif CPU_LOONGSON2F 1861622844bfSWu Zhangjinconfig CPU_NOP_WORKAROUNDS 1862622844bfSWu Zhangjin bool 1863622844bfSWu Zhangjin 1864622844bfSWu Zhangjinconfig CPU_JUMP_WORKAROUNDS 1865622844bfSWu Zhangjin bool 1866622844bfSWu Zhangjin 1867622844bfSWu Zhangjinconfig CPU_LOONGSON2F_WORKAROUNDS 1868622844bfSWu Zhangjin bool "Loongson 2F Workarounds" 1869622844bfSWu Zhangjin default y 1870622844bfSWu Zhangjin select CPU_NOP_WORKAROUNDS 1871622844bfSWu Zhangjin select CPU_JUMP_WORKAROUNDS 1872622844bfSWu Zhangjin help 1873622844bfSWu Zhangjin Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1874622844bfSWu Zhangjin require workarounds. Without workarounds the system may hang 1875622844bfSWu Zhangjin unexpectedly. For more information please refer to the gas 1876622844bfSWu Zhangjin -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1877622844bfSWu Zhangjin 1878622844bfSWu Zhangjin Loongson 2F03 and later have fixed these issues and no workarounds 1879622844bfSWu Zhangjin are needed. The workarounds have no significant side effect on them 1880622844bfSWu Zhangjin but may decrease the performance of the system so this option should 1881622844bfSWu Zhangjin be disabled unless the kernel is intended to be run on 2F01 or 2F02 1882622844bfSWu Zhangjin systems. 1883622844bfSWu Zhangjin 1884622844bfSWu Zhangjin If unsure, please say Y. 1885622844bfSWu Zhangjinendif # CPU_LOONGSON2F 1886622844bfSWu Zhangjin 18871b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT 18881b93b3c3SWu Zhangjin bool 18891b93b3c3SWu Zhangjin select HAVE_KERNEL_GZIP 18901b93b3c3SWu Zhangjin select HAVE_KERNEL_BZIP2 189131c4867dSFlorian Fainelli select HAVE_KERNEL_LZ4 18921b93b3c3SWu Zhangjin select HAVE_KERNEL_LZMA 1893fe1d45e0SWu Zhangjin select HAVE_KERNEL_LZO 18944e23eb63SFlorian Fainelli select HAVE_KERNEL_XZ 18951b93b3c3SWu Zhangjin 18961b93b3c3SWu Zhangjinconfig SYS_SUPPORTS_ZBOOT_UART16550 18971b93b3c3SWu Zhangjin bool 18981b93b3c3SWu Zhangjin select SYS_SUPPORTS_ZBOOT 18991b93b3c3SWu Zhangjin 1900dbb98314SAlban Bedelconfig SYS_SUPPORTS_ZBOOT_UART_PROM 1901dbb98314SAlban Bedel bool 1902dbb98314SAlban Bedel select SYS_SUPPORTS_ZBOOT 1903dbb98314SAlban Bedel 1904268a2d60SJiaxun Yangconfig CPU_LOONGSON2EF 19053702bba5SWu Zhangjin bool 19063702bba5SWu Zhangjin select CPU_SUPPORTS_32BIT_KERNEL 19073702bba5SWu Zhangjin select CPU_SUPPORTS_64BIT_KERNEL 19083702bba5SWu Zhangjin select CPU_SUPPORTS_HIGHMEM 1909970d032fSRalf Baechle select CPU_SUPPORTS_HUGEPAGES 1910e905086eSChristoph Hellwig select ARCH_HAS_PHYS_TO_DMA 19113702bba5SWu Zhangjin 1912b2afb64cSHuacai Chenconfig CPU_LOONGSON32 1913ca585cf9SKelvin Cheung bool 1914ca585cf9SKelvin Cheung select CPU_MIPS32 19157e280f6bSJiaxun Yang select CPU_MIPSR2 1916ca585cf9SKelvin Cheung select CPU_HAS_PREFETCH 1917ca585cf9SKelvin Cheung select CPU_SUPPORTS_32BIT_KERNEL 1918ca585cf9SKelvin Cheung select CPU_SUPPORTS_HIGHMEM 1919f29ad10dSKelvin Cheung select CPU_SUPPORTS_CPUFREQ 1920ca585cf9SKelvin Cheung 1921fe7f62c0SJonas Gorskiconfig CPU_BMIPS32_3300 192204fa8bf7SJonas Gorski select SMP_UP if SMP 19231bbb6c1bSKevin Cernekee bool 1924cd746249SJonas Gorski 1925cd746249SJonas Gorskiconfig CPU_BMIPS4350 1926cd746249SJonas Gorski bool 1927cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1928cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1929cd746249SJonas Gorski 1930cd746249SJonas Gorskiconfig CPU_BMIPS4380 1931cd746249SJonas Gorski bool 1932bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_6 1933cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1934cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1935b4720809SFlorian Fainelli select CPU_HAS_RIXI 1936cd746249SJonas Gorski 1937cd746249SJonas Gorskiconfig CPU_BMIPS5000 1938cd746249SJonas Gorski bool 1939cd746249SJonas Gorski select MIPS_CPU_SCACHE 1940bbf2ba67SKevin Cernekee select MIPS_L1_CACHE_SHIFT_7 1941cd746249SJonas Gorski select SYS_SUPPORTS_SMP 1942cd746249SJonas Gorski select SYS_SUPPORTS_HOTPLUG_CPU 1943b4720809SFlorian Fainelli select CPU_HAS_RIXI 19441bbb6c1bSKevin Cernekee 1945268a2d60SJiaxun Yangconfig SYS_HAS_CPU_LOONGSON64 19460e476d91SHuacai Chen bool 19470e476d91SHuacai Chen select CPU_SUPPORTS_CPUFREQ 1948b2edcfc8SHuacai Chen select CPU_HAS_RIXI 19490e476d91SHuacai Chen 19503702bba5SWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2E 19512a21c730SFuxin Zhang bool 19522a21c730SFuxin Zhang 19536f7a251aSWu Zhangjinconfig SYS_HAS_CPU_LOONGSON2F 19546f7a251aSWu Zhangjin bool 195555045ff5SWu Zhangjin select CPU_SUPPORTS_CPUFREQ 195655045ff5SWu Zhangjin select CPU_SUPPORTS_ADDRWINCFG if 64BIT 19576f7a251aSWu Zhangjin 1958ca585cf9SKelvin Cheungconfig SYS_HAS_CPU_LOONGSON1B 1959ca585cf9SKelvin Cheung bool 1960ca585cf9SKelvin Cheung 196112e3280bSYang Lingconfig SYS_HAS_CPU_LOONGSON1C 196212e3280bSYang Ling bool 196312e3280bSYang Ling 19647cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R1 19657cf8053bSRalf Baechle bool 19667cf8053bSRalf Baechle 19677cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS32_R2 19687cf8053bSRalf Baechle bool 19697cf8053bSRalf Baechle 1970a6e18781SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R3_5 1971a6e18781SLeonid Yegoshin bool 1972a6e18781SLeonid Yegoshin 1973c5b36783SSteven J. Hillconfig SYS_HAS_CPU_MIPS32_R5 1974c5b36783SSteven J. Hill bool 19759ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1976c5b36783SSteven J. Hill 19777fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS32_R6 19787fd08ca5SLeonid Yegoshin bool 19799ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 19807fd08ca5SLeonid Yegoshin 19817cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R1 19827cf8053bSRalf Baechle bool 19837cf8053bSRalf Baechle 19847cf8053bSRalf Baechleconfig SYS_HAS_CPU_MIPS64_R2 19857cf8053bSRalf Baechle bool 19867cf8053bSRalf Baechle 19877fd08ca5SLeonid Yegoshinconfig SYS_HAS_CPU_MIPS64_R6 19887fd08ca5SLeonid Yegoshin bool 19899ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 19907fd08ca5SLeonid Yegoshin 19917cf8053bSRalf Baechleconfig SYS_HAS_CPU_R3000 19927cf8053bSRalf Baechle bool 19937cf8053bSRalf Baechle 19947cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX39XX 19957cf8053bSRalf Baechle bool 19967cf8053bSRalf Baechle 19977cf8053bSRalf Baechleconfig SYS_HAS_CPU_VR41XX 19987cf8053bSRalf Baechle bool 19997cf8053bSRalf Baechle 20007cf8053bSRalf Baechleconfig SYS_HAS_CPU_R4X00 20017cf8053bSRalf Baechle bool 20027cf8053bSRalf Baechle 20037cf8053bSRalf Baechleconfig SYS_HAS_CPU_TX49XX 20047cf8053bSRalf Baechle bool 20057cf8053bSRalf Baechle 20067cf8053bSRalf Baechleconfig SYS_HAS_CPU_R5000 20077cf8053bSRalf Baechle bool 20087cf8053bSRalf Baechle 2009542c1020SShinya Kuribayashiconfig SYS_HAS_CPU_R5500 2010542c1020SShinya Kuribayashi bool 2011542c1020SShinya Kuribayashi 20127cf8053bSRalf Baechleconfig SYS_HAS_CPU_NEVADA 20137cf8053bSRalf Baechle bool 20147cf8053bSRalf Baechle 20157cf8053bSRalf Baechleconfig SYS_HAS_CPU_R10000 20167cf8053bSRalf Baechle bool 20179ae1f262SPaul Burton select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 20187cf8053bSRalf Baechle 20197cf8053bSRalf Baechleconfig SYS_HAS_CPU_RM7000 20207cf8053bSRalf Baechle bool 20217cf8053bSRalf Baechle 20227cf8053bSRalf Baechleconfig SYS_HAS_CPU_SB1 20237cf8053bSRalf Baechle bool 20247cf8053bSRalf Baechle 20255e683389SDavid Daneyconfig SYS_HAS_CPU_CAVIUM_OCTEON 20265e683389SDavid Daney bool 20275e683389SDavid Daney 2028cd746249SJonas Gorskiconfig SYS_HAS_CPU_BMIPS 2029c1c0c461SKevin Cernekee bool 2030c1c0c461SKevin Cernekee 2031fe7f62c0SJonas Gorskiconfig SYS_HAS_CPU_BMIPS32_3300 2032c1c0c461SKevin Cernekee bool 2033cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2034c1c0c461SKevin Cernekee 2035c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4350 2036c1c0c461SKevin Cernekee bool 2037cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2038c1c0c461SKevin Cernekee 2039c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS4380 2040c1c0c461SKevin Cernekee bool 2041cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2042c1c0c461SKevin Cernekee 2043c1c0c461SKevin Cernekeeconfig SYS_HAS_CPU_BMIPS5000 2044c1c0c461SKevin Cernekee bool 2045cd746249SJonas Gorski select SYS_HAS_CPU_BMIPS 2046f263f2a2SHauke Mehrtens select ARCH_HAS_SYNC_DMA_FOR_CPU 2047c1c0c461SKevin Cernekee 20487f058e85SJayachandran Cconfig SYS_HAS_CPU_XLR 20497f058e85SJayachandran C bool 20507f058e85SJayachandran C 20511c773ea4SJayachandran Cconfig SYS_HAS_CPU_XLP 20521c773ea4SJayachandran C bool 20531c773ea4SJayachandran C 205417099b11SRalf Baechle# 205517099b11SRalf Baechle# CPU may reorder R->R, R->W, W->R, W->W 205617099b11SRalf Baechle# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 205717099b11SRalf Baechle# 20580004a9dfSRalf Baechleconfig WEAK_ORDERING 20590004a9dfSRalf Baechle bool 206017099b11SRalf Baechle 206117099b11SRalf Baechle# 206217099b11SRalf Baechle# CPU may reorder reads and writes beyond LL/SC 206317099b11SRalf Baechle# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 206417099b11SRalf Baechle# 206517099b11SRalf Baechleconfig WEAK_REORDERING_BEYOND_LLSC 206617099b11SRalf Baechle bool 20675e83d430SRalf Baechleendmenu 20685e83d430SRalf Baechle 20695e83d430SRalf Baechle# 20705e83d430SRalf Baechle# These two indicate any level of the MIPS32 and MIPS64 architecture 20715e83d430SRalf Baechle# 20725e83d430SRalf Baechleconfig CPU_MIPS32 20735e83d430SRalf Baechle bool 20747fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6 20755e83d430SRalf Baechle 20765e83d430SRalf Baechleconfig CPU_MIPS64 20775e83d430SRalf Baechle bool 20787fd08ca5SLeonid Yegoshin default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 20795e83d430SRalf Baechle 20805e83d430SRalf Baechle# 208157eeacedSPaul Burton# These indicate the revision of the architecture 20825e83d430SRalf Baechle# 20835e83d430SRalf Baechleconfig CPU_MIPSR1 20845e83d430SRalf Baechle bool 20855e83d430SRalf Baechle default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 20865e83d430SRalf Baechle 20875e83d430SRalf Baechleconfig CPU_MIPSR2 20885e83d430SRalf Baechle bool 2089a86c7f72SDavid Daney default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 20908256b17eSFlorian Fainelli select CPU_HAS_RIXI 2091ba9196d2SJiaxun Yang select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 2092a7e07b1aSMarkos Chandras select MIPS_SPRAM 20935e83d430SRalf Baechle 20947fd08ca5SLeonid Yegoshinconfig CPU_MIPSR6 20957fd08ca5SLeonid Yegoshin bool 20967fd08ca5SLeonid Yegoshin default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 20978256b17eSFlorian Fainelli select CPU_HAS_RIXI 2098ba9196d2SJiaxun Yang select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 209987321fddSPaul Burton select HAVE_ARCH_BITREVERSE 21002db003a5SPaul Burton select MIPS_ASID_BITS_VARIABLE 21014a5dc51eSMarcin Nowakowski select MIPS_CRC_SUPPORT 2102a7e07b1aSMarkos Chandras select MIPS_SPRAM 21035e83d430SRalf Baechle 210457eeacedSPaul Burtonconfig TARGET_ISA_REV 210557eeacedSPaul Burton int 210657eeacedSPaul Burton default 1 if CPU_MIPSR1 210757eeacedSPaul Burton default 2 if CPU_MIPSR2 210857eeacedSPaul Burton default 6 if CPU_MIPSR6 210957eeacedSPaul Burton default 0 211057eeacedSPaul Burton help 211157eeacedSPaul Burton Reflects the ISA revision being targeted by the kernel build. This 211257eeacedSPaul Burton is effectively the Kconfig equivalent of MIPS_ISA_REV. 211357eeacedSPaul Burton 2114a6e18781SLeonid Yegoshinconfig EVA 2115a6e18781SLeonid Yegoshin bool 2116a6e18781SLeonid Yegoshin 2117c5b36783SSteven J. Hillconfig XPA 2118c5b36783SSteven J. Hill bool 2119c5b36783SSteven J. Hill 21205e83d430SRalf Baechleconfig SYS_SUPPORTS_32BIT_KERNEL 21215e83d430SRalf Baechle bool 21225e83d430SRalf Baechleconfig SYS_SUPPORTS_64BIT_KERNEL 21235e83d430SRalf Baechle bool 21245e83d430SRalf Baechleconfig CPU_SUPPORTS_32BIT_KERNEL 21255e83d430SRalf Baechle bool 21265e83d430SRalf Baechleconfig CPU_SUPPORTS_64BIT_KERNEL 21275e83d430SRalf Baechle bool 212855045ff5SWu Zhangjinconfig CPU_SUPPORTS_CPUFREQ 212955045ff5SWu Zhangjin bool 213055045ff5SWu Zhangjinconfig CPU_SUPPORTS_ADDRWINCFG 213155045ff5SWu Zhangjin bool 21329cffd154SDavid Daneyconfig CPU_SUPPORTS_HUGEPAGES 21339cffd154SDavid Daney bool 2134171543e7SDaniel Silsby depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) 213582622284SDavid Daneyconfig MIPS_PGD_C0_CONTEXT 213682622284SDavid Daney bool 2137cebf8c0fSPaul Burton default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP 21385e83d430SRalf Baechle 21398192c9eaSDavid Daney# 21408192c9eaSDavid Daney# Set to y for ptrace access to watch registers. 21418192c9eaSDavid Daney# 21428192c9eaSDavid Daneyconfig HARDWARE_WATCHPOINTS 21438192c9eaSDavid Daney bool 2144679eb637SJames Hogan default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 21458192c9eaSDavid Daney 21465e83d430SRalf Baechlemenu "Kernel type" 21475e83d430SRalf Baechle 21485e83d430SRalf Baechlechoice 21495e83d430SRalf Baechle prompt "Kernel code model" 21505e83d430SRalf Baechle help 21515e83d430SRalf Baechle You should only select this option if you have a workload that 21525e83d430SRalf Baechle actually benefits from 64-bit processing or if your machine has 21535e83d430SRalf Baechle large memory. You will only be presented a single option in this 21545e83d430SRalf Baechle menu if your system does not support both 32-bit and 64-bit kernels. 21555e83d430SRalf Baechle 21565e83d430SRalf Baechleconfig 32BIT 21575e83d430SRalf Baechle bool "32-bit kernel" 21585e83d430SRalf Baechle depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 21595e83d430SRalf Baechle select TRAD_SIGNALS 21605e83d430SRalf Baechle help 21615e83d430SRalf Baechle Select this option if you want to build a 32-bit kernel. 2162f17c4ca3SRalf Baechle 21635e83d430SRalf Baechleconfig 64BIT 21645e83d430SRalf Baechle bool "64-bit kernel" 21655e83d430SRalf Baechle depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 21665e83d430SRalf Baechle help 21675e83d430SRalf Baechle Select this option if you want to build a 64-bit kernel. 21685e83d430SRalf Baechle 21695e83d430SRalf Baechleendchoice 21705e83d430SRalf Baechle 21712235a54dSSanjay Lalconfig KVM_GUEST 21722235a54dSSanjay Lal bool "KVM Guest Kernel" 2173f2a5b1d7SJames Hogan depends on BROKEN_ON_SMP 21742235a54dSSanjay Lal help 2175caa1faa7SJames Hogan Select this option if building a guest kernel for KVM (Trap & Emulate) 2176caa1faa7SJames Hogan mode. 21772235a54dSSanjay Lal 2178eda3d33cSJames Hoganconfig KVM_GUEST_TIMER_FREQ 2179eda3d33cSJames Hogan int "Count/Compare Timer Frequency (MHz)" 21802235a54dSSanjay Lal depends on KVM_GUEST 2181eda3d33cSJames Hogan default 100 21822235a54dSSanjay Lal help 2183eda3d33cSJames Hogan Set this to non-zero if building a guest kernel for KVM to skip RTC 2184eda3d33cSJames Hogan emulation when determining guest CPU Frequency. Instead, the guest's 2185eda3d33cSJames Hogan timer frequency is specified directly. 21862235a54dSSanjay Lal 21871e321fa9SLeonid Yegoshinconfig MIPS_VA_BITS_48 21881e321fa9SLeonid Yegoshin bool "48 bits virtual memory" 21891e321fa9SLeonid Yegoshin depends on 64BIT 21901e321fa9SLeonid Yegoshin help 21913377e227SAlex Belits Support a maximum at least 48 bits of application virtual 21923377e227SAlex Belits memory. Default is 40 bits or less, depending on the CPU. 21933377e227SAlex Belits For page sizes 16k and above, this option results in a small 21943377e227SAlex Belits memory overhead for page tables. For 4k page size, a fourth 21953377e227SAlex Belits level of page tables is added which imposes both a memory 21963377e227SAlex Belits overhead as well as slower TLB fault handling. 21973377e227SAlex Belits 21981e321fa9SLeonid Yegoshin If unsure, say N. 21991e321fa9SLeonid Yegoshin 22001da177e4SLinus Torvaldschoice 22011da177e4SLinus Torvalds prompt "Kernel page size" 22021da177e4SLinus Torvalds default PAGE_SIZE_4KB 22031da177e4SLinus Torvalds 22041da177e4SLinus Torvaldsconfig PAGE_SIZE_4KB 22051da177e4SLinus Torvalds bool "4kB" 2206268a2d60SJiaxun Yang depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 22071da177e4SLinus Torvalds help 22081da177e4SLinus Torvalds This option select the standard 4kB Linux page size. On some 22091da177e4SLinus Torvalds R3000-family processors this is the only available page size. Using 22101da177e4SLinus Torvalds 4kB page size will minimize memory consumption and is therefore 22111da177e4SLinus Torvalds recommended for low memory systems. 22121da177e4SLinus Torvalds 22131da177e4SLinus Torvaldsconfig PAGE_SIZE_8KB 22141da177e4SLinus Torvalds bool "8kB" 2215c2aeaaeaSPaul Burton depends on CPU_CAVIUM_OCTEON 22161e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 22171da177e4SLinus Torvalds help 22181da177e4SLinus Torvalds Using 8kB page size will result in higher performance kernel at 22191da177e4SLinus Torvalds the price of higher memory consumption. This option is available 2220c2aeaaeaSPaul Burton only on cnMIPS processors. Note that you will need a suitable Linux 2221c2aeaaeaSPaul Burton distribution to support this. 22221da177e4SLinus Torvalds 22231da177e4SLinus Torvaldsconfig PAGE_SIZE_16KB 22241da177e4SLinus Torvalds bool "16kB" 2225714bfad6SRalf Baechle depends on !CPU_R3000 && !CPU_TX39XX 22261da177e4SLinus Torvalds help 22271da177e4SLinus Torvalds Using 16kB page size will result in higher performance kernel at 22281da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 2229714bfad6SRalf Baechle all non-R3000 family processors. Note that you will need a suitable 2230714bfad6SRalf Baechle Linux distribution to support this. 22311da177e4SLinus Torvalds 2232c52399beSRalf Baechleconfig PAGE_SIZE_32KB 2233c52399beSRalf Baechle bool "32kB" 2234c52399beSRalf Baechle depends on CPU_CAVIUM_OCTEON 22351e321fa9SLeonid Yegoshin depends on !MIPS_VA_BITS_48 2236c52399beSRalf Baechle help 2237c52399beSRalf Baechle Using 32kB page size will result in higher performance kernel at 2238c52399beSRalf Baechle the price of higher memory consumption. This option is available 2239c52399beSRalf Baechle only on cnMIPS cores. Note that you will need a suitable Linux 2240c52399beSRalf Baechle distribution to support this. 2241c52399beSRalf Baechle 22421da177e4SLinus Torvaldsconfig PAGE_SIZE_64KB 22431da177e4SLinus Torvalds bool "64kB" 22443b2db173SPaul Burton depends on !CPU_R3000 && !CPU_TX39XX 22451da177e4SLinus Torvalds help 22461da177e4SLinus Torvalds Using 64kB page size will result in higher performance kernel at 22471da177e4SLinus Torvalds the price of higher memory consumption. This option is available on 22481da177e4SLinus Torvalds all non-R3000 family processor. Not that at the time of this 2249714bfad6SRalf Baechle writing this option is still high experimental. 22501da177e4SLinus Torvalds 22511da177e4SLinus Torvaldsendchoice 22521da177e4SLinus Torvalds 2253c9bace7cSDavid Daneyconfig FORCE_MAX_ZONEORDER 2254c9bace7cSDavid Daney int "Maximum zone order" 2255e4362d1eSAlex Smith range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2256e4362d1eSAlex Smith default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2257e4362d1eSAlex Smith range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2258e4362d1eSAlex Smith default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2259e4362d1eSAlex Smith range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2260e4362d1eSAlex Smith default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2261c9bace7cSDavid Daney range 11 64 2262c9bace7cSDavid Daney default "11" 2263c9bace7cSDavid Daney help 2264c9bace7cSDavid Daney The kernel memory allocator divides physically contiguous memory 2265c9bace7cSDavid Daney blocks into "zones", where each zone is a power of two number of 2266c9bace7cSDavid Daney pages. This option selects the largest power of two that the kernel 2267c9bace7cSDavid Daney keeps in the memory allocator. If you need to allocate very large 2268c9bace7cSDavid Daney blocks of physically contiguous memory, then you may need to 2269c9bace7cSDavid Daney increase this value. 2270c9bace7cSDavid Daney 2271c9bace7cSDavid Daney This config option is actually maximum order plus one. For example, 2272c9bace7cSDavid Daney a value of 11 means that the largest free memory block is 2^10 pages. 2273c9bace7cSDavid Daney 2274c9bace7cSDavid Daney The page size is not necessarily 4KB. Keep this in mind 2275c9bace7cSDavid Daney when choosing a value for this option. 2276c9bace7cSDavid Daney 22771da177e4SLinus Torvaldsconfig BOARD_SCACHE 22781da177e4SLinus Torvalds bool 22791da177e4SLinus Torvalds 22801da177e4SLinus Torvaldsconfig IP22_CPU_SCACHE 22811da177e4SLinus Torvalds bool 22821da177e4SLinus Torvalds select BOARD_SCACHE 22831da177e4SLinus Torvalds 22849318c51aSChris Dearman# 22859318c51aSChris Dearman# Support for a MIPS32 / MIPS64 style S-caches 22869318c51aSChris Dearman# 22879318c51aSChris Dearmanconfig MIPS_CPU_SCACHE 22889318c51aSChris Dearman bool 22899318c51aSChris Dearman select BOARD_SCACHE 22909318c51aSChris Dearman 22911da177e4SLinus Torvaldsconfig R5000_CPU_SCACHE 22921da177e4SLinus Torvalds bool 22931da177e4SLinus Torvalds select BOARD_SCACHE 22941da177e4SLinus Torvalds 22951da177e4SLinus Torvaldsconfig RM7000_CPU_SCACHE 22961da177e4SLinus Torvalds bool 22971da177e4SLinus Torvalds select BOARD_SCACHE 22981da177e4SLinus Torvalds 22991da177e4SLinus Torvaldsconfig SIBYTE_DMA_PAGEOPS 23001da177e4SLinus Torvalds bool "Use DMA to clear/copy pages" 23011da177e4SLinus Torvalds depends on CPU_SB1 23021da177e4SLinus Torvalds help 23031da177e4SLinus Torvalds Instead of using the CPU to zero and copy pages, use a Data Mover 23041da177e4SLinus Torvalds channel. These DMA channels are otherwise unused by the standard 23051da177e4SLinus Torvalds SiByte Linux port. Seems to give a small performance benefit. 23061da177e4SLinus Torvalds 23071da177e4SLinus Torvaldsconfig CPU_HAS_PREFETCH 2308c8094b53SRalf Baechle bool 23091da177e4SLinus Torvalds 23103165c846SFlorian Fainelliconfig CPU_GENERIC_DUMP_TLB 23113165c846SFlorian Fainelli bool 2312c2aeaaeaSPaul Burton default y if !(CPU_R3000 || CPU_TX39XX) 23133165c846SFlorian Fainelli 2314c92e47e5SPaul Burtonconfig MIPS_FP_SUPPORT 2315183b40f9SPaul Burton bool "Floating Point support" if EXPERT 2316183b40f9SPaul Burton default y 2317183b40f9SPaul Burton help 2318183b40f9SPaul Burton Select y to include support for floating point in the kernel 2319183b40f9SPaul Burton including initialization of FPU hardware, FP context save & restore 2320183b40f9SPaul Burton and emulation of an FPU where necessary. Without this support any 2321183b40f9SPaul Burton userland program attempting to use floating point instructions will 2322183b40f9SPaul Burton receive a SIGILL. 2323183b40f9SPaul Burton 2324183b40f9SPaul Burton If you know that your userland will not attempt to use floating point 2325183b40f9SPaul Burton instructions then you can say n here to shrink the kernel a little. 2326183b40f9SPaul Burton 2327183b40f9SPaul Burton If unsure, say y. 2328c92e47e5SPaul Burton 232997f7dcbfSPaul Burtonconfig CPU_R2300_FPU 233097f7dcbfSPaul Burton bool 2331c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 233297f7dcbfSPaul Burton default y if CPU_R3000 || CPU_TX39XX 233397f7dcbfSPaul Burton 233454746829SPaul Burtonconfig CPU_R3K_TLB 233554746829SPaul Burton bool 233654746829SPaul Burton 233791405eb6SFlorian Fainelliconfig CPU_R4K_FPU 233891405eb6SFlorian Fainelli bool 2339c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 234097f7dcbfSPaul Burton default y if !CPU_R2300_FPU 234191405eb6SFlorian Fainelli 234262cedc4fSFlorian Fainelliconfig CPU_R4K_CACHE_TLB 234362cedc4fSFlorian Fainelli bool 234454746829SPaul Burton default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) 234562cedc4fSFlorian Fainelli 234659d6ab86SRalf Baechleconfig MIPS_MT_SMP 2347a92b7f87SMarkos Chandras bool "MIPS MT SMP support (1 TC on each available VPE)" 23485cbf9688SPaul Burton default y 2349527f1028SPaul Burton depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 235059d6ab86SRalf Baechle select CPU_MIPSR2_IRQ_VI 2351d725cf38SChris Dearman select CPU_MIPSR2_IRQ_EI 2352c080faa5SSteven J. Hill select SYNC_R4K 235359d6ab86SRalf Baechle select MIPS_MT 235459d6ab86SRalf Baechle select SMP 235587353d8aSRalf Baechle select SMP_UP 2356c080faa5SSteven J. Hill select SYS_SUPPORTS_SMP 2357c080faa5SSteven J. Hill select SYS_SUPPORTS_SCHED_SMT 2358399aaa25SAl Cooper select MIPS_PERF_SHARED_TC_COUNTERS 235959d6ab86SRalf Baechle help 2360c080faa5SSteven J. Hill This is a kernel model which is known as SMVP. This is supported 2361c080faa5SSteven J. Hill on cores with the MT ASE and uses the available VPEs to implement 2362c080faa5SSteven J. Hill virtual processors which supports SMP. This is equivalent to the 2363c080faa5SSteven J. Hill Intel Hyperthreading feature. For further information go to 2364c080faa5SSteven J. Hill <http://www.imgtec.com/mips/mips-multithreading.asp>. 236559d6ab86SRalf Baechle 2366f41ae0b2SRalf Baechleconfig MIPS_MT 2367f41ae0b2SRalf Baechle bool 2368f41ae0b2SRalf Baechle 23690ab7aefcSRalf Baechleconfig SCHED_SMT 23700ab7aefcSRalf Baechle bool "SMT (multithreading) scheduler support" 23710ab7aefcSRalf Baechle depends on SYS_SUPPORTS_SCHED_SMT 23720ab7aefcSRalf Baechle default n 23730ab7aefcSRalf Baechle help 23740ab7aefcSRalf Baechle SMT scheduler support improves the CPU scheduler's decision making 23750ab7aefcSRalf Baechle when dealing with MIPS MT enabled cores at a cost of slightly 23760ab7aefcSRalf Baechle increased overhead in some places. If unsure say N here. 23770ab7aefcSRalf Baechle 23780ab7aefcSRalf Baechleconfig SYS_SUPPORTS_SCHED_SMT 23790ab7aefcSRalf Baechle bool 23800ab7aefcSRalf Baechle 2381f41ae0b2SRalf Baechleconfig SYS_SUPPORTS_MULTITHREADING 2382f41ae0b2SRalf Baechle bool 2383f41ae0b2SRalf Baechle 2384f088fc84SRalf Baechleconfig MIPS_MT_FPAFF 2385f088fc84SRalf Baechle bool "Dynamic FPU affinity for FP-intensive threads" 2386f088fc84SRalf Baechle default y 2387b633648cSRalf Baechle depends on MIPS_MT_SMP 238807cc0c9eSRalf Baechle 2389b0a668fbSLeonid Yegoshinconfig MIPSR2_TO_R6_EMULATOR 2390b0a668fbSLeonid Yegoshin bool "MIPS R2-to-R6 emulator" 23919eaa9a82SPaul Burton depends on CPU_MIPSR6 2392c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 2393b0a668fbSLeonid Yegoshin default y 2394b0a668fbSLeonid Yegoshin help 2395b0a668fbSLeonid Yegoshin Choose this option if you want to run non-R6 MIPS userland code. 2396b0a668fbSLeonid Yegoshin Even if you say 'Y' here, the emulator will still be disabled by 239707edf0d4SMarkos Chandras default. You can enable it using the 'mipsr2emu' kernel option. 2398b0a668fbSLeonid Yegoshin The only reason this is a build-time option is to save ~14K from the 2399b0a668fbSLeonid Yegoshin final kernel image. 2400b0a668fbSLeonid Yegoshin 2401f35764e7SJames Hoganconfig SYS_SUPPORTS_VPE_LOADER 2402f35764e7SJames Hogan bool 2403f35764e7SJames Hogan depends on SYS_SUPPORTS_MULTITHREADING 2404f35764e7SJames Hogan help 2405f35764e7SJames Hogan Indicates that the platform supports the VPE loader, and provides 2406f35764e7SJames Hogan physical_memsize. 2407f35764e7SJames Hogan 240807cc0c9eSRalf Baechleconfig MIPS_VPE_LOADER 240907cc0c9eSRalf Baechle bool "VPE loader support." 2410f35764e7SJames Hogan depends on SYS_SUPPORTS_VPE_LOADER && MODULES 241107cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_VI 241207cc0c9eSRalf Baechle select CPU_MIPSR2_IRQ_EI 241307cc0c9eSRalf Baechle select MIPS_MT 241407cc0c9eSRalf Baechle help 241507cc0c9eSRalf Baechle Includes a loader for loading an elf relocatable object 241607cc0c9eSRalf Baechle onto another VPE and running it. 2417f088fc84SRalf Baechle 241817a1d523SDeng-Cheng Zhuconfig MIPS_VPE_LOADER_CMP 241917a1d523SDeng-Cheng Zhu bool 242017a1d523SDeng-Cheng Zhu default "y" 242117a1d523SDeng-Cheng Zhu depends on MIPS_VPE_LOADER && MIPS_CMP 242217a1d523SDeng-Cheng Zhu 24231a2a6d7eSDeng-Cheng Zhuconfig MIPS_VPE_LOADER_MT 24241a2a6d7eSDeng-Cheng Zhu bool 24251a2a6d7eSDeng-Cheng Zhu default "y" 24261a2a6d7eSDeng-Cheng Zhu depends on MIPS_VPE_LOADER && !MIPS_CMP 24271a2a6d7eSDeng-Cheng Zhu 2428e01402b1SRalf Baechleconfig MIPS_VPE_LOADER_TOM 2429e01402b1SRalf Baechle bool "Load VPE program into memory hidden from linux" 2430e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2431e01402b1SRalf Baechle default y 2432e01402b1SRalf Baechle help 2433e01402b1SRalf Baechle The loader can use memory that is present but has been hidden from 2434e01402b1SRalf Baechle Linux using the kernel command line option "mem=xxMB". It's up to 2435e01402b1SRalf Baechle you to ensure the amount you put in the option and the space your 2436e01402b1SRalf Baechle program requires is less or equal to the amount physically present. 2437e01402b1SRalf Baechle 2438e01402b1SRalf Baechleconfig MIPS_VPE_APSP_API 2439e01402b1SRalf Baechle bool "Enable support for AP/SP API (RTLX)" 2440e01402b1SRalf Baechle depends on MIPS_VPE_LOADER 2441e01402b1SRalf Baechle 2442da615cf6SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_CMP 2443da615cf6SDeng-Cheng Zhu bool 2444da615cf6SDeng-Cheng Zhu default "y" 2445da615cf6SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && MIPS_CMP 2446da615cf6SDeng-Cheng Zhu 24472c973ef0SDeng-Cheng Zhuconfig MIPS_VPE_APSP_API_MT 24482c973ef0SDeng-Cheng Zhu bool 24492c973ef0SDeng-Cheng Zhu default "y" 24502c973ef0SDeng-Cheng Zhu depends on MIPS_VPE_APSP_API && !MIPS_CMP 24512c973ef0SDeng-Cheng Zhu 24524a16ff4cSRalf Baechleconfig MIPS_CMP 24535cac93b3SPaul Burton bool "MIPS CMP framework support (DEPRECATED)" 24545676319cSMarkos Chandras depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2455b10b43baSMarkos Chandras select SMP 2456eb9b5141STim Anderson select SYNC_R4K 2457b10b43baSMarkos Chandras select SYS_SUPPORTS_SMP 24584a16ff4cSRalf Baechle select WEAK_ORDERING 24594a16ff4cSRalf Baechle default n 24604a16ff4cSRalf Baechle help 2461044505c7SPaul Burton Select this if you are using a bootloader which implements the "CMP 2462044505c7SPaul Burton framework" protocol (ie. YAMON) and want your kernel to make use of 2463044505c7SPaul Burton its ability to start secondary CPUs. 24644a16ff4cSRalf Baechle 24655cac93b3SPaul Burton Unless you have a specific need, you should use CONFIG_MIPS_CPS 24665cac93b3SPaul Burton instead of this. 24675cac93b3SPaul Burton 24680ee958e1SPaul Burtonconfig MIPS_CPS 24690ee958e1SPaul Burton bool "MIPS Coherent Processing System support" 24705a3e7c02SPaul Burton depends on SYS_SUPPORTS_MIPS_CPS 24710ee958e1SPaul Burton select MIPS_CM 24721d8f1f5aSPaul Burton select MIPS_CPS_PM if HOTPLUG_CPU 24730ee958e1SPaul Burton select SMP 24740ee958e1SPaul Burton select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 24751d8f1f5aSPaul Burton select SYS_SUPPORTS_HOTPLUG_CPU 2476c8b7712cSPaul Burton select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 24770ee958e1SPaul Burton select SYS_SUPPORTS_SMP 24780ee958e1SPaul Burton select WEAK_ORDERING 24790ee958e1SPaul Burton help 24800ee958e1SPaul Burton Select this if you wish to run an SMP kernel across multiple cores 24810ee958e1SPaul Burton within a MIPS Coherent Processing System. When this option is 24820ee958e1SPaul Burton enabled the kernel will probe for other cores and boot them with 24830ee958e1SPaul Burton no external assistance. It is safe to enable this when hardware 24840ee958e1SPaul Burton support is unavailable. 24850ee958e1SPaul Burton 24863179d37eSPaul Burtonconfig MIPS_CPS_PM 248739a59593SMarkos Chandras depends on MIPS_CPS 24883179d37eSPaul Burton bool 24893179d37eSPaul Burton 24909f98f3ddSPaul Burtonconfig MIPS_CM 24919f98f3ddSPaul Burton bool 24923c9b4166SPaul Burton select MIPS_CPC 24939f98f3ddSPaul Burton 24949c38cf44SPaul Burtonconfig MIPS_CPC 24959c38cf44SPaul Burton bool 24962600990eSRalf Baechle 24971da177e4SLinus Torvaldsconfig SB1_PASS_2_WORKAROUNDS 24981da177e4SLinus Torvalds bool 24991da177e4SLinus Torvalds depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 25001da177e4SLinus Torvalds default y 25011da177e4SLinus Torvalds 25021da177e4SLinus Torvaldsconfig SB1_PASS_2_1_WORKAROUNDS 25031da177e4SLinus Torvalds bool 25041da177e4SLinus Torvalds depends on CPU_SB1 && CPU_SB1_PASS_2 25051da177e4SLinus Torvalds default y 25061da177e4SLinus Torvalds 25079e2b5372SMarkos Chandraschoice 25089e2b5372SMarkos Chandras prompt "SmartMIPS or microMIPS ASE support" 25099e2b5372SMarkos Chandras 25109e2b5372SMarkos Chandrasconfig CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 25119e2b5372SMarkos Chandras bool "None" 25129e2b5372SMarkos Chandras help 25139e2b5372SMarkos Chandras Select this if you want neither microMIPS nor SmartMIPS support 25149e2b5372SMarkos Chandras 25159693a853SFranck Bui-Huuconfig CPU_HAS_SMARTMIPS 25169693a853SFranck Bui-Huu depends on SYS_SUPPORTS_SMARTMIPS 25179e2b5372SMarkos Chandras bool "SmartMIPS" 25189693a853SFranck Bui-Huu help 25199693a853SFranck Bui-Huu SmartMIPS is a extension of the MIPS32 architecture aimed at 25209693a853SFranck Bui-Huu increased security at both hardware and software level for 25219693a853SFranck Bui-Huu smartcards. Enabling this option will allow proper use of the 25229693a853SFranck Bui-Huu SmartMIPS instructions by Linux applications. However a kernel with 25239693a853SFranck Bui-Huu this option will not work on a MIPS core without SmartMIPS core. If 25249693a853SFranck Bui-Huu you don't know you probably don't have SmartMIPS and should say N 25259693a853SFranck Bui-Huu here. 25269693a853SFranck Bui-Huu 2527bce86083SSteven J. Hillconfig CPU_MICROMIPS 25287fd08ca5SLeonid Yegoshin depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 25299e2b5372SMarkos Chandras bool "microMIPS" 2530bce86083SSteven J. Hill help 2531bce86083SSteven J. Hill When this option is enabled the kernel will be built using the 2532bce86083SSteven J. Hill microMIPS ISA 2533bce86083SSteven J. Hill 25349e2b5372SMarkos Chandrasendchoice 25359e2b5372SMarkos Chandras 2536a5e9a69eSPaul Burtonconfig CPU_HAS_MSA 25370ce3417eSPaul Burton bool "Support for the MIPS SIMD Architecture" 2538a5e9a69eSPaul Burton depends on CPU_SUPPORTS_MSA 2539c92e47e5SPaul Burton depends on MIPS_FP_SUPPORT 25402a6cb669SPaul Burton depends on 64BIT || MIPS_O32_FP64_SUPPORT 2541a5e9a69eSPaul Burton help 2542a5e9a69eSPaul Burton MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2543a5e9a69eSPaul Burton and a set of SIMD instructions to operate on them. When this option 25441db1af84SPaul Burton is enabled the kernel will support allocating & switching MSA 25451db1af84SPaul Burton vector register contexts. If you know that your kernel will only be 25461db1af84SPaul Burton running on CPUs which do not support MSA or that your userland will 25471db1af84SPaul Burton not be making use of it then you may wish to say N here to reduce 25481db1af84SPaul Burton the size & complexity of your kernel. 2549a5e9a69eSPaul Burton 2550a5e9a69eSPaul Burton If unsure, say Y. 2551a5e9a69eSPaul Burton 25521da177e4SLinus Torvaldsconfig CPU_HAS_WB 2553f7062ddbSRalf Baechle bool 2554e01402b1SRalf Baechle 2555df0ac8a4SKevin Cernekeeconfig XKS01 2556df0ac8a4SKevin Cernekee bool 2557df0ac8a4SKevin Cernekee 2558ba9196d2SJiaxun Yangconfig CPU_HAS_DIEI 2559ba9196d2SJiaxun Yang depends on !CPU_DIEI_BROKEN 2560ba9196d2SJiaxun Yang bool 2561ba9196d2SJiaxun Yang 2562ba9196d2SJiaxun Yangconfig CPU_DIEI_BROKEN 2563ba9196d2SJiaxun Yang bool 2564ba9196d2SJiaxun Yang 25658256b17eSFlorian Fainelliconfig CPU_HAS_RIXI 25668256b17eSFlorian Fainelli bool 25678256b17eSFlorian Fainelli 256818d84e2eSAlexander Lobakinconfig CPU_NO_LOAD_STORE_LR 2569932afdeeSYasha Cherikovsky bool 2570932afdeeSYasha Cherikovsky help 257118d84e2eSAlexander Lobakin CPU lacks support for unaligned load and store instructions: 2572932afdeeSYasha Cherikovsky LWL, LWR, SWL, SWR (Load/store word left/right). 257318d84e2eSAlexander Lobakin LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit 257418d84e2eSAlexander Lobakin systems). 2575932afdeeSYasha Cherikovsky 2576f41ae0b2SRalf Baechle# 2577f41ae0b2SRalf Baechle# Vectored interrupt mode is an R2 feature 2578f41ae0b2SRalf Baechle# 2579e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_VI 2580f41ae0b2SRalf Baechle bool 2581e01402b1SRalf Baechle 2582f41ae0b2SRalf Baechle# 2583f41ae0b2SRalf Baechle# Extended interrupt mode is an R2 feature 2584f41ae0b2SRalf Baechle# 2585e01402b1SRalf Baechleconfig CPU_MIPSR2_IRQ_EI 2586f41ae0b2SRalf Baechle bool 2587e01402b1SRalf Baechle 25881da177e4SLinus Torvaldsconfig CPU_HAS_SYNC 25891da177e4SLinus Torvalds bool 25901da177e4SLinus Torvalds depends on !CPU_R3000 25911da177e4SLinus Torvalds default y 25921da177e4SLinus Torvalds 25931da177e4SLinus Torvalds# 259420d60d99SMaciej W. Rozycki# CPU non-features 259520d60d99SMaciej W. Rozycki# 259620d60d99SMaciej W. Rozyckiconfig CPU_DADDI_WORKAROUNDS 259720d60d99SMaciej W. Rozycki bool 259820d60d99SMaciej W. Rozycki 259920d60d99SMaciej W. Rozyckiconfig CPU_R4000_WORKAROUNDS 260020d60d99SMaciej W. Rozycki bool 260120d60d99SMaciej W. Rozycki select CPU_R4400_WORKAROUNDS 260220d60d99SMaciej W. Rozycki 260320d60d99SMaciej W. Rozyckiconfig CPU_R4400_WORKAROUNDS 260420d60d99SMaciej W. Rozycki bool 260520d60d99SMaciej W. Rozycki 2606071d2f0bSPaul Burtonconfig CPU_R4X00_BUGS64 2607071d2f0bSPaul Burton bool 2608071d2f0bSPaul Burton default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) 2609071d2f0bSPaul Burton 26104edf00a4SPaul Burtonconfig MIPS_ASID_SHIFT 26114edf00a4SPaul Burton int 26124edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 26134edf00a4SPaul Burton default 0 26144edf00a4SPaul Burton 26154edf00a4SPaul Burtonconfig MIPS_ASID_BITS 26164edf00a4SPaul Burton int 26172db003a5SPaul Burton default 0 if MIPS_ASID_BITS_VARIABLE 26184edf00a4SPaul Burton default 6 if CPU_R3000 || CPU_TX39XX 26194edf00a4SPaul Burton default 8 26204edf00a4SPaul Burton 26212db003a5SPaul Burtonconfig MIPS_ASID_BITS_VARIABLE 26222db003a5SPaul Burton bool 26232db003a5SPaul Burton 26244a5dc51eSMarcin Nowakowskiconfig MIPS_CRC_SUPPORT 26254a5dc51eSMarcin Nowakowski bool 26264a5dc51eSMarcin Nowakowski 262720d60d99SMaciej W. Rozycki# 26281da177e4SLinus Torvalds# - Highmem only makes sense for the 32-bit kernel. 26291da177e4SLinus Torvalds# - The current highmem code will only work properly on physically indexed 26301da177e4SLinus Torvalds# caches such as R3000, SB1, R7000 or those that look like they're virtually 26311da177e4SLinus Torvalds# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 26321da177e4SLinus Torvalds# moment we protect the user and offer the highmem option only on machines 26331da177e4SLinus Torvalds# where it's known to be safe. This will not offer highmem on a few systems 26341da177e4SLinus Torvalds# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 26351da177e4SLinus Torvalds# indexed CPUs but we're playing safe. 2636797798c1SRalf Baechle# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2637797798c1SRalf Baechle# know they might have memory configurations that could make use of highmem 2638797798c1SRalf Baechle# support. 26391da177e4SLinus Torvalds# 26401da177e4SLinus Torvaldsconfig HIGHMEM 26411da177e4SLinus Torvalds bool "High Memory Support" 2642a6e18781SLeonid Yegoshin depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2643797798c1SRalf Baechle 2644797798c1SRalf Baechleconfig CPU_SUPPORTS_HIGHMEM 2645797798c1SRalf Baechle bool 2646797798c1SRalf Baechle 2647797798c1SRalf Baechleconfig SYS_SUPPORTS_HIGHMEM 2648797798c1SRalf Baechle bool 26491da177e4SLinus Torvalds 26509693a853SFranck Bui-Huuconfig SYS_SUPPORTS_SMARTMIPS 26519693a853SFranck Bui-Huu bool 26529693a853SFranck Bui-Huu 2653a6a4834cSSteven J. Hillconfig SYS_SUPPORTS_MICROMIPS 2654a6a4834cSSteven J. Hill bool 2655a6a4834cSSteven J. Hill 2656377cb1b6SRalf Baechleconfig SYS_SUPPORTS_MIPS16 2657377cb1b6SRalf Baechle bool 2658377cb1b6SRalf Baechle help 2659377cb1b6SRalf Baechle This option must be set if a kernel might be executed on a MIPS16- 2660377cb1b6SRalf Baechle enabled CPU even if MIPS16 is not actually being used. In other 2661377cb1b6SRalf Baechle words, it makes the kernel MIPS16-tolerant. 2662377cb1b6SRalf Baechle 2663a5e9a69eSPaul Burtonconfig CPU_SUPPORTS_MSA 2664a5e9a69eSPaul Burton bool 2665a5e9a69eSPaul Burton 2666b4819b59SYoichi Yuasaconfig ARCH_FLATMEM_ENABLE 2667b4819b59SYoichi Yuasa def_bool y 2668268a2d60SJiaxun Yang depends on !NUMA && !CPU_LOONGSON2EF 2669b4819b59SYoichi Yuasa 2670b1c6cd42SAtsushi Nemotoconfig ARCH_SPARSEMEM_ENABLE 2671b1c6cd42SAtsushi Nemoto bool 2672397dc00eSMike Rapoport select SPARSEMEM_STATIC if !SGI_IP27 267331473747SAtsushi Nemoto 2674d8cb4e11SRalf Baechleconfig NUMA 2675d8cb4e11SRalf Baechle bool "NUMA Support" 2676d8cb4e11SRalf Baechle depends on SYS_SUPPORTS_NUMA 2677d8cb4e11SRalf Baechle help 2678d8cb4e11SRalf Baechle Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2679d8cb4e11SRalf Baechle Access). This option improves performance on systems with more 2680d8cb4e11SRalf Baechle than two nodes; on two node systems it is generally better to 2681172a37e9SRandy Dunlap leave it disabled; on single node systems leave this option 2682d8cb4e11SRalf Baechle disabled. 2683d8cb4e11SRalf Baechle 2684d8cb4e11SRalf Baechleconfig SYS_SUPPORTS_NUMA 2685d8cb4e11SRalf Baechle bool 2686d8cb4e11SRalf Baechle 2687f3c560a6SThomas Bogendoerferconfig HAVE_SETUP_PER_CPU_AREA 2688f3c560a6SThomas Bogendoerfer def_bool y 2689f3c560a6SThomas Bogendoerfer depends on NUMA 2690f3c560a6SThomas Bogendoerfer 2691f3c560a6SThomas Bogendoerferconfig NEED_PER_CPU_EMBED_FIRST_CHUNK 2692f3c560a6SThomas Bogendoerfer def_bool y 2693f3c560a6SThomas Bogendoerfer depends on NUMA 2694f3c560a6SThomas Bogendoerfer 26958c530ea3SMatt Redfearnconfig RELOCATABLE 26968c530ea3SMatt Redfearn bool "Relocatable kernel" 26973ff72be4SSteven J. Hill depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC) 26988c530ea3SMatt Redfearn help 26998c530ea3SMatt Redfearn This builds a kernel image that retains relocation information 27008c530ea3SMatt Redfearn so it can be loaded someplace besides the default 1MB. 27018c530ea3SMatt Redfearn The relocations make the kernel binary about 15% larger, 27028c530ea3SMatt Redfearn but are discarded at runtime 27038c530ea3SMatt Redfearn 2704069fd766SMatt Redfearnconfig RELOCATION_TABLE_SIZE 2705069fd766SMatt Redfearn hex "Relocation table size" 2706069fd766SMatt Redfearn depends on RELOCATABLE 2707069fd766SMatt Redfearn range 0x0 0x01000000 2708069fd766SMatt Redfearn default "0x00100000" 2709069fd766SMatt Redfearn ---help--- 2710069fd766SMatt Redfearn A table of relocation data will be appended to the kernel binary 2711069fd766SMatt Redfearn and parsed at boot to fix up the relocated kernel. 2712069fd766SMatt Redfearn 2713069fd766SMatt Redfearn This option allows the amount of space reserved for the table to be 2714069fd766SMatt Redfearn adjusted, although the default of 1Mb should be ok in most cases. 2715069fd766SMatt Redfearn 2716069fd766SMatt Redfearn The build will fail and a valid size suggested if this is too small. 2717069fd766SMatt Redfearn 2718069fd766SMatt Redfearn If unsure, leave at the default value. 2719069fd766SMatt Redfearn 2720405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE 2721405bc8fdSMatt Redfearn bool "Randomize the address of the kernel image" 2722405bc8fdSMatt Redfearn depends on RELOCATABLE 2723405bc8fdSMatt Redfearn ---help--- 2724405bc8fdSMatt Redfearn Randomizes the physical and virtual address at which the 2725405bc8fdSMatt Redfearn kernel image is loaded, as a security feature that 2726405bc8fdSMatt Redfearn deters exploit attempts relying on knowledge of the location 2727405bc8fdSMatt Redfearn of kernel internals. 2728405bc8fdSMatt Redfearn 2729405bc8fdSMatt Redfearn Entropy is generated using any coprocessor 0 registers available. 2730405bc8fdSMatt Redfearn 2731405bc8fdSMatt Redfearn The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2732405bc8fdSMatt Redfearn 2733405bc8fdSMatt Redfearn If unsure, say N. 2734405bc8fdSMatt Redfearn 2735405bc8fdSMatt Redfearnconfig RANDOMIZE_BASE_MAX_OFFSET 2736405bc8fdSMatt Redfearn hex "Maximum kASLR offset" if EXPERT 2737405bc8fdSMatt Redfearn depends on RANDOMIZE_BASE 2738405bc8fdSMatt Redfearn range 0x0 0x40000000 if EVA || 64BIT 2739405bc8fdSMatt Redfearn range 0x0 0x08000000 2740405bc8fdSMatt Redfearn default "0x01000000" 2741405bc8fdSMatt Redfearn ---help--- 2742405bc8fdSMatt Redfearn When kASLR is active, this provides the maximum offset that will 2743405bc8fdSMatt Redfearn be applied to the kernel image. It should be set according to the 2744405bc8fdSMatt Redfearn amount of physical RAM available in the target system minus 2745405bc8fdSMatt Redfearn PHYSICAL_START and must be a power of 2. 2746405bc8fdSMatt Redfearn 2747405bc8fdSMatt Redfearn This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2748405bc8fdSMatt Redfearn EVA or 64-bit. The default is 16Mb. 2749405bc8fdSMatt Redfearn 2750c80d79d7SYasunori Gotoconfig NODES_SHIFT 2751c80d79d7SYasunori Goto int 2752c80d79d7SYasunori Goto default "6" 2753c80d79d7SYasunori Goto depends on NEED_MULTIPLE_NODES 2754c80d79d7SYasunori Goto 275514f70012SDeng-Cheng Zhuconfig HW_PERF_EVENTS 275614f70012SDeng-Cheng Zhu bool "Enable hardware performance counter support for perf events" 2757268a2d60SJiaxun Yang depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) 275814f70012SDeng-Cheng Zhu default y 275914f70012SDeng-Cheng Zhu help 276014f70012SDeng-Cheng Zhu Enable hardware performance counter support for perf events. If 276114f70012SDeng-Cheng Zhu disabled, perf events will use software events only. 276214f70012SDeng-Cheng Zhu 2763be8fa1cbSTiezhu Yangconfig DMI 2764be8fa1cbSTiezhu Yang bool "Enable DMI scanning" 2765be8fa1cbSTiezhu Yang depends on MACH_LOONGSON64 2766be8fa1cbSTiezhu Yang select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 2767be8fa1cbSTiezhu Yang default y 2768be8fa1cbSTiezhu Yang help 2769be8fa1cbSTiezhu Yang Enabled scanning of DMI to identify machine quirks. Say Y 2770be8fa1cbSTiezhu Yang here unless you have verified that your setup is not 2771be8fa1cbSTiezhu Yang affected by entries in the DMI blacklist. Required by PNP 2772be8fa1cbSTiezhu Yang BIOS code. 2773be8fa1cbSTiezhu Yang 27741da177e4SLinus Torvaldsconfig SMP 27751da177e4SLinus Torvalds bool "Multi-Processing support" 2776e73ea273SRalf Baechle depends on SYS_SUPPORTS_SMP 2777e73ea273SRalf Baechle help 27781da177e4SLinus Torvalds This enables support for systems with more than one CPU. If you have 27794a474157SRobert Graffham a system with only one CPU, say N. If you have a system with more 27804a474157SRobert Graffham than one CPU, say Y. 27811da177e4SLinus Torvalds 27824a474157SRobert Graffham If you say N here, the kernel will run on uni- and multiprocessor 27831da177e4SLinus Torvalds machines, but will use only one CPU of a multiprocessor machine. If 27841da177e4SLinus Torvalds you say Y here, the kernel will run on many, but not all, 27854a474157SRobert Graffham uniprocessor machines. On a uniprocessor machine, the kernel 27861da177e4SLinus Torvalds will run faster if you say N here. 27871da177e4SLinus Torvalds 27881da177e4SLinus Torvalds People using multiprocessor machines who say Y here should also say 27891da177e4SLinus Torvalds Y to "Enhanced Real Time Clock Support", below. 27901da177e4SLinus Torvalds 279103502faaSAdrian Bunk See also the SMP-HOWTO available at 279203502faaSAdrian Bunk <http://www.tldp.org/docs.html#howto>. 27931da177e4SLinus Torvalds 27941da177e4SLinus Torvalds If you don't know what to do here, say N. 27951da177e4SLinus Torvalds 27967840d618SMatt Redfearnconfig HOTPLUG_CPU 27977840d618SMatt Redfearn bool "Support for hot-pluggable CPUs" 27987840d618SMatt Redfearn depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 27997840d618SMatt Redfearn help 28007840d618SMatt Redfearn Say Y here to allow turning CPUs off and on. CPUs can be 28017840d618SMatt Redfearn controlled through /sys/devices/system/cpu. 28027840d618SMatt Redfearn (Note: power management support will enable this option 28037840d618SMatt Redfearn automatically on SMP systems. ) 28047840d618SMatt Redfearn Say N if you want to disable CPU hotplug. 28057840d618SMatt Redfearn 280687353d8aSRalf Baechleconfig SMP_UP 280787353d8aSRalf Baechle bool 280887353d8aSRalf Baechle 28094a16ff4cSRalf Baechleconfig SYS_SUPPORTS_MIPS_CMP 28104a16ff4cSRalf Baechle bool 28114a16ff4cSRalf Baechle 28120ee958e1SPaul Burtonconfig SYS_SUPPORTS_MIPS_CPS 28130ee958e1SPaul Burton bool 28140ee958e1SPaul Burton 2815e73ea273SRalf Baechleconfig SYS_SUPPORTS_SMP 2816e73ea273SRalf Baechle bool 2817e73ea273SRalf Baechle 2818130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_4 2819130e2fb7SRalf Baechle bool 2820130e2fb7SRalf Baechle 2821130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_8 2822130e2fb7SRalf Baechle bool 2823130e2fb7SRalf Baechle 2824130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_16 2825130e2fb7SRalf Baechle bool 2826130e2fb7SRalf Baechle 2827130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_32 2828130e2fb7SRalf Baechle bool 2829130e2fb7SRalf Baechle 2830130e2fb7SRalf Baechleconfig NR_CPUS_DEFAULT_64 2831130e2fb7SRalf Baechle bool 2832130e2fb7SRalf Baechle 28331da177e4SLinus Torvaldsconfig NR_CPUS 2834a91796a9SJayachandran C int "Maximum number of CPUs (2-256)" 2835a91796a9SJayachandran C range 2 256 28361da177e4SLinus Torvalds depends on SMP 2837130e2fb7SRalf Baechle default "4" if NR_CPUS_DEFAULT_4 2838130e2fb7SRalf Baechle default "8" if NR_CPUS_DEFAULT_8 2839130e2fb7SRalf Baechle default "16" if NR_CPUS_DEFAULT_16 2840130e2fb7SRalf Baechle default "32" if NR_CPUS_DEFAULT_32 2841130e2fb7SRalf Baechle default "64" if NR_CPUS_DEFAULT_64 28421da177e4SLinus Torvalds help 28431da177e4SLinus Torvalds This allows you to specify the maximum number of CPUs which this 28441da177e4SLinus Torvalds kernel will support. The maximum supported value is 32 for 32-bit 28451da177e4SLinus Torvalds kernel and 64 for 64-bit kernels; the minimum value which makes 284672ede9b1SAtsushi Nemoto sense is 1 for Qemu (useful only for kernel debugging purposes) 284772ede9b1SAtsushi Nemoto and 2 for all others. 28481da177e4SLinus Torvalds 28491da177e4SLinus Torvalds This is purely to save memory - each supported CPU adds 285072ede9b1SAtsushi Nemoto approximately eight kilobytes to the kernel image. For best 285172ede9b1SAtsushi Nemoto performance should round up your number of processors to the next 285272ede9b1SAtsushi Nemoto power of two. 28531da177e4SLinus Torvalds 2854399aaa25SAl Cooperconfig MIPS_PERF_SHARED_TC_COUNTERS 2855399aaa25SAl Cooper bool 2856399aaa25SAl Cooper 28577820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP_1024 28587820b84bSDavid Daney bool 28597820b84bSDavid Daney 28607820b84bSDavid Daneyconfig MIPS_NR_CPU_NR_MAP 28617820b84bSDavid Daney int 28627820b84bSDavid Daney depends on SMP 28637820b84bSDavid Daney default 1024 if MIPS_NR_CPU_NR_MAP_1024 28647820b84bSDavid Daney default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 28657820b84bSDavid Daney 28661723b4a3SAtsushi Nemoto# 28671723b4a3SAtsushi Nemoto# Timer Interrupt Frequency Configuration 28681723b4a3SAtsushi Nemoto# 28691723b4a3SAtsushi Nemoto 28701723b4a3SAtsushi Nemotochoice 28711723b4a3SAtsushi Nemoto prompt "Timer frequency" 28721723b4a3SAtsushi Nemoto default HZ_250 28731723b4a3SAtsushi Nemoto help 28741723b4a3SAtsushi Nemoto Allows the configuration of the timer frequency. 28751723b4a3SAtsushi Nemoto 287667596573SPaul Burton config HZ_24 287767596573SPaul Burton bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 287867596573SPaul Burton 28791723b4a3SAtsushi Nemoto config HZ_48 28800f873585SRalf Baechle bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 28811723b4a3SAtsushi Nemoto 28821723b4a3SAtsushi Nemoto config HZ_100 28831723b4a3SAtsushi Nemoto bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 28841723b4a3SAtsushi Nemoto 28851723b4a3SAtsushi Nemoto config HZ_128 28861723b4a3SAtsushi Nemoto bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 28871723b4a3SAtsushi Nemoto 28881723b4a3SAtsushi Nemoto config HZ_250 28891723b4a3SAtsushi Nemoto bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 28901723b4a3SAtsushi Nemoto 28911723b4a3SAtsushi Nemoto config HZ_256 28921723b4a3SAtsushi Nemoto bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 28931723b4a3SAtsushi Nemoto 28941723b4a3SAtsushi Nemoto config HZ_1000 28951723b4a3SAtsushi Nemoto bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 28961723b4a3SAtsushi Nemoto 28971723b4a3SAtsushi Nemoto config HZ_1024 28981723b4a3SAtsushi Nemoto bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 28991723b4a3SAtsushi Nemoto 29001723b4a3SAtsushi Nemotoendchoice 29011723b4a3SAtsushi Nemoto 290267596573SPaul Burtonconfig SYS_SUPPORTS_24HZ 290367596573SPaul Burton bool 290467596573SPaul Burton 29051723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_48HZ 29061723b4a3SAtsushi Nemoto bool 29071723b4a3SAtsushi Nemoto 29081723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_100HZ 29091723b4a3SAtsushi Nemoto bool 29101723b4a3SAtsushi Nemoto 29111723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_128HZ 29121723b4a3SAtsushi Nemoto bool 29131723b4a3SAtsushi Nemoto 29141723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_250HZ 29151723b4a3SAtsushi Nemoto bool 29161723b4a3SAtsushi Nemoto 29171723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_256HZ 29181723b4a3SAtsushi Nemoto bool 29191723b4a3SAtsushi Nemoto 29201723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1000HZ 29211723b4a3SAtsushi Nemoto bool 29221723b4a3SAtsushi Nemoto 29231723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_1024HZ 29241723b4a3SAtsushi Nemoto bool 29251723b4a3SAtsushi Nemoto 29261723b4a3SAtsushi Nemotoconfig SYS_SUPPORTS_ARBIT_HZ 29271723b4a3SAtsushi Nemoto bool 292867596573SPaul Burton default y if !SYS_SUPPORTS_24HZ && \ 292967596573SPaul Burton !SYS_SUPPORTS_48HZ && \ 293067596573SPaul Burton !SYS_SUPPORTS_100HZ && \ 293167596573SPaul Burton !SYS_SUPPORTS_128HZ && \ 293267596573SPaul Burton !SYS_SUPPORTS_250HZ && \ 293367596573SPaul Burton !SYS_SUPPORTS_256HZ && \ 293467596573SPaul Burton !SYS_SUPPORTS_1000HZ && \ 29351723b4a3SAtsushi Nemoto !SYS_SUPPORTS_1024HZ 29361723b4a3SAtsushi Nemoto 29371723b4a3SAtsushi Nemotoconfig HZ 29381723b4a3SAtsushi Nemoto int 293967596573SPaul Burton default 24 if HZ_24 29401723b4a3SAtsushi Nemoto default 48 if HZ_48 29411723b4a3SAtsushi Nemoto default 100 if HZ_100 29421723b4a3SAtsushi Nemoto default 128 if HZ_128 29431723b4a3SAtsushi Nemoto default 250 if HZ_250 29441723b4a3SAtsushi Nemoto default 256 if HZ_256 29451723b4a3SAtsushi Nemoto default 1000 if HZ_1000 29461723b4a3SAtsushi Nemoto default 1024 if HZ_1024 29471723b4a3SAtsushi Nemoto 294896685b17SDeng-Cheng Zhuconfig SCHED_HRTICK 294996685b17SDeng-Cheng Zhu def_bool HIGH_RES_TIMERS 295096685b17SDeng-Cheng Zhu 2951ea6e942bSAtsushi Nemotoconfig KEXEC 29527d60717eSKees Cook bool "Kexec system call" 29532965faa5SDave Young select KEXEC_CORE 2954ea6e942bSAtsushi Nemoto help 2955ea6e942bSAtsushi Nemoto kexec is a system call that implements the ability to shutdown your 2956ea6e942bSAtsushi Nemoto current kernel, and to start another kernel. It is like a reboot 29573dde6ad8SDavid Sterba but it is independent of the system firmware. And like a reboot 2958ea6e942bSAtsushi Nemoto you can start any kernel with it, not just Linux. 2959ea6e942bSAtsushi Nemoto 296001dd2fbfSMatt LaPlante The name comes from the similarity to the exec system call. 2961ea6e942bSAtsushi Nemoto 2962ea6e942bSAtsushi Nemoto It is an ongoing process to be certain the hardware in a machine 2963ea6e942bSAtsushi Nemoto is properly shutdown, so do not be surprised if this code does not 2964bf220695SGeert Uytterhoeven initially work for you. As of this writing the exact hardware 2965bf220695SGeert Uytterhoeven interface is strongly in flux, so no good recommendation can be 2966bf220695SGeert Uytterhoeven made. 2967ea6e942bSAtsushi Nemoto 29687aa1c8f4SRalf Baechleconfig CRASH_DUMP 29697aa1c8f4SRalf Baechle bool "Kernel crash dumps" 29707aa1c8f4SRalf Baechle help 29717aa1c8f4SRalf Baechle Generate crash dump after being started by kexec. 29727aa1c8f4SRalf Baechle This should be normally only set in special crash dump kernels 29737aa1c8f4SRalf Baechle which are loaded in the main kernel with kexec-tools into 29747aa1c8f4SRalf Baechle a specially reserved region and then later executed after 29757aa1c8f4SRalf Baechle a crash by kdump/kexec. The crash dump kernel must be compiled 29767aa1c8f4SRalf Baechle to a memory address not used by the main kernel or firmware using 29777aa1c8f4SRalf Baechle PHYSICAL_START. 29787aa1c8f4SRalf Baechle 29797aa1c8f4SRalf Baechleconfig PHYSICAL_START 29807aa1c8f4SRalf Baechle hex "Physical address where the kernel is loaded" 29818bda3e26SMaciej W. Rozycki default "0xffffffff84000000" 29827aa1c8f4SRalf Baechle depends on CRASH_DUMP 29837aa1c8f4SRalf Baechle help 29847aa1c8f4SRalf Baechle This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 29857aa1c8f4SRalf Baechle If you plan to use kernel for capturing the crash dump change 29867aa1c8f4SRalf Baechle this value to start of the reserved region (the "X" value as 29877aa1c8f4SRalf Baechle specified in the "crashkernel=YM@XM" command line boot parameter 29887aa1c8f4SRalf Baechle passed to the panic-ed kernel). 29897aa1c8f4SRalf Baechle 2990ea6e942bSAtsushi Nemotoconfig SECCOMP 2991ea6e942bSAtsushi Nemoto bool "Enable seccomp to safely compute untrusted bytecode" 2992293c5bd1SRalf Baechle depends on PROC_FS 2993ea6e942bSAtsushi Nemoto default y 2994ea6e942bSAtsushi Nemoto help 2995ea6e942bSAtsushi Nemoto This kernel feature is useful for number crunching applications 2996ea6e942bSAtsushi Nemoto that may need to compute untrusted bytecode during their 2997ea6e942bSAtsushi Nemoto execution. By using pipes or other transports made available to 2998ea6e942bSAtsushi Nemoto the process as file descriptors supporting the read/write 2999ea6e942bSAtsushi Nemoto syscalls, it's possible to isolate those applications in 3000ea6e942bSAtsushi Nemoto their own address space using seccomp. Once seccomp is 3001ea6e942bSAtsushi Nemoto enabled via /proc/<pid>/seccomp, it cannot be disabled 3002ea6e942bSAtsushi Nemoto and the task is only allowed to execute a few safe syscalls 3003ea6e942bSAtsushi Nemoto defined by each seccomp mode. 3004ea6e942bSAtsushi Nemoto 3005ea6e942bSAtsushi Nemoto If unsure, say Y. Only embedded should say N here. 3006ea6e942bSAtsushi Nemoto 3007597ce172SPaul Burtonconfig MIPS_O32_FP64_SUPPORT 3008b7f1e273SPaul Burton bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 3009597ce172SPaul Burton depends on 32BIT || MIPS32_O32 3010597ce172SPaul Burton help 3011597ce172SPaul Burton When this is enabled, the kernel will support use of 64-bit floating 3012597ce172SPaul Burton point registers with binaries using the O32 ABI along with the 3013597ce172SPaul Burton EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 3014597ce172SPaul Burton 32-bit MIPS systems this support is at the cost of increasing the 3015597ce172SPaul Burton size and complexity of the compiled FPU emulator. Thus if you are 3016597ce172SPaul Burton running a MIPS32 system and know that none of your userland binaries 3017597ce172SPaul Burton will require 64-bit floating point, you may wish to reduce the size 3018597ce172SPaul Burton of your kernel & potentially improve FP emulation performance by 3019597ce172SPaul Burton saying N here. 3020597ce172SPaul Burton 302106e2e882SPaul Burton Although binutils currently supports use of this flag the details 302206e2e882SPaul Burton concerning its effect upon the O32 ABI in userland are still being 302306e2e882SPaul Burton worked on. In order to avoid userland becoming dependant upon current 302406e2e882SPaul Burton behaviour before the details have been finalised, this option should 302506e2e882SPaul Burton be considered experimental and only enabled by those working upon 302606e2e882SPaul Burton said details. 302706e2e882SPaul Burton 302806e2e882SPaul Burton If unsure, say N. 3029597ce172SPaul Burton 3030f2ffa5abSDezhong Diaoconfig USE_OF 30310b3e06fdSJonas Gorski bool 3032f2ffa5abSDezhong Diao select OF 3033e6ce1324SStephen Neuendorffer select OF_EARLY_FLATTREE 3034abd2363fSGrant Likely select IRQ_DOMAIN 3035f2ffa5abSDezhong Diao 30362fe8ea39SDengcheng Zhuconfig UHI_BOOT 30372fe8ea39SDengcheng Zhu bool 30382fe8ea39SDengcheng Zhu 30397fafb068SAndrew Brestickerconfig BUILTIN_DTB 30407fafb068SAndrew Bresticker bool 30417fafb068SAndrew Bresticker 30421da8f179SJonas Gorskichoice 30435b24d52cSJonas Gorski prompt "Kernel appended dtb support" if USE_OF 30441da8f179SJonas Gorski default MIPS_NO_APPENDED_DTB 30451da8f179SJonas Gorski 30461da8f179SJonas Gorski config MIPS_NO_APPENDED_DTB 30471da8f179SJonas Gorski bool "None" 30481da8f179SJonas Gorski help 30491da8f179SJonas Gorski Do not enable appended dtb support. 30501da8f179SJonas Gorski 305187db537dSAaro Koskinen config MIPS_ELF_APPENDED_DTB 305287db537dSAaro Koskinen bool "vmlinux" 305387db537dSAaro Koskinen help 305487db537dSAaro Koskinen With this option, the boot code will look for a device tree binary 305587db537dSAaro Koskinen DTB) included in the vmlinux ELF section .appended_dtb. By default 305687db537dSAaro Koskinen it is empty and the DTB can be appended using binutils command 305787db537dSAaro Koskinen objcopy: 305887db537dSAaro Koskinen 305987db537dSAaro Koskinen objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 306087db537dSAaro Koskinen 306187db537dSAaro Koskinen This is meant as a backward compatiblity convenience for those 306287db537dSAaro Koskinen systems with a bootloader that can't be upgraded to accommodate 306387db537dSAaro Koskinen the documented boot protocol using a device tree. 306487db537dSAaro Koskinen 30651da8f179SJonas Gorski config MIPS_RAW_APPENDED_DTB 3066b8f54f2cSJonas Gorski bool "vmlinux.bin or vmlinuz.bin" 30671da8f179SJonas Gorski help 30681da8f179SJonas Gorski With this option, the boot code will look for a device tree binary 3069b8f54f2cSJonas Gorski DTB) appended to raw vmlinux.bin or vmlinuz.bin. 30701da8f179SJonas Gorski (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 30711da8f179SJonas Gorski 30721da8f179SJonas Gorski This is meant as a backward compatibility convenience for those 30731da8f179SJonas Gorski systems with a bootloader that can't be upgraded to accommodate 30741da8f179SJonas Gorski the documented boot protocol using a device tree. 30751da8f179SJonas Gorski 30761da8f179SJonas Gorski Beware that there is very little in terms of protection against 30771da8f179SJonas Gorski this option being confused by leftover garbage in memory that might 30781da8f179SJonas Gorski look like a DTB header after a reboot if no actual DTB is appended 30791da8f179SJonas Gorski to vmlinux.bin. Do not leave this option active in a production kernel 30801da8f179SJonas Gorski if you don't intend to always append a DTB. 30811da8f179SJonas Gorskiendchoice 30821da8f179SJonas Gorski 30832024972eSJonas Gorskichoice 30842024972eSJonas Gorski prompt "Kernel command line type" if !CMDLINE_OVERRIDE 30852bcef9b4SJonas Gorski default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 3086*87fcfa7bSJiaxun Yang !MACH_LOONGSON64 && !MIPS_MALTA && \ 30872bcef9b4SJonas Gorski !CAVIUM_OCTEON_SOC 30882024972eSJonas Gorski default MIPS_CMDLINE_FROM_BOOTLOADER 30892024972eSJonas Gorski 30902024972eSJonas Gorski config MIPS_CMDLINE_FROM_DTB 30912024972eSJonas Gorski depends on USE_OF 30922024972eSJonas Gorski bool "Dtb kernel arguments if available" 30932024972eSJonas Gorski 30942024972eSJonas Gorski config MIPS_CMDLINE_DTB_EXTEND 30952024972eSJonas Gorski depends on USE_OF 30962024972eSJonas Gorski bool "Extend dtb kernel arguments with bootloader arguments" 30972024972eSJonas Gorski 30982024972eSJonas Gorski config MIPS_CMDLINE_FROM_BOOTLOADER 30992024972eSJonas Gorski bool "Bootloader kernel arguments if available" 3100ed47e153SRabin Vincent 3101ed47e153SRabin Vincent config MIPS_CMDLINE_BUILTIN_EXTEND 3102ed47e153SRabin Vincent depends on CMDLINE_BOOL 3103ed47e153SRabin Vincent bool "Extend builtin kernel arguments with bootloader arguments" 31042024972eSJonas Gorskiendchoice 31052024972eSJonas Gorski 31065e83d430SRalf Baechleendmenu 31075e83d430SRalf Baechle 31081df0f0ffSAtsushi Nemotoconfig LOCKDEP_SUPPORT 31091df0f0ffSAtsushi Nemoto bool 31101df0f0ffSAtsushi Nemoto default y 31111df0f0ffSAtsushi Nemoto 31121df0f0ffSAtsushi Nemotoconfig STACKTRACE_SUPPORT 31131df0f0ffSAtsushi Nemoto bool 31141df0f0ffSAtsushi Nemoto default y 31151df0f0ffSAtsushi Nemoto 3116a728ab52SKirill A. Shutemovconfig PGTABLE_LEVELS 3117a728ab52SKirill A. Shutemov int 31183377e227SAlex Belits default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 3119a728ab52SKirill A. Shutemov default 3 if 64BIT && !PAGE_SIZE_64KB 3120a728ab52SKirill A. Shutemov default 2 3121a728ab52SKirill A. Shutemov 31226c359eb1SPaul Burtonconfig MIPS_AUTO_PFN_OFFSET 31236c359eb1SPaul Burton bool 31246c359eb1SPaul Burton 31251da177e4SLinus Torvaldsmenu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 31261da177e4SLinus Torvalds 3127c5611df9SPaul Burtonconfig PCI_DRIVERS_GENERIC 31282eac9c2dSChristoph Hellwig select PCI_DOMAINS_GENERIC if PCI 3129c5611df9SPaul Burton bool 3130c5611df9SPaul Burton 3131c5611df9SPaul Burtonconfig PCI_DRIVERS_LEGACY 3132c5611df9SPaul Burton def_bool !PCI_DRIVERS_GENERIC 3133c5611df9SPaul Burton select NO_GENERIC_PCI_IOPORT_MAP 31342eac9c2dSChristoph Hellwig select PCI_DOMAINS if PCI 31351da177e4SLinus Torvalds 31361da177e4SLinus Torvalds# 31371da177e4SLinus Torvalds# ISA support is now enabled via select. Too many systems still have the one 31381da177e4SLinus Torvalds# or other ISA chip on the board that users don't know about so don't expect 31391da177e4SLinus Torvalds# users to choose the right thing ... 31401da177e4SLinus Torvalds# 31411da177e4SLinus Torvaldsconfig ISA 31421da177e4SLinus Torvalds bool 31431da177e4SLinus Torvalds 31441da177e4SLinus Torvaldsconfig TC 31451da177e4SLinus Torvalds bool "TURBOchannel support" 31461da177e4SLinus Torvalds depends on MACH_DECSTATION 31471da177e4SLinus Torvalds help 314850a23e6eSJustin P. Mattock TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 314950a23e6eSJustin P. Mattock processors. TURBOchannel programming specifications are available 315050a23e6eSJustin P. Mattock at: 315150a23e6eSJustin P. Mattock <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 315250a23e6eSJustin P. Mattock and: 315350a23e6eSJustin P. Mattock <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 315450a23e6eSJustin P. Mattock Linux driver support status is documented at: 315550a23e6eSJustin P. Mattock <http://www.linux-mips.org/wiki/DECstation> 31561da177e4SLinus Torvalds 31571da177e4SLinus Torvaldsconfig MMU 31581da177e4SLinus Torvalds bool 31591da177e4SLinus Torvalds default y 31601da177e4SLinus Torvalds 3161109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MIN 3162109c32ffSMatt Redfearn default 12 if 64BIT 3163109c32ffSMatt Redfearn default 8 3164109c32ffSMatt Redfearn 3165109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_BITS_MAX 3166109c32ffSMatt Redfearn default 18 if 64BIT 3167109c32ffSMatt Redfearn default 15 3168109c32ffSMatt Redfearn 3169109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MIN 3170109c32ffSMatt Redfearn default 8 3171109c32ffSMatt Redfearn 3172109c32ffSMatt Redfearnconfig ARCH_MMAP_RND_COMPAT_BITS_MAX 3173109c32ffSMatt Redfearn default 15 3174109c32ffSMatt Redfearn 3175d865bea4SRalf Baechleconfig I8253 3176d865bea4SRalf Baechle bool 3177798778b8SRussell King select CLKSRC_I8253 31782d02612fSThomas Gleixner select CLKEVT_I8253 31799726b43aSWu Zhangjin select MIPS_EXTERNAL_TIMER 3180d865bea4SRalf Baechle 3181e05eb3f8SRalf Baechleconfig ZONE_DMA 3182e05eb3f8SRalf Baechle bool 3183e05eb3f8SRalf Baechle 3184cce335aeSRalf Baechleconfig ZONE_DMA32 3185cce335aeSRalf Baechle bool 3186cce335aeSRalf Baechle 31871da177e4SLinus Torvaldsendmenu 31881da177e4SLinus Torvalds 31891da177e4SLinus Torvaldsconfig TRAD_SIGNALS 31901da177e4SLinus Torvalds bool 31911da177e4SLinus Torvalds 31921da177e4SLinus Torvaldsconfig MIPS32_COMPAT 319378aaf956SRalf Baechle bool 31941da177e4SLinus Torvalds 31951da177e4SLinus Torvaldsconfig COMPAT 31961da177e4SLinus Torvalds bool 31971da177e4SLinus Torvalds 319805e43966SAtsushi Nemotoconfig SYSVIPC_COMPAT 319905e43966SAtsushi Nemoto bool 320005e43966SAtsushi Nemoto 32011da177e4SLinus Torvaldsconfig MIPS32_O32 32021da177e4SLinus Torvalds bool "Kernel support for o32 binaries" 320378aaf956SRalf Baechle depends on 64BIT 320478aaf956SRalf Baechle select ARCH_WANT_OLD_COMPAT_IPC 320578aaf956SRalf Baechle select COMPAT 320678aaf956SRalf Baechle select MIPS32_COMPAT 320778aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 32081da177e4SLinus Torvalds help 32091da177e4SLinus Torvalds Select this option if you want to run o32 binaries. These are pure 32101da177e4SLinus Torvalds 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 32111da177e4SLinus Torvalds existing binaries are in this format. 32121da177e4SLinus Torvalds 32131da177e4SLinus Torvalds If unsure, say Y. 32141da177e4SLinus Torvalds 32151da177e4SLinus Torvaldsconfig MIPS32_N32 32161da177e4SLinus Torvalds bool "Kernel support for n32 binaries" 3217c22eacfeSRalf Baechle depends on 64BIT 32185a9372f7SArnd Bergmann select ARCH_WANT_COMPAT_IPC_PARSE_VERSION 321978aaf956SRalf Baechle select COMPAT 322078aaf956SRalf Baechle select MIPS32_COMPAT 322178aaf956SRalf Baechle select SYSVIPC_COMPAT if SYSVIPC 32221da177e4SLinus Torvalds help 32231da177e4SLinus Torvalds Select this option if you want to run n32 binaries. These are 32241da177e4SLinus Torvalds 64-bit binaries using 32-bit quantities for addressing and certain 32251da177e4SLinus Torvalds data that would normally be 64-bit. They are used in special 32261da177e4SLinus Torvalds cases. 32271da177e4SLinus Torvalds 32281da177e4SLinus Torvalds If unsure, say N. 32291da177e4SLinus Torvalds 32301da177e4SLinus Torvaldsconfig BINFMT_ELF32 32311da177e4SLinus Torvalds bool 32321da177e4SLinus Torvalds default y if MIPS32_O32 || MIPS32_N32 3233f43edca7SRalf Baechle select ELFCORE 32341da177e4SLinus Torvalds 32352116245eSRalf Baechlemenu "Power management options" 3236952fa954SRodolfo Giometti 3237363c55caSWu Zhangjinconfig ARCH_HIBERNATION_POSSIBLE 3238363c55caSWu Zhangjin def_bool y 32393f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3240363c55caSWu Zhangjin 3241f4cb5700SJohannes Bergconfig ARCH_SUSPEND_POSSIBLE 3242f4cb5700SJohannes Berg def_bool y 32433f5b3e17SRalf Baechle depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3244f4cb5700SJohannes Berg 32452116245eSRalf Baechlesource "kernel/power/Kconfig" 3246952fa954SRodolfo Giometti 32471da177e4SLinus Torvaldsendmenu 32481da177e4SLinus Torvalds 32497a998935SViresh Kumarconfig MIPS_EXTERNAL_TIMER 32507a998935SViresh Kumar bool 32517a998935SViresh Kumar 32527a998935SViresh Kumarmenu "CPU Power Management" 3253c095ebafSPaul Burton 3254c095ebafSPaul Burtonif CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 32557a998935SViresh Kumarsource "drivers/cpufreq/Kconfig" 32567a998935SViresh Kumarendif 32579726b43aSWu Zhangjin 3258c095ebafSPaul Burtonsource "drivers/cpuidle/Kconfig" 3259c095ebafSPaul Burton 3260c095ebafSPaul Burtonendmenu 3261c095ebafSPaul Burton 326298cdee0eSRalf Baechlesource "drivers/firmware/Kconfig" 326398cdee0eSRalf Baechle 32642235a54dSSanjay Lalsource "arch/mips/kvm/Kconfig" 3265