1*f86b9e03SGreg Ungerer /***************************************************************************/ 2*f86b9e03SGreg Ungerer 3*f86b9e03SGreg Ungerer /* 4*f86b9e03SGreg Ungerer * 525x.c 5*f86b9e03SGreg Ungerer * 6*f86b9e03SGreg Ungerer * Copyright (C) 2012, Steven King <sfking@fdwdc.com> 7*f86b9e03SGreg Ungerer */ 8*f86b9e03SGreg Ungerer 9*f86b9e03SGreg Ungerer /***************************************************************************/ 10*f86b9e03SGreg Ungerer 11*f86b9e03SGreg Ungerer #include <linux/kernel.h> 12*f86b9e03SGreg Ungerer #include <linux/param.h> 13*f86b9e03SGreg Ungerer #include <linux/init.h> 14*f86b9e03SGreg Ungerer #include <linux/io.h> 15*f86b9e03SGreg Ungerer #include <linux/platform_device.h> 16*f86b9e03SGreg Ungerer #include <asm/machdep.h> 17*f86b9e03SGreg Ungerer #include <asm/coldfire.h> 18*f86b9e03SGreg Ungerer #include <asm/mcfsim.h> 19*f86b9e03SGreg Ungerer #include <asm/mcfclk.h> 20*f86b9e03SGreg Ungerer 21*f86b9e03SGreg Ungerer /***************************************************************************/ 22*f86b9e03SGreg Ungerer 23*f86b9e03SGreg Ungerer DEFINE_CLK(pll, "pll.0", MCF_CLK); 24*f86b9e03SGreg Ungerer DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 25*f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 26*f86b9e03SGreg Ungerer DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 27*f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 28*f86b9e03SGreg Ungerer DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 29*f86b9e03SGreg Ungerer DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); 30*f86b9e03SGreg Ungerer 31*f86b9e03SGreg Ungerer struct clk *mcf_clks[] = { 32*f86b9e03SGreg Ungerer &clk_pll, 33*f86b9e03SGreg Ungerer &clk_sys, 34*f86b9e03SGreg Ungerer &clk_mcftmr0, 35*f86b9e03SGreg Ungerer &clk_mcftmr1, 36*f86b9e03SGreg Ungerer &clk_mcfuart0, 37*f86b9e03SGreg Ungerer &clk_mcfuart1, 38*f86b9e03SGreg Ungerer &clk_mcfqspi0, 39*f86b9e03SGreg Ungerer NULL 40*f86b9e03SGreg Ungerer }; 41*f86b9e03SGreg Ungerer 42*f86b9e03SGreg Ungerer /***************************************************************************/ 43*f86b9e03SGreg Ungerer 44*f86b9e03SGreg Ungerer static void __init m525x_qspi_init(void) 45*f86b9e03SGreg Ungerer { 46*f86b9e03SGreg Ungerer #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) 47*f86b9e03SGreg Ungerer /* set the GPIO function for the qspi cs gpios */ 48*f86b9e03SGreg Ungerer /* FIXME: replace with pinmux/pinctl support */ 49*f86b9e03SGreg Ungerer u32 f = readl(MCFSIM2_GPIOFUNC); 50*f86b9e03SGreg Ungerer f |= (1 << MCFQSPI_CS2) | (1 << MCFQSPI_CS1) | (1 << MCFQSPI_CS0); 51*f86b9e03SGreg Ungerer writel(f, MCFSIM2_GPIOFUNC); 52*f86b9e03SGreg Ungerer 53*f86b9e03SGreg Ungerer /* QSPI irq setup */ 54*f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, 55*f86b9e03SGreg Ungerer MCFSIM_QSPIICR); 56*f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); 57*f86b9e03SGreg Ungerer #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ 58*f86b9e03SGreg Ungerer } 59*f86b9e03SGreg Ungerer 60*f86b9e03SGreg Ungerer static void __init m525x_i2c_init(void) 61*f86b9e03SGreg Ungerer { 62*f86b9e03SGreg Ungerer #if IS_ENABLED(CONFIG_I2C_COLDFIRE) 63*f86b9e03SGreg Ungerer u32 r; 64*f86b9e03SGreg Ungerer 65*f86b9e03SGreg Ungerer /* first I2C controller uses regular irq setup */ 66*f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, 67*f86b9e03SGreg Ungerer MCFSIM_I2CICR); 68*f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); 69*f86b9e03SGreg Ungerer 70*f86b9e03SGreg Ungerer /* second I2C controller is completely different */ 71*f86b9e03SGreg Ungerer r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); 72*f86b9e03SGreg Ungerer r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1); 73*f86b9e03SGreg Ungerer r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1); 74*f86b9e03SGreg Ungerer writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); 75*f86b9e03SGreg Ungerer #endif /* IS_ENABLED(CONFIG_I2C_COLDFIRE) */ 76*f86b9e03SGreg Ungerer } 77*f86b9e03SGreg Ungerer 78*f86b9e03SGreg Ungerer /***************************************************************************/ 79*f86b9e03SGreg Ungerer 80*f86b9e03SGreg Ungerer void __init config_BSP(char *commandp, int size) 81*f86b9e03SGreg Ungerer { 82*f86b9e03SGreg Ungerer mach_sched_init = hw_timer_init; 83*f86b9e03SGreg Ungerer 84*f86b9e03SGreg Ungerer m525x_qspi_init(); 85*f86b9e03SGreg Ungerer m525x_i2c_init(); 86*f86b9e03SGreg Ungerer } 87*f86b9e03SGreg Ungerer 88*f86b9e03SGreg Ungerer /***************************************************************************/ 89