xref: /linux/arch/arm64/include/asm/cpufeature.h (revision c65abf358f211c3f88c8ed714dff25775ab49fc1)
1 /*
2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #ifndef __ASM_CPUFEATURE_H
10 #define __ASM_CPUFEATURE_H
11 
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
14 
15 /*
16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
17  * in the kernel and for user space to keep track of which optional features
18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
19  * Note that HWCAP_x constants are bit fields so we need to take the log.
20  */
21 
22 #define MAX_CPU_FEATURES	(8 * sizeof(elf_hwcap))
23 #define cpu_feature(x)		ilog2(HWCAP_ ## x)
24 
25 #define ARM64_WORKAROUND_CLEAN_CACHE		0
26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE	1
27 #define ARM64_WORKAROUND_845719			2
28 #define ARM64_HAS_SYSREG_GIC_CPUIF		3
29 #define ARM64_HAS_PAN				4
30 #define ARM64_HAS_LSE_ATOMICS			5
31 #define ARM64_WORKAROUND_CAVIUM_23154		6
32 #define ARM64_WORKAROUND_834220			7
33 
34 #define ARM64_NCAPS				8
35 
36 #ifndef __ASSEMBLY__
37 
38 #include <linux/kernel.h>
39 
40 /* CPU feature register tracking */
41 enum ftr_type {
42 	FTR_EXACT,	/* Use a predefined safe value */
43 	FTR_LOWER_SAFE,	/* Smaller value is safe */
44 	FTR_HIGHER_SAFE,/* Bigger value is safe */
45 };
46 
47 #define FTR_STRICT	true	/* SANITY check strict matching required */
48 #define FTR_NONSTRICT	false	/* SANITY check ignored */
49 
50 struct arm64_ftr_bits {
51 	bool		strict;	  /* CPU Sanity check: strict matching required ? */
52 	enum ftr_type	type;
53 	u8		shift;
54 	u8		width;
55 	s64		safe_val; /* safe value for discrete features */
56 };
57 
58 /*
59  * @arm64_ftr_reg - Feature register
60  * @strict_mask		Bits which should match across all CPUs for sanity.
61  * @sys_val		Safe value across the CPUs (system view)
62  */
63 struct arm64_ftr_reg {
64 	u32			sys_id;
65 	const char		*name;
66 	u64			strict_mask;
67 	u64			sys_val;
68 	struct arm64_ftr_bits	*ftr_bits;
69 };
70 
71 struct arm64_cpu_capabilities {
72 	const char *desc;
73 	u16 capability;
74 	bool (*matches)(const struct arm64_cpu_capabilities *);
75 	void (*enable)(void *);		/* Called on all active CPUs */
76 	union {
77 		struct {	/* To be used for erratum handling only */
78 			u32 midr_model;
79 			u32 midr_range_min, midr_range_max;
80 		};
81 
82 		struct {	/* Feature register checking */
83 			u32 sys_reg;
84 			int field_pos;
85 			int min_field_value;
86 			int hwcap_type;
87 			unsigned long hwcap;
88 		};
89 	};
90 };
91 
92 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
93 
94 static inline bool cpu_have_feature(unsigned int num)
95 {
96 	return elf_hwcap & (1UL << num);
97 }
98 
99 static inline bool cpus_have_cap(unsigned int num)
100 {
101 	if (num >= ARM64_NCAPS)
102 		return false;
103 	return test_bit(num, cpu_hwcaps);
104 }
105 
106 static inline void cpus_set_cap(unsigned int num)
107 {
108 	if (num >= ARM64_NCAPS)
109 		pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
110 			num, ARM64_NCAPS);
111 	else
112 		__set_bit(num, cpu_hwcaps);
113 }
114 
115 static inline int __attribute_const__
116 cpuid_feature_extract_field_width(u64 features, int field, int width)
117 {
118 	return (s64)(features << (64 - width - field)) >> (64 - width);
119 }
120 
121 static inline int __attribute_const__
122 cpuid_feature_extract_field(u64 features, int field)
123 {
124 	return cpuid_feature_extract_field_width(features, field, 4);
125 }
126 
127 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
128 {
129 	return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
130 }
131 
132 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
133 {
134 	return cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width);
135 }
136 
137 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
138 {
139 	return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
140 		cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
141 }
142 
143 void __init setup_cpu_features(void);
144 
145 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
146 			    const char *info);
147 void check_local_cpu_errata(void);
148 
149 #ifdef CONFIG_HOTPLUG_CPU
150 void verify_local_cpu_capabilities(void);
151 #else
152 static inline void verify_local_cpu_capabilities(void)
153 {
154 }
155 #endif
156 
157 u64 read_system_reg(u32 id);
158 
159 static inline bool cpu_supports_mixed_endian_el0(void)
160 {
161 	return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
162 }
163 
164 static inline bool system_supports_mixed_endian_el0(void)
165 {
166 	return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
167 }
168 
169 #endif /* __ASSEMBLY__ */
170 
171 #endif
172