1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * SMARC GPIOs. 4 * 5 * Copyright (c) 2025 Kontron Europe GmbH 6 */ 7 8/dts-v1/; 9/plugin/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include "k3-pinctrl.h" 13 14&main_gpio0 { 15 pinctrl-names = "default"; 16 pinctrl-0 = <&main_gpio0_pins_default>; 17}; 18 19&main_gpio1 { 20 pinctrl-names = "default"; 21 pinctrl-0 = <&main_gpio1_pins_default>; 22}; 23 24&main_pmx0 { 25 main_gpio0_pins_default: main-gpio0-default-pins { 26 pinctrl-single,pins = < 27 J722S_IOPAD(0x0d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */ 28 J722S_IOPAD(0x0d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */ 29 J722S_IOPAD(0x118, PIN_INPUT, 7) /* (H26) MMC2_CLK.GPIO0_69 */ 30 J722S_IOPAD(0x120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ 31 >; 32 }; 33 34 main_gpio1_pins_default: main-gpio1-default-pins { 35 pinctrl-single,pins = < 36 J722S_IOPAD(0x194, PIN_INPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */ 37 J722S_IOPAD(0x198, PIN_INPUT, 7) /* (A26) MCASP0_AXR2.GPIO1_8 */ 38 J722S_IOPAD(0x1ac, PIN_INPUT, 7) /* (C27) MCASP0_AFSR.GPIO1_13 */ 39 J722S_IOPAD(0x1b0, PIN_INPUT, 7) /* (F24) MCASP0_ACLKR.GPIO1_14 */ 40 J722S_IOPAD(0x1d8, PIN_INPUT, 7) /* (D22) MCAN0_TX.GPIO1_24 */ 41 J722S_IOPAD(0x1dc, PIN_INPUT, 7) /* (C22) MCAN0_RX.GPIO1_25 */ 42 J722S_IOPAD(0x1e8, PIN_INPUT, 7) /* (C24) I2C1_SCL.GPIO1_28 */ 43 J722S_IOPAD(0x1ec, PIN_INPUT, 7) /* (A22) I2C1_SDA.GPIO1_29 */ 44 >; 45 }; 46}; 47 48&mcu_gpio0 { 49 pinctrl-names = "default"; 50 pinctrl-0 = <&mcu_gpio0_pins_default>; 51}; 52 53&mcu_pmx0 { 54 mcu_gpio0_pins_default: mcu-gpio0-default-pins { 55 pinctrl-single,pins = < 56 J722S_IOPAD(0x02c, PIN_INPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */ 57 J722S_IOPAD(0x084, PIN_INPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */ 58 >; 59 }; 60 61}; 62