1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2026 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/pinctrl/rockchip.h> 12#include <dt-bindings/soc/rockchip,vop2.h> 13#include "rk3576.dtsi" 14 15/ { 16 model = "Rockchip RK3576 EVB2 V10 Board"; 17 compatible = "rockchip,rk3576-evb2-v10", "rockchip,rk3576"; 18 19 aliases { 20 ethernet0 = &gmac0; 21 ethernet1 = &gmac1; 22 mmc0 = &sdhci; 23 mmc1 = &sdmmc; 24 }; 25 26 chosen { 27 stdout-path = "serial0:1500000n8"; 28 }; 29 30 dp-con { 31 compatible = "dp-connector"; 32 dp-pwr-supply = <&vcc3v3_dp_port>; 33 label = "DP OUT"; 34 type = "full-size"; 35 36 port { 37 dp0_con_in: endpoint { 38 remote-endpoint = <&dp0_out_con>; 39 }; 40 }; 41 }; 42 43 hdmi-con { 44 compatible = "hdmi-connector"; 45 type = "a"; 46 47 port { 48 hdmi_con_in: endpoint { 49 remote-endpoint = <&hdmi_out_con>; 50 }; 51 }; 52 }; 53 54 keys { 55 compatible = "adc-keys"; 56 io-channels = <&saradc 1>; 57 io-channel-names = "buttons"; 58 keyup-threshold-microvolt = <1800000>; 59 poll-interval = <100>; 60 61 button-back { 62 label = "back"; 63 linux,code = <KEY_BACK>; 64 press-threshold-microvolt = <1235000>; 65 }; 66 67 button-menu { 68 label = "menu"; 69 linux,code = <KEY_MENU>; 70 press-threshold-microvolt = <890000>; 71 }; 72 73 button-vol-down { 74 label = "volume down"; 75 linux,code = <KEY_VOLUMEDOWN>; 76 press-threshold-microvolt = <417000>; 77 }; 78 79 button-vol-up { 80 label = "volume up"; 81 linux,code = <KEY_VOLUMEUP>; 82 press-threshold-microvolt = <17000>; 83 }; 84 }; 85 86 leds { 87 compatible = "gpio-leds"; 88 89 work_led: led-0 { 90 gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 91 linux,default-trigger = "heartbeat"; 92 }; 93 }; 94 95 sdio_pwrseq: sdio-pwrseq { 96 compatible = "mmc-pwrseq-simple"; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&wifi_pwren>; 99 100 /* 101 * On the module itself this is one of these (depending 102 * on the actual card populated): 103 * - SDIO_RESET_L_WL_REG_ON 104 * - PDN (power down when low) 105 */ 106 post-power-on-delay-ms = <200>; 107 reset-gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; 108 }; 109 110 vbus5v0_usb0: regulator-vbus5v0-usb0 { 111 compatible = "regulator-fixed"; 112 regulator-name = "vcc5v0_usb3_host0"; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 enable-active-high; 116 gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; 117 vin-supply = <&vcc5v0_device>; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&usb_otg0_pwren>; 120 }; 121 122 vbus5v0_usb1: regulator-vcc5v0-usb1 { 123 compatible = "regulator-fixed"; 124 regulator-name = "vcc5v0_usb3_host1"; 125 regulator-min-microvolt = <5000000>; 126 regulator-max-microvolt = <5000000>; 127 enable-active-high; 128 gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; 129 vin-supply = <&vcc5v0_device>; 130 pinctrl-names = "default"; 131 pinctrl-0 = <&usb_host_pwren>; 132 }; 133 134 vcc12v_dcin: regulator-vcc12v-dcin { 135 compatible = "regulator-fixed"; 136 regulator-name = "vcc12v_dcin"; 137 regulator-always-on; 138 regulator-boot-on; 139 regulator-min-microvolt = <12000000>; 140 regulator-max-microvolt = <12000000>; 141 }; 142 143 vcc1v2_ufs_vccq_s0: regulator-vcc1v2-ufs-vccq-s0 { 144 compatible = "regulator-fixed"; 145 regulator-name = "vcc1v2_ufs_vccq_s0"; 146 regulator-boot-on; 147 regulator-always-on; 148 regulator-min-microvolt = <1200000>; 149 regulator-max-microvolt = <1200000>; 150 vin-supply = <&vcc_sys>; 151 }; 152 153 vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 { 154 compatible = "regulator-fixed"; 155 regulator-name = "vcc1v8_ufs_vccq2_s0"; 156 regulator-boot-on; 157 regulator-always-on; 158 regulator-min-microvolt = <1800000>; 159 regulator-max-microvolt = <1800000>; 160 vin-supply = <&vcc_1v8_s3>; 161 }; 162 163 vcc3v3_dp_port: regulator-vcc3v3-dp-port { 164 compatible = "regulator-fixed"; 165 regulator-name = "vcc3v3_dp_port"; 166 regulator-min-microvolt = <3300000>; 167 regulator-max-microvolt = <3300000>; 168 enable-active-high; 169 gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; 170 vin-supply = <&vcc_3v3_s3>; 171 pinctrl-names = "default"; 172 pinctrl-0 = <&image_pwren>; 173 }; 174 175 vcc3v3_pcie1: regulator-vcc3v3-pcie1 { 176 compatible = "regulator-fixed"; 177 regulator-name = "vcc3v3_pcie1"; 178 regulator-min-microvolt = <3300000>; 179 regulator-max-microvolt = <3300000>; 180 enable-active-high; 181 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 182 startup-delay-us = <5000>; 183 vin-supply = <&vcc12v_dcin>; 184 }; 185 186 vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 { 187 compatible = "regulator-fixed"; 188 regulator-name = "vcc3v3_rtc_s5"; 189 regulator-boot-on; 190 regulator-always-on; 191 regulator-min-microvolt = <3300000>; 192 regulator-max-microvolt = <3300000>; 193 vin-supply = <&vcc_sys>; 194 }; 195 196 vcc3v3_sata_pwren: vcc3v3-sata-pwren { 197 compatible = "regulator-fixed"; 198 regulator-name = "vcc3v3_satapm"; 199 enable-active-high; 200 gpio = <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>; 201 pinctrl-names = "default"; 202 pinctrl-0 = <&satapm_pwren>; 203 }; 204 205 vcc3v3_sd: regulator-vcc-3v3-sd { 206 compatible = "regulator-fixed"; 207 enable-active-high; 208 gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 209 pinctrl-names = "default"; 210 pinctrl-0 = <&sdmmc_pwren>; 211 regulator-name = "vcc3v3_sd"; 212 regulator-min-microvolt = <3300000>; 213 regulator-max-microvolt = <3300000>; 214 vin-supply = <&vcc_3v3_s0>; 215 }; 216 217 vcc5v0_device: regulator-vcc5v0-device { 218 compatible = "regulator-fixed"; 219 regulator-name = "vcc5v0_device"; 220 regulator-always-on; 221 regulator-boot-on; 222 regulator-min-microvolt = <5000000>; 223 regulator-max-microvolt = <5000000>; 224 vin-supply = <&vcc12v_dcin>; 225 }; 226 227 vcc_sys: regulator-vcc5v0-sys { 228 compatible = "regulator-fixed"; 229 regulator-name = "vcc_sys"; 230 regulator-always-on; 231 regulator-boot-on; 232 regulator-min-microvolt = <5000000>; 233 regulator-max-microvolt = <5000000>; 234 vin-supply = <&vcc12v_dcin>; 235 }; 236 237 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 238 compatible = "regulator-fixed"; 239 regulator-name = "vcc_1v1_nldo_s3"; 240 regulator-boot-on; 241 regulator-always-on; 242 regulator-min-microvolt = <1100000>; 243 regulator-max-microvolt = <1100000>; 244 vin-supply = <&vcc_sys>; 245 }; 246 247 vcc_1v8_s0: regulator-vcc-1v8-s0 { 248 compatible = "regulator-fixed"; 249 regulator-name = "vcc_1v8_s0"; 250 regulator-boot-on; 251 regulator-always-on; 252 regulator-min-microvolt = <1800000>; 253 regulator-max-microvolt = <1800000>; 254 vin-supply = <&vcc_1v8_s3>; 255 }; 256 257 vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { 258 compatible = "regulator-fixed"; 259 regulator-name = "vcc_2v0_pldo_s3"; 260 regulator-boot-on; 261 regulator-always-on; 262 regulator-min-microvolt = <2000000>; 263 regulator-max-microvolt = <2000000>; 264 vin-supply = <&vcc_sys>; 265 }; 266 267 vcc_3v3_s0: regulator-vcc-3v3-s0 { 268 compatible = "regulator-fixed"; 269 regulator-name = "vcc_3v3_s0"; 270 regulator-boot-on; 271 regulator-always-on; 272 regulator-min-microvolt = <3300000>; 273 regulator-max-microvolt = <3300000>; 274 vin-supply = <&vcc_3v3_s3>; 275 }; 276 277 vcc_ufs_s0: regulator-vcc-ufs-s0 { 278 compatible = "regulator-fixed"; 279 regulator-name = "vcc_ufs_s0"; 280 regulator-boot-on; 281 regulator-always-on; 282 regulator-min-microvolt = <3300000>; 283 regulator-max-microvolt = <3300000>; 284 vin-supply = <&vcc_sys>; 285 }; 286}; 287 288&cpu_l0 { 289 cpu-supply = <&vdd_cpu_lit_s0>; 290}; 291 292&cpu_l1 { 293 cpu-supply = <&vdd_cpu_lit_s0>; 294}; 295 296&cpu_l2 { 297 cpu-supply = <&vdd_cpu_lit_s0>; 298}; 299 300&cpu_l3 { 301 cpu-supply = <&vdd_cpu_lit_s0>; 302}; 303 304&cpu_b0 { 305 cpu-supply = <&vdd_cpu_big_s0>; 306}; 307 308&cpu_b1 { 309 cpu-supply = <&vdd_cpu_big_s0>; 310}; 311 312&cpu_b2 { 313 cpu-supply = <&vdd_cpu_big_s0>; 314}; 315 316&cpu_b3 { 317 cpu-supply = <&vdd_cpu_big_s0>; 318}; 319 320&combphy0_ps { 321 status = "okay"; 322}; 323 324&combphy1_psu { 325 status = "okay"; 326}; 327 328&dp { 329 pinctrl-0 = <&dpm0_pins>; 330 pinctrl-names = "default"; 331 status = "okay"; 332}; 333 334&dp0_in { 335 dp0_in_vp1: endpoint { 336 remote-endpoint = <&vp1_out_dp0>; 337 }; 338}; 339 340&dp0_out { 341 dp0_out_con: endpoint { 342 remote-endpoint = <&dp0_con_in>; 343 }; 344}; 345 346&gmac0 { 347 clock_in_out = "output"; 348 phy-mode = "rgmii-id"; 349 phy-handle = <&rgmii_phy0>; 350 pinctrl-names = "default"; 351 pinctrl-0 = <ð0m1_miim 352 ð0m1_tx_bus2 353 ð0m1_rx_bus2 354 ð0m1_rgmii_clk 355 ð0m1_rgmii_bus>; 356 status = "okay"; 357}; 358 359&gmac1 { 360 clock_in_out = "output"; 361 phy-handle = <&rgmii_phy1>; 362 phy-mode = "rgmii-id"; 363 pinctrl-names = "default"; 364 pinctrl-0 = <ð1m0_miim 365 ð1m0_tx_bus2 366 ð1m0_rx_bus2 367 ð1m0_rgmii_clk 368 ð1m0_rgmii_bus>; 369 status = "okay"; 370}; 371 372&gpu { 373 mali-supply = <&vdd_gpu_s0>; 374 status = "okay"; 375}; 376 377&hdmi { 378 status = "okay"; 379}; 380 381&hdmi_in { 382 hdmi_in_vp0: endpoint { 383 remote-endpoint = <&vp0_out_hdmi>; 384 }; 385}; 386 387&hdmi_out { 388 hdmi_out_con: endpoint { 389 remote-endpoint = <&hdmi_con_in>; 390 }; 391}; 392 393&hdmi_sound { 394 status = "okay"; 395}; 396 397&hdptxphy { 398 status = "okay"; 399}; 400 401&i2c1 { 402 status = "okay"; 403 404 rk806: pmic@23 { 405 compatible = "rockchip,rk806"; 406 reg = <0x23>; 407 interrupt-parent = <&gpio0>; 408 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 409 gpio-controller; 410 #gpio-cells = <2>; 411 pinctrl-names = "default"; 412 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 413 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 414 system-power-controller; 415 416 vcc1-supply = <&vcc_sys>; 417 vcc2-supply = <&vcc_sys>; 418 vcc3-supply = <&vcc_sys>; 419 vcc4-supply = <&vcc_sys>; 420 vcc5-supply = <&vcc_sys>; 421 vcc6-supply = <&vcc_sys>; 422 vcc7-supply = <&vcc_sys>; 423 vcc8-supply = <&vcc_sys>; 424 vcc9-supply = <&vcc_sys>; 425 vcc10-supply = <&vcc_sys>; 426 vcc11-supply = <&vcc_2v0_pldo_s3>; 427 vcc12-supply = <&vcc_sys>; 428 vcc13-supply = <&vcc_1v1_nldo_s3>; 429 vcc14-supply = <&vcc_1v1_nldo_s3>; 430 vcca-supply = <&vcc_sys>; 431 432 rk806_dvs1_null: dvs1-null-pins { 433 pins = "gpio_pwrctrl1"; 434 function = "pin_fun0"; 435 }; 436 437 rk806_dvs2_null: dvs2-null-pins { 438 pins = "gpio_pwrctrl2"; 439 function = "pin_fun0"; 440 }; 441 442 rk806_dvs3_null: dvs3-null-pins { 443 pins = "gpio_pwrctrl3"; 444 function = "pin_fun0"; 445 }; 446 447 rk806_dvs1_slp: dvs1-slp-pins { 448 pins = "gpio_pwrctrl1"; 449 function = "pin_fun1"; 450 }; 451 452 rk806_dvs1_pwrdn: dvs1-pwrdn-pins { 453 pins = "gpio_pwrctrl1"; 454 function = "pin_fun2"; 455 }; 456 457 rk806_dvs1_rst: dvs1-rst-pins { 458 pins = "gpio_pwrctrl1"; 459 function = "pin_fun3"; 460 }; 461 462 rk806_dvs2_slp: dvs2-slp-pins { 463 pins = "gpio_pwrctrl2"; 464 function = "pin_fun1"; 465 }; 466 467 rk806_dvs2_pwrdn: dvs2-pwrdn-pins { 468 pins = "gpio_pwrctrl2"; 469 function = "pin_fun2"; 470 }; 471 472 rk806_dvs2_rst: dvs2-rst-pins { 473 pins = "gpio_pwrctrl2"; 474 function = "pin_fun3"; 475 }; 476 477 rk806_dvs2_dvs: dvs2-dvs-pins { 478 pins = "gpio_pwrctrl2"; 479 function = "pin_fun4"; 480 }; 481 482 rk806_dvs2_gpio: dvs2-gpio-pins { 483 pins = "gpio_pwrctrl2"; 484 function = "pin_fun5"; 485 }; 486 487 rk806_dvs3_slp: dvs3-slp-pins { 488 pins = "gpio_pwrctrl3"; 489 function = "pin_fun1"; 490 }; 491 492 rk806_dvs3_pwrdn: dvs3-pwrdn-pins { 493 pins = "gpio_pwrctrl3"; 494 function = "pin_fun2"; 495 }; 496 497 rk806_dvs3_rst: dvs3-rst-pins { 498 pins = "gpio_pwrctrl3"; 499 function = "pin_fun3"; 500 }; 501 502 rk806_dvs3_dvs: dvs3-dvs-pins { 503 pins = "gpio_pwrctrl3"; 504 function = "pin_fun4"; 505 }; 506 507 rk806_dvs3_gpio: dvs3-gpio-pins { 508 pins = "gpio_pwrctrl3"; 509 function = "pin_fun5"; 510 }; 511 512 regulators { 513 vdd_cpu_big_s0: dcdc-reg1 { 514 regulator-always-on; 515 regulator-boot-on; 516 regulator-min-microvolt = <550000>; 517 regulator-max-microvolt = <950000>; 518 regulator-ramp-delay = <12500>; 519 regulator-name = "vdd_cpu_big_s0"; 520 regulator-enable-ramp-delay = <400>; 521 522 regulator-state-mem { 523 regulator-off-in-suspend; 524 }; 525 }; 526 527 vdd_npu_s0: dcdc-reg2 { 528 regulator-boot-on; 529 regulator-min-microvolt = <550000>; 530 regulator-max-microvolt = <950000>; 531 regulator-ramp-delay = <12500>; 532 regulator-name = "vdd_npu_s0"; 533 regulator-enable-ramp-delay = <400>; 534 535 regulator-state-mem { 536 regulator-off-in-suspend; 537 }; 538 }; 539 540 vdd_cpu_lit_s0: dcdc-reg3 { 541 regulator-always-on; 542 regulator-boot-on; 543 regulator-min-microvolt = <550000>; 544 regulator-max-microvolt = <950000>; 545 regulator-ramp-delay = <12500>; 546 regulator-name = "vdd_cpu_lit_s0"; 547 548 regulator-state-mem { 549 regulator-off-in-suspend; 550 regulator-suspend-microvolt = <750000>; 551 }; 552 }; 553 554 vcc_3v3_s3: dcdc-reg4 { 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <3300000>; 558 regulator-max-microvolt = <3300000>; 559 regulator-name = "vcc_3v3_s3"; 560 561 regulator-state-mem { 562 regulator-on-in-suspend; 563 regulator-suspend-microvolt = <3300000>; 564 }; 565 }; 566 567 vdd_gpu_s0: dcdc-reg5 { 568 regulator-boot-on; 569 regulator-min-microvolt = <550000>; 570 regulator-max-microvolt = <900000>; 571 regulator-ramp-delay = <12500>; 572 regulator-name = "vdd_gpu_s0"; 573 regulator-enable-ramp-delay = <400>; 574 575 regulator-state-mem { 576 regulator-off-in-suspend; 577 regulator-suspend-microvolt = <850000>; 578 }; 579 }; 580 581 vddq_ddr_s0: dcdc-reg6 { 582 regulator-always-on; 583 regulator-boot-on; 584 regulator-name = "vddq_ddr_s0"; 585 586 regulator-state-mem { 587 regulator-off-in-suspend; 588 }; 589 }; 590 591 vdd_logic_s0: dcdc-reg7 { 592 regulator-always-on; 593 regulator-boot-on; 594 regulator-min-microvolt = <550000>; 595 regulator-max-microvolt = <800000>; 596 regulator-name = "vdd_logic_s0"; 597 598 regulator-state-mem { 599 regulator-off-in-suspend; 600 }; 601 }; 602 603 vcc_1v8_s3: dcdc-reg8 { 604 regulator-always-on; 605 regulator-boot-on; 606 regulator-min-microvolt = <1800000>; 607 regulator-max-microvolt = <1800000>; 608 regulator-name = "vcc_1v8_s3"; 609 610 regulator-state-mem { 611 regulator-on-in-suspend; 612 regulator-suspend-microvolt = <1800000>; 613 }; 614 }; 615 616 vdd2_ddr_s3: dcdc-reg9 { 617 regulator-always-on; 618 regulator-boot-on; 619 regulator-name = "vdd2_ddr_s3"; 620 621 regulator-state-mem { 622 regulator-on-in-suspend; 623 }; 624 }; 625 626 vdd_ddr_s0: dcdc-reg10 { 627 regulator-always-on; 628 regulator-boot-on; 629 regulator-min-microvolt = <550000>; 630 regulator-max-microvolt = <1200000>; 631 regulator-name = "vdd_ddr_s0"; 632 633 regulator-state-mem { 634 regulator-off-in-suspend; 635 }; 636 }; 637 638 vcca_1v8_s0: pldo-reg1 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <1800000>; 642 regulator-max-microvolt = <1800000>; 643 regulator-name = "vcca_1v8_s0"; 644 645 regulator-state-mem { 646 regulator-off-in-suspend; 647 }; 648 }; 649 650 vcca1v8_pldo2_s0: pldo-reg2 { 651 regulator-always-on; 652 regulator-boot-on; 653 regulator-min-microvolt = <1800000>; 654 regulator-max-microvolt = <1800000>; 655 regulator-name = "vcca1v8_pldo2_s0"; 656 657 regulator-state-mem { 658 regulator-off-in-suspend; 659 }; 660 }; 661 662 vdda_1v2_s0: pldo-reg3 { 663 regulator-always-on; 664 regulator-boot-on; 665 regulator-min-microvolt = <1200000>; 666 regulator-max-microvolt = <1200000>; 667 regulator-name = "vdda_1v2_s0"; 668 669 regulator-state-mem { 670 regulator-off-in-suspend; 671 }; 672 }; 673 674 vcca_3v3_s0: pldo-reg4 { 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <3300000>; 678 regulator-max-microvolt = <3300000>; 679 regulator-name = "vcca_3v3_s0"; 680 681 regulator-state-mem { 682 regulator-off-in-suspend; 683 }; 684 }; 685 686 vccio_sd_s0: pldo-reg5 { 687 regulator-always-on; 688 regulator-boot-on; 689 regulator-min-microvolt = <1800000>; 690 regulator-max-microvolt = <3300000>; 691 regulator-name = "vccio_sd_s0"; 692 693 regulator-state-mem { 694 regulator-off-in-suspend; 695 }; 696 }; 697 698 vcca1v8_pldo6_s3: pldo-reg6 { 699 regulator-always-on; 700 regulator-boot-on; 701 regulator-min-microvolt = <1800000>; 702 regulator-max-microvolt = <1800000>; 703 regulator-name = "vcca1v8_pldo6_s3"; 704 705 regulator-state-mem { 706 regulator-on-in-suspend; 707 regulator-suspend-microvolt = <1800000>; 708 }; 709 }; 710 711 vdd_0v75_s3: nldo-reg1 { 712 regulator-always-on; 713 regulator-boot-on; 714 regulator-min-microvolt = <550000>; 715 regulator-max-microvolt = <750000>; 716 regulator-name = "vdd_0v75_s3"; 717 718 regulator-state-mem { 719 regulator-on-in-suspend; 720 regulator-suspend-microvolt = <750000>; 721 }; 722 }; 723 724 vdda_ddr_pll_s0: nldo-reg2 { 725 regulator-always-on; 726 regulator-boot-on; 727 regulator-min-microvolt = <850000>; 728 regulator-max-microvolt = <850000>; 729 regulator-name = "vdda_ddr_pll_s0"; 730 731 regulator-state-mem { 732 regulator-off-in-suspend; 733 }; 734 }; 735 736 vdda0v75_hdmi_s0: nldo-reg3 { 737 regulator-boot-on; 738 regulator-min-microvolt = <837500>; 739 regulator-max-microvolt = <837500>; 740 regulator-name = "vdda0v75_hdmi_s0"; 741 742 regulator-state-mem { 743 regulator-off-in-suspend; 744 }; 745 }; 746 747 vdda_0v85_s0: nldo-reg4 { 748 regulator-always-on; 749 regulator-boot-on; 750 regulator-min-microvolt = <850000>; 751 regulator-max-microvolt = <850000>; 752 regulator-name = "vdda_0v85_s0"; 753 754 regulator-state-mem { 755 regulator-off-in-suspend; 756 }; 757 }; 758 759 vdda_0v75_s0: nldo-reg5 { 760 regulator-always-on; 761 regulator-boot-on; 762 regulator-min-microvolt = <750000>; 763 regulator-max-microvolt = <750000>; 764 regulator-name = "vdda_0v75_s0"; 765 766 regulator-state-mem { 767 regulator-off-in-suspend; 768 }; 769 }; 770 }; 771 }; 772}; 773 774&i2c2 { 775 status = "okay"; 776 777 hym8563: rtc@51 { 778 compatible = "haoyu,hym8563"; 779 reg = <0x51>; 780 clock-output-names = "hym8563"; 781 interrupt-parent = <&gpio0>; 782 interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; 783 pinctrl-names = "default"; 784 pinctrl-0 = <&rtc_int>; 785 wakeup-source; 786 #clock-cells = <0>; 787 }; 788}; 789 790&mdio0 { 791 rgmii_phy0: ethernet-phy@1 { 792 compatible = "ethernet-phy-ieee802.3-c22"; 793 reg = <0x1>; 794 pinctrl-names = "default"; 795 pinctrl-0 = <&rgmii_phy0_rst>; 796 reset-assert-us = <20000>; 797 reset-deassert-us = <100000>; 798 reset-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; 799 }; 800}; 801 802&mdio1 { 803 rgmii_phy1: ethernet-phy@1 { 804 compatible = "ethernet-phy-ieee802.3-c22"; 805 reg = <0x1>; 806 pinctrl-names = "default"; 807 pinctrl-0 = <&rgmii_phy1_rst>; 808 reset-assert-us = <20000>; 809 reset-deassert-us = <100000>; 810 reset-gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>; 811 }; 812}; 813 814&pinctrl { 815 bluetooth { 816 bt_reg_on: bt-reg-on { 817 rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 818 }; 819 820 bt_wake_host: bt-wake-host { 821 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>; 822 }; 823 824 host_wake_bt: host-wake-bt { 825 rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 826 }; 827 }; 828 829 dp { 830 image_pwren: image-pwren { 831 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 832 }; 833 }; 834 835 hym8563 { 836 rtc_int: rtc-int { 837 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 838 }; 839 }; 840 841 network { 842 rgmii_phy0_rst: rgmii-phy0-rst { 843 rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 844 }; 845 846 rgmii_phy1_rst: rgmii-phy1-rst { 847 rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 848 }; 849 }; 850 851 pcie1 { 852 pcie1_rst: pcie1-rst { 853 rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 854 }; 855 }; 856 857 sata { 858 satapm_pwren: satapm-pwren { 859 rockchip,pins = <4 RK_PC7 RK_FUNC_GPIO &pcfg_output_high>; 860 }; 861 }; 862 863 sdmmc { 864 sdmmc_pwren: sdmmc-pwren { 865 rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 866 }; 867 }; 868 869 usb { 870 usb_host_pwren: usb-host-pwren { 871 rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 872 }; 873 874 usb_hub_reset: usb-hub-reset { 875 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 876 }; 877 878 usb_otg0_pwren: usb-otg0-pwren { 879 rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 880 }; 881 }; 882 883 wifi { 884 wifi_host_wake: wifi-host-wake { 885 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; 886 }; 887 888 wifi_pwren: wifi-pwren { 889 rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 890 }; 891 }; 892}; 893 894&sai6 { 895 status = "okay"; 896}; 897 898&saradc { 899 vref-supply = <&vcca_1v8_s0>; 900 status = "okay"; 901}; 902 903&sata0 { 904 target-supply = <&vcc3v3_sata_pwren>; 905 status = "okay"; 906}; 907 908&sdio { 909 #address-cells = <1>; 910 #size-cells = <0>; 911 bus-width = <4>; 912 cap-sd-highspeed; 913 cap-sdio-irq; 914 keep-power-in-suspend; 915 max-frequency = <150000000>; 916 mmc-pwrseq = <&sdio_pwrseq>; 917 no-sd; 918 no-mmc; 919 non-removable; 920 pinctrl-names = "default"; 921 pinctrl-0 = <&sdmmc1m0_bus4 &sdmmc1m0_clk &sdmmc1m0_cmd>; 922 sd-uhs-sdr104; 923 status = "okay"; 924 925 brcmf: wifi@1 { 926 compatible = "brcm,bcm4329-fmac"; 927 reg = <1>; 928 interrupt-parent = <&gpio0>; 929 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 930 interrupt-names = "host-wake"; 931 pinctrl-names = "default"; 932 pinctrl-0 = <&wifi_host_wake>; 933 }; 934}; 935 936&sdhci { 937 bus-width = <8>; 938 full-pwr-cycle-in-suspend; 939 mmc-hs400-1_8v; 940 mmc-hs400-enhanced-strobe; 941 no-sdio; 942 no-sd; 943 non-removable; 944 status = "okay"; 945}; 946 947&sdmmc { 948 bus-width = <4>; 949 cap-sd-highspeed; 950 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 951 disable-wp; 952 no-sdio; 953 no-mmc; 954 pinctrl-names = "default"; 955 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>; 956 sd-uhs-sdr104; 957 vmmc-supply = <&vcc3v3_sd>; 958 vqmmc-supply = <&vccio_sd_s0>; 959 status = "okay"; 960}; 961 962&u2phy0 { 963 status = "okay"; 964}; 965 966&u2phy0_otg { 967 phy-supply = <&vbus5v0_usb0>; 968 status = "okay"; 969}; 970 971&u2phy1 { 972 status = "okay"; 973}; 974 975&u2phy1_otg { 976 phy-supply = <&vbus5v0_usb1>; 977 status = "okay"; 978}; 979 980&uart0 { 981 status = "okay"; 982}; 983 984&uart4 { 985 pinctrl-0 = <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>; 986 pinctrl-names = "default"; 987 uart-has-rtscts; 988 status = "okay"; 989 990 bluetooth { 991 compatible = "brcm,bcm43438-bt"; 992 clocks = <&hym8563>; 993 clock-names = "lpo"; 994 device-wakeup-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 995 interrupt-parent = <&gpio0>; 996 interrupts = <RK_PB1 IRQ_TYPE_LEVEL_HIGH>; 997 pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>; 998 pinctrl-names = "default"; 999 shutdown-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; 1000 vbat-supply = <&vcc_3v3_s3>; 1001 vddio-supply = <&vcc_1v8_s3>; 1002 }; 1003}; 1004 1005&ufshc { 1006 vcc-supply = <&vcc_ufs_s0>; 1007 vccq-supply = <&vcc1v2_ufs_vccq_s0>; 1008 vccq2-supply = <&vcc1v8_ufs_vccq2_s0>; 1009 status = "okay"; 1010}; 1011 1012&usbdp_phy { 1013 rockchip,dp-lane-mux = <2 3>; 1014 status = "okay"; 1015}; 1016 1017&usb_drd0_dwc3 { 1018 dr_mode = "otg"; 1019 extcon = <&u2phy0>; 1020 status = "okay"; 1021}; 1022 1023&usb_drd1_dwc3 { 1024 dr_mode = "host"; 1025 pinctrl-names = "default"; 1026 pinctrl-0 = <&usb_hub_reset>; 1027 #address-cells = <1>; 1028 #size-cells = <0>; 1029 status = "okay"; 1030 1031 hub_2_0: hub@1 { 1032 compatible = "usb1a86,8091"; 1033 reg = <1>; 1034 reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; 1035 v5-supply = <&vcc_3v3_s0>; 1036 vdd33-supply = <&vcc_3v3_s0>; 1037 }; 1038}; 1039 1040&vop { 1041 /* 1042 * If no dedicated PLL was specified, the GPLL would be automatically 1043 * assigned as the PLL source for dclk_vp1_src. As the frequency of GPLL 1044 * is 1188 MHz, we can only get typical clock frequencies such as 1045 * 74.25MHz, 148.5MHz, 297MHz, 594MHz. 1046 * 1047 * So here we set the parent clock of VP1 to VPLL so that we can get 1048 * any frequency. 1049 */ 1050 assigned-clocks = <&cru DCLK_VP1_SRC>; 1051 assigned-clock-parents = <&cru PLL_VPLL>; 1052 status = "okay"; 1053}; 1054 1055&vop_mmu { 1056 status = "okay"; 1057}; 1058 1059&vp0 { 1060 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 1061 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 1062 remote-endpoint = <&hdmi_in_vp0>; 1063 }; 1064}; 1065 1066&vp1 { 1067 vp1_out_dp0: endpoint@a { 1068 reg = <ROCKCHIP_VOP2_EP_DP0>; 1069 remote-endpoint = <&dp0_in_vp1>; 1070 }; 1071}; 1072