1*b6bb8a10SBiju Das// SPDX-License-Identifier: GPL-2.0 2*b6bb8a10SBiju Das/* 3*b6bb8a10SBiju Das * Device Tree Source for the Advantech idk-1110wr LVDS panel connected 4*b6bb8a10SBiju Das * to RZ/G2 boards 5*b6bb8a10SBiju Das * 6*b6bb8a10SBiju Das * Copyright (C) 2019 Renesas Electronics Corp. 7*b6bb8a10SBiju Das */ 8*b6bb8a10SBiju Das 9*b6bb8a10SBiju Das/ { 10*b6bb8a10SBiju Das panel-lvds { 11*b6bb8a10SBiju Das compatible = "advantech,idk-1110wr", "panel-lvds"; 12*b6bb8a10SBiju Das 13*b6bb8a10SBiju Das width-mm = <223>; 14*b6bb8a10SBiju Das height-mm = <125>; 15*b6bb8a10SBiju Das 16*b6bb8a10SBiju Das data-mapping = "jeida-24"; 17*b6bb8a10SBiju Das 18*b6bb8a10SBiju Das panel-timing { 19*b6bb8a10SBiju Das /* 1024x600 @60Hz */ 20*b6bb8a10SBiju Das clock-frequency = <51200000>; 21*b6bb8a10SBiju Das hactive = <1024>; 22*b6bb8a10SBiju Das vactive = <600>; 23*b6bb8a10SBiju Das hsync-len = <240>; 24*b6bb8a10SBiju Das hfront-porch = <40>; 25*b6bb8a10SBiju Das hback-porch = <40>; 26*b6bb8a10SBiju Das vfront-porch = <15>; 27*b6bb8a10SBiju Das vback-porch = <10>; 28*b6bb8a10SBiju Das vsync-len = <10>; 29*b6bb8a10SBiju Das }; 30*b6bb8a10SBiju Das 31*b6bb8a10SBiju Das port { 32*b6bb8a10SBiju Das panel_in: endpoint { 33*b6bb8a10SBiju Das remote-endpoint = <&lvds_connector>; 34*b6bb8a10SBiju Das }; 35*b6bb8a10SBiju Das }; 36*b6bb8a10SBiju Das }; 37*b6bb8a10SBiju Das}; 38*b6bb8a10SBiju Das 39*b6bb8a10SBiju Das&lvds_connector { 40*b6bb8a10SBiju Das remote-endpoint = <&panel_in>; 41*b6bb8a10SBiju Das}; 42