10dcd27bdSDong Aisheng// SPDX-License-Identifier: GPL-2.0+ 20dcd27bdSDong Aisheng/* 30dcd27bdSDong Aisheng * Copyright 2018-2019 NXP 40dcd27bdSDong Aisheng * Dong Aisheng <aisheng.dong@nxp.com> 50dcd27bdSDong Aisheng */ 60dcd27bdSDong Aisheng 79de8a226SDong Aisheng#include <dt-bindings/clock/imx8-lpcg.h> 89de8a226SDong Aisheng#include <dt-bindings/firmware/imx/rsrc.h> 99de8a226SDong Aisheng 109de8a226SDong Aishengconn_axi_clk: clock-conn-axi { 119de8a226SDong Aisheng compatible = "fixed-clock"; 129de8a226SDong Aisheng #clock-cells = <0>; 139de8a226SDong Aisheng clock-frequency = <333333333>; 149de8a226SDong Aisheng clock-output-names = "conn_axi_clk"; 159de8a226SDong Aisheng}; 169de8a226SDong Aisheng 179de8a226SDong Aishengconn_ahb_clk: clock-conn-ahb { 189de8a226SDong Aisheng compatible = "fixed-clock"; 199de8a226SDong Aisheng #clock-cells = <0>; 209de8a226SDong Aisheng clock-frequency = <166666666>; 219de8a226SDong Aisheng clock-output-names = "conn_ahb_clk"; 229de8a226SDong Aisheng}; 239de8a226SDong Aisheng 249de8a226SDong Aishengconn_ipg_clk: clock-conn-ipg { 259de8a226SDong Aisheng compatible = "fixed-clock"; 269de8a226SDong Aisheng #clock-cells = <0>; 279de8a226SDong Aisheng clock-frequency = <83333333>; 289de8a226SDong Aisheng clock-output-names = "conn_ipg_clk"; 290dcd27bdSDong Aisheng}; 300dcd27bdSDong Aisheng 31*f1cc2d88SFrank Liconn_bch_clk: clock-conn-bch { 32*f1cc2d88SFrank Li compatible = "fixed-clock"; 33*f1cc2d88SFrank Li #clock-cells = <0>; 34*f1cc2d88SFrank Li clock-frequency = <400000000>; 35*f1cc2d88SFrank Li clock-output-names = "conn_bch_clk"; 36*f1cc2d88SFrank Li}; 37*f1cc2d88SFrank Li 38efee26c7SFabio Estevamconn_subsys: bus@5b000000 { 39efee26c7SFabio Estevam compatible = "simple-bus"; 40efee26c7SFabio Estevam #address-cells = <1>; 41efee26c7SFabio Estevam #size-cells = <1>; 42efee26c7SFabio Estevam ranges = <0x5b000000 0x0 0x5b000000 0x1000000>; 43efee26c7SFabio Estevam 448065fc93SFrank Li usbotg1: usb@5b0d0000 { 45276dd9a6SPeng Fan compatible = "fsl,imx7ulp-usb", "fsl,imx6ul-usb", "fsl,imx27-usb"; 468065fc93SFrank Li reg = <0x5b0d0000 0x200>; 478065fc93SFrank Li interrupt-parent = <&gic>; 488065fc93SFrank Li interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 498065fc93SFrank Li fsl,usbphy = <&usbphy1>; 508065fc93SFrank Li fsl,usbmisc = <&usbmisc1 0>; 51808e7716SFrank Li clocks = <&usb2_lpcg IMX_LPCG_CLK_6>; 528065fc93SFrank Li ahb-burst-config = <0x0>; 538065fc93SFrank Li tx-burst-size-dword = <0x10>; 548065fc93SFrank Li rx-burst-size-dword = <0x10>; 558065fc93SFrank Li power-domains = <&pd IMX_SC_R_USB_0>; 568065fc93SFrank Li status = "disabled"; 578065fc93SFrank Li }; 588065fc93SFrank Li 598065fc93SFrank Li usbmisc1: usbmisc@5b0d0200 { 608065fc93SFrank Li #index-cells = <1>; 61276dd9a6SPeng Fan compatible = "fsl,imx7ulp-usbmisc", "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc"; 628065fc93SFrank Li reg = <0x5b0d0200 0x200>; 638065fc93SFrank Li }; 648065fc93SFrank Li 658065fc93SFrank Li usbphy1: usbphy@5b100000 { 668065fc93SFrank Li compatible = "fsl,imx7ulp-usbphy"; 678065fc93SFrank Li reg = <0x5b100000 0x1000>; 68808e7716SFrank Li clocks = <&usb2_lpcg IMX_LPCG_CLK_7>; 698065fc93SFrank Li power-domains = <&pd IMX_SC_R_USB_0_PHY>; 708065fc93SFrank Li status = "disabled"; 718065fc93SFrank Li }; 728065fc93SFrank Li 730dcd27bdSDong Aisheng usdhc1: mmc@5b010000 { 740dcd27bdSDong Aisheng interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; 750dcd27bdSDong Aisheng reg = <0x5b010000 0x10000>; 7616c4ea75SDong Aisheng clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>, 77c6ddd6e7SFrank Li <&sdhc0_lpcg IMX_LPCG_CLK_5>, 78c6ddd6e7SFrank Li <&sdhc0_lpcg IMX_LPCG_CLK_0>; 7906acb824SPeng Fan clock-names = "ipg", "ahb", "per"; 800dcd27bdSDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_0>; 810dcd27bdSDong Aisheng status = "disabled"; 820dcd27bdSDong Aisheng }; 830dcd27bdSDong Aisheng 840dcd27bdSDong Aisheng usdhc2: mmc@5b020000 { 850dcd27bdSDong Aisheng interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; 860dcd27bdSDong Aisheng reg = <0x5b020000 0x10000>; 8716c4ea75SDong Aisheng clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>, 88c6ddd6e7SFrank Li <&sdhc1_lpcg IMX_LPCG_CLK_5>, 89c6ddd6e7SFrank Li <&sdhc1_lpcg IMX_LPCG_CLK_0>; 9006acb824SPeng Fan clock-names = "ipg", "ahb", "per"; 910dcd27bdSDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_1>; 920dcd27bdSDong Aisheng fsl,tuning-start-tap = <20>; 930dcd27bdSDong Aisheng fsl,tuning-step = <2>; 940dcd27bdSDong Aisheng status = "disabled"; 950dcd27bdSDong Aisheng }; 960dcd27bdSDong Aisheng 970dcd27bdSDong Aisheng usdhc3: mmc@5b030000 { 980dcd27bdSDong Aisheng interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; 990dcd27bdSDong Aisheng reg = <0x5b030000 0x10000>; 10016c4ea75SDong Aisheng clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>, 101c6ddd6e7SFrank Li <&sdhc2_lpcg IMX_LPCG_CLK_5>, 102c6ddd6e7SFrank Li <&sdhc2_lpcg IMX_LPCG_CLK_0>; 10306acb824SPeng Fan clock-names = "ipg", "ahb", "per"; 1040dcd27bdSDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_2>; 1050dcd27bdSDong Aisheng status = "disabled"; 1060dcd27bdSDong Aisheng }; 1070dcd27bdSDong Aisheng 1080dcd27bdSDong Aisheng fec1: ethernet@5b040000 { 1090dcd27bdSDong Aisheng reg = <0x5b040000 0x10000>; 1100dcd27bdSDong Aisheng interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, 1110dcd27bdSDong Aisheng <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1120dcd27bdSDong Aisheng <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, 1130dcd27bdSDong Aisheng <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>; 11416c4ea75SDong Aisheng clocks = <&enet0_lpcg IMX_LPCG_CLK_4>, 11516c4ea75SDong Aisheng <&enet0_lpcg IMX_LPCG_CLK_2>, 116dfda1fd1SDong Aisheng <&enet0_lpcg IMX_LPCG_CLK_3>, 11716c4ea75SDong Aisheng <&enet0_lpcg IMX_LPCG_CLK_0>; 1180dcd27bdSDong Aisheng clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; 119dfda1fd1SDong Aisheng assigned-clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, 120dfda1fd1SDong Aisheng <&clk IMX_SC_R_ENET_0 IMX_SC_C_CLKDIV>; 121dfda1fd1SDong Aisheng assigned-clock-rates = <250000000>, <125000000>; 1220dcd27bdSDong Aisheng fsl,num-tx-queues = <3>; 1230dcd27bdSDong Aisheng fsl,num-rx-queues = <3>; 1240dcd27bdSDong Aisheng power-domains = <&pd IMX_SC_R_ENET_0>; 1250dcd27bdSDong Aisheng status = "disabled"; 1260dcd27bdSDong Aisheng }; 1270dcd27bdSDong Aisheng 1280dcd27bdSDong Aisheng fec2: ethernet@5b050000 { 1290dcd27bdSDong Aisheng reg = <0x5b050000 0x10000>; 1300dcd27bdSDong Aisheng interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 1310dcd27bdSDong Aisheng <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 1320dcd27bdSDong Aisheng <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 1330dcd27bdSDong Aisheng <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 13416c4ea75SDong Aisheng clocks = <&enet1_lpcg IMX_LPCG_CLK_4>, 13516c4ea75SDong Aisheng <&enet1_lpcg IMX_LPCG_CLK_2>, 136dfda1fd1SDong Aisheng <&enet1_lpcg IMX_LPCG_CLK_3>, 13716c4ea75SDong Aisheng <&enet1_lpcg IMX_LPCG_CLK_0>; 1380dcd27bdSDong Aisheng clock-names = "ipg", "ahb", "enet_clk_ref", "ptp"; 139dfda1fd1SDong Aisheng assigned-clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, 140dfda1fd1SDong Aisheng <&clk IMX_SC_R_ENET_1 IMX_SC_C_CLKDIV>; 141dfda1fd1SDong Aisheng assigned-clock-rates = <250000000>, <125000000>; 1420dcd27bdSDong Aisheng fsl,num-tx-queues = <3>; 1430dcd27bdSDong Aisheng fsl,num-rx-queues = <3>; 1440dcd27bdSDong Aisheng power-domains = <&pd IMX_SC_R_ENET_1>; 1450dcd27bdSDong Aisheng status = "disabled"; 1460dcd27bdSDong Aisheng }; 1479de8a226SDong Aisheng 148a8bd7f15SFrank Li usbotg3: usb@5b110000 { 149a8bd7f15SFrank Li compatible = "fsl,imx8qm-usb3"; 150a8bd7f15SFrank Li reg = <0x5b110000 0x10000>; 151a8bd7f15SFrank Li #address-cells = <1>; 152a8bd7f15SFrank Li #size-cells = <1>; 153a8bd7f15SFrank Li ranges; 154a8bd7f15SFrank Li clocks = <&usb3_lpcg IMX_LPCG_CLK_1>, 155a8bd7f15SFrank Li <&usb3_lpcg IMX_LPCG_CLK_0>, 156a8bd7f15SFrank Li <&usb3_lpcg IMX_LPCG_CLK_7>, 157a8bd7f15SFrank Li <&usb3_lpcg IMX_LPCG_CLK_4>, 158a8bd7f15SFrank Li <&usb3_lpcg IMX_LPCG_CLK_5>; 159a8bd7f15SFrank Li clock-names = "lpm", "bus", "aclk", "ipg", "core"; 160a8bd7f15SFrank Li assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>; 161a8bd7f15SFrank Li assigned-clock-rates = <250000000>; 162a8bd7f15SFrank Li power-domains = <&pd IMX_SC_R_USB_2>; 163a8bd7f15SFrank Li status = "disabled"; 164a8bd7f15SFrank Li 165a8bd7f15SFrank Li usbotg3_cdns3: usb@5b120000 { 166a8bd7f15SFrank Li compatible = "cdns,usb3"; 1676b15a78fSAlexander Stein reg = <0x5b120000 0x10000>, /* memory area for OTG/DRD registers */ 1686b15a78fSAlexander Stein <0x5b130000 0x10000>, /* memory area for HOST registers */ 1696b15a78fSAlexander Stein <0x5b140000 0x10000>; /* memory area for DEVICE registers */ 1706b15a78fSAlexander Stein reg-names = "otg", "xhci", "dev"; 171a8bd7f15SFrank Li interrupt-parent = <&gic>; 172a8bd7f15SFrank Li interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 173a8bd7f15SFrank Li <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 174a8bd7f15SFrank Li <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 175a8bd7f15SFrank Li <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>; 176a8bd7f15SFrank Li interrupt-names = "host", "peripheral", "otg", "wakeup"; 177a8bd7f15SFrank Li phys = <&usb3_phy>; 178a8bd7f15SFrank Li phy-names = "cdns3,usb3-phy"; 1790f554e37SFrank Li cdns,on-chip-buff-size = /bits/ 16 <18>; 180a8bd7f15SFrank Li status = "disabled"; 181a8bd7f15SFrank Li }; 182a8bd7f15SFrank Li }; 183a8bd7f15SFrank Li 184a8bd7f15SFrank Li usb3_phy: usb-phy@5b160000 { 185a8bd7f15SFrank Li compatible = "nxp,salvo-phy"; 186a8bd7f15SFrank Li reg = <0x5b160000 0x40000>; 187a8bd7f15SFrank Li clocks = <&usb3_lpcg IMX_LPCG_CLK_6>; 188a8bd7f15SFrank Li clock-names = "salvo_phy_clk"; 189a8bd7f15SFrank Li power-domains = <&pd IMX_SC_R_USB_2_PHY>; 190a8bd7f15SFrank Li #phy-cells = <0>; 191a8bd7f15SFrank Li status = "disabled"; 192a8bd7f15SFrank Li }; 193a8bd7f15SFrank Li 1949de8a226SDong Aisheng /* LPCG clocks */ 1959de8a226SDong Aisheng sdhc0_lpcg: clock-controller@5b200000 { 19616c4ea75SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 1979de8a226SDong Aisheng reg = <0x5b200000 0x10000>; 1989de8a226SDong Aisheng #clock-cells = <1>; 19926de33a1SDong Aisheng clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>, 2009de8a226SDong Aisheng <&conn_ipg_clk>, <&conn_axi_clk>; 2019de8a226SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>, 2029de8a226SDong Aisheng <IMX_LPCG_CLK_5>; 2039de8a226SDong Aisheng clock-output-names = "sdhc0_lpcg_per_clk", 2049de8a226SDong Aisheng "sdhc0_lpcg_ipg_clk", 2059de8a226SDong Aisheng "sdhc0_lpcg_ahb_clk"; 2069de8a226SDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_0>; 2079de8a226SDong Aisheng }; 2089de8a226SDong Aisheng 2099de8a226SDong Aisheng sdhc1_lpcg: clock-controller@5b210000 { 21016c4ea75SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 2119de8a226SDong Aisheng reg = <0x5b210000 0x10000>; 2129de8a226SDong Aisheng #clock-cells = <1>; 21326de33a1SDong Aisheng clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>, 2149de8a226SDong Aisheng <&conn_ipg_clk>, <&conn_axi_clk>; 2159de8a226SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>, 2169de8a226SDong Aisheng <IMX_LPCG_CLK_5>; 2179de8a226SDong Aisheng clock-output-names = "sdhc1_lpcg_per_clk", 2189de8a226SDong Aisheng "sdhc1_lpcg_ipg_clk", 2199de8a226SDong Aisheng "sdhc1_lpcg_ahb_clk"; 2209de8a226SDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_1>; 2219de8a226SDong Aisheng }; 2229de8a226SDong Aisheng 2239de8a226SDong Aisheng sdhc2_lpcg: clock-controller@5b220000 { 22416c4ea75SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 2259de8a226SDong Aisheng reg = <0x5b220000 0x10000>; 2269de8a226SDong Aisheng #clock-cells = <1>; 22726de33a1SDong Aisheng clocks = <&clk IMX_SC_R_SDHC_2 IMX_SC_PM_CLK_PER>, 2289de8a226SDong Aisheng <&conn_ipg_clk>, <&conn_axi_clk>; 2299de8a226SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>, 2309de8a226SDong Aisheng <IMX_LPCG_CLK_5>; 2319de8a226SDong Aisheng clock-output-names = "sdhc2_lpcg_per_clk", 2329de8a226SDong Aisheng "sdhc2_lpcg_ipg_clk", 2339de8a226SDong Aisheng "sdhc2_lpcg_ahb_clk"; 2349de8a226SDong Aisheng power-domains = <&pd IMX_SC_R_SDHC_2>; 2359de8a226SDong Aisheng }; 2369de8a226SDong Aisheng 2379de8a226SDong Aisheng enet0_lpcg: clock-controller@5b230000 { 23816c4ea75SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 2399de8a226SDong Aisheng reg = <0x5b230000 0x10000>; 2409de8a226SDong Aisheng #clock-cells = <1>; 24126de33a1SDong Aisheng clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, 24226de33a1SDong Aisheng <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, 243dfda1fd1SDong Aisheng <&conn_axi_clk>, 244dfda1fd1SDong Aisheng <&clk IMX_SC_R_ENET_0 IMX_SC_C_TXCLK>, 245dfda1fd1SDong Aisheng <&conn_ipg_clk>, 246dfda1fd1SDong Aisheng <&conn_ipg_clk>; 2479de8a226SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>, 248dfda1fd1SDong Aisheng <IMX_LPCG_CLK_2>, <IMX_LPCG_CLK_3>, 249dfda1fd1SDong Aisheng <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>; 250dfda1fd1SDong Aisheng clock-output-names = "enet0_lpcg_timer_clk", 251dfda1fd1SDong Aisheng "enet0_lpcg_txc_sampling_clk", 252dfda1fd1SDong Aisheng "enet0_lpcg_ahb_clk", 253dfda1fd1SDong Aisheng "enet0_lpcg_rgmii_txc_clk", 254dfda1fd1SDong Aisheng "enet0_lpcg_ipg_clk", 255dfda1fd1SDong Aisheng "enet0_lpcg_ipg_s_clk"; 2569de8a226SDong Aisheng power-domains = <&pd IMX_SC_R_ENET_0>; 2579de8a226SDong Aisheng }; 2589de8a226SDong Aisheng 2599de8a226SDong Aisheng enet1_lpcg: clock-controller@5b240000 { 26016c4ea75SDong Aisheng compatible = "fsl,imx8qxp-lpcg"; 2619de8a226SDong Aisheng reg = <0x5b240000 0x10000>; 2629de8a226SDong Aisheng #clock-cells = <1>; 26326de33a1SDong Aisheng clocks = <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, 26426de33a1SDong Aisheng <&clk IMX_SC_R_ENET_1 IMX_SC_PM_CLK_PER>, 265dfda1fd1SDong Aisheng <&conn_axi_clk>, 266dfda1fd1SDong Aisheng <&clk IMX_SC_R_ENET_1 IMX_SC_C_TXCLK>, 267dfda1fd1SDong Aisheng <&conn_ipg_clk>, 268dfda1fd1SDong Aisheng <&conn_ipg_clk>; 2699de8a226SDong Aisheng clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>, 270dfda1fd1SDong Aisheng <IMX_LPCG_CLK_2>, <IMX_LPCG_CLK_3>, 271dfda1fd1SDong Aisheng <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>; 272dfda1fd1SDong Aisheng clock-output-names = "enet1_lpcg_timer_clk", 273dfda1fd1SDong Aisheng "enet1_lpcg_txc_sampling_clk", 274dfda1fd1SDong Aisheng "enet1_lpcg_ahb_clk", 275dfda1fd1SDong Aisheng "enet1_lpcg_rgmii_txc_clk", 276dfda1fd1SDong Aisheng "enet1_lpcg_ipg_clk", 277dfda1fd1SDong Aisheng "enet1_lpcg_ipg_s_clk"; 2789de8a226SDong Aisheng power-domains = <&pd IMX_SC_R_ENET_1>; 2799de8a226SDong Aisheng }; 2808065fc93SFrank Li 2818065fc93SFrank Li usb2_lpcg: clock-controller@5b270000 { 2828065fc93SFrank Li compatible = "fsl,imx8qxp-lpcg"; 2838065fc93SFrank Li reg = <0x5b270000 0x10000>; 2848065fc93SFrank Li #clock-cells = <1>; 2858065fc93SFrank Li clocks = <&conn_ahb_clk>, <&conn_ipg_clk>; 2868065fc93SFrank Li clock-indices = <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>; 2878065fc93SFrank Li clock-output-names = "usboh3_ahb_clk", "usboh3_phy_ipg_clk"; 2888065fc93SFrank Li power-domains = <&pd IMX_SC_R_USB_0_PHY>; 2898065fc93SFrank Li }; 290a8bd7f15SFrank Li 291a8bd7f15SFrank Li usb3_lpcg: clock-controller@5b280000 { 292a8bd7f15SFrank Li compatible = "fsl,imx8qxp-lpcg"; 293a8bd7f15SFrank Li reg = <0x5b280000 0x10000>; 294a8bd7f15SFrank Li #clock-cells = <1>; 295a8bd7f15SFrank Li clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>, 296a8bd7f15SFrank Li <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>, 297a8bd7f15SFrank Li <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>; 298a8bd7f15SFrank Li clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>, 299a8bd7f15SFrank Li <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>, 300a8bd7f15SFrank Li <&conn_ipg_clk>, 301a8bd7f15SFrank Li <&conn_ipg_clk>, 302a8bd7f15SFrank Li <&conn_ipg_clk>, 303a8bd7f15SFrank Li <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>; 304a8bd7f15SFrank Li clock-output-names = "usb3_app_clk", 305a8bd7f15SFrank Li "usb3_lpm_clk", 306a8bd7f15SFrank Li "usb3_ipg_clk", 307a8bd7f15SFrank Li "usb3_core_pclk", 308a8bd7f15SFrank Li "usb3_phy_clk", 309a8bd7f15SFrank Li "usb3_aclk"; 310a8bd7f15SFrank Li power-domains = <&pd IMX_SC_R_USB_2_PHY>; 311a8bd7f15SFrank Li }; 312*f1cc2d88SFrank Li 313*f1cc2d88SFrank Li rawnand_0_lpcg: clock-controller@5b290000 { 314*f1cc2d88SFrank Li compatible = "fsl,imx8qxp-lpcg"; 315*f1cc2d88SFrank Li reg = <0x5b290000 0x4>; 316*f1cc2d88SFrank Li #clock-cells = <1>; 317*f1cc2d88SFrank Li clocks = <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_PER>, 318*f1cc2d88SFrank Li <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_MST_BUS>, 319*f1cc2d88SFrank Li <&conn_axi_clk>, 320*f1cc2d88SFrank Li <&conn_axi_clk>; 321*f1cc2d88SFrank Li clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>, 322*f1cc2d88SFrank Li <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>; 323*f1cc2d88SFrank Li clock-output-names = "gpmi_bch", 324*f1cc2d88SFrank Li "gpmi_io", 325*f1cc2d88SFrank Li "gpmi_apb", 326*f1cc2d88SFrank Li "gpmi_bch_apb"; 327*f1cc2d88SFrank Li power-domains = <&pd IMX_SC_R_NAND>; 328*f1cc2d88SFrank Li }; 329*f1cc2d88SFrank Li 330*f1cc2d88SFrank Li rawnand_4_lpcg: clock-controller@5b290004 { 331*f1cc2d88SFrank Li compatible = "fsl,imx8qxp-lpcg"; 332*f1cc2d88SFrank Li reg = <0x5b290004 0x10000>; 333*f1cc2d88SFrank Li #clock-cells = <1>; 334*f1cc2d88SFrank Li clocks = <&conn_axi_clk>; 335*f1cc2d88SFrank Li clock-indices = <IMX_LPCG_CLK_4>; 336*f1cc2d88SFrank Li clock-output-names = "apbhdma_hclk"; 337*f1cc2d88SFrank Li power-domains = <&pd IMX_SC_R_NAND>; 338*f1cc2d88SFrank Li }; 339*f1cc2d88SFrank Li 340*f1cc2d88SFrank Li dma_apbh: dma-controller@5b810000 { 341*f1cc2d88SFrank Li compatible = "fsl,imx8qxp-dma-apbh", "fsl,imx28-dma-apbh"; 342*f1cc2d88SFrank Li reg = <0x5b810000 0x2000>; 343*f1cc2d88SFrank Li interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 344*f1cc2d88SFrank Li <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 345*f1cc2d88SFrank Li <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 346*f1cc2d88SFrank Li <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>; 347*f1cc2d88SFrank Li #dma-cells = <1>; 348*f1cc2d88SFrank Li dma-channels = <4>; 349*f1cc2d88SFrank Li clocks = <&rawnand_4_lpcg IMX_LPCG_CLK_0>; 350*f1cc2d88SFrank Li power-domains = <&pd IMX_SC_R_NAND>; 351*f1cc2d88SFrank Li }; 352*f1cc2d88SFrank Li 353*f1cc2d88SFrank Li gpmi: nand-controller@5b812000{ 354*f1cc2d88SFrank Li compatible = "fsl,imx8qxp-gpmi-nand"; 355*f1cc2d88SFrank Li reg = <0x5b812000 0x2000>, <0x5b814000 0x2000>; 356*f1cc2d88SFrank Li reg-names = "gpmi-nand", "bch"; 357*f1cc2d88SFrank Li #address-cells = <1>; 358*f1cc2d88SFrank Li #size-cells = <0>; 359*f1cc2d88SFrank Li interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; 360*f1cc2d88SFrank Li interrupt-names = "bch"; 361*f1cc2d88SFrank Li clocks = <&rawnand_0_lpcg IMX_LPCG_CLK_1>, 362*f1cc2d88SFrank Li <&rawnand_0_lpcg IMX_LPCG_CLK_4>, 363*f1cc2d88SFrank Li <&rawnand_0_lpcg IMX_LPCG_CLK_0>, 364*f1cc2d88SFrank Li <&rawnand_0_lpcg IMX_LPCG_CLK_5>; 365*f1cc2d88SFrank Li clock-names = "gpmi_io", "gpmi_apb", 366*f1cc2d88SFrank Li "gpmi_bch", "gpmi_bch_apb"; 367*f1cc2d88SFrank Li dmas = <&dma_apbh 0>; 368*f1cc2d88SFrank Li dma-names = "rx-tx"; 369*f1cc2d88SFrank Li power-domains = <&pd IMX_SC_R_NAND>; 370*f1cc2d88SFrank Li assigned-clocks = <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_MST_BUS>; 371*f1cc2d88SFrank Li assigned-clock-rates = <50000000>; 372*f1cc2d88SFrank Li status = "disabled"; 373*f1cc2d88SFrank Li }; 3740dcd27bdSDong Aisheng}; 375