1 /* 2 * R-Car Generation 2 support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Copyright (C) 2013 Magnus Damm 6 * Copyright (C) 2014 Ulrich Hecht 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/clk-provider.h> 19 #include <linux/clocksource.h> 20 #include <linux/device.h> 21 #include <linux/dma-contiguous.h> 22 #include <linux/io.h> 23 #include <linux/kernel.h> 24 #include <linux/memblock.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <asm/mach/arch.h> 28 #include "common.h" 29 #include "rcar-gen2.h" 30 31 #define MODEMR 0xe6160060 32 33 u32 rcar_gen2_read_mode_pins(void) 34 { 35 static u32 mode; 36 static bool mode_valid; 37 38 if (!mode_valid) { 39 void __iomem *modemr = ioremap_nocache(MODEMR, 4); 40 BUG_ON(!modemr); 41 mode = ioread32(modemr); 42 iounmap(modemr); 43 mode_valid = true; 44 } 45 46 return mode; 47 } 48 49 static unsigned int __init get_extal_freq(void) 50 { 51 struct device_node *cpg, *extal; 52 u32 freq = 20000000; 53 54 cpg = of_find_compatible_node(NULL, NULL, 55 "renesas,rcar-gen2-cpg-clocks"); 56 if (!cpg) 57 return freq; 58 59 extal = of_parse_phandle(cpg, "clocks", 0); 60 of_node_put(cpg); 61 if (!extal) 62 return freq; 63 64 of_property_read_u32(extal, "clock-frequency", &freq); 65 of_node_put(extal); 66 return freq; 67 } 68 69 #define CNTCR 0 70 #define CNTFID0 0x20 71 72 void __init rcar_gen2_timer_init(void) 73 { 74 #ifdef CONFIG_ARM_ARCH_TIMER 75 void __iomem *base; 76 u32 freq; 77 78 if (of_machine_is_compatible("renesas,r8a7792") || 79 of_machine_is_compatible("renesas,r8a7794")) { 80 freq = 260000000 / 8; /* ZS / 8 */ 81 /* CNTVOFF has to be initialized either from non-secure 82 * Hypervisor mode or secure Monitor mode with SCR.NS==1. 83 * If TrustZone is enabled then it should be handled by the 84 * secure code. 85 */ 86 asm volatile( 87 " cps 0x16\n" 88 " mrc p15, 0, r1, c1, c1, 0\n" 89 " orr r0, r1, #1\n" 90 " mcr p15, 0, r0, c1, c1, 0\n" 91 " isb\n" 92 " mov r0, #0\n" 93 " mcrr p15, 4, r0, r0, c14\n" 94 " isb\n" 95 " mcr p15, 0, r1, c1, c1, 0\n" 96 " isb\n" 97 " cps 0x13\n" 98 : : : "r0", "r1"); 99 } else { 100 /* At Linux boot time the r8a7790 arch timer comes up 101 * with the counter disabled. Moreover, it may also report 102 * a potentially incorrect fixed 13 MHz frequency. To be 103 * correct these registers need to be updated to use the 104 * frequency EXTAL / 2. 105 */ 106 freq = get_extal_freq() / 2; 107 } 108 109 /* Remap "armgcnt address map" space */ 110 base = ioremap(0xe6080000, PAGE_SIZE); 111 112 /* 113 * Update the timer if it is either not running, or is not at the 114 * right frequency. The timer is only configurable in secure mode 115 * so this avoids an abort if the loader started the timer and 116 * entered the kernel in non-secure mode. 117 */ 118 119 if ((ioread32(base + CNTCR) & 1) == 0 || 120 ioread32(base + CNTFID0) != freq) { 121 /* Update registers with correct frequency */ 122 iowrite32(freq, base + CNTFID0); 123 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); 124 125 /* make sure arch timer is started by setting bit 0 of CNTCR */ 126 iowrite32(1, base + CNTCR); 127 } 128 129 iounmap(base); 130 #endif /* CONFIG_ARM_ARCH_TIMER */ 131 132 of_clk_init(NULL); 133 clocksource_probe(); 134 } 135 136 struct memory_reserve_config { 137 u64 reserved; 138 u64 base, size; 139 }; 140 141 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, 142 int depth, void *data) 143 { 144 const char *type = of_get_flat_dt_prop(node, "device_type", NULL); 145 const __be32 *reg, *endp; 146 int l; 147 struct memory_reserve_config *mrc = data; 148 u64 lpae_start = 1ULL << 32; 149 150 /* We are scanning "memory" nodes only */ 151 if (type == NULL || strcmp(type, "memory")) 152 return 0; 153 154 reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); 155 if (reg == NULL) 156 reg = of_get_flat_dt_prop(node, "reg", &l); 157 if (reg == NULL) 158 return 0; 159 160 endp = reg + (l / sizeof(__be32)); 161 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { 162 u64 base, size; 163 164 base = dt_mem_next_cell(dt_root_addr_cells, ®); 165 size = dt_mem_next_cell(dt_root_size_cells, ®); 166 167 if (base >= lpae_start) 168 continue; 169 170 if ((base + size) >= lpae_start) 171 size = lpae_start - base; 172 173 if (size < mrc->reserved) 174 continue; 175 176 if (base < mrc->base) 177 continue; 178 179 /* keep the area at top near the 32-bit legacy limit */ 180 mrc->base = base + size - mrc->reserved; 181 mrc->size = mrc->reserved; 182 } 183 184 return 0; 185 } 186 187 void __init rcar_gen2_reserve(void) 188 { 189 struct memory_reserve_config mrc; 190 191 /* reserve 256 MiB at the top of the physical legacy 32-bit space */ 192 memset(&mrc, 0, sizeof(mrc)); 193 mrc.reserved = SZ_256M; 194 195 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); 196 #ifdef CONFIG_DMA_CMA 197 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) { 198 static struct cma *rcar_gen2_dma_contiguous; 199 200 dma_contiguous_reserve_area(mrc.size, mrc.base, 0, 201 &rcar_gen2_dma_contiguous, true); 202 } 203 #endif 204 } 205