1*c6ff132dSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */
2*c6ff132dSArnd Bergmann /*
3*c6ff132dSArnd Bergmann * Copyright 2008 Openmoko, Inc.
4*c6ff132dSArnd Bergmann * Copyright 2008 Simtec Electronics
5*c6ff132dSArnd Bergmann * http://armlinux.simtec.co.uk/
6*c6ff132dSArnd Bergmann * Ben Dooks <ben@simtec.co.uk>
7*c6ff132dSArnd Bergmann *
8*c6ff132dSArnd Bergmann * S3C Platform - GPIO pin configuration
9*c6ff132dSArnd Bergmann */
10*c6ff132dSArnd Bergmann
11*c6ff132dSArnd Bergmann /* This file contains the necessary definitions to get the basic gpio
12*c6ff132dSArnd Bergmann * pin configuration done such as setting a pin to input or output or
13*c6ff132dSArnd Bergmann * changing the pull-{up,down} configurations.
14*c6ff132dSArnd Bergmann */
15*c6ff132dSArnd Bergmann
16*c6ff132dSArnd Bergmann /* Note, this interface is being added to the s3c64xx arch first and will
17*c6ff132dSArnd Bergmann * be added to the s3c24xx systems later.
18*c6ff132dSArnd Bergmann */
19*c6ff132dSArnd Bergmann
20*c6ff132dSArnd Bergmann #ifndef __PLAT_GPIO_CFG_H
21*c6ff132dSArnd Bergmann #define __PLAT_GPIO_CFG_H __FILE__
22*c6ff132dSArnd Bergmann
23*c6ff132dSArnd Bergmann #include <linux/types.h>
24*c6ff132dSArnd Bergmann
25*c6ff132dSArnd Bergmann typedef unsigned int __bitwise samsung_gpio_pull_t;
26*c6ff132dSArnd Bergmann
27*c6ff132dSArnd Bergmann /* forward declaration if gpio-core.h hasn't been included */
28*c6ff132dSArnd Bergmann struct samsung_gpio_chip;
29*c6ff132dSArnd Bergmann
30*c6ff132dSArnd Bergmann /**
31*c6ff132dSArnd Bergmann * struct samsung_gpio_cfg GPIO configuration
32*c6ff132dSArnd Bergmann * @cfg_eint: Configuration setting when used for external interrupt source
33*c6ff132dSArnd Bergmann * @get_pull: Read the current pull configuration for the GPIO
34*c6ff132dSArnd Bergmann * @set_pull: Set the current pull configuration for the GPIO
35*c6ff132dSArnd Bergmann * @set_config: Set the current configuration for the GPIO
36*c6ff132dSArnd Bergmann * @get_config: Read the current configuration for the GPIO
37*c6ff132dSArnd Bergmann *
38*c6ff132dSArnd Bergmann * Each chip can have more than one type of GPIO bank available and some
39*c6ff132dSArnd Bergmann * have different capabilites even when they have the same control register
40*c6ff132dSArnd Bergmann * layouts. Provide an point to vector control routine and provide any
41*c6ff132dSArnd Bergmann * per-bank configuration information that other systems such as the
42*c6ff132dSArnd Bergmann * external interrupt code will need.
43*c6ff132dSArnd Bergmann *
44*c6ff132dSArnd Bergmann * @sa samsung_gpio_cfgpin
45*c6ff132dSArnd Bergmann * @sa s3c_gpio_getcfg
46*c6ff132dSArnd Bergmann * @sa s3c_gpio_setpull
47*c6ff132dSArnd Bergmann * @sa s3c_gpio_getpull
48*c6ff132dSArnd Bergmann */
49*c6ff132dSArnd Bergmann struct samsung_gpio_cfg {
50*c6ff132dSArnd Bergmann unsigned int cfg_eint;
51*c6ff132dSArnd Bergmann
52*c6ff132dSArnd Bergmann samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
53*c6ff132dSArnd Bergmann int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
54*c6ff132dSArnd Bergmann samsung_gpio_pull_t pull);
55*c6ff132dSArnd Bergmann
56*c6ff132dSArnd Bergmann unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
57*c6ff132dSArnd Bergmann int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
58*c6ff132dSArnd Bergmann unsigned config);
59*c6ff132dSArnd Bergmann };
60*c6ff132dSArnd Bergmann
61*c6ff132dSArnd Bergmann #define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
62*c6ff132dSArnd Bergmann #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
63*c6ff132dSArnd Bergmann
64*c6ff132dSArnd Bergmann /* Defines for generic pin configurations */
65*c6ff132dSArnd Bergmann #define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
66*c6ff132dSArnd Bergmann #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
67*c6ff132dSArnd Bergmann #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
68*c6ff132dSArnd Bergmann
69*c6ff132dSArnd Bergmann #define samsung_gpio_is_cfg_special(_cfg) \
70*c6ff132dSArnd Bergmann (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
71*c6ff132dSArnd Bergmann
72*c6ff132dSArnd Bergmann /**
73*c6ff132dSArnd Bergmann * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
74*c6ff132dSArnd Bergmann * @pin pin The pin number to configure.
75*c6ff132dSArnd Bergmann * @to to The configuration for the pin's function.
76*c6ff132dSArnd Bergmann *
77*c6ff132dSArnd Bergmann * Configure which function is actually connected to the external
78*c6ff132dSArnd Bergmann * pin, such as an gpio input, output or some form of special function
79*c6ff132dSArnd Bergmann * connected to an internal peripheral block.
80*c6ff132dSArnd Bergmann *
81*c6ff132dSArnd Bergmann * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
82*c6ff132dSArnd Bergmann * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
83*c6ff132dSArnd Bergmann * will then generate the correct bit mask and shift for the configuration.
84*c6ff132dSArnd Bergmann *
85*c6ff132dSArnd Bergmann * If a bank of GPIOs all needs to be set to special-function 2, then
86*c6ff132dSArnd Bergmann * the following code will work:
87*c6ff132dSArnd Bergmann *
88*c6ff132dSArnd Bergmann * for (gpio = start; gpio < end; gpio++)
89*c6ff132dSArnd Bergmann * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
90*c6ff132dSArnd Bergmann *
91*c6ff132dSArnd Bergmann * The @to parameter can also be a specific value already shifted to the
92*c6ff132dSArnd Bergmann * correct position in the control register, although these are discouraged
93*c6ff132dSArnd Bergmann * in newer kernels and are only being kept for compatibility.
94*c6ff132dSArnd Bergmann */
95*c6ff132dSArnd Bergmann extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
96*c6ff132dSArnd Bergmann
97*c6ff132dSArnd Bergmann /**
98*c6ff132dSArnd Bergmann * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
99*c6ff132dSArnd Bergmann * @start: The pin number to start at
100*c6ff132dSArnd Bergmann * @nr: The number of pins to configure from @start.
101*c6ff132dSArnd Bergmann * @cfg: The configuration for the pin's function
102*c6ff132dSArnd Bergmann *
103*c6ff132dSArnd Bergmann * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
104*c6ff132dSArnd Bergmann *
105*c6ff132dSArnd Bergmann * @sa s3c_gpio_cfgpin.
106*c6ff132dSArnd Bergmann */
107*c6ff132dSArnd Bergmann extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
108*c6ff132dSArnd Bergmann unsigned int cfg);
109*c6ff132dSArnd Bergmann
110*c6ff132dSArnd Bergmann /* Define values for the pull-{up,down} available for each gpio pin.
111*c6ff132dSArnd Bergmann *
112*c6ff132dSArnd Bergmann * These values control the state of the weak pull-{up,down} resistors
113*c6ff132dSArnd Bergmann * available on most pins on the S3C series. Not all chips support both
114*c6ff132dSArnd Bergmann * up or down settings, and it may be dependent on the chip that is being
115*c6ff132dSArnd Bergmann * used to whether the particular mode is available.
116*c6ff132dSArnd Bergmann */
117*c6ff132dSArnd Bergmann #define S3C_GPIO_PULL_NONE ((__force samsung_gpio_pull_t)0x00)
118*c6ff132dSArnd Bergmann #define S3C_GPIO_PULL_DOWN ((__force samsung_gpio_pull_t)0x01)
119*c6ff132dSArnd Bergmann #define S3C_GPIO_PULL_UP ((__force samsung_gpio_pull_t)0x02)
120*c6ff132dSArnd Bergmann
121*c6ff132dSArnd Bergmann /**
122*c6ff132dSArnd Bergmann * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
123*c6ff132dSArnd Bergmann * @pin: The pin number to configure the pull resistor.
124*c6ff132dSArnd Bergmann * @pull: The configuration for the pull resistor.
125*c6ff132dSArnd Bergmann *
126*c6ff132dSArnd Bergmann * This function sets the state of the pull-{up,down} resistor for the
127*c6ff132dSArnd Bergmann * specified pin. It will return 0 if successful, or a negative error
128*c6ff132dSArnd Bergmann * code if the pin cannot support the requested pull setting.
129*c6ff132dSArnd Bergmann *
130*c6ff132dSArnd Bergmann * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
131*c6ff132dSArnd Bergmann */
132*c6ff132dSArnd Bergmann extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
133*c6ff132dSArnd Bergmann
134*c6ff132dSArnd Bergmann /* configure `all` aspects of an gpio */
135*c6ff132dSArnd Bergmann
136*c6ff132dSArnd Bergmann /**
137*c6ff132dSArnd Bergmann * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
138*c6ff132dSArnd Bergmann * @start: The gpio number to start at.
139*c6ff132dSArnd Bergmann * @nr: The number of gpio to configure from @start.
140*c6ff132dSArnd Bergmann * @cfg: The configuration to use
141*c6ff132dSArnd Bergmann * @pull: The pull setting to use.
142*c6ff132dSArnd Bergmann *
143*c6ff132dSArnd Bergmann * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
144*c6ff132dSArnd Bergmann * @gpio and running for @size.
145*c6ff132dSArnd Bergmann *
146*c6ff132dSArnd Bergmann * @sa s3c_gpio_cfgpin
147*c6ff132dSArnd Bergmann * @sa s3c_gpio_setpull
148*c6ff132dSArnd Bergmann * @sa s3c_gpio_cfgpin_range
149*c6ff132dSArnd Bergmann */
150*c6ff132dSArnd Bergmann extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
151*c6ff132dSArnd Bergmann unsigned int cfg, samsung_gpio_pull_t pull);
152*c6ff132dSArnd Bergmann
s3c_gpio_cfgrange_nopull(unsigned int pin,unsigned int size,unsigned int cfg)153*c6ff132dSArnd Bergmann static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
154*c6ff132dSArnd Bergmann unsigned int cfg)
155*c6ff132dSArnd Bergmann {
156*c6ff132dSArnd Bergmann return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
157*c6ff132dSArnd Bergmann }
158*c6ff132dSArnd Bergmann
159*c6ff132dSArnd Bergmann #endif /* __PLAT_GPIO_CFG_H */
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