1c1db9d73STony Lindgren /* 2c1db9d73STony Lindgren * omap-secure.h: OMAP Secure infrastructure header. 3c1db9d73STony Lindgren * 4c1db9d73STony Lindgren * Copyright (C) 2011 Texas Instruments, Inc. 5c1db9d73STony Lindgren * Santosh Shilimkar <santosh.shilimkar@ti.com> 64748a724SPali Rohár * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg> 74748a724SPali Rohár * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com> 8c1db9d73STony Lindgren * 9c1db9d73STony Lindgren * This program is free software; you can redistribute it and/or modify 10c1db9d73STony Lindgren * it under the terms of the GNU General Public License version 2 as 11c1db9d73STony Lindgren * published by the Free Software Foundation. 12c1db9d73STony Lindgren */ 13c1db9d73STony Lindgren #ifndef OMAP_ARCH_OMAP_SECURE_H 14c1db9d73STony Lindgren #define OMAP_ARCH_OMAP_SECURE_H 15c1db9d73STony Lindgren 16c1db9d73STony Lindgren /* Monitor error code */ 17c1db9d73STony Lindgren #define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE 18c1db9d73STony Lindgren #define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF 19c1db9d73STony Lindgren 20c1db9d73STony Lindgren /* HAL API error codes */ 21c1db9d73STony Lindgren #define API_HAL_RET_VALUE_OK 0x00 22c1db9d73STony Lindgren #define API_HAL_RET_VALUE_FAIL 0x01 23c1db9d73STony Lindgren 24c1db9d73STony Lindgren /* Secure HAL API flags */ 25c1db9d73STony Lindgren #define FLAG_START_CRITICAL 0x4 26c1db9d73STony Lindgren #define FLAG_IRQFIQ_MASK 0x3 27c1db9d73STony Lindgren #define FLAG_IRQ_ENABLE 0x2 28c1db9d73STony Lindgren #define FLAG_FIQ_ENABLE 0x1 29c1db9d73STony Lindgren #define NO_FLAG 0x0 30c1db9d73STony Lindgren 31c1db9d73STony Lindgren /* Maximum Secure memory storage size */ 32c1db9d73STony Lindgren #define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K) 33c1db9d73STony Lindgren 34c1db9d73STony Lindgren /* Secure low power HAL API index */ 35c1db9d73STony Lindgren #define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a 36c1db9d73STony Lindgren #define OMAP4_HAL_SAVEHW_INDEX 0x1b 37c1db9d73STony Lindgren #define OMAP4_HAL_SAVEALL_INDEX 0x1c 38c1db9d73STony Lindgren #define OMAP4_HAL_SAVEGIC_INDEX 0x1d 39c1db9d73STony Lindgren 40c1db9d73STony Lindgren /* Secure Monitor mode APIs */ 41c1db9d73STony Lindgren #define OMAP4_MON_SCU_PWR_INDEX 0x108 42c1db9d73STony Lindgren #define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100 43c1db9d73STony Lindgren #define OMAP4_MON_L2X0_CTRL_INDEX 0x102 44c1db9d73STony Lindgren #define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109 45c1db9d73STony Lindgren #define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113 46c1db9d73STony Lindgren 475523e409SR Sricharan #define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109 48*4664d4d8SSantosh Shilimkar #define OMAP5_MON_AMBA_IF_INDEX 0x108 495523e409SR Sricharan 50c1db9d73STony Lindgren /* Secure PPA(Primary Protected Application) APIs */ 51c1db9d73STony Lindgren #define OMAP4_PPA_L2_POR_INDEX 0x23 52c1db9d73STony Lindgren #define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25 53c1db9d73STony Lindgren 544748a724SPali Rohár /* Secure RX-51 PPA (Primary Protected Application) APIs */ 554748a724SPali Rohár #define RX51_PPA_HWRNG 29 564748a724SPali Rohár #define RX51_PPA_L2_INVAL 40 574748a724SPali Rohár #define RX51_PPA_WRITE_ACR 42 584748a724SPali Rohár 59c1db9d73STony Lindgren #ifndef __ASSEMBLER__ 60c1db9d73STony Lindgren 61c1db9d73STony Lindgren extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs, 62c1db9d73STony Lindgren u32 arg1, u32 arg2, u32 arg3, u32 arg4); 63c1db9d73STony Lindgren extern u32 omap_smc2(u32 id, u32 falg, u32 pargs); 64a33f1788SPali Rohár extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs); 65c1db9d73STony Lindgren extern phys_addr_t omap_secure_ram_mempool_base(void); 66f7a9b8a1SLokesh Vutla extern int omap_secure_ram_reserve_memblock(void); 67c1db9d73STony Lindgren 684748a724SPali Rohár extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, 694748a724SPali Rohár u32 arg1, u32 arg2, u32 arg3, u32 arg4); 704748a724SPali Rohár extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits); 71d2065e2bSPali Rohár extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag); 724748a724SPali Rohár 73f7a9b8a1SLokesh Vutla #ifdef CONFIG_OMAP4_ERRATA_I688 74f7a9b8a1SLokesh Vutla extern int omap_barrier_reserve_memblock(void); 75f7a9b8a1SLokesh Vutla #else 76f7a9b8a1SLokesh Vutla static inline void omap_barrier_reserve_memblock(void) 77f7a9b8a1SLokesh Vutla { } 78f7a9b8a1SLokesh Vutla #endif 795523e409SR Sricharan 8039cec622STony Lindgren #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER 815523e409SR Sricharan void set_cntfreq(void); 8239cec622STony Lindgren #else 8339cec622STony Lindgren static inline void set_cntfreq(void) 8439cec622STony Lindgren { 8539cec622STony Lindgren } 8639cec622STony Lindgren #endif 8739cec622STony Lindgren 88c1db9d73STony Lindgren #endif /* __ASSEMBLER__ */ 89c1db9d73STony Lindgren #endif /* OMAP_ARCH_OMAP_SECURE_H */ 90