xref: /linux/arch/arm/mach-omap1/gpio15xx.c (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * OMAP15xx specific gpio init
4  *
5  * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
6  *
7  * Author:
8  *	Charulatha V <charu@ti.com>
9  */
10 
11 #include <linux/platform_data/gpio-omap.h>
12 #include <linux/soc/ti/omap1-soc.h>
13 #include <asm/irq.h>
14 
15 #include "irqs.h"
16 
17 #define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
18 #define OMAP1510_GPIO_BASE		0xFFFCE000
19 
20 /* gpio1 */
21 static struct resource omap15xx_mpu_gpio_resources[] = {
22 	{
23 		.start	= OMAP1_MPUIO_VBASE,
24 		.end	= OMAP1_MPUIO_VBASE + SZ_2K - 1,
25 		.flags	= IORESOURCE_MEM,
26 	},
27 	{
28 		.start	= INT_MPUIO,
29 		.flags	= IORESOURCE_IRQ,
30 	},
31 };
32 
33 static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
34 	.revision       = USHRT_MAX,
35 	.direction	= OMAP_MPUIO_IO_CNTL,
36 	.datain		= OMAP_MPUIO_INPUT_LATCH,
37 	.dataout	= OMAP_MPUIO_OUTPUT,
38 	.irqstatus	= OMAP_MPUIO_GPIO_INT,
39 	.irqenable	= OMAP_MPUIO_GPIO_MASKIT,
40 	.irqenable_inv	= true,
41 	.irqctrl	= OMAP_MPUIO_GPIO_INT_EDGE,
42 };
43 
44 static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = {
45 	.is_mpuio		= true,
46 	.bank_width		= 16,
47 	.bank_stride		= 1,
48 	.regs			= &omap15xx_mpuio_regs,
49 };
50 
51 static struct platform_device omap15xx_mpu_gpio = {
52 	.name           = "omap_gpio",
53 	.id             = 0,
54 	.dev            = {
55 		.platform_data = &omap15xx_mpu_gpio_config,
56 	},
57 	.num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources),
58 	.resource = omap15xx_mpu_gpio_resources,
59 };
60 
61 /* gpio2 */
62 static struct resource omap15xx_gpio_resources[] = {
63 	{
64 		.start	= OMAP1510_GPIO_BASE,
65 		.end	= OMAP1510_GPIO_BASE + SZ_2K - 1,
66 		.flags	= IORESOURCE_MEM,
67 	},
68 	{
69 		.start	= INT_GPIO_BANK1,
70 		.flags	= IORESOURCE_IRQ,
71 	},
72 };
73 
74 static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
75 	.revision	= USHRT_MAX,
76 	.direction	= OMAP1510_GPIO_DIR_CONTROL,
77 	.datain		= OMAP1510_GPIO_DATA_INPUT,
78 	.dataout	= OMAP1510_GPIO_DATA_OUTPUT,
79 	.irqstatus	= OMAP1510_GPIO_INT_STATUS,
80 	.irqenable	= OMAP1510_GPIO_INT_MASK,
81 	.irqenable_inv	= true,
82 	.irqctrl	= OMAP1510_GPIO_INT_CONTROL,
83 	.pinctrl	= OMAP1510_GPIO_PIN_CONTROL,
84 };
85 
86 static struct omap_gpio_platform_data omap15xx_gpio_config = {
87 	.bank_width		= 16,
88 	.regs                   = &omap15xx_gpio_regs,
89 };
90 
91 static struct platform_device omap15xx_gpio = {
92 	.name           = "omap_gpio",
93 	.id             = 1,
94 	.dev            = {
95 		.platform_data = &omap15xx_gpio_config,
96 	},
97 	.num_resources = ARRAY_SIZE(omap15xx_gpio_resources),
98 	.resource = omap15xx_gpio_resources,
99 };
100 
101 /*
102  * omap15xx_gpio_init needs to be done before
103  * machine_init functions access gpio APIs.
104  * Hence omap15xx_gpio_init is a postcore_initcall.
105  */
omap15xx_gpio_init(void)106 static int __init omap15xx_gpio_init(void)
107 {
108 	if (!cpu_is_omap15xx())
109 		return -EINVAL;
110 
111 	platform_device_register(&omap15xx_mpu_gpio);
112 	platform_device_register(&omap15xx_gpio);
113 
114 	return 0;
115 }
116 postcore_initcall(omap15xx_gpio_init);
117