xref: /linux/arch/arm/include/asm/mpu.h (revision 9cfb541a4ad45168925078f7d1fe3a7363ba27e2)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a2b45b0dSJonathan Austin #ifndef __ARM_MPU_H
3a2b45b0dSJonathan Austin #define __ARM_MPU_H
4a2b45b0dSJonathan Austin 
5a2b45b0dSJonathan Austin /* MPUIR layout */
6a2b45b0dSJonathan Austin #define MPUIR_nU		1
7a2b45b0dSJonathan Austin #define MPUIR_DREGION		8
8a2b45b0dSJonathan Austin #define MPUIR_IREGION		16
9a2b45b0dSJonathan Austin #define MPUIR_DREGION_SZMASK	(0xFF << MPUIR_DREGION)
10a2b45b0dSJonathan Austin #define MPUIR_IREGION_SZMASK	(0xFF << MPUIR_IREGION)
11a2b45b0dSJonathan Austin 
12a2b45b0dSJonathan Austin /* ID_MMFR0 data relevant to MPU */
13a2b45b0dSJonathan Austin #define MMFR0_PMSA		(0xF << 4)
14a2b45b0dSJonathan Austin #define MMFR0_PMSAv7		(3 << 4)
15a2b45b0dSJonathan Austin 
16a2b45b0dSJonathan Austin /* MPU D/I Size Register fields */
17*9cfb541aSVladimir Murzin #define PMSAv7_RSR_SZ		1
18*9cfb541aSVladimir Murzin #define PMSAv7_RSR_EN		0
19*9cfb541aSVladimir Murzin #define PMSAv7_RSR_SD		8
205c9d9a1bSVladimir Murzin 
215c9d9a1bSVladimir Murzin /* Number of subregions (SD) */
22*9cfb541aSVladimir Murzin #define PMSAv7_NR_SUBREGS	8
23*9cfb541aSVladimir Murzin #define PMSAv7_MIN_SUBREG_SIZE	256
24a2b45b0dSJonathan Austin 
25a2b45b0dSJonathan Austin /* The D/I RSR value for an enabled region spanning the whole of memory */
26*9cfb541aSVladimir Murzin #define PMSAv7_RSR_ALL_MEM	63
27a2b45b0dSJonathan Austin 
28a2b45b0dSJonathan Austin /* Individual bits in the DR/IR ACR */
29*9cfb541aSVladimir Murzin #define PMSAv7_ACR_XN		(1 << 12)
30*9cfb541aSVladimir Murzin #define PMSAv7_ACR_SHARED	(1 << 2)
31a2b45b0dSJonathan Austin 
32a2b45b0dSJonathan Austin /* C, B and TEX[2:0] bits only have semantic meanings when grouped */
33*9cfb541aSVladimir Murzin #define PMSAv7_RGN_CACHEABLE		0xB
34*9cfb541aSVladimir Murzin #define PMSAv7_RGN_SHARED_CACHEABLE	(PMSAv7_RGN_CACHEABLE | PMSAv7_ACR_SHARED)
35*9cfb541aSVladimir Murzin #define PMSAv7_RGN_STRONGLY_ORDERED	0
36a2b45b0dSJonathan Austin 
37a2b45b0dSJonathan Austin /* Main region should only be shared for SMP */
38a2b45b0dSJonathan Austin #ifdef CONFIG_SMP
39*9cfb541aSVladimir Murzin #define PMSAv7_RGN_NORMAL	(PMSAv7_RGN_CACHEABLE | PMSAv7_ACR_SHARED)
40a2b45b0dSJonathan Austin #else
41*9cfb541aSVladimir Murzin #define PMSAv7_RGN_NORMAL	PMSAv7_RGN_CACHEABLE
42a2b45b0dSJonathan Austin #endif
43a2b45b0dSJonathan Austin 
44a2b45b0dSJonathan Austin /* Access permission bits of ACR (only define those that we use)*/
45*9cfb541aSVladimir Murzin #define PMSAv7_AP_PL1RO_PL0NA	(0x5 << 8)
46*9cfb541aSVladimir Murzin #define PMSAv7_AP_PL1RW_PL0RW	(0x3 << 8)
47*9cfb541aSVladimir Murzin #define PMSAv7_AP_PL1RW_PL0R0	(0x2 << 8)
48*9cfb541aSVladimir Murzin #define PMSAv7_AP_PL1RW_PL0NA	(0x1 << 8)
49a2b45b0dSJonathan Austin 
50a2b45b0dSJonathan Austin /* For minimal static MPU region configurations */
51*9cfb541aSVladimir Murzin #define PMSAv7_PROBE_REGION	0
52*9cfb541aSVladimir Murzin #define PMSAv7_BG_REGION	1
53*9cfb541aSVladimir Murzin #define PMSAv7_RAM_REGION	2
54*9cfb541aSVladimir Murzin #define PMSAv7_ROM_REGION	3
55a2b45b0dSJonathan Austin 
56a2b45b0dSJonathan Austin /* Maximum number of regions Linux is interested in */
57a2b45b0dSJonathan Austin #define MPU_MAX_REGIONS	16
58a2b45b0dSJonathan Austin 
59*9cfb541aSVladimir Murzin #define PMSAv7_DATA_SIDE	0
60*9cfb541aSVladimir Murzin #define PMSAv7_INSTR_SIDE	1
6167c9845bSJonathan Austin 
62a2b45b0dSJonathan Austin #ifndef __ASSEMBLY__
63a2b45b0dSJonathan Austin 
64a2b45b0dSJonathan Austin struct mpu_rgn {
65a2b45b0dSJonathan Austin 	/* Assume same attributes for d/i-side  */
66a2b45b0dSJonathan Austin 	u32 drbar;
67a2b45b0dSJonathan Austin 	u32 drsr;
68a2b45b0dSJonathan Austin 	u32 dracr;
69a2b45b0dSJonathan Austin };
70a2b45b0dSJonathan Austin 
71a2b45b0dSJonathan Austin struct mpu_rgn_info {
72a0995c08SVladimir Murzin 	unsigned int used;
73a2b45b0dSJonathan Austin 	struct mpu_rgn rgns[MPU_MAX_REGIONS];
74a2b45b0dSJonathan Austin };
75a2b45b0dSJonathan Austin extern struct mpu_rgn_info mpu_rgn_info;
76a2b45b0dSJonathan Austin 
77877ec119SVladimir Murzin #ifdef CONFIG_ARM_MPU
78*9cfb541aSVladimir Murzin extern void __init pmsav7_adjust_lowmem_bounds(void);
79*9cfb541aSVladimir Murzin extern void __init pmsav7_setup(void);
80877ec119SVladimir Murzin #else
81*9cfb541aSVladimir Murzin static inline void pmsav7_adjust_lowmem_bounds(void) {};
82*9cfb541aSVladimir Murzin static inline void pmsav7_setup(void) {};
83*9cfb541aSVladimir Murzin #endif
84877ec119SVladimir Murzin 
85877ec119SVladimir Murzin #endif /* __ASSEMBLY__ */
86a2b45b0dSJonathan Austin 
87a2b45b0dSJonathan Austin #endif
88