xref: /linux/arch/arm/boot/dts/vt8500/vt8500.dtsi (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2724ba675SRob Herring/*
3724ba675SRob Herring * vt8500.dtsi - Device tree file for VIA VT8500 SoC
4724ba675SRob Herring *
5724ba675SRob Herring * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herring/ {
9724ba675SRob Herring	#address-cells = <1>;
10724ba675SRob Herring	#size-cells = <1>;
11724ba675SRob Herring	compatible = "via,vt8500";
12724ba675SRob Herring
13724ba675SRob Herring	cpus {
14724ba675SRob Herring		#address-cells = <0>;
15724ba675SRob Herring		#size-cells = <0>;
16724ba675SRob Herring
17724ba675SRob Herring		cpu {
18724ba675SRob Herring			device_type = "cpu";
19724ba675SRob Herring			compatible = "arm,arm926ej-s";
20724ba675SRob Herring		};
21724ba675SRob Herring	};
22724ba675SRob Herring
23724ba675SRob Herring	memory {
24724ba675SRob Herring		device_type = "memory";
25724ba675SRob Herring		reg = <0x0 0x0>;
26724ba675SRob Herring	};
27724ba675SRob Herring
28724ba675SRob Herring	aliases {
29724ba675SRob Herring		serial0 = &uart0;
30724ba675SRob Herring		serial1 = &uart1;
31724ba675SRob Herring		serial2 = &uart2;
32724ba675SRob Herring		serial3 = &uart3;
33724ba675SRob Herring	};
34724ba675SRob Herring
35724ba675SRob Herring	soc {
36724ba675SRob Herring		#address-cells = <1>;
37724ba675SRob Herring		#size-cells = <1>;
38724ba675SRob Herring		compatible = "simple-bus";
39724ba675SRob Herring		ranges;
40724ba675SRob Herring		interrupt-parent = <&intc>;
41724ba675SRob Herring
42724ba675SRob Herring		intc: interrupt-controller@d8140000 {
43724ba675SRob Herring			compatible = "via,vt8500-intc";
44724ba675SRob Herring			interrupt-controller;
45724ba675SRob Herring			reg = <0xd8140000 0x10000>;
46724ba675SRob Herring			#interrupt-cells = <1>;
47724ba675SRob Herring		};
48724ba675SRob Herring
49724ba675SRob Herring		pinctrl: pinctrl@d8110000 {
50724ba675SRob Herring			compatible = "via,vt8500-pinctrl";
51724ba675SRob Herring			reg = <0xd8110000 0x10000>;
52724ba675SRob Herring			interrupt-controller;
53724ba675SRob Herring			#interrupt-cells = <2>;
54724ba675SRob Herring			gpio-controller;
55724ba675SRob Herring			#gpio-cells = <2>;
56724ba675SRob Herring		};
57724ba675SRob Herring
58724ba675SRob Herring		pmc@d8130000 {
59724ba675SRob Herring			compatible = "via,vt8500-pmc";
60724ba675SRob Herring			reg = <0xd8130000 0x1000>;
61724ba675SRob Herring
62724ba675SRob Herring			clocks {
63724ba675SRob Herring				#address-cells = <1>;
64724ba675SRob Herring				#size-cells = <0>;
65724ba675SRob Herring
66724ba675SRob Herring				ref24: ref24M {
67724ba675SRob Herring					#clock-cells = <0>;
68724ba675SRob Herring					compatible = "fixed-clock";
69724ba675SRob Herring					clock-frequency = <24000000>;
70724ba675SRob Herring				};
71724ba675SRob Herring
72724ba675SRob Herring				clkuart0: uart0 {
73724ba675SRob Herring					#clock-cells = <0>;
74724ba675SRob Herring					compatible = "via,vt8500-device-clock";
75724ba675SRob Herring					clocks = <&ref24>;
76724ba675SRob Herring					enable-reg = <0x250>;
77724ba675SRob Herring					enable-bit = <1>;
78724ba675SRob Herring				};
79724ba675SRob Herring
80724ba675SRob Herring				clkuart1: uart1 {
81724ba675SRob Herring					#clock-cells = <0>;
82724ba675SRob Herring					compatible = "via,vt8500-device-clock";
83724ba675SRob Herring					clocks = <&ref24>;
84724ba675SRob Herring					enable-reg = <0x250>;
85724ba675SRob Herring					enable-bit = <2>;
86724ba675SRob Herring				};
87724ba675SRob Herring
88724ba675SRob Herring				clkuart2: uart2 {
89724ba675SRob Herring					#clock-cells = <0>;
90724ba675SRob Herring					compatible = "via,vt8500-device-clock";
91724ba675SRob Herring					clocks = <&ref24>;
92724ba675SRob Herring					enable-reg = <0x250>;
93724ba675SRob Herring					enable-bit = <3>;
94724ba675SRob Herring				};
95724ba675SRob Herring
96724ba675SRob Herring				clkuart3: uart3 {
97724ba675SRob Herring					#clock-cells = <0>;
98724ba675SRob Herring					compatible = "via,vt8500-device-clock";
99724ba675SRob Herring					clocks = <&ref24>;
100724ba675SRob Herring					enable-reg = <0x250>;
101724ba675SRob Herring					enable-bit = <4>;
102724ba675SRob Herring				};
103724ba675SRob Herring			};
104724ba675SRob Herring		};
105724ba675SRob Herring
106724ba675SRob Herring		timer@d8130100 {
107724ba675SRob Herring			compatible = "via,vt8500-timer";
108724ba675SRob Herring			reg = <0xd8130100 0x28>;
109724ba675SRob Herring			interrupts = <36>;
110724ba675SRob Herring		};
111724ba675SRob Herring
112724ba675SRob Herring		ehci@d8007900 {
113724ba675SRob Herring			compatible = "via,vt8500-ehci";
114724ba675SRob Herring			reg = <0xd8007900 0x200>;
115724ba675SRob Herring			interrupts = <43>;
116724ba675SRob Herring		};
117724ba675SRob Herring
118*dd2118bdSMohammad Shehar Yaar Tausif		usb@d8007b00 {
119724ba675SRob Herring			compatible = "platform-uhci";
120724ba675SRob Herring			reg = <0xd8007b00 0x200>;
121724ba675SRob Herring			interrupts = <43>;
122724ba675SRob Herring		};
123724ba675SRob Herring
124724ba675SRob Herring		fb: fb@d8050800 {
125724ba675SRob Herring			compatible = "via,vt8500-fb";
126724ba675SRob Herring			reg = <0xd800e400 0x400>;
127724ba675SRob Herring			interrupts = <12>;
128724ba675SRob Herring		};
129724ba675SRob Herring
130724ba675SRob Herring		ge_rops@d8050400 {
131724ba675SRob Herring			compatible = "wm,prizm-ge-rops";
132724ba675SRob Herring			reg = <0xd8050400 0x100>;
133724ba675SRob Herring		};
134724ba675SRob Herring
135724ba675SRob Herring		uart0: serial@d8200000 {
136724ba675SRob Herring			compatible = "via,vt8500-uart";
137724ba675SRob Herring			reg = <0xd8200000 0x1040>;
138724ba675SRob Herring			interrupts = <32>;
139724ba675SRob Herring			clocks = <&clkuart0>;
140724ba675SRob Herring			status = "disabled";
141724ba675SRob Herring		};
142724ba675SRob Herring
143724ba675SRob Herring		uart1: serial@d82b0000 {
144724ba675SRob Herring			compatible = "via,vt8500-uart";
145724ba675SRob Herring			reg = <0xd82b0000 0x1040>;
146724ba675SRob Herring			interrupts = <33>;
147724ba675SRob Herring			clocks = <&clkuart1>;
148724ba675SRob Herring			status = "disabled";
149724ba675SRob Herring		};
150724ba675SRob Herring
151724ba675SRob Herring		uart2: serial@d8210000 {
152724ba675SRob Herring			compatible = "via,vt8500-uart";
153724ba675SRob Herring			reg = <0xd8210000 0x1040>;
154724ba675SRob Herring			interrupts = <47>;
155724ba675SRob Herring			clocks = <&clkuart2>;
156724ba675SRob Herring			status = "disabled";
157724ba675SRob Herring		};
158724ba675SRob Herring
159724ba675SRob Herring		uart3: serial@d82c0000 {
160724ba675SRob Herring			compatible = "via,vt8500-uart";
161724ba675SRob Herring			reg = <0xd82c0000 0x1040>;
162724ba675SRob Herring			interrupts = <50>;
163724ba675SRob Herring			clocks = <&clkuart3>;
164724ba675SRob Herring			status = "disabled";
165724ba675SRob Herring		};
166724ba675SRob Herring
167724ba675SRob Herring		rtc@d8100000 {
168724ba675SRob Herring			compatible = "via,vt8500-rtc";
169724ba675SRob Herring			reg = <0xd8100000 0x10000>;
170724ba675SRob Herring			interrupts = <48>;
171724ba675SRob Herring		};
172724ba675SRob Herring
173724ba675SRob Herring		ethernet@d8004000 {
174724ba675SRob Herring			compatible = "via,vt8500-rhine";
175724ba675SRob Herring			reg = <0xd8004000 0x100>;
176724ba675SRob Herring			interrupts = <10>;
177724ba675SRob Herring		};
178724ba675SRob Herring	};
179724ba675SRob Herring};
180