1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * MMC IOdelay values for TI's DRA72x, DRA71x and AM571x SoCs. 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/* 9*724ba675SRob Herring * Rules for modifying this file: 10*724ba675SRob Herring * a) Update of this file should typically correspond to a datamanual revision. 11*724ba675SRob Herring * Datamanual revision that was used should be updated in comment below. 12*724ba675SRob Herring * If there is no update to datamanual, do not update the values. If you 13*724ba675SRob Herring * need to use values different from that recommended by the datamanual 14*724ba675SRob Herring * for your design, then you should consider adding values to the device- 15*724ba675SRob Herring * -tree file for your board directly. 16*724ba675SRob Herring * b) We keep the mode names as close to the datamanual as possible. So 17*724ba675SRob Herring * if the manual calls a mode, DDR50, or DDR or DDR 1.8v or DDR 3.3v, 18*724ba675SRob Herring * we follow that in code too. 19*724ba675SRob Herring * c) If the values change between multiple revisions of silicon, we add 20*724ba675SRob Herring * a revision tag to both the new and old entry. Use 'rev10' for PG 1.0, 21*724ba675SRob Herring * 'rev20' for PG 2.0 and so on. 22*724ba675SRob Herring * d) The node name and node label should be the exact same string. This is 23*724ba675SRob Herring * to curb naming creativity and achieve consistency. 24*724ba675SRob Herring * e) If in future, DRA71x and DRA72x values differ, then add 'dra71_' and 25*724ba675SRob Herring * 'dra72_' tag to entries. Both the new and old entries should gain a tag. 26*724ba675SRob Herring * 27*724ba675SRob Herring * Datamanual Revisions: 28*724ba675SRob Herring * 29*724ba675SRob Herring * AM571x Silicon Revision 2.0: SPRS957D, Revised January 2017 30*724ba675SRob Herring * AM571x Silicon Revision 1.0: SPRS919M, Revised November 2017 31*724ba675SRob Herring * DRA71x : SPRS960B, Revised February 2017 32*724ba675SRob Herring */ 33*724ba675SRob Herring 34*724ba675SRob Herring&dra7_pmx_core { 35*724ba675SRob Herring mmc1_pins_default: mmc1-default-pins { 36*724ba675SRob Herring pinctrl-single,pins = < 37*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 38*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 39*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 40*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 41*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 42*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 43*724ba675SRob Herring >; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring mmc1_pins_sdr12: mmc1-sdr12-pins { 47*724ba675SRob Herring pinctrl-single,pins = < 48*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 49*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 50*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 51*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 52*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 53*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 54*724ba675SRob Herring >; 55*724ba675SRob Herring }; 56*724ba675SRob Herring 57*724ba675SRob Herring mmc1_pins_hs: mmc1-hs-pins { 58*724ba675SRob Herring pinctrl-single,pins = < 59*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 60*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 61*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 62*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 63*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 64*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 65*724ba675SRob Herring >; 66*724ba675SRob Herring }; 67*724ba675SRob Herring 68*724ba675SRob Herring mmc1_pins_sdr25: mmc1-sdr25-pins { 69*724ba675SRob Herring pinctrl-single,pins = < 70*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 71*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 72*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 73*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 74*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 75*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 76*724ba675SRob Herring >; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring mmc1_pins_sdr50: mmc1-sdr50-pins { 80*724ba675SRob Herring pinctrl-single,pins = < 81*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_clk.clk */ 82*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_cmd.cmd */ 83*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat0.dat0 */ 84*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat1.dat1 */ 85*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat2.dat2 */ 86*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat3.dat3 */ 87*724ba675SRob Herring >; 88*724ba675SRob Herring }; 89*724ba675SRob Herring 90*724ba675SRob Herring mmc1_pins_ddr50_rev10: mmc1-ddr50-rev10-pins { 91*724ba675SRob Herring pinctrl-single,pins = < 92*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 93*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 94*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375C, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 95*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 96*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 97*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ 98*724ba675SRob Herring >; 99*724ba675SRob Herring }; 100*724ba675SRob Herring 101*724ba675SRob Herring mmc1_pins_ddr50_rev20: mmc1-ddr50-rev20-pins { 102*724ba675SRob Herring pinctrl-single,pins = < 103*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */ 104*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */ 105*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */ 106*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */ 107*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */ 108*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */ 109*724ba675SRob Herring >; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring mmc1_pins_sdr104: mmc1-sdr104-pins { 113*724ba675SRob Herring pinctrl-single,pins = < 114*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */ 115*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */ 116*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */ 117*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */ 118*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */ 119*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */ 120*724ba675SRob Herring >; 121*724ba675SRob Herring }; 122*724ba675SRob Herring 123*724ba675SRob Herring mmc2_pins_default: mmc2-default-pins { 124*724ba675SRob Herring pinctrl-single,pins = < 125*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 126*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 127*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 128*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 129*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 130*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 131*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 132*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 133*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 134*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 135*724ba675SRob Herring >; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring mmc2_pins_hs: mmc2-hs-pins { 139*724ba675SRob Herring pinctrl-single,pins = < 140*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 141*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 142*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 143*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 144*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 145*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 146*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 147*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 148*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 149*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 150*724ba675SRob Herring >; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring mmc2_pins_ddr_rev10: mmc2-ddr-rev10-pins { 154*724ba675SRob Herring pinctrl-single,pins = < 155*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 156*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 157*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 158*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 159*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 160*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 161*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 162*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 163*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 164*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 165*724ba675SRob Herring >; 166*724ba675SRob Herring }; 167*724ba675SRob Herring 168*724ba675SRob Herring mmc2_pins_ddr_rev20: mmc2-ddr-rev20-pins { 169*724ba675SRob Herring pinctrl-single,pins = < 170*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 171*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 172*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 173*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 174*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 175*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 176*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 177*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 178*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 179*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 180*724ba675SRob Herring >; 181*724ba675SRob Herring }; 182*724ba675SRob Herring 183*724ba675SRob Herring mmc2_pins_hs200: mmc2-hs200-pins { 184*724ba675SRob Herring pinctrl-single,pins = < 185*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 186*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 187*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 188*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 189*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 190*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 191*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 192*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 193*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 194*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 195*724ba675SRob Herring >; 196*724ba675SRob Herring }; 197*724ba675SRob Herring 198*724ba675SRob Herring mmc4_pins_default: mmc4-default-pins { 199*724ba675SRob Herring pinctrl-single,pins = < 200*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ 201*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ 202*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ 203*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ 204*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ 205*724ba675SRob Herring DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ 206*724ba675SRob Herring >; 207*724ba675SRob Herring }; 208*724ba675SRob Herring}; 209*724ba675SRob Herring 210*724ba675SRob Herring&dra7_iodelay_core { 211*724ba675SRob Herring 212*724ba675SRob Herring /* Corresponds to MMC1_MANUAL1 in datamanual */ 213*724ba675SRob Herring mmc1_iodelay_ddr50_conf: mmc1_iodelay_ddr50_conf { 214*724ba675SRob Herring pinctrl-pin-array = < 215*724ba675SRob Herring 0x618 A_DELAY_PS(588) G_DELAY_PS(0) /* CFG_MMC1_CLK_IN */ 216*724ba675SRob Herring 0x624 A_DELAY_PS(1000) G_DELAY_PS(0) /* CFG_MMC1_CMD_IN */ 217*724ba675SRob Herring 0x630 A_DELAY_PS(1375) G_DELAY_PS(0) /* CFG_MMC1_DAT0_IN */ 218*724ba675SRob Herring 0x63C A_DELAY_PS(1000) G_DELAY_PS(0) /* CFG_MMC1_DAT1_IN */ 219*724ba675SRob Herring 0x648 A_DELAY_PS(1000) G_DELAY_PS(0) /* CFG_MMC1_DAT2_IN */ 220*724ba675SRob Herring 0x654 A_DELAY_PS(1000) G_DELAY_PS(0) /* CFG_MMC1_DAT3_IN */ 221*724ba675SRob Herring 0x620 A_DELAY_PS(1230) G_DELAY_PS(0) /* CFG_MMC1_CLK_OUT */ 222*724ba675SRob Herring 0x62C A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_CMD_OUT */ 223*724ba675SRob Herring 0x638 A_DELAY_PS(56) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OUT */ 224*724ba675SRob Herring 0x644 A_DELAY_PS(76) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OUT */ 225*724ba675SRob Herring 0x650 A_DELAY_PS(91) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OUT */ 226*724ba675SRob Herring 0x65C A_DELAY_PS(99) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OUT */ 227*724ba675SRob Herring 0x628 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_CMD_OEN */ 228*724ba675SRob Herring 0x634 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OEN */ 229*724ba675SRob Herring 0x640 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OEN */ 230*724ba675SRob Herring 0x64C A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OEN */ 231*724ba675SRob Herring 0x658 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OEN */ 232*724ba675SRob Herring >; 233*724ba675SRob Herring }; 234*724ba675SRob Herring 235*724ba675SRob Herring /* Corresponds to MMC1_MANUAL2 in datamanual */ 236*724ba675SRob Herring mmc1_iodelay_sdr104_rev10_conf: mmc1_iodelay_sdr104_rev10_conf { 237*724ba675SRob Herring pinctrl-pin-array = < 238*724ba675SRob Herring 0x620 A_DELAY_PS(560) G_DELAY_PS(365) /* CFG_MMC1_CLK_OUT */ 239*724ba675SRob Herring 0x62c A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_CMD_OUT */ 240*724ba675SRob Herring 0x638 A_DELAY_PS(29) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OUT */ 241*724ba675SRob Herring 0x644 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OUT */ 242*724ba675SRob Herring 0x650 A_DELAY_PS(47) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OUT */ 243*724ba675SRob Herring 0x65c A_DELAY_PS(30) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OUT */ 244*724ba675SRob Herring 0x628 A_DELAY_PS(125) G_DELAY_PS(0) /* CFG_MMC1_CMD_OEN */ 245*724ba675SRob Herring 0x634 A_DELAY_PS(43) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OEN */ 246*724ba675SRob Herring 0x640 A_DELAY_PS(433) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OEN */ 247*724ba675SRob Herring 0x64c A_DELAY_PS(287) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OEN */ 248*724ba675SRob Herring 0x658 A_DELAY_PS(351) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OEN */ 249*724ba675SRob Herring >; 250*724ba675SRob Herring }; 251*724ba675SRob Herring 252*724ba675SRob Herring /* Corresponds to MMC1_MANUAL2 in datamanual */ 253*724ba675SRob Herring mmc1_iodelay_sdr104_rev20_conf: mmc1_iodelay_sdr104_rev20_conf { 254*724ba675SRob Herring pinctrl-pin-array = < 255*724ba675SRob Herring 0x620 A_DELAY_PS(520) G_DELAY_PS(320) /* CFG_MMC1_CLK_OUT */ 256*724ba675SRob Herring 0x62c A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_CMD_OUT */ 257*724ba675SRob Herring 0x638 A_DELAY_PS(40) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OUT */ 258*724ba675SRob Herring 0x644 A_DELAY_PS(83) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OUT */ 259*724ba675SRob Herring 0x650 A_DELAY_PS(98) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OUT */ 260*724ba675SRob Herring 0x65c A_DELAY_PS(106) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OUT */ 261*724ba675SRob Herring 0x628 A_DELAY_PS(51) G_DELAY_PS(0) /* CFG_MMC1_CMD_OEN */ 262*724ba675SRob Herring 0x634 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_MMC1_DAT0_OEN */ 263*724ba675SRob Herring 0x640 A_DELAY_PS(363) G_DELAY_PS(0) /* CFG_MMC1_DAT1_OEN */ 264*724ba675SRob Herring 0x64c A_DELAY_PS(199) G_DELAY_PS(0) /* CFG_MMC1_DAT2_OEN */ 265*724ba675SRob Herring 0x658 A_DELAY_PS(273) G_DELAY_PS(0) /* CFG_MMC1_DAT3_OEN */ 266*724ba675SRob Herring >; 267*724ba675SRob Herring }; 268*724ba675SRob Herring 269*724ba675SRob Herring /* Corresponds to MMC2_MANUAL1 in datamanual */ 270*724ba675SRob Herring mmc2_iodelay_ddr_conf: mmc2_iodelay_ddr_conf { 271*724ba675SRob Herring pinctrl-pin-array = < 272*724ba675SRob Herring 0x18c A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A19_IN */ 273*724ba675SRob Herring 0x1a4 A_DELAY_PS(119) G_DELAY_PS(0) /* CFG_GPMC_A20_IN */ 274*724ba675SRob Herring 0x1b0 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A21_IN */ 275*724ba675SRob Herring 0x1bc A_DELAY_PS(18) G_DELAY_PS(0) /* CFG_GPMC_A22_IN */ 276*724ba675SRob Herring 0x1c8 A_DELAY_PS(894) G_DELAY_PS(0) /* CFG_GPMC_A23_IN */ 277*724ba675SRob Herring 0x1d4 A_DELAY_PS(30) G_DELAY_PS(0) /* CFG_GPMC_A24_IN */ 278*724ba675SRob Herring 0x1e0 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_IN */ 279*724ba675SRob Herring 0x1ec A_DELAY_PS(23) G_DELAY_PS(0) /* CFG_GPMC_A26_IN */ 280*724ba675SRob Herring 0x1f8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_IN */ 281*724ba675SRob Herring 0x360 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_CS1_IN */ 282*724ba675SRob Herring 0x194 A_DELAY_PS(152) G_DELAY_PS(0) /* CFG_GPMC_A19_OUT */ 283*724ba675SRob Herring 0x1ac A_DELAY_PS(206) G_DELAY_PS(0) /* CFG_GPMC_A20_OUT */ 284*724ba675SRob Herring 0x1b8 A_DELAY_PS(78) G_DELAY_PS(0) /* CFG_GPMC_A21_OUT */ 285*724ba675SRob Herring 0x1c4 A_DELAY_PS(2) G_DELAY_PS(0) /* CFG_GPMC_A22_OUT */ 286*724ba675SRob Herring 0x1d0 A_DELAY_PS(266) G_DELAY_PS(0) /* CFG_GPMC_A23_OUT */ 287*724ba675SRob Herring 0x1dc A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A24_OUT */ 288*724ba675SRob Herring 0x1e8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_OUT */ 289*724ba675SRob Herring 0x1f4 A_DELAY_PS(43) G_DELAY_PS(0) /* CFG_GPMC_A26_OUT */ 290*724ba675SRob Herring 0x200 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_OUT */ 291*724ba675SRob Herring 0x368 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_CS1_OUT */ 292*724ba675SRob Herring 0x190 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A19_OEN */ 293*724ba675SRob Herring 0x1a8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A20_OEN */ 294*724ba675SRob Herring 0x1b4 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A21_OEN */ 295*724ba675SRob Herring 0x1c0 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A22_OEN */ 296*724ba675SRob Herring 0x1d8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A24_OEN */ 297*724ba675SRob Herring 0x1e4 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_OEN */ 298*724ba675SRob Herring 0x1f0 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A26_OEN */ 299*724ba675SRob Herring 0x1fc A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_OEN */ 300*724ba675SRob Herring 0x364 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_CS1_OEN */ 301*724ba675SRob Herring >; 302*724ba675SRob Herring }; 303*724ba675SRob Herring 304*724ba675SRob Herring /* Corresponds to MMC2_MANUAL3 in datamanual */ 305*724ba675SRob Herring mmc2_iodelay_hs200_rev10_conf: mmc2_iodelay_hs200_rev10_conf { 306*724ba675SRob Herring pinctrl-pin-array = < 307*724ba675SRob Herring 0x194 A_DELAY_PS(150) G_DELAY_PS(95) /* CFG_GPMC_A19_OUT */ 308*724ba675SRob Herring 0x1ac A_DELAY_PS(250) G_DELAY_PS(0) /* CFG_GPMC_A20_OUT */ 309*724ba675SRob Herring 0x1b8 A_DELAY_PS(125) G_DELAY_PS(0) /* CFG_GPMC_A21_OUT */ 310*724ba675SRob Herring 0x1c4 A_DELAY_PS(100) G_DELAY_PS(0) /* CFG_GPMC_A22_OUT */ 311*724ba675SRob Herring 0x1d0 A_DELAY_PS(870) G_DELAY_PS(415) /* CFG_GPMC_A23_OUT */ 312*724ba675SRob Herring 0x1dc A_DELAY_PS(30) G_DELAY_PS(0) /* CFG_GPMC_A24_OUT */ 313*724ba675SRob Herring 0x1e8 A_DELAY_PS(200) G_DELAY_PS(0) /* CFG_GPMC_A25_OUT */ 314*724ba675SRob Herring 0x1f4 A_DELAY_PS(200) G_DELAY_PS(0) /* CFG_GPMC_A26_OUT */ 315*724ba675SRob Herring 0x200 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_OUT */ 316*724ba675SRob Herring 0x368 A_DELAY_PS(240) G_DELAY_PS(0) /* CFG_GPMC_CS1_OUT */ 317*724ba675SRob Herring 0x190 A_DELAY_PS(695) G_DELAY_PS(0) /* CFG_GPMC_A19_OEN */ 318*724ba675SRob Herring 0x1a8 A_DELAY_PS(924) G_DELAY_PS(0) /* CFG_GPMC_A20_OEN */ 319*724ba675SRob Herring 0x1b4 A_DELAY_PS(719) G_DELAY_PS(0) /* CFG_GPMC_A21_OEN */ 320*724ba675SRob Herring 0x1c0 A_DELAY_PS(824) G_DELAY_PS(0) /* CFG_GPMC_A22_OEN */ 321*724ba675SRob Herring 0x1d8 A_DELAY_PS(877) G_DELAY_PS(0) /* CFG_GPMC_A24_OEN */ 322*724ba675SRob Herring 0x1e4 A_DELAY_PS(446) G_DELAY_PS(0) /* CFG_GPMC_A25_OEN */ 323*724ba675SRob Herring 0x1f0 A_DELAY_PS(847) G_DELAY_PS(0) /* CFG_GPMC_A26_OEN */ 324*724ba675SRob Herring 0x1fc A_DELAY_PS(586) G_DELAY_PS(0) /* CFG_GPMC_A27_OEN */ 325*724ba675SRob Herring 0x364 A_DELAY_PS(1039) G_DELAY_PS(0) /* CFG_GPMC_CS1_OEN */ 326*724ba675SRob Herring >; 327*724ba675SRob Herring }; 328*724ba675SRob Herring 329*724ba675SRob Herring /* Corresponds to MMC2_MANUAL3 in datamanual */ 330*724ba675SRob Herring mmc2_iodelay_hs200_rev20_conf: mmc2_iodelay_hs200_rev20_conf { 331*724ba675SRob Herring pinctrl-pin-array = < 332*724ba675SRob Herring 0x194 A_DELAY_PS(285) G_DELAY_PS(0) /* CFG_GPMC_A19_OUT */ 333*724ba675SRob Herring 0x1ac A_DELAY_PS(189) G_DELAY_PS(0) /* CFG_GPMC_A20_OUT */ 334*724ba675SRob Herring 0x1b8 A_DELAY_PS(0) G_DELAY_PS(120) /* CFG_GPMC_A21_OUT */ 335*724ba675SRob Herring 0x1c4 A_DELAY_PS(0) G_DELAY_PS(70) /* CFG_GPMC_A22_OUT */ 336*724ba675SRob Herring 0x1d0 A_DELAY_PS(730) G_DELAY_PS(360) /* CFG_GPMC_A23_OUT */ 337*724ba675SRob Herring 0x1dc A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A24_OUT */ 338*724ba675SRob Herring 0x1e8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_OUT */ 339*724ba675SRob Herring 0x1f4 A_DELAY_PS(70) G_DELAY_PS(0) /* CFG_GPMC_A26_OUT */ 340*724ba675SRob Herring 0x200 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_OUT */ 341*724ba675SRob Herring 0x368 A_DELAY_PS(0) G_DELAY_PS(120) /* CFG_GPMC_CS1_OUT */ 342*724ba675SRob Herring 0x190 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A19_OEN */ 343*724ba675SRob Herring 0x1a8 A_DELAY_PS(231) G_DELAY_PS(0) /* CFG_GPMC_A20_OEN */ 344*724ba675SRob Herring 0x1b4 A_DELAY_PS(39) G_DELAY_PS(0) /* CFG_GPMC_A21_OEN */ 345*724ba675SRob Herring 0x1c0 A_DELAY_PS(91) G_DELAY_PS(0) /* CFG_GPMC_A22_OEN */ 346*724ba675SRob Herring 0x1d8 A_DELAY_PS(176) G_DELAY_PS(0) /* CFG_GPMC_A24_OEN */ 347*724ba675SRob Herring 0x1e4 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_OEN */ 348*724ba675SRob Herring 0x1f0 A_DELAY_PS(101) G_DELAY_PS(0) /* CFG_GPMC_A26_OEN */ 349*724ba675SRob Herring 0x1fc A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A27_OEN */ 350*724ba675SRob Herring 0x364 A_DELAY_PS(360) G_DELAY_PS(0) /* CFG_GPMC_CS1_OEN */ 351*724ba675SRob Herring >; 352*724ba675SRob Herring }; 353*724ba675SRob Herring}; 354