1*a5c59a29SKevin Tung// SPDX-License-Identifier: GPL-2.0+ 2*a5c59a29SKevin Tung// Copyright (c) 2025 Facebook Inc. 3*a5c59a29SKevin Tung 4*a5c59a29SKevin Tung/dts-v1/; 5*a5c59a29SKevin Tung#include "aspeed-g6.dtsi" 6*a5c59a29SKevin Tung#include <dt-bindings/gpio/aspeed-gpio.h> 7*a5c59a29SKevin Tung#include <dt-bindings/i2c/i2c.h> 8*a5c59a29SKevin Tung 9*a5c59a29SKevin Tung/ { 10*a5c59a29SKevin Tung model = "Facebook Yosemite 5 BMC"; 11*a5c59a29SKevin Tung compatible = "facebook,yosemite5-bmc", "aspeed,ast2600"; 12*a5c59a29SKevin Tung 13*a5c59a29SKevin Tung aliases { 14*a5c59a29SKevin Tung i2c16 = &i2c5mux0ch0; 15*a5c59a29SKevin Tung i2c17 = &i2c5mux0ch1; 16*a5c59a29SKevin Tung i2c18 = &i2c5mux0ch2; 17*a5c59a29SKevin Tung i2c19 = &i2c5mux0ch3; 18*a5c59a29SKevin Tung i2c20 = &i2c5mux1ch0; 19*a5c59a29SKevin Tung i2c21 = &i2c5mux1ch1; 20*a5c59a29SKevin Tung i2c22 = &i2c5mux1ch2; 21*a5c59a29SKevin Tung i2c23 = &i2c5mux1ch3; 22*a5c59a29SKevin Tung i2c24 = &i2c6mux0ch0; 23*a5c59a29SKevin Tung i2c25 = &i2c6mux0ch1; 24*a5c59a29SKevin Tung i2c26 = &i2c6mux0ch2; 25*a5c59a29SKevin Tung i2c27 = &i2c6mux0ch3; 26*a5c59a29SKevin Tung i2c28 = &i2c8mux0ch0; 27*a5c59a29SKevin Tung i2c29 = &i2c8mux0ch1; 28*a5c59a29SKevin Tung i2c30 = &i2c8mux0ch2; 29*a5c59a29SKevin Tung i2c31 = &i2c8mux0ch3; 30*a5c59a29SKevin Tung i2c32 = &i2c30mux0ch0; 31*a5c59a29SKevin Tung i2c33 = &i2c30mux0ch1; 32*a5c59a29SKevin Tung i2c34 = &i2c30mux0ch2; 33*a5c59a29SKevin Tung i2c35 = &i2c30mux0ch3; 34*a5c59a29SKevin Tung serial0 = &uart1; 35*a5c59a29SKevin Tung serial2 = &uart3; 36*a5c59a29SKevin Tung serial3 = &uart4; 37*a5c59a29SKevin Tung serial4 = &uart5; 38*a5c59a29SKevin Tung }; 39*a5c59a29SKevin Tung 40*a5c59a29SKevin Tung chosen { 41*a5c59a29SKevin Tung stdout-path = "serial4:57600n8"; 42*a5c59a29SKevin Tung }; 43*a5c59a29SKevin Tung 44*a5c59a29SKevin Tung iio-hwmon { 45*a5c59a29SKevin Tung compatible = "iio-hwmon"; 46*a5c59a29SKevin Tung io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, 47*a5c59a29SKevin Tung <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>, 48*a5c59a29SKevin Tung <&adc1 2>; 49*a5c59a29SKevin Tung }; 50*a5c59a29SKevin Tung 51*a5c59a29SKevin Tung leds { 52*a5c59a29SKevin Tung compatible = "gpio-leds"; 53*a5c59a29SKevin Tung 54*a5c59a29SKevin Tung led-0 { 55*a5c59a29SKevin Tung label = "bmc_heartbeat_amber"; 56*a5c59a29SKevin Tung gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>; 57*a5c59a29SKevin Tung linux,default-trigger = "heartbeat"; 58*a5c59a29SKevin Tung }; 59*a5c59a29SKevin Tung 60*a5c59a29SKevin Tung led-1 { 61*a5c59a29SKevin Tung label = "fp_id_amber"; 62*a5c59a29SKevin Tung default-state = "off"; 63*a5c59a29SKevin Tung gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>; 64*a5c59a29SKevin Tung }; 65*a5c59a29SKevin Tung 66*a5c59a29SKevin Tung led-2 { 67*a5c59a29SKevin Tung label = "power_blue"; 68*a5c59a29SKevin Tung default-state = "off"; 69*a5c59a29SKevin Tung gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 70*a5c59a29SKevin Tung }; 71*a5c59a29SKevin Tung }; 72*a5c59a29SKevin Tung 73*a5c59a29SKevin Tung memory@80000000 { 74*a5c59a29SKevin Tung device_type = "memory"; 75*a5c59a29SKevin Tung reg = <0x80000000 0x80000000>; 76*a5c59a29SKevin Tung }; 77*a5c59a29SKevin Tung 78*a5c59a29SKevin Tung spi_gpio: spi { 79*a5c59a29SKevin Tung compatible = "spi-gpio"; 80*a5c59a29SKevin Tung #address-cells = <1>; 81*a5c59a29SKevin Tung #size-cells = <0>; 82*a5c59a29SKevin Tung 83*a5c59a29SKevin Tung sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 84*a5c59a29SKevin Tung mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>; 85*a5c59a29SKevin Tung miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>; 86*a5c59a29SKevin Tung cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; 87*a5c59a29SKevin Tung num-chipselects = <1>; 88*a5c59a29SKevin Tung status = "okay"; 89*a5c59a29SKevin Tung 90*a5c59a29SKevin Tung tpm@0 { 91*a5c59a29SKevin Tung compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; 92*a5c59a29SKevin Tung spi-max-frequency = <33000000>; 93*a5c59a29SKevin Tung reg = <0>; 94*a5c59a29SKevin Tung }; 95*a5c59a29SKevin Tung }; 96*a5c59a29SKevin Tung}; 97*a5c59a29SKevin Tung 98*a5c59a29SKevin Tung&adc0 { 99*a5c59a29SKevin Tung aspeed,int-vref-microvolt = <2500000>; 100*a5c59a29SKevin Tung pinctrl-names = "default"; 101*a5c59a29SKevin Tung pinctrl-0 = <&pinctrl_adc0_default 102*a5c59a29SKevin Tung &pinctrl_adc1_default 103*a5c59a29SKevin Tung &pinctrl_adc2_default 104*a5c59a29SKevin Tung &pinctrl_adc3_default 105*a5c59a29SKevin Tung &pinctrl_adc4_default 106*a5c59a29SKevin Tung &pinctrl_adc5_default 107*a5c59a29SKevin Tung &pinctrl_adc6_default 108*a5c59a29SKevin Tung &pinctrl_adc7_default>; 109*a5c59a29SKevin Tung status = "okay"; 110*a5c59a29SKevin Tung}; 111*a5c59a29SKevin Tung 112*a5c59a29SKevin Tung&adc1 { 113*a5c59a29SKevin Tung aspeed,int-vref-microvolt = <2500000>; 114*a5c59a29SKevin Tung pinctrl-names = "default"; 115*a5c59a29SKevin Tung pinctrl-0 = <&pinctrl_adc10_default>; 116*a5c59a29SKevin Tung status = "okay"; 117*a5c59a29SKevin Tung}; 118*a5c59a29SKevin Tung 119*a5c59a29SKevin Tung&ehci0 { 120*a5c59a29SKevin Tung status = "okay"; 121*a5c59a29SKevin Tung}; 122*a5c59a29SKevin Tung 123*a5c59a29SKevin Tung&ehci1 { 124*a5c59a29SKevin Tung status = "okay"; 125*a5c59a29SKevin Tung}; 126*a5c59a29SKevin Tung 127*a5c59a29SKevin Tung&fmc { 128*a5c59a29SKevin Tung status = "okay"; 129*a5c59a29SKevin Tung 130*a5c59a29SKevin Tung flash@0 { 131*a5c59a29SKevin Tung status = "okay"; 132*a5c59a29SKevin Tung m25p,fast-read; 133*a5c59a29SKevin Tung label = "bmc"; 134*a5c59a29SKevin Tung spi-max-frequency = <50000000>; 135*a5c59a29SKevin Tung#include "openbmc-flash-layout-128.dtsi" 136*a5c59a29SKevin Tung }; 137*a5c59a29SKevin Tung 138*a5c59a29SKevin Tung flash@1 { 139*a5c59a29SKevin Tung status = "okay"; 140*a5c59a29SKevin Tung m25p,fast-read; 141*a5c59a29SKevin Tung label = "alt-bmc"; 142*a5c59a29SKevin Tung spi-max-frequency = <50000000>; 143*a5c59a29SKevin Tung }; 144*a5c59a29SKevin Tung}; 145*a5c59a29SKevin Tung 146*a5c59a29SKevin Tung&gpio0 { 147*a5c59a29SKevin Tung gpio-line-names = 148*a5c59a29SKevin Tung /*A0-A7*/ "","","","","","","","", 149*a5c59a29SKevin Tung /*B0-B7*/ "BATTERY_DETECT","","BMC_I2C1_FPGA_ALERT","BMC_READY", 150*a5c59a29SKevin Tung "IOEXP_INT_3V3","FM_ID_LED","","", 151*a5c59a29SKevin Tung /*C0-C7*/ "","","","", 152*a5c59a29SKevin Tung "PMBUS_REQ_N","PSU_FW_UPDATE_REQ_N","","BMC_I2C_SSIF_ALERT", 153*a5c59a29SKevin Tung /*D0-D7*/ "","","","","","","","", 154*a5c59a29SKevin Tung /*E0-E7*/ "","","","","","","","", 155*a5c59a29SKevin Tung /*F0-F7*/ "","","","","","","","", 156*a5c59a29SKevin Tung /*G0-G7*/ "FM_BMC_MUX1_SEL","","","", 157*a5c59a29SKevin Tung "","","FM_DEBUG_PORT_PRSNT_N","FM_BMC_DBP_PRESENT_N", 158*a5c59a29SKevin Tung /*H0-H7*/ "","","","","","","","", 159*a5c59a29SKevin Tung /*I0-I7*/ "","","","","","FLASH_WP_STATUS","BMC_JTAG_MUX_SEL","", 160*a5c59a29SKevin Tung /*J0-J7*/ "","","","","","","","", 161*a5c59a29SKevin Tung /*K0-K7*/ "","","","","","","","", 162*a5c59a29SKevin Tung /*L0-L7*/ "","","","","","","","", 163*a5c59a29SKevin Tung /*M0-M7*/ "PCIE_EP_RST_EN","BMC_FRU_WP","SCM_HPM_STBY_RST_N", 164*a5c59a29SKevin Tung "SCM_HPM_STBY_EN","STBY_POWER_PG_3V3","TH500_SHDN_OK","","", 165*a5c59a29SKevin Tung /*N0-N7*/ "led-postcode-0","led-postcode-1","led-postcode-2", 166*a5c59a29SKevin Tung "led-postcode-3","led-postcode-4","led-postcode-5", 167*a5c59a29SKevin Tung "led-postcode-6","led-postcode-7", 168*a5c59a29SKevin Tung /*O0-O7*/ "RUN_POWER_PG","PWR_BRAKE","CHASSIS_AC_LOSS","BSM_PRSNT_N", 169*a5c59a29SKevin Tung "PSU_SMB_ALERT","FM_TPM_PRSNT_0_N","PSU_FW_UPDATING_N","", 170*a5c59a29SKevin Tung /*P0-P7*/ "PWR_BTN_BMC_N","IPEX_CABLE_PRSNT","ID_RST_BTN_BMC_N", 171*a5c59a29SKevin Tung "RST_BMC_RSTBTN_OUT_N","BMC_PWR_LED","RUN_POWER_EN","SHDN_FORCE","", 172*a5c59a29SKevin Tung /*Q0-Q7*/ "IRQ_PCH_TPM_SPI_LV3_N","USB_OC0_REAR_N","UART_MUX_SEL", 173*a5c59a29SKevin Tung "I2C_MUX_RESET","RSVD_NV_PLT_DETECT","SPI_TPM_INT", 174*a5c59a29SKevin Tung "CPU_JTAG_MUX_SELECT","THERM_BB_OVERT", 175*a5c59a29SKevin Tung /*R0-R7*/ "THERM_BB_WARN","SPI_BMC_FPGA_INT","CPU_BOOT_DONE","PMBUS_GNT", 176*a5c59a29SKevin Tung "CHASSIS_PWR_BRK","PCIE_WAKE","PDB_THERM_OVERT","SHDN_REQ", 177*a5c59a29SKevin Tung /*S0-S7*/ "","","SYS_BMC_PWRBTN_N","FM_TPM_PRSNT_1_N", 178*a5c59a29SKevin Tung "FM_BMC_DEBUG_SW_N","UID_LED_N","SYS_FAULT_LED_N","RUN_POWER_FAULT", 179*a5c59a29SKevin Tung /*T0-T7*/ "","","","","","","","", 180*a5c59a29SKevin Tung /*U0-U7*/ "FM_DBP_BMC_PRDY_N","","","","","","","", 181*a5c59a29SKevin Tung /*V0-V7*/ "L2_RST_REQ_OUT","L0L1_RST_REQ_OUT","BMC_ID_BEEP_SEL", 182*a5c59a29SKevin Tung "BMC_I2C0_FPGA_ALERT","SMB_BMC_TMP_ALERT","PWR_LED_N", 183*a5c59a29SKevin Tung "SYS_RST_OUT","IRQ_TPM_SPI_N", 184*a5c59a29SKevin Tung /*W0-W7*/ "","","","","","","IRQ_ESPI_LPC_SERIRQ_ALERT0_N","", 185*a5c59a29SKevin Tung /*X0-X7*/ "","FM_DBP_CPU_PREQ_GF_N","","","","","","", 186*a5c59a29SKevin Tung /*Y0-Y7*/ "","","FM_FLASH_LATCH_N","BMC_EMMC_RST_N","","","","", 187*a5c59a29SKevin Tung /*Z0-Z7*/ "","","","","","","",""; 188*a5c59a29SKevin Tung}; 189*a5c59a29SKevin Tung 190*a5c59a29SKevin Tung&gpio1 { 191*a5c59a29SKevin Tung gpio-line-names = 192*a5c59a29SKevin Tung /*18A0-18A7*/ "","","","","","","","", 193*a5c59a29SKevin Tung /*18B0-18B7*/ "","","","","FM_BOARD_BMC_REV_ID0", 194*a5c59a29SKevin Tung "FM_BOARD_BMC_REV_ID1","FM_BOARD_BMC_REV_ID2","", 195*a5c59a29SKevin Tung /*18C0-18C7*/ "","","SPI_BMC_BIOS_ROM_IRQ0_N","","","","","", 196*a5c59a29SKevin Tung /*18D0-18D7*/ "","","","","","","","", 197*a5c59a29SKevin Tung /*18E0-18E3*/ "FM_BMC_PROT_LS_EN","AC_PWR_BMC_BTN_N","",""; 198*a5c59a29SKevin Tung}; 199*a5c59a29SKevin Tung 200*a5c59a29SKevin Tung/* MB CPLD I2C */ 201*a5c59a29SKevin Tung&i2c0 { 202*a5c59a29SKevin Tung status = "okay"; 203*a5c59a29SKevin Tung}; 204*a5c59a29SKevin Tung 205*a5c59a29SKevin Tung/* CPU I2C */ 206*a5c59a29SKevin Tung&i2c1 { 207*a5c59a29SKevin Tung status = "okay"; 208*a5c59a29SKevin Tung}; 209*a5c59a29SKevin Tung 210*a5c59a29SKevin Tung/* MCIO 2A I2C */ 211*a5c59a29SKevin Tung&i2c2 { 212*a5c59a29SKevin Tung status = "okay"; 213*a5c59a29SKevin Tung}; 214*a5c59a29SKevin Tung 215*a5c59a29SKevin Tung&i2c3 { 216*a5c59a29SKevin Tung status = "okay"; 217*a5c59a29SKevin Tung 218*a5c59a29SKevin Tung /* Socket 0 SBRMI */ 219*a5c59a29SKevin Tung sbrmi@3c { 220*a5c59a29SKevin Tung compatible = "amd,sbrmi"; 221*a5c59a29SKevin Tung reg = <0x3c>; 222*a5c59a29SKevin Tung }; 223*a5c59a29SKevin Tung 224*a5c59a29SKevin Tung /* Socket 0 SBTSI */ 225*a5c59a29SKevin Tung sbtsi@4c { 226*a5c59a29SKevin Tung compatible = "amd,sbtsi"; 227*a5c59a29SKevin Tung reg = <0x4c>; 228*a5c59a29SKevin Tung }; 229*a5c59a29SKevin Tung}; 230*a5c59a29SKevin Tung 231*a5c59a29SKevin Tung&i2c4 { 232*a5c59a29SKevin Tung multi-master; 233*a5c59a29SKevin Tung mctp-controller; 234*a5c59a29SKevin Tung status = "okay"; 235*a5c59a29SKevin Tung 236*a5c59a29SKevin Tung mctp@10 { 237*a5c59a29SKevin Tung compatible = "mctp-i2c-controller"; 238*a5c59a29SKevin Tung reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 239*a5c59a29SKevin Tung }; 240*a5c59a29SKevin Tung 241*a5c59a29SKevin Tung /* OCP NIC TEMP */ 242*a5c59a29SKevin Tung temperature-sensor@1f { 243*a5c59a29SKevin Tung compatible = "ti,tmp421"; 244*a5c59a29SKevin Tung reg = <0x1f>; 245*a5c59a29SKevin Tung }; 246*a5c59a29SKevin Tung 247*a5c59a29SKevin Tung /* OCP NIC FRU EEPROM */ 248*a5c59a29SKevin Tung eeprom@50 { 249*a5c59a29SKevin Tung compatible = "atmel,24c64"; 250*a5c59a29SKevin Tung reg = <0x50>; 251*a5c59a29SKevin Tung }; 252*a5c59a29SKevin Tung}; 253*a5c59a29SKevin Tung 254*a5c59a29SKevin Tung&i2c5 { 255*a5c59a29SKevin Tung status = "okay"; 256*a5c59a29SKevin Tung 257*a5c59a29SKevin Tung /* I2C MUX for MCIO 1A */ 258*a5c59a29SKevin Tung i2c-mux@70 { 259*a5c59a29SKevin Tung compatible = "nxp,pca9546"; 260*a5c59a29SKevin Tung reg = <0x70>; 261*a5c59a29SKevin Tung #address-cells = <1>; 262*a5c59a29SKevin Tung #size-cells = <0>; 263*a5c59a29SKevin Tung i2c-mux-idle-disconnect; 264*a5c59a29SKevin Tung 265*a5c59a29SKevin Tung i2c5mux0ch0: i2c@0 { 266*a5c59a29SKevin Tung reg = <0>; 267*a5c59a29SKevin Tung #address-cells = <1>; 268*a5c59a29SKevin Tung #size-cells = <0>; 269*a5c59a29SKevin Tung }; 270*a5c59a29SKevin Tung 271*a5c59a29SKevin Tung i2c5mux0ch1: i2c@1 { 272*a5c59a29SKevin Tung reg = <1>; 273*a5c59a29SKevin Tung #address-cells = <1>; 274*a5c59a29SKevin Tung #size-cells = <0>; 275*a5c59a29SKevin Tung }; 276*a5c59a29SKevin Tung 277*a5c59a29SKevin Tung i2c5mux0ch2: i2c@2 { 278*a5c59a29SKevin Tung reg = <2>; 279*a5c59a29SKevin Tung #address-cells = <1>; 280*a5c59a29SKevin Tung #size-cells = <0>; 281*a5c59a29SKevin Tung }; 282*a5c59a29SKevin Tung 283*a5c59a29SKevin Tung i2c5mux0ch3: i2c@3 { 284*a5c59a29SKevin Tung reg = <3>; 285*a5c59a29SKevin Tung #address-cells = <1>; 286*a5c59a29SKevin Tung #size-cells = <0>; 287*a5c59a29SKevin Tung }; 288*a5c59a29SKevin Tung }; 289*a5c59a29SKevin Tung 290*a5c59a29SKevin Tung /* I2C MUX for MCIO 0A */ 291*a5c59a29SKevin Tung i2c-mux@77 { 292*a5c59a29SKevin Tung compatible = "nxp,pca9546"; 293*a5c59a29SKevin Tung reg = <0x77>; 294*a5c59a29SKevin Tung #address-cells = <1>; 295*a5c59a29SKevin Tung #size-cells = <0>; 296*a5c59a29SKevin Tung i2c-mux-idle-disconnect; 297*a5c59a29SKevin Tung 298*a5c59a29SKevin Tung i2c5mux1ch0: i2c@0 { 299*a5c59a29SKevin Tung reg = <0>; 300*a5c59a29SKevin Tung #address-cells = <1>; 301*a5c59a29SKevin Tung #size-cells = <0>; 302*a5c59a29SKevin Tung }; 303*a5c59a29SKevin Tung 304*a5c59a29SKevin Tung i2c5mux1ch1: i2c@1 { 305*a5c59a29SKevin Tung reg = <1>; 306*a5c59a29SKevin Tung #address-cells = <1>; 307*a5c59a29SKevin Tung #size-cells = <0>; 308*a5c59a29SKevin Tung }; 309*a5c59a29SKevin Tung 310*a5c59a29SKevin Tung i2c5mux1ch2: i2c@2 { 311*a5c59a29SKevin Tung reg = <2>; 312*a5c59a29SKevin Tung #address-cells = <1>; 313*a5c59a29SKevin Tung #size-cells = <0>; 314*a5c59a29SKevin Tung }; 315*a5c59a29SKevin Tung 316*a5c59a29SKevin Tung i2c5mux1ch3: i2c@3 { 317*a5c59a29SKevin Tung reg = <3>; 318*a5c59a29SKevin Tung #address-cells = <1>; 319*a5c59a29SKevin Tung #size-cells = <0>; 320*a5c59a29SKevin Tung }; 321*a5c59a29SKevin Tung }; 322*a5c59a29SKevin Tung}; 323*a5c59a29SKevin Tung 324*a5c59a29SKevin Tung&i2c6 { 325*a5c59a29SKevin Tung status = "okay"; 326*a5c59a29SKevin Tung 327*a5c59a29SKevin Tung /* I2C MUX for PWRPIC #13 ~ #16 */ 328*a5c59a29SKevin Tung i2c-mux@77 { 329*a5c59a29SKevin Tung compatible = "nxp,pca9546"; 330*a5c59a29SKevin Tung reg = <0x77>; 331*a5c59a29SKevin Tung #address-cells = <1>; 332*a5c59a29SKevin Tung #size-cells = <0>; 333*a5c59a29SKevin Tung i2c-mux-idle-disconnect; 334*a5c59a29SKevin Tung 335*a5c59a29SKevin Tung /* PWRPIC #13 */ 336*a5c59a29SKevin Tung i2c6mux0ch0: i2c@0 { 337*a5c59a29SKevin Tung reg = <0>; 338*a5c59a29SKevin Tung #address-cells = <1>; 339*a5c59a29SKevin Tung #size-cells = <0>; 340*a5c59a29SKevin Tung }; 341*a5c59a29SKevin Tung 342*a5c59a29SKevin Tung /* PWRPIC #14 */ 343*a5c59a29SKevin Tung i2c6mux0ch1: i2c@1 { 344*a5c59a29SKevin Tung reg = <1>; 345*a5c59a29SKevin Tung #address-cells = <1>; 346*a5c59a29SKevin Tung #size-cells = <0>; 347*a5c59a29SKevin Tung }; 348*a5c59a29SKevin Tung 349*a5c59a29SKevin Tung /* PWRPIC #16 */ 350*a5c59a29SKevin Tung i2c6mux0ch2: i2c@2 { 351*a5c59a29SKevin Tung reg = <2>; 352*a5c59a29SKevin Tung #address-cells = <1>; 353*a5c59a29SKevin Tung #size-cells = <0>; 354*a5c59a29SKevin Tung }; 355*a5c59a29SKevin Tung 356*a5c59a29SKevin Tung /* PWRPIC #15 */ 357*a5c59a29SKevin Tung i2c6mux0ch3: i2c@3 { 358*a5c59a29SKevin Tung reg = <3>; 359*a5c59a29SKevin Tung #address-cells = <1>; 360*a5c59a29SKevin Tung #size-cells = <0>; 361*a5c59a29SKevin Tung }; 362*a5c59a29SKevin Tung }; 363*a5c59a29SKevin Tung}; 364*a5c59a29SKevin Tung 365*a5c59a29SKevin Tung/* SCM CPLD I2C */ 366*a5c59a29SKevin Tung&i2c7 { 367*a5c59a29SKevin Tung status = "okay"; 368*a5c59a29SKevin Tung}; 369*a5c59a29SKevin Tung 370*a5c59a29SKevin Tung&i2c8 { 371*a5c59a29SKevin Tung status = "okay"; 372*a5c59a29SKevin Tung 373*a5c59a29SKevin Tung power-monitor@14 { 374*a5c59a29SKevin Tung compatible = "infineon,xdp710"; 375*a5c59a29SKevin Tung reg = <0x14>; 376*a5c59a29SKevin Tung }; 377*a5c59a29SKevin Tung 378*a5c59a29SKevin Tung adc@1d { 379*a5c59a29SKevin Tung compatible = "ti,adc128d818"; 380*a5c59a29SKevin Tung reg = <0x1d>; 381*a5c59a29SKevin Tung ti,mode = /bits/ 8 <1>; 382*a5c59a29SKevin Tung }; 383*a5c59a29SKevin Tung 384*a5c59a29SKevin Tung power-sensor@40 { 385*a5c59a29SKevin Tung compatible = "ti,ina238"; 386*a5c59a29SKevin Tung reg = <0x40>; 387*a5c59a29SKevin Tung shunt-resistor = <1000>; 388*a5c59a29SKevin Tung }; 389*a5c59a29SKevin Tung 390*a5c59a29SKevin Tung /* PADDLE BD IOEXP */ 391*a5c59a29SKevin Tung gpio-expander@41 { 392*a5c59a29SKevin Tung compatible = "nxp,pca9536"; 393*a5c59a29SKevin Tung reg = <0x41>; 394*a5c59a29SKevin Tung gpio-controller; 395*a5c59a29SKevin Tung #gpio-cells = <2>; 396*a5c59a29SKevin Tung gpio-line-names = 397*a5c59a29SKevin Tung "HSC_OC_GPIO0", "HSC_OC_GPIO1", 398*a5c59a29SKevin Tung "HSC_OC_GPIO2", "HSC_OC_GPIO3"; 399*a5c59a29SKevin Tung }; 400*a5c59a29SKevin Tung 401*a5c59a29SKevin Tung power-sensor@42 { 402*a5c59a29SKevin Tung compatible = "ti,ina238"; 403*a5c59a29SKevin Tung reg = <0x42>; 404*a5c59a29SKevin Tung shunt-resistor = <1000>; 405*a5c59a29SKevin Tung }; 406*a5c59a29SKevin Tung 407*a5c59a29SKevin Tung power-monitor@43 { 408*a5c59a29SKevin Tung compatible = "lltc,ltc4287"; 409*a5c59a29SKevin Tung reg = <0x43>; 410*a5c59a29SKevin Tung shunt-resistor-micro-ohms = <250>; 411*a5c59a29SKevin Tung }; 412*a5c59a29SKevin Tung 413*a5c59a29SKevin Tung power-sensor@44 { 414*a5c59a29SKevin Tung compatible = "ti,ina238"; 415*a5c59a29SKevin Tung reg = <0x44>; 416*a5c59a29SKevin Tung shunt-resistor = <1000>; 417*a5c59a29SKevin Tung }; 418*a5c59a29SKevin Tung 419*a5c59a29SKevin Tung power-sensor@45 { 420*a5c59a29SKevin Tung compatible = "ti,ina238"; 421*a5c59a29SKevin Tung reg = <0x45>; 422*a5c59a29SKevin Tung shunt-resistor = <1000>; 423*a5c59a29SKevin Tung }; 424*a5c59a29SKevin Tung 425*a5c59a29SKevin Tung power-monitor@47 { 426*a5c59a29SKevin Tung compatible = "ti,tps25990"; 427*a5c59a29SKevin Tung reg = <0x47>; 428*a5c59a29SKevin Tung ti,rimon-micro-ohms = <430000000>; 429*a5c59a29SKevin Tung }; 430*a5c59a29SKevin Tung 431*a5c59a29SKevin Tung temperature-sensor@48 { 432*a5c59a29SKevin Tung compatible = "ti,tmp75"; 433*a5c59a29SKevin Tung reg = <0x48>; 434*a5c59a29SKevin Tung }; 435*a5c59a29SKevin Tung 436*a5c59a29SKevin Tung temperature-sensor@49 { 437*a5c59a29SKevin Tung compatible = "ti,tmp75"; 438*a5c59a29SKevin Tung reg = <0x49>; 439*a5c59a29SKevin Tung }; 440*a5c59a29SKevin Tung 441*a5c59a29SKevin Tung /* PDB FRU */ 442*a5c59a29SKevin Tung eeprom@56 { 443*a5c59a29SKevin Tung compatible = "atmel,24c128"; 444*a5c59a29SKevin Tung reg = <0x56>; 445*a5c59a29SKevin Tung }; 446*a5c59a29SKevin Tung 447*a5c59a29SKevin Tung /* Paddle BD FRU */ 448*a5c59a29SKevin Tung eeprom@57 { 449*a5c59a29SKevin Tung compatible = "atmel,24c128"; 450*a5c59a29SKevin Tung reg = <0x57>; 451*a5c59a29SKevin Tung }; 452*a5c59a29SKevin Tung 453*a5c59a29SKevin Tung power-monitor@58 { 454*a5c59a29SKevin Tung compatible = "renesas,isl28022"; 455*a5c59a29SKevin Tung reg = <0x58>; 456*a5c59a29SKevin Tung shunt-resistor-micro-ohms = <1000>; 457*a5c59a29SKevin Tung }; 458*a5c59a29SKevin Tung 459*a5c59a29SKevin Tung power-monitor@59 { 460*a5c59a29SKevin Tung compatible = "renesas,isl28022"; 461*a5c59a29SKevin Tung reg = <0x59>; 462*a5c59a29SKevin Tung shunt-resistor-micro-ohms = <1000>; 463*a5c59a29SKevin Tung }; 464*a5c59a29SKevin Tung 465*a5c59a29SKevin Tung power-monitor@5a { 466*a5c59a29SKevin Tung compatible = "renesas,isl28022"; 467*a5c59a29SKevin Tung reg = <0x5a>; 468*a5c59a29SKevin Tung shunt-resistor-micro-ohms = <1000>; 469*a5c59a29SKevin Tung }; 470*a5c59a29SKevin Tung 471*a5c59a29SKevin Tung power-monitor@5b { 472*a5c59a29SKevin Tung compatible = "renesas,isl28022"; 473*a5c59a29SKevin Tung reg = <0x5b>; 474*a5c59a29SKevin Tung shunt-resistor-micro-ohms = <1000>; 475*a5c59a29SKevin Tung }; 476*a5c59a29SKevin Tung 477*a5c59a29SKevin Tung psu@5c { 478*a5c59a29SKevin Tung compatible = "renesas,raa228006"; 479*a5c59a29SKevin Tung reg = <0x5c>; 480*a5c59a29SKevin Tung }; 481*a5c59a29SKevin Tung 482*a5c59a29SKevin Tung fan-controller@5e{ 483*a5c59a29SKevin Tung compatible = "maxim,max31790"; 484*a5c59a29SKevin Tung reg = <0x5e>; 485*a5c59a29SKevin Tung }; 486*a5c59a29SKevin Tung 487*a5c59a29SKevin Tung /* I2C MUX for PWRPIC #1, #2, #11, #12 */ 488*a5c59a29SKevin Tung i2c-mux@77 { 489*a5c59a29SKevin Tung compatible = "nxp,pca9546"; 490*a5c59a29SKevin Tung reg = <0x77>; 491*a5c59a29SKevin Tung #address-cells = <1>; 492*a5c59a29SKevin Tung #size-cells = <0>; 493*a5c59a29SKevin Tung i2c-mux-idle-disconnect; 494*a5c59a29SKevin Tung 495*a5c59a29SKevin Tung /* PWRPIC #1 */ 496*a5c59a29SKevin Tung i2c8mux0ch0: i2c@0 { 497*a5c59a29SKevin Tung reg = <0>; 498*a5c59a29SKevin Tung #address-cells = <1>; 499*a5c59a29SKevin Tung #size-cells = <0>; 500*a5c59a29SKevin Tung }; 501*a5c59a29SKevin Tung 502*a5c59a29SKevin Tung /* PWRPIC #2 */ 503*a5c59a29SKevin Tung i2c8mux0ch1: i2c@1 { 504*a5c59a29SKevin Tung reg = <1>; 505*a5c59a29SKevin Tung #address-cells = <1>; 506*a5c59a29SKevin Tung #size-cells = <0>; 507*a5c59a29SKevin Tung }; 508*a5c59a29SKevin Tung 509*a5c59a29SKevin Tung /* PWRPIC #12 (Connector to CXL BD) */ 510*a5c59a29SKevin Tung i2c8mux0ch2: i2c@2 { 511*a5c59a29SKevin Tung reg = <2>; 512*a5c59a29SKevin Tung #address-cells = <1>; 513*a5c59a29SKevin Tung #size-cells = <0>; 514*a5c59a29SKevin Tung 515*a5c59a29SKevin Tung i2c-mux@70 { 516*a5c59a29SKevin Tung compatible = "nxp,pca9546"; 517*a5c59a29SKevin Tung reg = <0x70>; 518*a5c59a29SKevin Tung #address-cells = <1>; 519*a5c59a29SKevin Tung #size-cells = <0>; 520*a5c59a29SKevin Tung i2c-mux-idle-disconnect; 521*a5c59a29SKevin Tung 522*a5c59a29SKevin Tung i2c30mux0ch0: i2c@0 { 523*a5c59a29SKevin Tung reg = <0>; 524*a5c59a29SKevin Tung #address-cells = <1>; 525*a5c59a29SKevin Tung #size-cells = <0>; 526*a5c59a29SKevin Tung }; 527*a5c59a29SKevin Tung 528*a5c59a29SKevin Tung i2c30mux0ch1: i2c@1 { 529*a5c59a29SKevin Tung reg = <1>; 530*a5c59a29SKevin Tung #address-cells = <1>; 531*a5c59a29SKevin Tung #size-cells = <0>; 532*a5c59a29SKevin Tung }; 533*a5c59a29SKevin Tung 534*a5c59a29SKevin Tung i2c30mux0ch2: i2c@2 { 535*a5c59a29SKevin Tung reg = <2>; 536*a5c59a29SKevin Tung #address-cells = <1>; 537*a5c59a29SKevin Tung #size-cells = <0>; 538*a5c59a29SKevin Tung 539*a5c59a29SKevin Tung adc@1e { 540*a5c59a29SKevin Tung compatible = "ti,adc128d818"; 541*a5c59a29SKevin Tung reg = <0x1e>; 542*a5c59a29SKevin Tung ti,mode = /bits/ 8 <1>; 543*a5c59a29SKevin Tung }; 544*a5c59a29SKevin Tung 545*a5c59a29SKevin Tung adc@1f { 546*a5c59a29SKevin Tung compatible = "ti,adc128d818"; 547*a5c59a29SKevin Tung reg = <0x1f>; 548*a5c59a29SKevin Tung ti,mode = /bits/ 8 <1>; 549*a5c59a29SKevin Tung }; 550*a5c59a29SKevin Tung 551*a5c59a29SKevin Tung /* CXL BD IOEXP */ 552*a5c59a29SKevin Tung gpio-expander@27 { 553*a5c59a29SKevin Tung compatible = "nxp,pca9535"; 554*a5c59a29SKevin Tung reg = <0x27>; 555*a5c59a29SKevin Tung gpio-controller; 556*a5c59a29SKevin Tung #gpio-cells = <2>; 557*a5c59a29SKevin Tung gpio-line-names = 558*a5c59a29SKevin Tung "IRQ_TEMP_0_ALERT_N","IRQ_TEMP_1_ALERT_N", 559*a5c59a29SKevin Tung "ALERT_PMBUS_0_N","ALERT_PMBUS_1_N", 560*a5c59a29SKevin Tung "ALERT_PMBUS_2_N","IRQ_INA230_12V_ALERT_N", 561*a5c59a29SKevin Tung "RST_IOX_CXL_N","DEBUG_UART_SEL_0", 562*a5c59a29SKevin Tung "DEBUG_UART_SEL_1","BMC_REMOTEJTAG_EN_N", 563*a5c59a29SKevin Tung "JTAG_BMC_3V3_CTL_CLR_N","DDR_CH02_I2C_MUX_SEL", 564*a5c59a29SKevin Tung "DDR_CH13_I2C_MUX_SEL","SYS_OK", 565*a5c59a29SKevin Tung "CXL_VRHOT_ALERT_R1_N",""; 566*a5c59a29SKevin Tung }; 567*a5c59a29SKevin Tung 568*a5c59a29SKevin Tung temperature-sensor@4a { 569*a5c59a29SKevin Tung compatible = "ti,tmp75"; 570*a5c59a29SKevin Tung reg = <0x4a>; 571*a5c59a29SKevin Tung }; 572*a5c59a29SKevin Tung 573*a5c59a29SKevin Tung temperature-sensor@4c { 574*a5c59a29SKevin Tung compatible = "ti,tmp432"; 575*a5c59a29SKevin Tung reg = <0x4c>; 576*a5c59a29SKevin Tung }; 577*a5c59a29SKevin Tung 578*a5c59a29SKevin Tung power-sensor@4d { 579*a5c59a29SKevin Tung compatible = "ti,ina230"; 580*a5c59a29SKevin Tung reg = <0x4d>; 581*a5c59a29SKevin Tung shunt-resistor = <2000>; 582*a5c59a29SKevin Tung }; 583*a5c59a29SKevin Tung 584*a5c59a29SKevin Tung temperature-sensor@4e { 585*a5c59a29SKevin Tung compatible = "ti,tmp75"; 586*a5c59a29SKevin Tung reg = <0x4e>; 587*a5c59a29SKevin Tung }; 588*a5c59a29SKevin Tung 589*a5c59a29SKevin Tung /* CXL FRU */ 590*a5c59a29SKevin Tung eeprom@50 { 591*a5c59a29SKevin Tung compatible = "atmel,24c64"; 592*a5c59a29SKevin Tung reg = <0x50>; 593*a5c59a29SKevin Tung }; 594*a5c59a29SKevin Tung }; 595*a5c59a29SKevin Tung 596*a5c59a29SKevin Tung i2c30mux0ch3: i2c@3 { 597*a5c59a29SKevin Tung reg = <3>; 598*a5c59a29SKevin Tung #address-cells = <1>; 599*a5c59a29SKevin Tung #size-cells = <0>; 600*a5c59a29SKevin Tung }; 601*a5c59a29SKevin Tung }; 602*a5c59a29SKevin Tung }; 603*a5c59a29SKevin Tung 604*a5c59a29SKevin Tung /* PWRPIC #11 */ 605*a5c59a29SKevin Tung i2c8mux0ch3: i2c@3 { 606*a5c59a29SKevin Tung #address-cells = <1>; 607*a5c59a29SKevin Tung #size-cells = <0>; 608*a5c59a29SKevin Tung reg = <3>; 609*a5c59a29SKevin Tung }; 610*a5c59a29SKevin Tung }; 611*a5c59a29SKevin Tung}; 612*a5c59a29SKevin Tung 613*a5c59a29SKevin Tung&i2c9 { 614*a5c59a29SKevin Tung status = "okay"; 615*a5c59a29SKevin Tung 616*a5c59a29SKevin Tung temperature-sensor@4b { 617*a5c59a29SKevin Tung compatible = "ti,tmp75"; 618*a5c59a29SKevin Tung reg = <0x4b>; 619*a5c59a29SKevin Tung }; 620*a5c59a29SKevin Tung 621*a5c59a29SKevin Tung /* SCM FRU */ 622*a5c59a29SKevin Tung eeprom@50 { 623*a5c59a29SKevin Tung compatible = "atmel,24c128"; 624*a5c59a29SKevin Tung reg = <0x50>; 625*a5c59a29SKevin Tung }; 626*a5c59a29SKevin Tung 627*a5c59a29SKevin Tung /* BSM FRU */ 628*a5c59a29SKevin Tung eeprom@56 { 629*a5c59a29SKevin Tung compatible = "atmel,24c64"; 630*a5c59a29SKevin Tung reg = <0x56>; 631*a5c59a29SKevin Tung }; 632*a5c59a29SKevin Tung}; 633*a5c59a29SKevin Tung 634*a5c59a29SKevin Tung/* MCIO 0A I2C */ 635*a5c59a29SKevin Tung&i2c10 { 636*a5c59a29SKevin Tung status = "okay"; 637*a5c59a29SKevin Tung 638*a5c59a29SKevin Tung /* E1S EB IOEXP0 */ 639*a5c59a29SKevin Tung gpio-expander@21 { 640*a5c59a29SKevin Tung compatible = "nxp,pca9535"; 641*a5c59a29SKevin Tung interrupt-parent = <&sgpiom0>; 642*a5c59a29SKevin Tung interrupts = <172 IRQ_TYPE_EDGE_FALLING>; 643*a5c59a29SKevin Tung reg = <0x21>; 644*a5c59a29SKevin Tung gpio-controller; 645*a5c59a29SKevin Tung #gpio-cells = <2>; 646*a5c59a29SKevin Tung gpio-line-names = 647*a5c59a29SKevin Tung "RST_SMB_E1S_0","LED_ACTIVE_E1S_0", 648*a5c59a29SKevin Tung "E1S_0_PRSNT_N","RST_PCIE_E1S_0_PERST", 649*a5c59a29SKevin Tung "E1S_0_PWRDIS","ALERT_INA_0", 650*a5c59a29SKevin Tung "","", 651*a5c59a29SKevin Tung "RST_SMB_E1S_1","LED_ACTIVE_E1S_1", 652*a5c59a29SKevin Tung "E1S_1_PRSNT_N","RST_PCIE_E1S_1_PERST", 653*a5c59a29SKevin Tung "E1S_1_PWRDIS","ALERT_INA_1", 654*a5c59a29SKevin Tung "",""; 655*a5c59a29SKevin Tung }; 656*a5c59a29SKevin Tung 657*a5c59a29SKevin Tung /* E1S EB IOEXP1 */ 658*a5c59a29SKevin Tung gpio-expander@22 { 659*a5c59a29SKevin Tung compatible = "nxp,pca9535"; 660*a5c59a29SKevin Tung interrupt-parent = <&sgpiom0>; 661*a5c59a29SKevin Tung interrupts = <174 IRQ_TYPE_EDGE_FALLING>; 662*a5c59a29SKevin Tung reg = <0x22>; 663*a5c59a29SKevin Tung gpio-controller; 664*a5c59a29SKevin Tung #gpio-cells = <2>; 665*a5c59a29SKevin Tung gpio-line-names = 666*a5c59a29SKevin Tung "P12V_E1S_EN_0","PWRGD_P12V_E1S_0", 667*a5c59a29SKevin Tung "P12V_E1S_FLTB_0","PWRGD_P3V3_E1S_0", 668*a5c59a29SKevin Tung "FM_P3V3_E1S_0_FAULT","P12V_E1S_EN_1", 669*a5c59a29SKevin Tung "PWRGD_P12V_E1S_1","P12V_E1S_FLTB_1", 670*a5c59a29SKevin Tung "PWRGD_P3V3_E1S_1","FM_P3V3_E1S_1_FAULT", 671*a5c59a29SKevin Tung "","", 672*a5c59a29SKevin Tung "","", 673*a5c59a29SKevin Tung "PWRGD_P3V3_AUX","ALERT_TEMP"; 674*a5c59a29SKevin Tung }; 675*a5c59a29SKevin Tung 676*a5c59a29SKevin Tung power-sensor@40 { 677*a5c59a29SKevin Tung compatible = "ti,ina233"; 678*a5c59a29SKevin Tung reg = <0x40>; 679*a5c59a29SKevin Tung shunt-resistor = <2000>; 680*a5c59a29SKevin Tung ti,maximum-expected-current-microamp = <32768000>; 681*a5c59a29SKevin Tung }; 682*a5c59a29SKevin Tung 683*a5c59a29SKevin Tung power-sensor@45 { 684*a5c59a29SKevin Tung compatible = "ti,ina233"; 685*a5c59a29SKevin Tung reg = <0x45>; 686*a5c59a29SKevin Tung shunt-resistor = <2000>; 687*a5c59a29SKevin Tung ti,maximum-expected-current-microamp = <32768000>; 688*a5c59a29SKevin Tung }; 689*a5c59a29SKevin Tung 690*a5c59a29SKevin Tung adc@48 { 691*a5c59a29SKevin Tung compatible = "ti,ads7830"; 692*a5c59a29SKevin Tung reg = <0x48>; 693*a5c59a29SKevin Tung }; 694*a5c59a29SKevin Tung 695*a5c59a29SKevin Tung temperature-sensor@49 { 696*a5c59a29SKevin Tung compatible = "ti,tmp75"; 697*a5c59a29SKevin Tung reg = <0x49>; 698*a5c59a29SKevin Tung }; 699*a5c59a29SKevin Tung 700*a5c59a29SKevin Tung /* E1S EB FRU */ 701*a5c59a29SKevin Tung eeprom@54 { 702*a5c59a29SKevin Tung compatible = "atmel,24c128"; 703*a5c59a29SKevin Tung reg = <0x54>; 704*a5c59a29SKevin Tung }; 705*a5c59a29SKevin Tung}; 706*a5c59a29SKevin Tung 707*a5c59a29SKevin Tung&i2c11 { 708*a5c59a29SKevin Tung status = "okay"; 709*a5c59a29SKevin Tung 710*a5c59a29SKevin Tung /* MB IOEXP */ 711*a5c59a29SKevin Tung gpio-expander@21 { 712*a5c59a29SKevin Tung compatible = "nxp,pca9535"; 713*a5c59a29SKevin Tung interrupt-parent = <&sgpiom0>; 714*a5c59a29SKevin Tung interrupts = <170 IRQ_TYPE_EDGE_FALLING>; 715*a5c59a29SKevin Tung reg = <0x21>; 716*a5c59a29SKevin Tung gpio-controller; 717*a5c59a29SKevin Tung #gpio-cells = <2>; 718*a5c59a29SKevin Tung gpio-line-names = 719*a5c59a29SKevin Tung "ALERT_CLKMUX_0_LOSS_N","ALERT_CLKMUX_1_LOSS_N", 720*a5c59a29SKevin Tung "ALERT_CLKMUX_2_LOSS_N","ALERT_CLKMUX_3_LOSS_N", 721*a5c59a29SKevin Tung "FM_CLKMUX_0_SEL","FM_CLKMUX_1_SEL", 722*a5c59a29SKevin Tung "FM_CLKMUX_2_SEL","FM_CLKMUX_3_SEL", 723*a5c59a29SKevin Tung "RST_USB_HUB_0_N","FM_CLKGEN_GPIO2", 724*a5c59a29SKevin Tung "","FM_BMC_RTC_RST", 725*a5c59a29SKevin Tung "FM_P3V_BAT_SCALED_EN","", 726*a5c59a29SKevin Tung "FM_CLKGEN_GPIO4","RST_USB_HUB_1_N"; 727*a5c59a29SKevin Tung }; 728*a5c59a29SKevin Tung 729*a5c59a29SKevin Tung power-sensor@40 { 730*a5c59a29SKevin Tung compatible = "ti,ina230"; 731*a5c59a29SKevin Tung reg = <0x40>; 732*a5c59a29SKevin Tung shunt-resistor = <2000>; 733*a5c59a29SKevin Tung }; 734*a5c59a29SKevin Tung 735*a5c59a29SKevin Tung power-sensor@41 { 736*a5c59a29SKevin Tung compatible = "ti,ina230"; 737*a5c59a29SKevin Tung reg = <0x41>; 738*a5c59a29SKevin Tung shunt-resistor = <2000>; 739*a5c59a29SKevin Tung }; 740*a5c59a29SKevin Tung 741*a5c59a29SKevin Tung power-sensor@42 { 742*a5c59a29SKevin Tung compatible = "ti,ina230"; 743*a5c59a29SKevin Tung reg = <0x42>; 744*a5c59a29SKevin Tung shunt-resistor = <2000>; 745*a5c59a29SKevin Tung }; 746*a5c59a29SKevin Tung 747*a5c59a29SKevin Tung power-sensor@43 { 748*a5c59a29SKevin Tung compatible = "ti,ina230"; 749*a5c59a29SKevin Tung reg = <0x43>; 750*a5c59a29SKevin Tung shunt-resistor = <2000>; 751*a5c59a29SKevin Tung }; 752*a5c59a29SKevin Tung 753*a5c59a29SKevin Tung power-sensor@44 { 754*a5c59a29SKevin Tung compatible = "ti,ina230"; 755*a5c59a29SKevin Tung reg = <0x44>; 756*a5c59a29SKevin Tung shunt-resistor = <2000>; 757*a5c59a29SKevin Tung }; 758*a5c59a29SKevin Tung 759*a5c59a29SKevin Tung power-sensor@45 { 760*a5c59a29SKevin Tung compatible = "ti,ina230"; 761*a5c59a29SKevin Tung reg = <0x45>; 762*a5c59a29SKevin Tung shunt-resistor = <2000>; 763*a5c59a29SKevin Tung }; 764*a5c59a29SKevin Tung 765*a5c59a29SKevin Tung adc@48 { 766*a5c59a29SKevin Tung compatible = "ti,ads7830"; 767*a5c59a29SKevin Tung reg = <0x48>; 768*a5c59a29SKevin Tung }; 769*a5c59a29SKevin Tung 770*a5c59a29SKevin Tung adc@49 { 771*a5c59a29SKevin Tung compatible = "ti,ads7830"; 772*a5c59a29SKevin Tung reg = <0x49>; 773*a5c59a29SKevin Tung }; 774*a5c59a29SKevin Tung 775*a5c59a29SKevin Tung adc@4b { 776*a5c59a29SKevin Tung compatible = "ti,ads7830"; 777*a5c59a29SKevin Tung reg = <0x4b>; 778*a5c59a29SKevin Tung }; 779*a5c59a29SKevin Tung}; 780*a5c59a29SKevin Tung 781*a5c59a29SKevin Tung/* MCIO 4A I2C */ 782*a5c59a29SKevin Tung&i2c12 { 783*a5c59a29SKevin Tung multi-master; 784*a5c59a29SKevin Tung mctp-controller; 785*a5c59a29SKevin Tung status = "okay"; 786*a5c59a29SKevin Tung 787*a5c59a29SKevin Tung mctp@10 { 788*a5c59a29SKevin Tung compatible = "mctp-i2c-controller"; 789*a5c59a29SKevin Tung reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; 790*a5c59a29SKevin Tung }; 791*a5c59a29SKevin Tung}; 792*a5c59a29SKevin Tung 793*a5c59a29SKevin Tung&i2c13 { 794*a5c59a29SKevin Tung status = "okay"; 795*a5c59a29SKevin Tung 796*a5c59a29SKevin Tung power-sensor@40 { 797*a5c59a29SKevin Tung compatible = "ti,ina230"; 798*a5c59a29SKevin Tung reg = <0x40>; 799*a5c59a29SKevin Tung shunt-resistor = <2000>; 800*a5c59a29SKevin Tung }; 801*a5c59a29SKevin Tung 802*a5c59a29SKevin Tung power-sensor@41 { 803*a5c59a29SKevin Tung compatible = "ti,ina230"; 804*a5c59a29SKevin Tung reg = <0x41>; 805*a5c59a29SKevin Tung shunt-resistor = <2000>; 806*a5c59a29SKevin Tung }; 807*a5c59a29SKevin Tung 808*a5c59a29SKevin Tung power-sensor@44 { 809*a5c59a29SKevin Tung compatible = "ti,ina230"; 810*a5c59a29SKevin Tung reg = <0x44>; 811*a5c59a29SKevin Tung shunt-resistor = <2000>; 812*a5c59a29SKevin Tung }; 813*a5c59a29SKevin Tung 814*a5c59a29SKevin Tung power-sensor@45 { 815*a5c59a29SKevin Tung compatible = "ti,ina230"; 816*a5c59a29SKevin Tung reg = <0x45>; 817*a5c59a29SKevin Tung shunt-resistor = <2000>; 818*a5c59a29SKevin Tung }; 819*a5c59a29SKevin Tung 820*a5c59a29SKevin Tung temperature-sensor@48 { 821*a5c59a29SKevin Tung compatible = "national,lm75b"; 822*a5c59a29SKevin Tung reg = <0x48>; 823*a5c59a29SKevin Tung }; 824*a5c59a29SKevin Tung 825*a5c59a29SKevin Tung temperature-sensor@49 { 826*a5c59a29SKevin Tung compatible = "national,lm75b"; 827*a5c59a29SKevin Tung reg = <0x49>; 828*a5c59a29SKevin Tung }; 829*a5c59a29SKevin Tung 830*a5c59a29SKevin Tung /* CLKGEN FRU */ 831*a5c59a29SKevin Tung eeprom@50 { 832*a5c59a29SKevin Tung compatible = "atmel,24c16"; 833*a5c59a29SKevin Tung reg = <0x50>; 834*a5c59a29SKevin Tung }; 835*a5c59a29SKevin Tung 836*a5c59a29SKevin Tung /* MB FRU */ 837*a5c59a29SKevin Tung eeprom@51 { 838*a5c59a29SKevin Tung compatible = "atmel,24c128"; 839*a5c59a29SKevin Tung reg = <0x51>; 840*a5c59a29SKevin Tung }; 841*a5c59a29SKevin Tung 842*a5c59a29SKevin Tung /* CPU FRU */ 843*a5c59a29SKevin Tung eeprom@53 { 844*a5c59a29SKevin Tung compatible = "atmel,24c128"; 845*a5c59a29SKevin Tung reg = <0x53>; 846*a5c59a29SKevin Tung }; 847*a5c59a29SKevin Tung 848*a5c59a29SKevin Tung rtc@68 { 849*a5c59a29SKevin Tung compatible = "dallas,ds1339"; 850*a5c59a29SKevin Tung reg = <0x68>; 851*a5c59a29SKevin Tung }; 852*a5c59a29SKevin Tung}; 853*a5c59a29SKevin Tung 854*a5c59a29SKevin Tung/* PROT reserve */ 855*a5c59a29SKevin Tung&i2c14 { 856*a5c59a29SKevin Tung status = "okay"; 857*a5c59a29SKevin Tung}; 858*a5c59a29SKevin Tung 859*a5c59a29SKevin Tung/* MCIO 3A I2C */ 860*a5c59a29SKevin Tung&i2c15 { 861*a5c59a29SKevin Tung status = "okay"; 862*a5c59a29SKevin Tung}; 863*a5c59a29SKevin Tung 864*a5c59a29SKevin Tung&kcs2 { 865*a5c59a29SKevin Tung aspeed,lpc-io-reg = <0xca8>; 866*a5c59a29SKevin Tung status = "okay"; 867*a5c59a29SKevin Tung}; 868*a5c59a29SKevin Tung 869*a5c59a29SKevin Tung&kcs3 { 870*a5c59a29SKevin Tung aspeed,lpc-io-reg = <0xca2>; 871*a5c59a29SKevin Tung status = "okay"; 872*a5c59a29SKevin Tung}; 873*a5c59a29SKevin Tung 874*a5c59a29SKevin Tung&mac2 { 875*a5c59a29SKevin Tung pinctrl-names = "default"; 876*a5c59a29SKevin Tung pinctrl-0 = <&pinctrl_ncsi3_default>; 877*a5c59a29SKevin Tung use-ncsi; 878*a5c59a29SKevin Tung status = "okay"; 879*a5c59a29SKevin Tung}; 880*a5c59a29SKevin Tung 881*a5c59a29SKevin Tung&pinctrl { 882*a5c59a29SKevin Tung pinctrl_ncsi3_default: ncsi3_default { 883*a5c59a29SKevin Tung function = "RMII3"; 884*a5c59a29SKevin Tung groups = "NCSI3"; 885*a5c59a29SKevin Tung }; 886*a5c59a29SKevin Tung}; 887*a5c59a29SKevin Tung 888*a5c59a29SKevin Tung&sgpiom0 { 889*a5c59a29SKevin Tung ngpios = <128>; 890*a5c59a29SKevin Tung bus-frequency = <2000000>; 891*a5c59a29SKevin Tung gpio-line-names = 892*a5c59a29SKevin Tung /*"input pin","output pin"*/ 893*a5c59a29SKevin Tung /*bit0-bit7*/ 894*a5c59a29SKevin Tung "PWRGD_CPU_PWROK","SGPIO_RSTBTN_OUT", 895*a5c59a29SKevin Tung "PWRGD_CPU_PWROK_1","SGPIO_BMC_READY", 896*a5c59a29SKevin Tung "PWRGD_CPU_PWROK_2","IBB_BMC_SRST", 897*a5c59a29SKevin Tung "host0-ready","FM_I3C_SPD_AH_SEL_R", 898*a5c59a29SKevin Tung "PCIe_HP_BOOT","FM_I3C_SPD_IP_SEL_R", 899*a5c59a29SKevin Tung "PCIe_HP_DATA","FM_JTAG_BMC_MUX_S0_R", 900*a5c59a29SKevin Tung "PCIe_HP_NIC","FM_JTAG_BMC_MUX_S1_R", 901*a5c59a29SKevin Tung "","FM_JTAG_BMC_OE_1_R_N", 902*a5c59a29SKevin Tung /*bit8-bit15*/ 903*a5c59a29SKevin Tung "PWRGD_PVDDCR_CPU0_P0","FM_JTAG_BMC_OE_R_N", 904*a5c59a29SKevin Tung "PWRGD_PVDDCR_SOC_P0","FM_REMOTEJTAG_EN_R_N", 905*a5c59a29SKevin Tung "PWRGD_PVDDCR_CPU1_P0","FM_CPU_FORCE_SELFREFRESH_R", 906*a5c59a29SKevin Tung "PWRGD_P3V3_STBY","FM_CPU_NMI_SYNC_FLOOD_R_N", 907*a5c59a29SKevin Tung "PWRGD_PVDD33_S5","FM_CPU_TRIGGERTSC_OE_R_N", 908*a5c59a29SKevin Tung "PWRGD_PVDD18_S5_P0","FM_PASSWORD_CLEAR_R_N", 909*a5c59a29SKevin Tung "PWRGD_PVDDIO_P0","FM_BIOS_USB_RECOVERY_N", 910*a5c59a29SKevin Tung "PWRGD_PVDDIO_MEM_S3_P0","FM_USB_MUX_OE_R_N", 911*a5c59a29SKevin Tung /*bit16-bit23*/ 912*a5c59a29SKevin Tung "PWRGD_P1V8_STBY","FM_USB_MUX_SEL_R", 913*a5c59a29SKevin Tung "PWRGD_P1V0_STBY","RST_SMB_BOOT_R_N", 914*a5c59a29SKevin Tung "PWRGD_P1V2_STBY","RST_SMB_MCIO0A_R_N", 915*a5c59a29SKevin Tung "IBB_BMC_SRST","RST_SMB_NIC_R_N", 916*a5c59a29SKevin Tung "PWRGD_P12V_E1S_0","FM_PPS_NIC_IN_BUF_OE_R_N", 917*a5c59a29SKevin Tung "PWRGD_P12V_E1S_1","FM_PPS_NIC_IN_EN_R", 918*a5c59a29SKevin Tung "RST_PCIE_BOOT_PERST_N","FM_PPS_NIC_IN_OE_R_N", 919*a5c59a29SKevin Tung "PWRGD_P12V_NIC","FM_PPS_NIC_IN_S0_R", 920*a5c59a29SKevin Tung /*bit24-bit31*/ 921*a5c59a29SKevin Tung "PWRGD_P12V_SCM","FM_PPS_NIC_IN_S1_R", 922*a5c59a29SKevin Tung "PWRGD_P12V_DIMM","FM_PPS_NIC_OUT_BUF_OE_R_N", 923*a5c59a29SKevin Tung "PWRGD_CPU_DIMM0_AH","FM_PPS_NIC_OUT_CPU_OE_R_N", 924*a5c59a29SKevin Tung "PWRGD_CPU_DIMM1_IP","FM_PPS_NIC_OUT_EN_R", 925*a5c59a29SKevin Tung "PWRGD_NIC_CPLD","JTAG_CPLD_DBREQ_R_N", 926*a5c59a29SKevin Tung "ALERT_INA230_DIMM_0_N","HDT_HDR_RESET_R_N", 927*a5c59a29SKevin Tung "ALERT_INA230_DIMM_1_N","FM_SMB_AUTH_MUX_OE_R_N", 928*a5c59a29SKevin Tung "ALERT_INA230_E1S_0_N","FM_SCM_LED_R_N", 929*a5c59a29SKevin Tung /*bit32-bit39*/ 930*a5c59a29SKevin Tung "ALERT_INA230_E1S_1_N","", 931*a5c59a29SKevin Tung "ALERT_INA230_FAN0_N","", 932*a5c59a29SKevin Tung "ALERT_INA230_FAN1_N","", 933*a5c59a29SKevin Tung "ALERT_INA230_FAN2_N","", 934*a5c59a29SKevin Tung "ALERT_INA230_FAN3_N","", 935*a5c59a29SKevin Tung "ALERT_INA230_NIC_N","", 936*a5c59a29SKevin Tung "ALERT_INA230_SCM_N","", 937*a5c59a29SKevin Tung "ALERT_IRQ_PMBUS_PWR11_N","", 938*a5c59a29SKevin Tung /*bit40-bit47*/ 939*a5c59a29SKevin Tung "ALERT_MCIO2A_LEAK_DETECT_N","", 940*a5c59a29SKevin Tung "ALERT_MCIO3A_LEAK_DETECT_N","", 941*a5c59a29SKevin Tung "ALERT_MCIO4A_LEAK_DETECT_N","", 942*a5c59a29SKevin Tung "ALERT_OC_PADDLE2_N","", 943*a5c59a29SKevin Tung "ALERT_OC_PWR2_N","", 944*a5c59a29SKevin Tung "ALERT_OC_PWR11_N","", 945*a5c59a29SKevin Tung "ALERT_PADDLE2_SMB_N","", 946*a5c59a29SKevin Tung "ALERT_PWR14_SB2_LEAK_DETECT_N","", 947*a5c59a29SKevin Tung /*bit48-bit55*/ 948*a5c59a29SKevin Tung "ALERT_PWR14_SB3_LEAK_DETECT_N","", 949*a5c59a29SKevin Tung "ALERT_PWR15_SB2_LEAK_DETECT_N","", 950*a5c59a29SKevin Tung "ALERT_PWR15_SB3_LEAK_DETECT_N","", 951*a5c59a29SKevin Tung "ALERT_SMB_MCIO0A_N","", 952*a5c59a29SKevin Tung "ALERT_SMB_MCIO1A_N","", 953*a5c59a29SKevin Tung "ALERT_SMB_MCIO2A_N","", 954*a5c59a29SKevin Tung "ALERT_SMB_MCIO2B_N","", 955*a5c59a29SKevin Tung "ALERT_SMB_MCIO3A_N","", 956*a5c59a29SKevin Tung /*bit56-bit63*/ 957*a5c59a29SKevin Tung "ALERT_SMB_MCIO3B_N","", 958*a5c59a29SKevin Tung "ALERT_SMB_MCIO4A_N","", 959*a5c59a29SKevin Tung "ALERT_SMB_MCIO4B_N","", 960*a5c59a29SKevin Tung "ALERT_THERMALTRIP_MCIO1A_N","", 961*a5c59a29SKevin Tung "ALERT_THERMALTRIP_MCIO2A_N","", 962*a5c59a29SKevin Tung "ALERT_THERMALTRIP_MCIO3A_N","", 963*a5c59a29SKevin Tung "ALERT_THERMALTRIP_MCIO4A_N","", 964*a5c59a29SKevin Tung "ALERT_UV_PADDLE2_N","", 965*a5c59a29SKevin Tung /*bit64-bit71*/ 966*a5c59a29SKevin Tung "ALERT_UV_PWR2_N","", 967*a5c59a29SKevin Tung "ALERT_UV_PWR11_N","", 968*a5c59a29SKevin Tung "ALERT_VR_SMB_N","", 969*a5c59a29SKevin Tung "FAULT_FAN_0_N","", 970*a5c59a29SKevin Tung "FAULT_FAN_1_N","", 971*a5c59a29SKevin Tung "FAULT_FAN_2_N","", 972*a5c59a29SKevin Tung "FAULT_FAN_3_N","", 973*a5c59a29SKevin Tung "FAULT_P3V3_E1S_0_N","", 974*a5c59a29SKevin Tung /*bit72-bit79*/ 975*a5c59a29SKevin Tung "FAULT_P3V3_E1S_1_N","", 976*a5c59a29SKevin Tung "FAULT_P3V3_NIC_N","", 977*a5c59a29SKevin Tung "FAULT_P12V_NIC_N","", 978*a5c59a29SKevin Tung "FAULT_P12V_SCM_N","", 979*a5c59a29SKevin Tung "P0_I3C_APML_ALERT_L","", 980*a5c59a29SKevin Tung "ALERT_INLET_TEMP_N","", 981*a5c59a29SKevin Tung "FM_CPU_PROCHOT_R_N","", 982*a5c59a29SKevin Tung "FM_CPU_THERMTRIP_N","", 983*a5c59a29SKevin Tung /*bit80-bit87*/ 984*a5c59a29SKevin Tung "ALERT_OUTLET_TEMP_N","", 985*a5c59a29SKevin Tung "ALERT_RTC_N","", 986*a5c59a29SKevin Tung "PVDDCR_CPU0_P0_OCP_N","", 987*a5c59a29SKevin Tung "PVDDCR_CPU1_P0_OCP_N","", 988*a5c59a29SKevin Tung "PVDDCR_SOC_P0_OCP_N","", 989*a5c59a29SKevin Tung "MB_IOEXP_INT","", 990*a5c59a29SKevin Tung "E1S_0_BD_IOEXP","", 991*a5c59a29SKevin Tung "E1S_1_BD_IOEXP","", 992*a5c59a29SKevin Tung /*bit88-bit95*/ 993*a5c59a29SKevin Tung "PADDLE_BD_IOEXP_INT","", 994*a5c59a29SKevin Tung "FM_BOARD_REV_ID0","", 995*a5c59a29SKevin Tung "FM_BOARD_REV_ID1","", 996*a5c59a29SKevin Tung "FM_BOARD_REV_ID2","", 997*a5c59a29SKevin Tung "FM_VR_TYPE_ID0","", 998*a5c59a29SKevin Tung "FM_VR_TYPE_ID1","", 999*a5c59a29SKevin Tung "PRSNT_BOOT_N_IOEXP","", 1000*a5c59a29SKevin Tung "PRSNT_DATA_N_IOEXP","", 1001*a5c59a29SKevin Tung /*bit96-bit103*/ 1002*a5c59a29SKevin Tung "PRSNT_NIC_N_IOEXP","", 1003*a5c59a29SKevin Tung "PRSNT_BOOT_N_FF","", 1004*a5c59a29SKevin Tung "PRSNT_MCIO1A_N_FF","", 1005*a5c59a29SKevin Tung "NIC_PRSNT_N","", 1006*a5c59a29SKevin Tung "","", 1007*a5c59a29SKevin Tung "","", 1008*a5c59a29SKevin Tung "","", 1009*a5c59a29SKevin Tung "","", 1010*a5c59a29SKevin Tung /*bit104-bit111*/ 1011*a5c59a29SKevin Tung "","","","","","","","","","","","","","","","", 1012*a5c59a29SKevin Tung /*bit112-bit119*/ 1013*a5c59a29SKevin Tung "","","","","","","","","","","","","","","","", 1014*a5c59a29SKevin Tung /*bit120-bit127*/ 1015*a5c59a29SKevin Tung "","","","","","","","","","","","","","","",""; 1016*a5c59a29SKevin Tung status = "okay"; 1017*a5c59a29SKevin Tung}; 1018*a5c59a29SKevin Tung 1019*a5c59a29SKevin Tung/* BIOS Flash */ 1020*a5c59a29SKevin Tung&spi2 { 1021*a5c59a29SKevin Tung pinctrl-names = "default"; 1022*a5c59a29SKevin Tung pinctrl-0 = <&pinctrl_spi2_default>; 1023*a5c59a29SKevin Tung status = "okay"; 1024*a5c59a29SKevin Tung 1025*a5c59a29SKevin Tung flash@0 { 1026*a5c59a29SKevin Tung m25p,fast-read; 1027*a5c59a29SKevin Tung label = "pnor"; 1028*a5c59a29SKevin Tung spi-max-frequency = <12000000>; 1029*a5c59a29SKevin Tung spi-tx-bus-width = <2>; 1030*a5c59a29SKevin Tung spi-rx-bus-width = <2>; 1031*a5c59a29SKevin Tung status = "okay"; 1032*a5c59a29SKevin Tung }; 1033*a5c59a29SKevin Tung}; 1034*a5c59a29SKevin Tung 1035*a5c59a29SKevin Tung/* Host Console */ 1036*a5c59a29SKevin Tung&uart1 { 1037*a5c59a29SKevin Tung status = "okay"; 1038*a5c59a29SKevin Tung}; 1039*a5c59a29SKevin Tung 1040*a5c59a29SKevin Tung&uart2 { 1041*a5c59a29SKevin Tung status = "okay"; 1042*a5c59a29SKevin Tung}; 1043*a5c59a29SKevin Tung 1044*a5c59a29SKevin Tung/* SOL */ 1045*a5c59a29SKevin Tung&uart3 { 1046*a5c59a29SKevin Tung status = "okay"; 1047*a5c59a29SKevin Tung}; 1048*a5c59a29SKevin Tung 1049*a5c59a29SKevin Tung&uart4 { 1050*a5c59a29SKevin Tung status = "okay"; 1051*a5c59a29SKevin Tung}; 1052*a5c59a29SKevin Tung 1053*a5c59a29SKevin Tung/* BMC Console */ 1054*a5c59a29SKevin Tung&uart5 { 1055*a5c59a29SKevin Tung status = "okay"; 1056*a5c59a29SKevin Tung}; 1057*a5c59a29SKevin Tung 1058*a5c59a29SKevin Tung&wdt1 { 1059*a5c59a29SKevin Tung pinctrl-names = "default"; 1060*a5c59a29SKevin Tung pinctrl-0 = <&pinctrl_wdtrst1_default>; 1061*a5c59a29SKevin Tung aspeed,reset-type = "soc"; 1062*a5c59a29SKevin Tung aspeed,external-signal; 1063*a5c59a29SKevin Tung aspeed,ext-push-pull; 1064*a5c59a29SKevin Tung aspeed,ext-active-high; 1065*a5c59a29SKevin Tung aspeed,ext-pulse-duration = <256>; 1066*a5c59a29SKevin Tung status = "okay"; 1067*a5c59a29SKevin Tung}; 1068