xref: /linux/arch/arm/boot/dts/amlogic/meson8m2.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring#include "meson8.dtsi"
7*724ba675SRob Herring
8*724ba675SRob Herring/ {
9*724ba675SRob Herring	model = "Amlogic Meson8m2 SoC";
10*724ba675SRob Herring	compatible = "amlogic,meson8m2";
11*724ba675SRob Herring}; /* end of / */
12*724ba675SRob Herring
13*724ba675SRob Herring&clkc {
14*724ba675SRob Herring	compatible = "amlogic,meson8m2-clkc", "amlogic,meson8-clkc";
15*724ba675SRob Herring};
16*724ba675SRob Herring
17*724ba675SRob Herring&dmcbus {
18*724ba675SRob Herring	/* the offset of the canvas registers has changed compared to Meson8 */
19*724ba675SRob Herring	/delete-node/ video-lut@20;
20*724ba675SRob Herring
21*724ba675SRob Herring	canvas: video-lut@48 {
22*724ba675SRob Herring		compatible = "amlogic,meson8m2-canvas", "amlogic,canvas";
23*724ba675SRob Herring		reg = <0x48 0x14>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring};
26*724ba675SRob Herring
27*724ba675SRob Herring&ethmac {
28*724ba675SRob Herring	compatible = "amlogic,meson8m2-dwmac", "snps,dwmac";
29*724ba675SRob Herring	reg = <0xc9410000 0x10000
30*724ba675SRob Herring		0xc1108140 0x8>;
31*724ba675SRob Herring	clocks = <&clkc CLKID_ETH>,
32*724ba675SRob Herring		 <&clkc CLKID_MPLL2>,
33*724ba675SRob Herring		 <&clkc CLKID_MPLL2>,
34*724ba675SRob Herring		 <&clkc CLKID_FCLK_DIV2>;
35*724ba675SRob Herring	clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
36*724ba675SRob Herring	resets = <&reset RESET_ETHERNET>;
37*724ba675SRob Herring	reset-names = "stmmaceth";
38*724ba675SRob Herring};
39*724ba675SRob Herring
40*724ba675SRob Herring&pinctrl_aobus {
41*724ba675SRob Herring	compatible = "amlogic,meson8m2-aobus-pinctrl",
42*724ba675SRob Herring		     "amlogic,meson8-aobus-pinctrl";
43*724ba675SRob Herring};
44*724ba675SRob Herring
45*724ba675SRob Herring&pinctrl_cbus {
46*724ba675SRob Herring	compatible = "amlogic,meson8m2-cbus-pinctrl",
47*724ba675SRob Herring		     "amlogic,meson8-cbus-pinctrl";
48*724ba675SRob Herring
49*724ba675SRob Herring	eth_rgmii_pins: ethernet {
50*724ba675SRob Herring		mux {
51*724ba675SRob Herring			groups = "eth_tx_clk_50m", "eth_tx_en",
52*724ba675SRob Herring				 "eth_txd3", "eth_txd2",
53*724ba675SRob Herring				 "eth_txd1", "eth_txd0",
54*724ba675SRob Herring				 "eth_rx_clk_in", "eth_rx_dv",
55*724ba675SRob Herring				 "eth_rxd3", "eth_rxd2",
56*724ba675SRob Herring				 "eth_rxd1", "eth_rxd0",
57*724ba675SRob Herring				 "eth_mdio", "eth_mdc";
58*724ba675SRob Herring			function = "ethernet";
59*724ba675SRob Herring			bias-disable;
60*724ba675SRob Herring		};
61*724ba675SRob Herring	};
62*724ba675SRob Herring};
63*724ba675SRob Herring
64*724ba675SRob Herring&pwrc {
65*724ba675SRob Herring	compatible = "amlogic,meson8m2-pwrc";
66*724ba675SRob Herring	resets = <&reset RESET_DBLK>,
67*724ba675SRob Herring		 <&reset RESET_PIC_DC>,
68*724ba675SRob Herring		 <&reset RESET_HDMI_APB>,
69*724ba675SRob Herring		 <&reset RESET_HDMI_SYSTEM_RESET>,
70*724ba675SRob Herring		 <&reset RESET_VENCI>,
71*724ba675SRob Herring		 <&reset RESET_VENCP>,
72*724ba675SRob Herring		 <&reset RESET_VDAC_4>,
73*724ba675SRob Herring		 <&reset RESET_VENCL>,
74*724ba675SRob Herring		 <&reset RESET_VIU>,
75*724ba675SRob Herring		 <&reset RESET_VENC>,
76*724ba675SRob Herring		 <&reset RESET_RDMA>;
77*724ba675SRob Herring	reset-names = "dblk", "pic_dc", "hdmi_apb", "hdmi_system", "venci",
78*724ba675SRob Herring		      "vencp", "vdac", "vencl", "viu", "venc", "rdma";
79*724ba675SRob Herring	assigned-clocks = <&clkc CLKID_VPU>;
80*724ba675SRob Herring	assigned-clock-rates = <364000000>;
81*724ba675SRob Herring};
82*724ba675SRob Herring
83*724ba675SRob Herring&saradc {
84*724ba675SRob Herring	compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
85*724ba675SRob Herring};
86*724ba675SRob Herring
87*724ba675SRob Herring&sdhc {
88*724ba675SRob Herring	compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
89*724ba675SRob Herring};
90*724ba675SRob Herring
91*724ba675SRob Herring&usb0_phy {
92*724ba675SRob Herring	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
93*724ba675SRob Herring};
94*724ba675SRob Herring
95*724ba675SRob Herring&usb1_phy {
96*724ba675SRob Herring	compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy";
97*724ba675SRob Herring};
98*724ba675SRob Herring
99*724ba675SRob Herring&wdt {
100*724ba675SRob Herring	compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
101*724ba675SRob Herring};
102