1*d2912cb1SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-only 2a92a5d0dSMischa Jonker/* 3a92a5d0dSMischa Jonker * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) 4a92a5d0dSMischa Jonker */ 5a92a5d0dSMischa Jonker/dts-v1/; 6a92a5d0dSMischa Jonker 7a92a5d0dSMischa Jonker/include/ "skeleton.dtsi" 8a92a5d0dSMischa Jonker 9a92a5d0dSMischa Jonker/ { 10618a9cd0SAlexey Brodkin model = "snps,nsimosci"; 11a92a5d0dSMischa Jonker compatible = "snps,nsimosci"; 12a92a5d0dSMischa Jonker #address-cells = <1>; 13a92a5d0dSMischa Jonker #size-cells = <1>; 149ba7648cSVineet Gupta interrupt-parent = <&core_intc>; 15a92a5d0dSMischa Jonker 16a92a5d0dSMischa Jonker chosen { 1761fb4bfcSVineet Gupta /* this is for console on PGU */ 1861fb4bfcSVineet Gupta /* bootargs = "console=tty0 consoleblank=0"; */ 1961fb4bfcSVineet Gupta /* this is for console on serial */ 208ff3afc1SAlexey Brodkin bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1"; 21a92a5d0dSMischa Jonker }; 22a92a5d0dSMischa Jonker 23a92a5d0dSMischa Jonker aliases { 24a92a5d0dSMischa Jonker serial0 = &uart0; 25a92a5d0dSMischa Jonker }; 26a92a5d0dSMischa Jonker 27a92a5d0dSMischa Jonker fpga { 28a92a5d0dSMischa Jonker compatible = "simple-bus"; 29a92a5d0dSMischa Jonker #address-cells = <1>; 30a92a5d0dSMischa Jonker #size-cells = <1>; 31a92a5d0dSMischa Jonker 32a92a5d0dSMischa Jonker /* child and parent address space 1:1 mapped */ 33a92a5d0dSMischa Jonker ranges; 34a92a5d0dSMischa Jonker 35b3d6aba8SVineet Gupta core_clk: core_clk { 36b3d6aba8SVineet Gupta #clock-cells = <0>; 37b3d6aba8SVineet Gupta compatible = "fixed-clock"; 38b3d6aba8SVineet Gupta clock-frequency = <20000000>; 39b3d6aba8SVineet Gupta }; 40b3d6aba8SVineet Gupta 419ba7648cSVineet Gupta core_intc: interrupt-controller { 42a92a5d0dSMischa Jonker compatible = "snps,arc700-intc"; 43a92a5d0dSMischa Jonker interrupt-controller; 44a92a5d0dSMischa Jonker #interrupt-cells = <1>; 45a92a5d0dSMischa Jonker }; 46a92a5d0dSMischa Jonker 47e8ef060bSVineet Gupta uart0: serial@f0000000 { 486eda477bSMischa Jonker compatible = "ns8250"; 49e8ef060bSVineet Gupta reg = <0xf0000000 0x2000>; 50a92a5d0dSMischa Jonker interrupts = <11>; 51a92a5d0dSMischa Jonker clock-frequency = <3686400>; 52a92a5d0dSMischa Jonker baud = <115200>; 53a92a5d0dSMischa Jonker reg-shift = <2>; 54a92a5d0dSMischa Jonker reg-io-width = <4>; 556eda477bSMischa Jonker no-loopback-test = <1>; 56a92a5d0dSMischa Jonker }; 57a92a5d0dSMischa Jonker 58830c6578SAlexey Brodkin pguclk: pguclk { 59830c6578SAlexey Brodkin #clock-cells = <0>; 60830c6578SAlexey Brodkin compatible = "fixed-clock"; 61830c6578SAlexey Brodkin clock-frequency = <25175000>; 62830c6578SAlexey Brodkin }; 63830c6578SAlexey Brodkin 64830c6578SAlexey Brodkin pgu@f9000000 { 65830c6578SAlexey Brodkin compatible = "snps,arcpgu"; 66e8ef060bSVineet Gupta reg = <0xf9000000 0x400>; 67830c6578SAlexey Brodkin clocks = <&pguclk>; 68830c6578SAlexey Brodkin clock-names = "pxlclk"; 69a92a5d0dSMischa Jonker }; 70a92a5d0dSMischa Jonker 71e8ef060bSVineet Gupta ps2: ps2@f9001000 { 72a92a5d0dSMischa Jonker compatible = "snps,arc_ps2"; 73e8ef060bSVineet Gupta reg = <0xf9000400 0x14>; 74a92a5d0dSMischa Jonker interrupts = <13>; 75a92a5d0dSMischa Jonker interrupt-names = "arc_ps2_irq"; 76a92a5d0dSMischa Jonker }; 77a92a5d0dSMischa Jonker 78e8ef060bSVineet Gupta eth0: ethernet@f0003000 { 79df420fd6SLada Trimasova compatible = "ezchip,nps-mgt-enet"; 80e8ef060bSVineet Gupta reg = <0xf0003000 0x44>; 81df420fd6SLada Trimasova interrupts = <7>; 82a92a5d0dSMischa Jonker }; 836227e9f0SAlexey Brodkin 846227e9f0SAlexey Brodkin arcpct0: pct { 856227e9f0SAlexey Brodkin compatible = "snps,arc700-pct"; 866227e9f0SAlexey Brodkin }; 87a92a5d0dSMischa Jonker }; 88a92a5d0dSMischa Jonker}; 89