xref: /linux/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml (revision afeea2758b4f1210361ce2a91d8fa3e7df606ad2) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas MSIOF SPI controller
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: spi-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - const: renesas,msiof-sh73a0     # SH-Mobile AG5
20          - const: renesas,sh-mobile-msiof  # generic SH-Mobile compatible
21                                            # device
22      - items:
23          - enum:
24              - renesas,msiof-r8a7742       # RZ/G1H
25              - renesas,msiof-r8a7743       # RZ/G1M
26              - renesas,msiof-r8a7744       # RZ/G1N
27              - renesas,msiof-r8a7745       # RZ/G1E
28              - renesas,msiof-r8a77470      # RZ/G1C
29              - renesas,msiof-r8a7790       # R-Car H2
30              - renesas,msiof-r8a7791       # R-Car M2-W
31              - renesas,msiof-r8a7792       # R-Car V2H
32              - renesas,msiof-r8a7793       # R-Car M2-N
33              - renesas,msiof-r8a7794       # R-Car E2
34          - const: renesas,rcar-gen2-msiof  # generic R-Car Gen2 and RZ/G1
35                                            # compatible device
36      - items:
37          - enum:
38              - renesas,msiof-r8a774a1      # RZ/G2M
39              - renesas,msiof-r8a774b1      # RZ/G2N
40              - renesas,msiof-r8a774c0      # RZ/G2E
41              - renesas,msiof-r8a774e1      # RZ/G2H
42              - renesas,msiof-r8a7795       # R-Car H3
43              - renesas,msiof-r8a7796       # R-Car M3-W
44              - renesas,msiof-r8a77961      # R-Car M3-W+
45              - renesas,msiof-r8a77965      # R-Car M3-N
46              - renesas,msiof-r8a77970      # R-Car V3M
47              - renesas,msiof-r8a77980      # R-Car V3H
48              - renesas,msiof-r8a77990      # R-Car E3
49              - renesas,msiof-r8a77995      # R-Car D3
50          - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G2
51                                            # compatible device
52      - items:
53          - enum:
54              - renesas,msiof-r8a779a0      # R-Car V3U
55              - renesas,msiof-r8a779f0      # R-Car S4-8
56              - renesas,msiof-r8a779g0      # R-Car V4H
57              - renesas,msiof-r8a779h0      # R-Car V4M
58          - const: renesas,rcar-gen4-msiof  # generic R-Car Gen4
59                                            # compatible device
60      - items:
61          - const: renesas,sh-msiof  # deprecated
62
63  reg:
64    minItems: 1
65    maxItems: 2
66    oneOf:
67      - items:
68          - description: CPU and DMA engine registers
69      - items:
70          - description: CPU registers
71          - description: DMA engine registers
72
73  interrupts:
74    maxItems: 1
75
76  clocks:
77    maxItems: 1
78
79  power-domains:
80    maxItems: 1
81
82  resets:
83    maxItems: 1
84
85  num-cs:
86    description: |
87      Total number of chip selects (default is 1).
88      Up to 3 native chip selects are supported:
89        0: MSIOF_SYNC
90        1: MSIOF_SS1
91        2: MSIOF_SS2
92      Hardware limitations related to chip selects:
93        - Native chip selects are always deasserted in between transfers
94          that are part of the same message.  Use cs-gpios to work around
95          this.
96        - All slaves using native chip selects must use the same spi-cs-high
97          configuration.  Use cs-gpios to work around this.
98        - When using GPIO chip selects, at least one native chip select must
99          be left unused, as it will be driven anyway.
100    minimum: 1
101    maximum: 3
102    default: 1
103
104  dmas:
105    minItems: 2
106    maxItems: 4
107
108  dma-names:
109    minItems: 2
110    maxItems: 4
111    items:
112      enum: [ tx, rx ]
113
114  renesas,dtdl:
115    description: delay sync signal (setup) in transmit mode.
116    $ref: /schemas/types.yaml#/definitions/uint32
117    enum:
118      - 0        # no bit delay
119      - 50       # 0.5-clock-cycle delay
120      - 100      # 1-clock-cycle delay
121      - 150      # 1.5-clock-cycle delay
122      - 200      # 2-clock-cycle delay
123
124  renesas,syncdl:
125    description: delay sync signal (hold) in transmit mode
126    $ref: /schemas/types.yaml#/definitions/uint32
127    enum:
128      - 0        # no bit delay
129      - 50       # 0.5-clock-cycle delay
130      - 100      # 1-clock-cycle delay
131      - 150      # 1.5-clock-cycle delay
132      - 200      # 2-clock-cycle delay
133      - 300      # 3-clock-cycle delay
134
135  renesas,tx-fifo-size:
136    # deprecated for soctype-specific bindings
137    description: |
138      Override the default TX fifo size.  Unit is words.  Ignored if 0.
139    $ref: /schemas/types.yaml#/definitions/uint32
140    default: 64
141
142  renesas,rx-fifo-size:
143    # deprecated for soctype-specific bindings
144    description: |
145      Override the default RX fifo size.  Unit is words.  Ignored if 0.
146    $ref: /schemas/types.yaml#/definitions/uint32
147    default: 64
148
149required:
150  - compatible
151  - reg
152  - interrupts
153  - clocks
154  - power-domains
155  - '#address-cells'
156  - '#size-cells'
157
158if:
159  not:
160    properties:
161      compatible:
162        contains:
163          const: renesas,sh-mobile-msiof
164then:
165  required:
166    - resets
167
168unevaluatedProperties: false
169
170examples:
171  - |
172    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
173    #include <dt-bindings/interrupt-controller/arm-gic.h>
174    #include <dt-bindings/power/r8a7791-sysc.h>
175
176    msiof0: spi@e6e20000 {
177        compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";
178        reg = <0xe6e20000 0x0064>;
179        interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
180        clocks = <&cpg CPG_MOD 000>;
181        dmas = <&dmac0 0x51>, <&dmac0 0x52>;
182        dma-names = "tx", "rx";
183        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
184        resets = <&cpg 0>;
185        #address-cells = <1>;
186        #size-cells = <0>;
187    };
188