xref: /linux/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml (revision 50b7e7082a3dde5bdba14a4e40a2e2279fd08a7b) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip USB2.0 phy with inno IP block
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    enum:
15      - rockchip,px30-usb2phy
16      - rockchip,rk3036-usb2phy
17      - rockchip,rk3128-usb2phy
18      - rockchip,rk3228-usb2phy
19      - rockchip,rk3308-usb2phy
20      - rockchip,rk3328-usb2phy
21      - rockchip,rk3366-usb2phy
22      - rockchip,rk3399-usb2phy
23      - rockchip,rk3562-usb2phy
24      - rockchip,rk3568-usb2phy
25      - rockchip,rk3576-usb2phy
26      - rockchip,rk3588-usb2phy
27      - rockchip,rv1108-usb2phy
28
29  reg:
30    maxItems: 1
31
32  clock-output-names:
33    description:
34      The usb 480m output clock name.
35
36  "#clock-cells":
37    const: 0
38
39  clocks:
40    minItems: 1
41    maxItems: 3
42
43  clock-names:
44    minItems: 1
45    items:
46      - const: phyclk
47      - const: aclk
48      - const: aclk_slv
49
50  assigned-clocks:
51    description:
52      Phandle of the usb 480m clock.
53
54  assigned-clock-parents:
55    description:
56      Parent of the usb 480m clock.
57      Select between usb-phy output 480m and xin24m.
58      Refer to clk/clock-bindings.txt for generic clock consumer properties.
59
60  extcon:
61    description:
62      Phandle to the extcon device providing the cable state for the otg phy.
63
64  interrupts:
65    description: Muxed interrupt for both ports
66    maxItems: 1
67
68  resets:
69    maxItems: 2
70
71  reset-names:
72    items:
73      - const: phy
74      - const: apb
75
76  rockchip,usbgrf:
77    $ref: /schemas/types.yaml#/definitions/phandle
78    description:
79      Phandle to the syscon managing the 'usb general register files'.
80      When set the driver will request its phandle as one companion-grf
81      for some special SoCs (e.g rv1108).
82
83  host-port:
84    type: object
85    additionalProperties: false
86
87    properties:
88      "#phy-cells":
89        const: 0
90
91      interrupts:
92        description: host linestate interrupt
93        maxItems: 1
94
95      interrupt-names:
96        const: linestate
97
98      phy-supply:
99        description:
100          Phandle to a regulator that provides power to VBUS.
101          See ./phy-bindings.txt for details.
102
103    required:
104      - "#phy-cells"
105
106  otg-port:
107    type: object
108    additionalProperties: false
109
110    properties:
111      "#phy-cells":
112        const: 0
113
114      interrupts:
115        minItems: 1
116        maxItems: 3
117
118      interrupt-names:
119        oneOf:
120          - const: linestate
121          - const: otg-mux
122          - items:
123              - const: otg-bvalid
124              - const: otg-id
125              - const: linestate
126
127      phy-supply:
128        description:
129          Phandle to a regulator that provides power to VBUS.
130          See ./phy-bindings.txt for details.
131
132    required:
133      - "#phy-cells"
134
135required:
136  - compatible
137  - reg
138  - clock-output-names
139  - "#clock-cells"
140
141anyOf:
142  - required:
143      - otg-port
144  - required:
145      - host-port
146
147allOf:
148  - if:
149      properties:
150        compatible:
151          contains:
152            enum:
153              - rockchip,rk3568-usb2phy
154              - rockchip,rk3588-usb2phy
155
156    then:
157      properties:
158        host-port:
159          properties:
160            interrupts: false
161
162        otg-port:
163          properties:
164            interrupts: false
165
166      required:
167        - interrupts
168
169    else:
170      properties:
171        interrupts: false
172
173        host-port:
174          required:
175            - interrupts
176            - interrupt-names
177
178        otg-port:
179          required:
180            - interrupts
181            - interrupt-names
182
183  - if:
184      properties:
185        compatible:
186          contains:
187            enum:
188              - rockchip,px30-usb2phy
189              - rockchip,rk3036-usb2phy
190              - rockchip,rk3128-usb2phy
191              - rockchip,rk3228-usb2phy
192              - rockchip,rk3308-usb2phy
193              - rockchip,rk3328-usb2phy
194              - rockchip,rk3366-usb2phy
195              - rockchip,rk3399-usb2phy
196              - rockchip,rk3562-usb2phy
197              - rockchip,rk3568-usb2phy
198              - rockchip,rk3588-usb2phy
199              - rockchip,rv1108-usb2phy
200    then:
201      properties:
202        clocks:
203          maxItems: 1
204        clock-names:
205          maxItems: 1
206
207  - if:
208      properties:
209        compatible:
210          contains:
211            enum:
212              - rockchip,rk3576-usb2phy
213    then:
214      properties:
215        clocks:
216          minItems: 3
217        clock-names:
218          minItems: 3
219
220additionalProperties: false
221
222examples:
223  - |
224    #include <dt-bindings/clock/rk3399-cru.h>
225    #include <dt-bindings/interrupt-controller/arm-gic.h>
226    #include <dt-bindings/interrupt-controller/irq.h>
227    u2phy0: usb2phy@e450 {
228      compatible = "rockchip,rk3399-usb2phy";
229      reg = <0xe450 0x10>;
230      clocks = <&cru SCLK_USB2PHY0_REF>;
231      clock-names = "phyclk";
232      clock-output-names = "clk_usbphy0_480m";
233      #clock-cells = <0>;
234
235      u2phy0_host: host-port {
236        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
237        interrupt-names = "linestate";
238        #phy-cells = <0>;
239      };
240
241      u2phy0_otg: otg-port {
242        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
243                     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
244                     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
245        interrupt-names = "otg-bvalid", "otg-id", "linestate";
246        #phy-cells = <0>;
247      };
248    };
249